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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 2, FEBRUARY 2012

Input Power Factor Compensation for High-Power CSC Fed PMSM Drive Using d-Axis Stator Current Control
Ehsan Al-nabi, Student Member, IEEE, Bin Wu, Fellow, IEEE, Navid R. Zargari, Senior Member, IEEE, and Vijay Sood, Fellow, IEEE

AbstractIn this paper, an input power factor compensation method is proposed for a high-power pulse-width-modulated current-source-converter (CSC)-fed permanent magnet synchronous motor (PMSM) drive system. The proposed method is based on controlling the d-axis stator current component in the eldoriented control (FOC) scheme of the drive system. The CSC-fed PMSM drive system and its FOC scheme are rst introduced. Then, the relationships between the machine side, dc-link, and the line side are investigated. Based on the analysis, a new d-axis stator current control scheme that can ensure unity input power factor for the operating speed range is proposed. The main feature of the proposed scheme is to compensate the line-side power factor without the need for modulation index control in either the rectier or the inverter. Therefore, ofine Selective Harmonic Elimination (SHE) modulation schemes can be implemented on both line- and machine-side converters to minimize the total harmonic distortion. This results in reduced switching frequency and reduced switching losses. Simulation results for a 2.44 MW medium-voltage system and experimental results from a low-voltage 6.5 kW IPM motor drive are provided to verify the effectiveness of the proposed compensation method. Index TermsCurrent-source converter (CSC), d-axis stator current control, eld-oriented control (FOC), high-power drives, medium-voltage drives, permanent magnet synchronous machine (PMSM), power factor (PF) compensation.

I. I NTRODUCTION N RECENT YEARS, a growing interest is devoted to permanent magnet synchronous motor (PMSM) due to many desirable features such as high efciency, low maintenance, high-power density and high-power factor. When the magnets are mounted on the surface of the rotor, the machine is surface mounted permanent magnet motor (SPM) (also known as nonsalient type). The magnets can also be placed inside the rotor,

Manuscript received October 17, 2010; revised February 23, 2011; accepted May 2, 2011. Date of publication June 7, 2011; date of current version October 18, 2011. E. Al-nabi and B. Wu are with the Department of Electrical and Computer Engineering, Ryerson University, Toronto, ON M5B 2K3, Canada (e-mail: ealnabi@ee.ryerson.ca; bwu@ee.ryerson.ca). N. R. Zargari is with the Medium Voltage Drive R & D Department, Rockwell Automation, Cambridge, ON N1R 5X1, Canada (e-mail: Nrzargari@ ra.rockwell.com). V. Sood is with the Faculty of Engineering and Applied Science, UOIT, Oshawa, ON L1H 7K4, Canada (e-mail: Vijay.Sood@uoit.ca). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TIE.2011.2158772

called interior permanent magnet motor (IPM) (also known as salient type). This is contrary to induction motor (IM) where it is always considered as non salient. In addition, PMSM has a constant rotor ux generated by the rotor permanent magnets and independent of the stator ux, while in IM, the rotor ux is generated as a reaction to the stator ux. Due to signicant improvements in magnets and thermal properties of the permanent magnet materials [1], the rating of PMSM has increased to meet the requirement of high-power applications. In fact, the power ratings of PMSM have extended from 1 kW to 30 MW. This increase in power rating and the aforementioned advantages open a new area of research in the eld of highpower medium-voltage drives for these type of motors. In medium-voltage high-power electric drive applications (such as petrochemical, mining, and metal industry), the PWM current-source inverters (CSI) are used increasingly in motor speed control. Compared to voltage-source inverter (VSI) fed drives, the current-source approach offers simple converter topology, inherent regeneration, reliable fuse-less short circuit protection, and low output voltage dv/dt. In the new generation high-power current-source fed drives, the thyrister rectiers are replaced by PWM current-source rectier (CSR) to improve line-side current harmonics and power factor [2][5]. Fieldoriented control (FOC) scheme is usually used to improve the dynamic performance of the drive. Most existing studies in the literatures have mainly focused on speed and torque control of high-power induction machine [6][9]. Very few publications have considered the CSC-fed PMSM drive system [10], [11]. Fig. 1 shows the conguration of a medium-voltage level CSC-fed drive system where the PWM CSR is connected backto-back with the PWM CSI through a dc-link inductor. As shown in Fig. 1, a number of switching devices can be connected in series in each phase leg to meet the voltage requirements. The input and output three-phase AC capacitors help the semiconductor switch commutations and lter out current harmonics. The size of these capacitors is mainly determined by the inverter/rectier switching frequency. Since the CSC-fed drive system is usually used for high-power applications with a device switching frequency of around 500 Hz, a capacitor between 0.3 p.u. and 0.6 p.u. is normally required. With the limited switching frequency, the best PWM modulation strategy is to eliminate specic low-order harmonics. Therefore, ofine selective harmonic elimination (SHE) modulation scheme is usually preferred [12][16].

0278-0046/$26.00 2011 IEEE

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Fig. 1.

High-power medium-voltage current-source-fed PM drive.

The input lter capacitor causes leading power factor (especially at light load conditions) as it may lead to penalty from the utility. A high input power factor (over 0.95) can also be achieved for 30%100% of the rated loads by proper selection of the line-side capacitor size [17]. However, unity power factor over the full operating range cannot be guaranteed as the power factor varies with the load. Several methods [17][23] have been developed for line power factor compensation. Most require controlling the modulation index and phase angle in the rectier side for input power factor regulation [18][23]. These schemes require an online PWM scheme such as Space Vector Modulation (SVM). However, using online PWM modulation scheme for high-power CSC-fed drive system, where low switching frequency is necessary, can cause signicant low-order harmonics and may excite the LC resonance if not properly mitigated. To solve this problem, SHE modulation scheme with variable modulation scheme may be considered. However, this approach requires a number of lookup tables with different modulation indices and increases the implementation complexity. Based on the aforementioned reasons, an input power factor compensation scheme using existing SHE-pattern modulation scheme can offer signicant benet in high-power current-source drives. In this paper, a novel input power factor compensation control scheme is proposed for a PWM CSC-fed PMSM drive system. The proposed power factor compensation method is realized by controlling the d-axis stator current component in the FOC scheme of the drive system, which subsequently controls the dc-link current and voltage, and regulates the input power factor. After introducing the CSC-fed PMSM drive system, relationships between motor d-axis stator current, dc-link current and reactive component of the line current have been thoroughly investigated to ensure the functionality of the proposed method. By properly designing the lter capacitor, the proposed d-axis stator current method can achieve a unity input power factor throughout the entire speed range. Moreover, the proposed method does not require modulation index control within the PWM modulation scheme, and therefore the SHE modulation scheme with only delay angle control can be used. This can give the proposed scheme additional advantages over the other methods, including: 1) suppression of the LC resonances due to the elimination of low-order harmonics such as the 5th and 7th harmonics, that may excite the LC resonances;

2) reduced switching and harmonic losses due to the elimination of dc current bypass operation and reduced switching frequencies; 3) minimal harmonic distortion as the SHE scheme eliminates the low-order harmonics; and 4) simplied control scheme that does not require additional PI controller. The effectiveness of the proposed control method is evaluated by both simulation and experimental results. The complete drive is implemented using a scaled-down prototype of currentsource converter with a 6.5 kW IPM motor.

II. CSC-F ED PMSM D RIVE S YSTEM W ITH FOC S CHEME Fig. 2 illustrates the block diagram of the CSC-fed PMSM drive system and the FOC control scheme. The FOC scheme is based on rotor ux orientation, where the rotor ux position f can be measured directly using any position sensor. The PMSM machine voltage and torque equations in the dq synchronous rotor ux frame rotating at an electrical angular velocity r are expressed as Vqs = RIqs + Lq pIqs + r Ld Ids + r f Vds = RIds + Ld pIds r Lq Iqs Te = 1.5P [f Iqs (Lq Ld )Iqs Ids ] Te = TL + Jm pr (1) (2) (3) (4)

where Iqs , Ids are the q- and d-axes motor stator currents, R is the stator per-phase resistance, Lq , Ld are the q- and d-axes stator inductances, f is the rotor magnetic ux linking the stator, P is the number of pole pairs of the motor, Jm is the moment of inertia of the motor and load, r is the electrical angular velocity of the rotor, and p is the differential operator (d/dt). The rst term in (3) represents the magnet torque due to the rotor permanent magnet ux f ; the second term represents the reluctance torque component due to the interaction between the stator dq axes current components and the inductances of the PMSM machine. In terms of SPM, where Lq = Ld , the reluctance torque component is zero.

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Fig. 2. Block diagram of the CSC-fed PMSM drive system and its FOC control scheme.

Fig. 3. FOC scheme of the current-source inverter-fed PMSM drive.

The motor-side capacitor currents in the dq synchronous rotor ux frame are expressed as pVqs = r Vds + Iq_cap /Cm pVds = r Vqs + Id_cap /Cm (5) (6)

where Vqs , Vds are the q- and d-axes stator voltages, r is the electrical angular velocity of the rotor, Iq_cap , Id_cap are the q- and d-axes motor capacitor currents and Cm is the output motor lter capacitance. Fig. 3 illustrates the detailed FOC scheme of the CSI-fed PMSM drive system. The outputs of the FOC scheme are the reference dc-link current and the reference switching angle for the inverter. The synchronous q-axis stator current component is generated from a speed feedback loop (with a simple PI controller). In case of SPM, zero d-axis control (ZDC) is usually employed to provide maximum torque for all operating points below the rated speed. This is simply achieved by setting the d-axis stator current command to zero (Ids = 0) as shown in Fig. 3. On the other hand, for IPM motor the d-axis stator current component must be calculated in terms of q-axis current component for Maximum Torque Per-Ampere (MTPA) control (ZDC can be applied to IPM motor but with limited motor output torque). This is obtained by substituting Ids =
2 Is (Iqs )2 into (3), where Is is the stator current of the

machine, differentiating (3) with respect to q-axis stator current and then setting the result to zero. Note that the ZDC and MTPA are designed to achieve the requirement of the machine side. The main requirements of the line side of the drive (such as input power factor) have not been considered in the design of these control schemes. The d-axis stator current commands of the ZDC and MTPA are expressed in (7) and (8), respectively
Ids = 0

(7)
2 f + Iqs . 2

Ids =

f 2(Lq Ld )

4(Lq Ld )2

(8)

Considering the motor-side capacitor current compensation, the synchronous-frame inverter-command currents Idw and Iqw , can be calculated as
2 2 Idw = r Cm f + r Cm Ld Ids Ids 2 Iqw = r Cm Lq Iqs + Iqs .

(9)

The stator resistance in high-power motors is normally very low, and therefore it is neglected in (9) for simplicity with little errors. Using (9), the inverter switching angle inv and the dc-link current command can be obtained in (10) and (11), where f is the rotor ux reference frame angle, usually measured using a rotor shaft position sensor. In (10) and (11), it is

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Fig. 4.

Vector diagram of the whole CSC-fed PMSM drive system. (a) Without PFC and (b) With PFC.

assumed that both the rectier and the inverter are controlled with phase angle control and xed-unity modulation indices mrec = minv = 1 inv = tan1
Idc = Iqw Idw

+ f
2

(10) (11)

(Idw )2 + Iqw .

To reduce the system losses, the dc-link current is varied according to the motor stator current. Therefore, the inverter is operated with xed-unity modulation index and controlled phase angle inv , while the rectier is used to regulate the dc-link current. With xed modulation index, the ofine SHE modulation scheme is employed to eliminate certain low-order harmonics and, therefore, prevent the LC resonance (caused by the inverter capacitor lter and the PMSM synchronous inductance). However, at very low speed operating frequency, solving the transcendental equations for elimination of a large number of low-order harmonics, is very difcult if not impossible. For this reason, a combination of SVM and SHE is usually used to achieve full-range operation with phase angle control as shown in Fig. 2. The dc-link current reference at the output of the FOC is used for the rectier feedback controller. The output of the dc-link current PI regulator is the average dc voltage reference, which subsequently generates the switching delay angle reference for the rectier. The proposed line-side power factor compensation method, which can be implemented with the ofine SHE modulation scheme using d-axis stator current control is presented in the next section. III. P ROPOSED d-A XIS C URRENT C ONTROL M ETHOD FOR I NPUT PFC A. Principle of d-Axis Current PFC The principle of the input power factor compensation (PFC) is to maintain a large enough rectier current to compensate

the input reactive current component even with light load conditions. To understand the proposed d-axis stator current adjustment method, the relation between the machine-side and line-side converters is studied. Fig. 4 shows the steady-state vector diagram of the whole CSC-fed PMSM drive system before and after the proposed compensation method during light load conditions. In order to eliminate the low-order harmonics (5th and 7th harmonics) in the rectier side, SHE modulation scheme with xed modulation index mrec = Iw /Idc is used, where Iw is the rectier current and Idc is the dc-link current. In the machine side, the inverter current Iw is proportional to the dc-link current through the inverter modulation index minv = Iw /Idc . Assuming constant and equal modulation index in the machine and line side, the inverter and rectier currents are equal Iw = Iw . With this assumption, the rectier q-axis current component Iwq can be used to compensate for the reactive component of the line current IQ . However, under light load conditions, Iwq is lower than the capacitor current (Icg ) and cannot fully compensate for it [Fig. 4(a)]. Therefore, to increase the rectier current, the d-axis stator current component in the FOC scheme is controlled to provide the required dc-link current and then the required rectier current for unity power factor compensation. As can be seen in Fig. 4(b), by injecting enough d-axis stator current, the rectier current Iw is increased. In addition, increasing the d-axis motor stator current causes an increase in the rectier switching delay angle because of the reduction of dc-link voltage. The increase in the rectier current and delay angle will increase Iwq component of the rectier current which can compensate the reactive line current component IQ (IQ = Iwq Icg = 0, for unity input power factor). Fig. 5 shows the general relationship between the d-axis stator current and the reactive line current for fantype load (fan-type load is considered the most common load for high-power drives) as the motor operates from standstill to rated speed. It can be observed that the reactive (capacitive) line current is reduced with the increase of d-axis stator current component. A summary of the detailed relationship between the d-axis stator current and the line-side reactive current

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Neglecting the losses, the average dc-link voltage command can be derived from the machine-side variables as
Vdc =

r Te . Idc P

(14)

The average dc-link voltage command can be represented in terms of line-to-line input voltage and the rectier phase delay angle by Vdc = 1.5VLL cos(rec ). Considering unity power factor condition and using the trigonometric relation cos2 + sin2 = 1, the dc-link current command can be derived as
2 2 2 (Idc )2 = i VC Cg + 2 2 r Te 2 . 1.5P 2 VLL

(15)

Fig. 5. Relationship between the d-axis stator current and the reactive line current component for fan-type load.

The dc-link current command in (15) represents the required dc-link current for unity input power factor and can be denoted by Idc_U P F . Now, from (9) and (11), the dc-link current command can be expressed in terms of machine parameters and the motor-side capacitor as
2 2 (Idc )2 = r Cm f r Cm Ld Ids + Ids 2 2 2 + r Cm Lq Iqs + Iqs

component IQ is given by (12). This relation is valid for all operating speed range Ids Idc rec Ids Idc rec |IQ | |IQ | |IQ | |IQ | (Capacitive current) (Inductive current) (Capacitive current) (Inductive current). (12)

. (16)

The sign of the rst term in (16) is adjusted to obtain minimum possible d-axis stator current, while achieving unity power factor. By equating, (15) and (16) and after simplication, the d-axis stator current component command is derived as (17), shown at the bottom of the page. Based on (9) and (15), (17) can be modied to
Ids

B. Mathematical Derivation In order to properly adjust the d-axis stator current component for power factor compensation, the mathematical relationship between the d-axis stator current component Ids and the drive input reactive current IQ is derived. This can be obtained by examining the drive system variables at steadystate condition. To keep the currents and voltages of the drive within the operating limits, the proposed d-axis stator current is derived with respect to q-axis stator current component. Assuming unity modulation index at inverter and recti er (minv = mrec = 1 and therefore Idc = Iw = Iw ), the total q-axis component IQ (reactive) of line current can be calculated by
IQ = i VC Cg Idc sin(rec )

2 r Cm f +

(Idc_U P F )2 Iqw

2 (r Cm Ld + 1)

(18)

C. Analysis and Control Scheme From (18), a valid solution for the proposed d-axis stator current control method must satisfy the condition Idc_U P F Iqw . In addition, the d-axis stator current command must be limited to be within the rated current of the drive (and hence the motor) (0 Ids Is_rated ), where Is_rated is the motor rated current. It can be seen from (17) that the proposed d-axis stator current command Ids is related to a few drive and machine parameters. Among them, the input and output lter capacitors are of special interest as they are parts of the drive circuit. Based on the switching frequency and the input and output inductances, the lter capacitors might have different values. In general, the design of the capacitors is based on Nyquest sampling theorem where the resonance frequency of the LC lter must be less than half the switching frequency to ensure system stability. To show the effect of the lter capacitors on the proposed method, a small input and output capacitors of Cg = 0.4 p.u.

(13)

where i is the line-side electrical angular frequency, Cg is the line-side capacitor lter, VC is the peak value of line-side capacitor voltage and rec is the switching angle (delay angle) of the rectier. (Note that IQ = 0 means unity power factor, IQ > 0 means leading power factor, and IQ < 0 means lagging power factor.)

Ids

2 r Cm f +

2 2 2 i VC Cg +

2 (r Cm Ld + 1)

2 2 r Te 2 1.5P 2 VLL

2 r Cm Lq Iqs + Iqs

(17)

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TABLE I S YSTEM PARAMETERS

and Cm = 0.3 p.u. are selected for the large drive presented in Table I (in the simulation the input capacitor is selected Cg = 0.5 p.u. to show the effectiveness of the proposed method even with large input capacitor). With this selection, the input and output resonance frequencies are 203.2 Hz and 116.5 Hz, respectively, which ensures system stability with a switching frequency of 540 Hz. Fig. 6(a) illustrates the relationship between Ids , Idc_U P F , and Iqw as a function of motor speed for fan-type load for the small lter capacitors. As illustrated in Fig. 6(a), the d-axis stator current command can provide the required dc-link current that ensures unity power factor operation for wide speed range. It is obvious that the injected d-axis current can cause additional loss in the motor and the drive. However, the increase in the loss (motor loss, dc-link loss and the switching device conduction loss) is common for all unity power factor compensation method as the rectier current has to be increased to compensate the large capacitive current especially at light load condition. As the load increases with the motor speed, the d-axis stator current command will be reduced until it hits the zero limit of the controller as shown in Fig. 6(a). In this case, the proposed method becomes ineffective and cannot fully compensate the power factor. However, in this situation, the input power factor is close to unity and does not require any compensation as shown in Fig. 6(a). Fig. 6(b) shows the relationship between Ids , Idc_U P F , and Iqw as a function of motor speed for fantype load when large lter capacitors of Cg = 0.5 p.u. and Cm = 0.4 p.u. are used. As can be seen, the effective range of the proposed method can be extended to cover all speed range with the large lter capacitors. In accordance with the d-axis stator current method in (17), the block diagram of the FOC scheme with the proposed control method is shown in Fig. 7. The developed torque is estimated from (3) by measuring the dq axes stator currents to improve the dynamic performance. In addition, the input capacitor voltage is measured (instead of using xed value) for more accurate results. It is worth mentioning that the proposed method can be applied to both salient (IPM) and non-salient

Fig. 6. Relationship between, Ids , Idc_U P F , and Iqw as a function of motor speed for fan-type load. (a) Cm = 0.3 p.u. and Cg = 0.4 p.u. (b) Cm = 0.4 p.u. and Cg = 0.5 p.u.

Fig. 7. Block diagram of the FOC scheme with the proposed control method.

(SPM) permanent magnet synchronous motors. Furthermore, the proposed scheme can make use of the existing speed PI regulator parameter and does not require an additional PI regulator. IV. S IMULATION R ESULTS Simulation results obtained using Matlab are provided in this section to demonstrate the performance and effectiveness of the proposed compensation method. Table I shows the system parameters of the medium-voltage high-power 2.44 MW drive system used in the simulation. Figs. 8 and 9 show the results for the simulation curves of the drive input power factors, machine stator voltage Vs and

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Fig. 10.

Experimental setup of the CSC-fed PMSM drive system.

Fig. 8. Performance of the drive without PFC method with fan-type load.

ZDC control method with no input power factor compensation is compared with the proposed control method. As can be seen in Fig. 8, for speed above 80% of the rated value, there is no need for compensation as the input power factor can be maintained close to unity by properly designing the input and output capacitor lters compensation. However, for speeds below 80%, the input reactive current is not zero as the power factor becomes leading. When the proposed method is enabled (Fig. 9), the drive input reactive current component IQ can be regulated to zero, and unity input power factor is achieved. It is very clear from Fig. 9 that the proposed method maintains the stator voltage and current within the drive and motor capacity. V. E XPERIMENTAL V ERIFICATION A. Experimental Prototype To experimentally verify the power factor compensation method, a scaled-down prototype of current-source converter with a 6.5-kW IPM motor is used in the laboratory. The experimental prototype consists of a current-source rectier and inverter in back-to-back conguration with a dc-link inductor connected between the two converters. Each of the rectier and inverter bridges is composed of six ABBs reverse-blocking IGCT rated 6 KV/800 A each. Although high-power IGCTs are used, the power rating of the prototype is only 20 KW at 208 V. This is mainly due to the limitation of the three-phase power supply and personal safety issues in the laboratory. Fig. 10 shows the experimental setup of the CSC-fed PMSM drive system. Parameters of the drive and the IPM motor are listed in Table I. The drive control platform consists of a xed-point DSP for control scheme realization and eld-programmable gate array (FPGA) for gating and fault handling. Although a scaled-down prototype is used in the experiments, the results are equally valid for high-power drives at megawatt levels from the control scheme development perspective. This is due to the following justications.

Fig. 9. Performance of the drive with PFC method with fan-type load.

current Is , developed torque Te , input reactive current IQ , and the d-axis stator current component with and without the proposed compensation method. Note that the conventional

1) Maximum switching frequency of the current-source rectier and inverters remains 540 Hz, which is the same frequency in the commercial large drives. The switching frequency is one of the important factors to affect the dynamic performance of the drives.

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Fig. 13. Drive waveforms without the proposed input power factor compensation at heavy load condition. (Vg 100 V/Div, Iin 10 A/Div, Iw 10 A/Div).

Fig. 11. Drive waveforms without the proposed input power factor compensation at light load condition. (Vg 100 V/Div, Iin 5 A/Div, Iw 10 A/Div). Fig. 14. Drive waveforms with the proposed input power factor compensation at heavy load condition. (Vg 100 V/Div, Iin 10 A/Div, Iw 10 A/Div).

Fig. 12. Drive waveforms with the proposed input power factor compensation at light load condition. (Vg 100 V/Div, Iin 5 A/Div, Iw 10 A/Div).

2) System sampling frequency of 4 kHz is selected as same as that used in large commercial drives. 3) Per unit system is used in designing all the lter capacitors and inductors in the drive. These passive components are selected such that they are in the range (in per unit) as those in large drives. In doing so, the design and analysis are applicable to large drives. 4) IGCTs used in the prototype are the same as those that would be used in the large drives. The effect of the switching times on the system dynamic performance would be similar to that in the large drives. B. Experimental Results Figs. 1114 show the experimental results obtained from the drive system. In these results, two load conditions are tested to

show the effectiveness of the proposed method. Some of the experimental results have presented with simulation results to show the accuracy of the experimental implementation. Figs. 11 and 12 illustrate the steady-state performance of the drive without and with power factor compensation at light load condition. In Fig. 11, the motor is controlled using conventional ZDC without power factor compensation. In this case, the motor is operated at 0.262 p.u. speed and torque of 0.217 p.u. to emulate the light load condition. As can be seen, there is a large phase angle between the input current and the input phase voltage because of the large line capacitor 0.57 p.u. of the drive. This line capacitor draws signicant leading reactive current (especially at light load and low speed) and results in a power factor of 0.248 (leading). Fig. 12 illustrates the performance of the drive at light load condition with the proposed line power factor compensation. A large d-axis stator current 0.465 p.u. is injected to the machine by the proposed method for the input power factor compensation as shown in Fig. 12(b). This d-axis stator current boosts the dc-link current from 0.234 p.u. to 0.513 p.u. and thus provides enough rectier current Iw to compensate the reactive capacitor current. As can be seen from Fig. 12(b), the line current is in-phase with the phase voltage and a unity power factor is achieved. Figs. 13 and 14 illustrate the performance of the drive at a heavy load condition (0.7 p.u. torque at 0.88 p.u. speed) with and without the proposed compensation method. Without power factor compensation (using ZDC method), the power factor is slightly leading 0.98 due to the large line capacitor used (see Table I). When the d-axis stator current method is enabled, enough d-axis stator current of 0.217 p.u. is injected to the machine for power factor compensation. As a result, the power factor changes from 0.98 (leading) to unity as shown in Fig. 14.

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It should be noted that the q-axis stator current component has been reduced while the d-axis stator current component has increased due to the proposed method as shown in Figs. 1114. This can be explained as follows: since IPM machine type is used in the test, the increase in d-axis stator current produces the reluctance torque component of the machine torque which causes a reduction in the required q-axis stator current that participates in the magnet torque component. VI. C ONCLUSION A control scheme for PWM CSC-fed PMSM drive system with input power factor compensation has been proposed. Unlike previous power factor compensation schemes, the proposed approach is based on the motor d-axis stator current control in the eld-oriented control of the drive system and does not require online modulation scheme for the rectier and/or the inverter. As a result, SHE modulation patterns can be implemented on both rectier and inverter to minimize drive switching losses. The effectiveness of the proposed method is rst veried by Matlab simulation for a high-power mediumvoltage motor. Then an experimental prototype of 6.5-kW IGCT based current-source drive with IPM motor is used to verify the theoretical analysis and the simulation results. Results have shown that with properly designed lter capacitors, the proposed d-axis stator current can effectively regulate the input power factor to be unity in the entire speed range. R EFERENCES
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Ehsan Al-nabi (S07) received the M.A.Sc. degree in engineering from Ryerson University, Toronto, ON, Canada, in 2007, where he is currently working toward the Ph.D. degree in the Department of the Electrical and Computer Engineering. His research interest includes electric motor drives, high-power medium-voltage converter systems, and advanced control theory. Mr. Al-nabi is member of the IEEE Industrial Electronics Society and a EIT Member in Professional Engineers of Ontario (PEO).

Bin Wu (S89M92SM99F08) received the Ph.D. degree in electrical and computer engineering from the University of Toronto, Toronto, ON, Canada, in 1993. After being with Rockwell Automation Canada as a Senior Engineer, he joined Ryerson University, Toronto, ON, Canada, where he is currently a Professor and NSERC/Rockwell Industrial Research Chair in Power Electronics and Electric Drives. He has published more than 200 technical papers, two Wiley-IEEE Press books, and holds more than 20 issued/pending patents in the area of power conversion, advanced controls, adjustable-speed drives, and renewable energy systems. Dr. Wu is a Fellow of Engineering Institute of Canada (EIC) and Canadian Academy of Engineering (CAE). He is an Associate Editor of IEEE T RANS ACTIONS ON P OWER E LECTRONICS and IEEE Canadian Review. He received the Gold Medal of the Governor General of Canada, the Premiers Research Excellence Award, Ryerson Distinguished Scholar Award, Ryerson Research Chair Award, and the NSERC Synergy Award for Innovation.

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Navid R. Zargari (S91M95SM03) received the B.Eng. degree from Tehran University, Tehran, Iran, in 1987, and the M.A.Sc. and Ph.D. degrees from Concordia University, Montreal, QC, Canada, in 1991 and 1995, respectively. He has been with the Medium Voltage R&D Department of Rockwell Automation, Cambridge since November 1994, rst as a senior designer and currently as the manager of the Medium Voltage R&D department. For the past 15 years, he has been involved with simulation, analysis and design of power converters for Medium-Voltage AC drives. He has coauthored more than 50 research papers and is the holder of more than 10 U.S. patents. His research interests include power converter topologies and their control aspects, highpower factor three-phase rectiers, VAR compensators, power semiconductors, and renewable energy sources. Dr. Zargari is registered as a Professional Engineer in the Province of Ontario. He is the receipient of the Premiers Catalyst Award, Innovator of the year, 2009.

Vijay Sood (SM79F06) received the Ph.D. degree from the Univesity of Bradford, Bradford, U.K., in 1977. Since 1976, he has been a Researcher at IREQ (Hydro-Quebec), Montreal, QC, Canada. He has been an Adjunct Professor at Concordia University, Montreal, QC, Canada, since 1979. He is currently an Associate Professor and the Electrical Engineering Design Co-chair at UOIT, Oshawa, ON, Ontario. He has extensive experience in HVDC and FACTS and their controllers. His research focuses on the monitoring, control, and protection of power systems and on the integration of renewable energy systems into the smart grid. Dr. Sood is a Registered Professional Engineer in the province of Ontario. He is a Fellow of the Engineering Institute of Canada and the Canadian Academy of Engineering. He serves as a Director of the IEEE Canadian Foundation and is an Editor of the IEEE T RANSACTIONS ON P OWER D ELIVERY, and Co-editor of the IEEE Canadian Journal of Electrical and Computer Engineering.