PRIST UNIVERSITY

12250H13 - ADVANCED COMPUTER ARCHITECTURE

LTPC 4 0 0 4
AIM To do an advanced study of the Instruction Set Architecture, Instruction Level Parallelism with hardware and software approaches, Memory and I/O systems and different multiprocessor architectures with an analysis of their performance. OBJECTIVES To study the ISA design, instruction pipelining and performance related issues. To do a detailed study of ILP with dynamic approaches. To do a detailed study of ILP with software approaches. To study the different multiprocessor architectures and related issues. To study the Memory and I/O systems and their performance issues. UNIT I 9 Functional units - Basic operational concepts - Bus structures - Software performance Memory locations and addresses Memory operations Instruction and instruction sequencing Addressing modes Assembly language Basic I/O operations Stacks and queues. UNIT II 9 Addition and subtraction of signed numbers Design of fast adders Multiplication of positive numbers - Signed operand multiplication and fast multiplication Integer division Floating point numbers and operations. UNIT III 9 Fundamental concepts Execution of a complete instruction Multiple bus organization Hardwired control Microprogrammed control - Pipelining Basic concepts Data hazards Instruction hazards Influence on Instruction sets Data path and control consideration Superscalar operation. UNIT IV 9 Basic concepts Semiconductor RAMs - ROMs Speed - size and cost Cache memories - Performance consideration Virtual memory- Memory Management requirements Secondary storage. UNIT V 9 Accessing I/O devices Interrupts Direct Memory Access Buses Interface circuits Standard I/O Interfaces (PCI, SCSI, USB). Total No of periods: 45

M.TECH CSE/ I SEMESTER

PRIST UNIVERSITY

TEXT BOOK:
1. Carl Hamacher, Zvonko Vranesic and Safwat Zaky, 5th Edition Computer Organization, McGraw-Hill, 2002.

REFERENCE BOOK: 1. 2. 3. William Stallings, Computer Organization and Architecture Designing for Performance, 6th Edition, Pearson Education, 2003. David A.Patterson and John L.Hennessy, Computer Organization and Design: The hardware / software interface, 2nd Edition, Morgan Kaufmann, 2002. John P.Hayes, Computer Architecture and Organization, 3rd Edition, McGraw Hill, 1998

M.TECH CSE/ I SEMESTER

PRIST UNIVERSITY

PRIST UNIVERSITY M.TECH (CSE) QUESTION BANK YEAR / SEMESTER : I / I 12250H13-COMPUTER ARCHITECTURE AND ORGANIZATION UNIT-I PART-A : BASIC STRUCTURE OF COMPUTERS

1. Define Load and Store with example. 2. What is meant by Program counter (PC)? 3. Write down the meaning of BIG ENDIAN & LITTLE ENDIAN. 4. What are clock and clock cycles? 5. Give the Basic Performance Equation of the system. 6. Define compiler and assembler. 7. Expand: CISC & RISC. 8. What is meant by addressing modes? 9. Define: Mnemonics 10. What do you meant by indirect mode and absolute mode? 11. Define stack and queue. 12. What do you mean by interrupt? 13. What is register mode? 14. Define system software. 15. What is straight line sequencing?

PART-B 1. (a) Briefly explain the Operational Concepts of a system

(b) Write a note on Basic functional units 2. (a) Discuss about the Bus Structure (b) Explain the Basic I/O Operations 3. Briefly explain about the System Performance measures 4. Discuss in detail about Instruction Sequencing & Executions with a suitable example 5. (a) Write a note on Memory Location and Addresses. (b) Discuss: Assembly Language feature & its Development process 6. Define: Addressing Modes and explain any of its FIVE types. 7. Explain in detail about stacks and queues.
M.TECH CSE/ I SEMESTER

PRIST UNIVERSITY

UNIT-II PART-A

ARITHMETIC UNIT

1. What are the two techniques for fast multiplication? 2. How to reduce delay in adders? 3. What is bit pair recoding? 4. Why we go for booth algorithm? 5. What is a Carry Look Ahead adder? (Or) What is CLA? 6. Differentiate overflow and underflow. 7. Write the algorithm for Non-restoring algorithm. 8. Write the algorithm for restoring division. 9. What is ripple carry adder? 10. Define: Carry Save Addition (CSA) Process. 11. Draw the diagram for n-bit Ripple Carry Adder. 12. What is chopping? 13. What is Von-Neumann rounding? 14. What is guard bit? 15. What are the three methods to truncate guard bit?

PART-B
1. (a) Discuss about addition and subtraction of signed numbers. (b) Briefly explain the Design of Fast adder 2. (a) Explain Multiplication of positive numbers with this example 1101(13) x 1011(11). (b) Multiply: 10011(-13) & 01011 (+11) using BOOTH algorithm. 3. (a) Discuss about Carry Look Ahead Adder Circuit (b) Write a note on CSA Process with neat diagram. 4. Describe in detail implementation of floating point operations. 5. Write down Algorithm Steps for TWO types of Integer Divisions with an example. 6. Perform the following integer division using restoring and non-restoring division. Dividend : 1000 Divisor : 11. 7. (a) Multiplicand :010111 Multiplier:110110 using BOOTH algorithm. (b) Multiply: +13 by -6 using bit-Pair Recoding. . 8. Draw the diagram of ripple-carry and carry-save array and explain it. 9. Perform the following using booth algorithm & bit-pair recoding. i) Multiplicand : 110011 Multiplier : 101100. ii) Multiplicand : 110101
M.TECH CSE/ I SEMESTER

PRIST UNIVERSITY

Multiplier

011011.

UNIT-III BASIC PROCESSING UNIT PART-A

1. Define: hardwired control. 2. What is meant by Hazard? 3. Define: Control Hazard 4. What is a micro instruction? 5. Define: Stall. 6. What is control store? 7. What is micro programmed control? 8. Give any 2 disadvantage of hardwired control? 9. List out the types of hazard. 10. Define: pipelining. 11. What is data path? 12. What is cache miss? 13. Differentiate hardwired and micro programmed control. 14. What is branch instruction? 15. What is Control Word ( CW)?

PART-B
1. (a) Explain multiple bus Organization with a neat diagram. (b) Explain some fundamental Concepts to execute a Program. 2. Explain in brief about Hard Wired control unit with a neat diagram. 3. Discuss Instruction Hazard in detail. 4. Write short notes on: i) Data Hazard ii) Superscalar Operation. 5. Define: Pipelining. Discuss various types of Hazards. 6. (a) Define: Micro Programming. (b) Explain Micro Programmed control unit with a neat diagram. 7. (a) Narrate the features and working of Super Scalar operation. (b) Explain Execution of a complete instruction.

M.TECH CSE/ I SEMESTER

PRIST UNIVERSITY

UNIT-IV MEMORY SYSTEM PART-A

1. Define: Memory cycle time 2. Define: Cache Memory. 3. What is meant by Virtual memory technique? 4. Define temporal and spatial. 5. What is a (MMU) Memory Management Unit? 6. Define Rambus Memory. 7. What are the categories of secondary storage? Give examples. 8. Differentiate primary cache and secondary cache. 9. What is hit-rate and miss-rate? 10. Expand: SIMMs and DIMMs. 11. Mention the advantages of PROM over ROM 12. What is meant by Locality of Reference? 13. Define TLB. 14. Define RAM. What are the types of RAM? 15. What is page table and page fault?

PART-B
1. Define: Mapping function. Explain its types in detail 2. (a) Discuss about Cache Memory. (b) What is ROM? Explain the types of ROM. 3. Briefly explain the principles and working of Virtual Memory 4. Discuss in detail about various Secondary Storage Devices. 5. (a) Write a note on Memory Interleaving. (b) Discuss: Hit rate and Miss penalty. 6. What is RAM? Explain the types of RAM. 7. Give a brief explanation about Semiconductor RAM memories.

M.TECH CSE/ I SEMESTER

PRIST UNIVERSITY

UNIT-V I/O ORGANIZATION PART-A

1. What do you mean by (DMA) Direct Memory Access? 2. What is meant by memory mapped I/O? 3. What is interface circuit? 4. Define privilege exception. 5. List out the objectives of USB. 6. Define Interrupt. 7. Give the standard buses or I/O interfaces. 8. Difference between synchronous and asynchronous bus. 9. What is serial port. 10. What is debugging? 11. Differentiate memory mapped I/O and mapped I/O. 12. What are the types of bus arbitration? 13. Define bus master. 14. Define Distributed arbitration. 15. What is Plug & Play?

PART-B
1. Explain in detail about Interrupts. 2. Write notes on i) USB ii) PCI 3. Briefly explain the principles and working of USB 4. Discuss in detail about Interface Circuit devices. 5. What is SCSI? Explain with neat sketch. . 6. Briefly explain the Synchronous Bus and Asynchronous Bus. 7. Give a brief explanation about Direct Memory Access. 8. Write notes on: i) Bus arbitration. ii) Use of OS in interrupt.

M.TECH CSE/ I SEMESTER

PRIST UNIVERSITY

M.TECH CSE/ I SEMESTER