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Alpana Agarwal
Assistant Professor
Email: alpana@thapar.edu, alpana.tiet@gmail.com
Capacitance
Any two conductors separated by an insulator have capacitance Essential for transient and ac responses Most of them are distributed & not lumped On-chip capacitances, used for hand estimation Gate to channel capacitor is very important
Creates channel charge necessary for operation
Todays focus
Vout = 0 Rn CL
Vin = V DD
10/13/2007
Covered earlier
Alpana Agarwal, Thapar University
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Sources of Capacitance
Vin Vout CL Vout2
M2
Vin
Vout2
CGD12
M1
intrinsic MOS transistor capacitances extrinsic MOS transistor (fanout) capacitances wiring (interconnect) capacitance
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Top view
G
+
S
-
n+
n+
n channel
CGB = CGCB
p substrate
depletion region
B
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Channel capacitance components are nonlinear and vary with operating voltage Most important regions are cutoff and saturation since that is where the device spends most of its time
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S
-
n+
n+
n channel
p substrate
depletion region
CSB = CSdiff
B
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CDB = CDdiff
junction depth
xj
LSource Cdiff = Cbp + Csw = Cj AREA + Cjsw PERIMETER = Cj LSource W + Cjsw (2LSource + W)
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12
Cj (fF/m2) 2 1.9
mj 0.5 0.48
bsw
(V)
6 6
0.9 0.9
13
mj 0.5 0.48
bsw
(V)
6 6
0.9 0.9
14
Vout2
M2
Vin
CGD12 pdrain
ndrain
CDB2 CDB1
Vout Cw
M3
Vout2
M1
CG3
intrinsic MOS transistor capacitances extrinsic MOS transistor (fanout) capacitances wiring (interconnect) capacitance
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Extrinsic (Fan-Out) Capacitance (FanThe extrinsic, or fan-out, capacitance is the total gate capacitance of the loading gates M3 and M4. Cfan-out = Cgate (NMOS) + Cgate (PMOS) = (CGSOn+ CGDOn+ WnLnCox) + (CGSOp+ CGDOp+ WpLpCox) Simplification of the actual situation
Assumes all the components of Cgate are between Vout and GN D (or VDD) Assumes the channel capacitances of the loading gates are c onstant
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PMOS 1.125/0.25
1.2m =2 In Out Metal1
Polysilicon
0.125
NMOS 0.375/0.25
GND
0.5
0.375/0.25 1.125/0.25
Components of CL (0.25 m)
Expression C Term CGD1 CGD2 CDB1 CDB2 CG3 CG4 Cw CL 2 Con Wn 2 Cop Wp KeqbpnADnCj + KeqswnPDnCjsw KeqbppADpCj + KeqswpPDpCjsw (2 Con)Wn + CoxWnLn (2 Cop)Wp + CoxWpLp from extraction Value (fF) HL 0.23 0.61 0.66 1.5 0.76 2.28 0.12 6.1 Value (fF) LH 0.23 0.61 0.90 1.15 0.76 2.28 0.12 6.0
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Wiring Capacitance
The wiring capacitance depends upon the length and width of the connecting wires and is a funct ion of the fan-out from the driving gate and the number of fan-out gates. Wiring capacitance is growing in importance wit h the scaling of technology.
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Cpp = (di/tdi) WL
Alpana Agarwal, Thapar University
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fringe interwire pp
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(from [Bakoglu89])
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Insights
For W/H < 1.5, the fringe component dominates the paralle l-plate component. Fringing capacitance can increase the ov erall capacitance by a factor of 10 or more. When W < 1.75H interwire capacitance starts to dominate Interwire capacitance is more pronounced for wires in the hi gher interconnect layers (further from the substrate) Rules of thumb
Never run wires in diffusion Use poly only for short runs Shorter wires lower R and C Thinner wires lower C but higher R
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Wiring Capacitances
Field Poly Al1 Al2 Al3 Al4 Al5 88 54 30 40 13 25 8.9 18 6.5 14 5.2 12 41 47 15 27 9.4 19 6.8 15 5.4 12 57 54 17 29 10 20 7 15 5.4 12 36 45 15 27 8.9 18 6.6 14 41 49 15 27 9.1 19 35 45 14 27 38 52 Active Poly Al1 Al2 Al3 Al4
pp in fringe in aF/m
aF/m2
Al1 95
Al2 85
Al3 85
Al4 85
Al5 115
25
40
per unit wire length in aF/m for minimally-spaced wires Alpana Agarwal, Thapar University
Copper interconnect allows wires to be thinner without increasing their resistance, thereby de creasing interwire capacitance SOI (silicon on insulator) to reduce junction ca pacitance
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Gate Capacitance
Approximate channel as connected to source Cgs = oxWL/tox = CoxWL = CpermicronW Cpermicron is typically about 2 fF/m
polysilicon gate W tox n+ L p-type body n+ SiO2 gate oxide (good insulator, ox = 3.90)
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Diffusion Capacitance
Csb, Cdb Undesirable, called parasitic capacitance Capacitance depends on area and perimeter
Use small diffusion nodes Comparable to Cg for contacted diff Cg for uncontacted Varies with process
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Questions, if any?