BJT Common Emitter Amplifier

David Baird

2002 Nov 4

1 Intro
I intend to build a two stage BJT common emitter amplifier. Here are my design constraints:

Accept a source resistance of 10kΩ and voltage of 40mVp−p

Drive a 2kΩ load
Have a gain near 200

2 Setup

+15V

IEE2 4mA C4 100µF

RCC1
Ree2
22k VEE2
82Ω
4.7V 5.4V
-4.7V ZIN VCC1 4V -7V
Rs 10k Vi VBB1 VCC2
2N3904 Vo
C1 .47µF 10k 5.6k -5.4V 2x 2N3906
VEE1 C5 10µF 2k
ZOUT
C2 10µF Ree1
22k 1k RCC2 2k

IEE1 .4-.6mA Re2=25mV/4.5mA = 5.56Ω

C3 10µF David Baird
-15V xcircuit Drawing
Lab 9, Final Circuit
Re1=25mV/.5mA = 50Ω EE321

Figure 1: BJT amplifier with theoretical DC bias values

Figure 1 shows the setup I used. I used current sources to greatly simplify the biasing of the
transistors. The first BJT stage has a gain of about 20 and the second has a gain of about 10. The
first stage input is bootstrapped. The goal of this is to make the resistor divider bias disappear
at high frequency so that the signal source only sees the (β + 1)(re + Ree ), which should be much
larger than Rs = 10kΩ. The second BJT stage uses a darlington to unload the first stage. Most of
my calculations assume the input impedance to the transistor is negligible.

1
 +15V
.51mA

100k 4.7k 470Ω

13.1V
-12.3V 12.4V

-13V

22k 3.9k 22k

4mA

-15V

Figure 2: Current sources used in the amplifier

All the capacitors form high pass filters with a 3dB point at 20Hz or less. The following table
shows the R and C values, and the 3dB frequency for each capacitor:

Capacitor R [Ω] C [µF ] f3dB [Hz]

C1 > 100k .47 < 3.4
C2 3k 10 5.3
C3 1k 10 16
C4 82 100 19
C5 4k (?) 10 4.0
The emitter bypassing required the largest capacitors, as you can see, because they had the
smallest source resistances.
The amplifier gains are determined approximately by Rcc /(Ree + Re ). This gives stages 1 and
2 gains of 22k/(1k + 50) = 21 and 1k/(82 + 5.6) = 11.4. The composite gain should then be
21 · 11.4 = 239. ...so, the gain is a little greater than 200.

3 Data
3.1 DC values
Honestly, the actual values were so close to my expected values that I didn’t really care to investi-
gate the exact reasons for deviation.

2
 Parameter Expected Actual Unit
Vsup+ 15 14.86 V
Vsup− -15 -14.82 V
VBB1 -4.7 -4.7 V
VCC1 4 4.12 V
VEE1 -5.4 -5.25 V
VCC2 -7 -6.64 V
VEE2 5.4 5.35 V
IEE1 .51 .50 mA
IEE2 4 4.0 mA

3.2 AC values
Parameter Comment Expected Actual Unit
Vs p-p f=10kHz 45.6 mV
Vi p-p f=10kHz 35.2 mV
Vee1 p-p f=10kHz .840 V
Vo p-p f=10kHz 8.24 V
Av1 21 23.9 -
Av2 11.4 9.81 -
Av Vop−p /Vip−p 239 234 -
AlternateAv Vo /Vs 181 -

3.3 AC gains
f [Hz] Vs [mV] Vi [mV] Vo [V] Av = Vo /Vi Vo /Vs
100 40 36 7.4 206 185
1k 40 36 7.76 216 194
10k 40 36 8.24 229 206

3.4 AC Impedances
Figure 3 shows the setups I used to measure ZIN and ZOU T . To measure ZIN , I kept adding
resistance to the input until the output decreased by a factor of 2. At this point, the total input
resistance must be equal to the resistance looking into the amplifier. The process for finding Z OU T
is similar: decrease output resistance until the output voltage decreases by a factor of two. This
resistance must then be the resistance looking into the output of the amplifier.
ZIN is the only value that deviated much from what I had expected. I’m not totally sure why,
but I would guess that the bootstrap I made isn’t working as well as expected. I expect the AC
resistance looking into the base of the BJT should be over 100kΩ, which means the AC resistance
of the bootstrap must be around 150kΩ (if base=150kΩ) in order for ZIN = 76kΩ. Then again,
considering that the bias network goes from about 10k at DC to 150k (factor of 15) at AC makes
bootstrapping a pretty neat trick!

RL [kΩ] Vo [Vp−p ]
inf 15.2
2.0 7.68
1.0 5.16

3
 39.2mV p-p 17mV p-p 4.88V p-p
(a) 10k 56k

1kHz

(b) 10k 36mV p-p

RL
1kHz

Figure 3: Circuits used when (a) determining ZIN , (b) determining ZOU T

Parameter Comment Expected Actual Unit

ZIN > 100 76 kΩ
ZOU T 2 2.0 kΩ

4 Conclusions
I built an amplifier with 2 common emitter BJT stages. I used bootstrapping for my first time and
found that it works quite nicely. It increased the input impedence of the bias network by a factor
of 15 for AC signals.
I also found that using current sources at the transistor emitters helps to simplify biasing
because I no longer had to consider emitter DC resistors.
I found the input impedance to be a little less than 100k and the output impedence to be equal
to the collector resistor (2k).
I had some blunders along the way. I learned that you cannot simply replace the collector
resistors with current sources in a common emitter amplifiers to achieve very high gain. A better
way to get high gain is to use a differential input stage with a current source on one side and
take negative feedback from the output. I was having trouble getting my experimental circuits
(differential + follower) to have enough open loop gain (I think) to work well for a closed loop gain
around 200 (they worked great for 20!).