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Solar Energy 78 (2005) 727738 www.elsevier.

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A new control scheme of a cascaded transformer type multilevel PWM inverter for a residential photovoltaic power conditioning system
Feel-soon Kang a,*, Su Eog Cho b, Sung-Jun Park c, Cheul-U Kim b, Toshifumi Ise d
Department of Control and Instrumentation Engineering, Hanbat National University, San 16-1, Duckmyoung, Yuseong, Daejeon 305-719, Korea b Department of Electrical Engineering, Pusan National University, San 30 Changjurn-dong, Kumjung-gu, Pusan 609-735, Korea c Department of Electrical Engineering, Chonnam National University, 300 Yongbong-dong, Puk-gu, Gwangju 500-757, Korea d Department of Electrical Engineering, Graduate School of Engineering, Osaka University, 2-1, Yamada-oka, Suita, Osaka 565-0871, Japan Received 2 March 2004; received in revised form 7 June 2004; accepted 13 September 2004 Available online 3 November 2004 Communicated by: Associate Editor Arturo Morales-Acevedo
a

Abstract From the viewpoint of high quality output voltage generation in a residential photovoltaic system, a multilevel inverter employing cascaded transformers can become a good substitute for the conventional pulse width modulated inverters and other multilevel counterparts. However, to obtain more sinusoidal output voltage waves, it should increase the number of switching devices and transformers resulting in a cost increase. To alleviate this problem, an ecient switching pattern is proposed and applied to a multilevel inverter equipped with two cascaded transformers, which have a series-connected secondary. Operational principle and analysis are illustrated focusing on a change of the switching pattern. High-performance of the proposed multilevel scheme embedded in a photovoltaic power conditioning system is veried by computer-aided simulations and experimental results. 2004 Elsevier Ltd. All rights reserved.
Keywords: Cascaded transformer; Multilevel inverter; Photovoltaic system; Pulse-width-modulated inverter

1. Introduction Residential photovoltaic (PV) power conditioning systems generally employ a voltage source pulse-width* Corresponding author. Tel.: +82 42 821 1172; fax: +82 42 821 1164. E-mail address: feelsoon@ieee.org (F.-S. Kang).

modulated (PWM) inverter to convert power from dc to ac. The inverter should be equipped with features such as high quality output voltage waves, voltage and frequency within the allowable limits, less harmonic generation by the inverter in itself to avoid damage to electronic appliances, and other requirements (Rashid, 2001). From the viewpoint of high quality output voltage generation and reduction of dv/dt stress on power

0038-092X/$ - see front matter 2004 Elsevier Ltd. All rights reserved. doi:10.1016/j.solener.2004.09.008

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F.-S. Kang et al. / Solar Energy 78 (2005) 727738

Nomenclature a1 a2 Ip k m n % Ppv DPpv SFB1 SFB2 V1 V2 Vcom Vdc Vp turn-ratio of the rst transformer (Tr.1) turn-ratio of the rst transformer (Tr.2) solar array current (A) the number of cascaded transformers the number of output levels output voltage level the modulus operator in C-language solar power (W) the slope of Ppv switching function of the rst inverter module switching function of the second inverter module terminal voltage of the rst transformer, Tr.1 (V) terminal voltage of the second transformer, Tr.2 (V) command voltage (V) input dc voltage (V) solar array voltage (V) Abbreviations ADCIN analog inputs to the ADC DSP digital signal processor FB full-bridge INT interrupt MPPT maximum power point tracking PV photovoltaic SPWM sinusoidal pulse width modulation T1UF timer 1 underow CPU central processing unit EMI electromagnetic interference FFT fast fourier transform ISR interrupt service routine PWM pulse width modulation RF radio frequency T1P timer 1 period THD total harmonic distortion

switching devices in residential photovoltaic systems, multilevel inverters can substitute for the conventional PWM inverters (Calais et al., 1999; Tolbert and Peng, 2000). However, to obtain more sinusoidal output voltage waveforms by means of synthesizing a great number of output levels, it should increase the number of switching devices and other components. So conventional multilevel inverters such as diode-clamped, ying capacitors, and cascaded full-bridge cells with separate dc sources are not useful for this application (Lai and Peng, 1996; Rodriguez et al., 2002). Recently, a multilevel inverter employing cascaded transformers, so called 3k-level inverter, has been considered for PV applications (Thomas, 1994; Kang et al., 2003). From the viewpoint of the generation of high quality output voltage waveforms, the application to a residential PV system is encouraged since the multilevel inverter with cascaded transformers can produce high quality output voltage with good harmonic characteristics owing to a large number of output levels. It automatically has galvanic isolation between a photovoltaic system and output loads by employing cascaded transformers. It shows good performance to synthesize stepped output levels once it is equipped with at least three transformers, which have a series-connected secondary. If the number of cascaded transformers is boundless, the output voltage levels are innite which is similar to analogue one. However, a large number of transformers can cause a cost increase, and manufacturing problems (Kang et al., 2003).

To alleviate this problem, an ecient switching pattern is proposed and applied to this kind of multilevel inverter equipped with two cascaded transformers, which have a series-connected secondary. Operational principle and analysis are illustrated focusing on a change of the switching pattern. The validity of the proposed multilevel scheme is veried by simulation and experimental results based on a residential photovoltaic power conditioning system prototype. The performance of the proposed multilevel PWM inverter is compared with conventional counterparts.

2. Proposed multilevel PWM inverter based on 3k-level inverter Fig. 1 shows a conguration of the proposed multilevel PWM inverter. It employs two transformers, which have a series-connected secondary as similar as that of 3k-level inverter (here, k means the number of cascaded transformers in Table 1). Owing to the dierent turnratio of each transformer and the ability of each fullbridge to create three dierent voltages across the primary winding, the voltage at the ac terminal can be comprised of 3k-levels as listed in Table 1. The advantage of this multilevel scheme is the relatively accurate replica of a sinusoidal wave accomplished with low switching frequencies (Calais et al., 1999; Kang et al., 2003). Table 2 shows the switching function of the 3k-level inverter. It covers each switching function up to that

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Q11

Q13

Q21

Q23

Vdc
Q12 Q14 Q22 Q24

Tr.1 1:a 1:3a

Tr.2

V1 Vo

V2

Fig. 1. Conguration of the proposed multilevel PWM inverter (9-level PWM).

Table 1 Number of output combinations Cascaded transformers Turns ratio Output levels according to combinations Tr.1

levels

according Tr.3

to

the

cascaded

Tr.2 1:3a 9-level

Tr.k 1:3k 1 a 3k-level

1:a 3-level

1:9a 27-level

of a 27-level inverter (k = 3). It only lists a positive switching function. In a negative case, it can be obtained by multiplying 1 to Table 2. Here the highlighted parts are the switching function for synthesizing a 9-level out-

put (k = 2). We can obtain a 9-level output with the prior switching function as listed in Table 2 using the circuit shown in Fig. 1: three dierent levels (+aVdc, 0, and aVdc) from the terminal of the rst transformer (V1), and the other three levels (+3aVdc, 0, and 3aVdc) from the terminal of the second transformer (V2). So the possible combination by adding both outputs becomes nine levels, i.e., +4aVdc, +3aVdc, +2aVdc, +aVdc, 0, aVdc, 2aVdc, 3aVdc, 4aVdc. It is not sucient to produce high quality output voltage because of the intervals between steps resulted in an increase of low-order harmonics. Specially, a case where a PV system has limitations on its volume and weight, one of the simple solutions is to minimize the number of transformer in this multilevel scheme. However, the elimination of the transformer without proper compensations causes low-order harmonics to increase. In the proposed multilevel PWM inverter, this problem is compensated with adding a pulse width modulation technique by changing a switching pattern. Table 3 shows new switching functions for the prior 3k-level inverter. It lists each switching function required to generate positive output levels. In a negative case, it can be easily obtained by multiplying 1 to Table 3. Expected output voltage waveforms are drawn in Fig. 2(a) with the terminal voltages of each transformer. Fig. 2(b) shows operational modes of the proposed multilevel PWM inverter. It includes a transition procedure of each switching function. While the output voltage is maintained at a certain constant level, the switching function should repeat up and down movements to be operated in PWM state as shown in Table 3. For example, in mode II, SFB1 repeats 1 and 1, and SFB2 plies 0 and 1 at the same time. Therefore, the output voltage repeats between +aVdc and +2aVdc sustaining the

Table 2 Each output level and its corresponding switching function Output level (n) Switching functions SFB1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 0 1 1 0 1 1 0 1 1 0 1 1 0 1 SFB2 0 0 1 1 1 1 1 1 0 0 0 1 1 1 SFB3 0 0 0 0 0 1 1 1 1 1 1 1 1 1 Each transformers terminal voltage V1 0 aVdc aVdc 0 aVdc aVdc 0 aVdc aVdc 0 aVdc aVdc 0 aVdc V2 0 0 3aVdc 3aVdc 3aVdc 3aVdc 3aVdc 3aVdc 0 0 0 3aVdc 3aVdc 3aVdc V3 0 0 0 0 0 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc Output voltage Vo 0 aVdc 2aVdc 3aVdc 4aVdc 5aVdc 6aVdc 7aVdc 8aVdc 9aVdc 10aVdc 11aVdc 12aVdc 13aVdc

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Table 3 Revised switching functions of the 3k-level inverter (k = 2)

Fundamental Output Level (n)

Switching Fuction

Each transformer's terminal voltage

Output Voltage

SFB1
0 1 -1 0 1

SFB2
0 0 1 1 1

V1
0 aVdc - aVdc 0 aVdc

V2
0 0 3aVdc 3aVdc 3aVdc

Vo
0 aVdc 2aVdc 3aVdc 4aVdc

0 1 2 3 II IV

I III

0.25 T

aVdc

V1
-aVdc

V1
0

aVdc - aVdc 3aVdc


0

3aVdc

V2

V2

4aVdc 3aVdc

-3aVdc 4aVdc 3aVdc 2aVdc aVdc

Vo
aVdc
0

2aVdc

MODE
Fundamental Output Level

I 0

II aVdc

III 2aVdc

IV 3aVdc

Vo

SFB1
I II III IV

-1

-1

MODE 0.25T

0.5T

SFB2

(a)

(b)

Fig. 2. Key waveforms of the proposed inverter (9-level PWM output): (a) output voltage (Vo) and terminal voltage of each transformer (V1, V2) and (b) operational modes.

fundamental level +aVdc and showing a chopped eect. Based on this basic idea, each switching function is determined by C-language expressions. Here, all variables are assumed as an integer, and SFn is the switching function of the full-bridge inverter; it has three states, i.e., 1, 0, and 1, respectively. To synthesize the fundamental output levels, the switching function of SFB2 is determined as if n < 2 then S FB2 0 if n P 2 then S FB2 1 1 2

if n%3 0 then S FB1 0 if n%3 1 then S FB1 1 if n%3 2 then S FB1 1

3 4 5

where % means the modulus operator of C-language. Consequently, the output voltage of the proposed multilevel PWM inverter is given as Vo
2 X n1

S FBn an V dc 3S FB2 S FB1 a V dc

Here n means the number of fundamental output voltage levels. In case of SFB2, it takes a zero when a command level is lower than the second level of output voltage. In contrast, it takes a unity when a command level is equivalent or higher than the second level of the output voltage. To produce the fundamental output levels, the switching function of SFB1 is determined as

where a1 = a, a2 = 3a, and SFBn 2 {1,0,1}. Fig. 3 shows the principle to determine fundamental voltage levels and their proper durations. To determine them, a positive portion is divided into four levels with the same height. Owing to a symmetrical conguration, we used a quarter portion of one cycle. For example, to

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(n+1)Vdc nVdc (n-1)Vdc Vdc

Vcom
Vdc/2
B A

3. Residential PV system employing the proposed multilevel PWM Inverter Fig. 4 shows a conguration of a PV system employing the proposed multilevel PWM inverter scheme. It consists of PV arrays, a dc-to-dc buck converter, a battery, and the proposed multilevel PWM inverter. A digital signal processor (DSP) TMS320F241 is used to control the proposed PV system. Fig. 5 shows the owchart for the main program and its internal interrupt dispatcher and service routines. Fig. 5(a) shows the owchart for the main program. First, the program initializes all variables to enable the desired interrupts and to start the timer, and loops in the routines. CPU interrupts INT2 and INT3 stop execution, and the program branches to the corresponding interrupt service routines (ISR). INT2 interrupt sources are Timer 1 period (T1PINT) and underow interrupts (T1UFINT). As shown in Fig. 5(b), once this is determined, the program branches to the corresponding interrupt service routine (INT). In the Timer 1 period interrupt service routine (T1PINT ISR), the program

Vdc/2

TN tn tn+1

Fig. 3. Determination of the fundamental output voltage level and duration.

calculate the duration of n Vdc output level, we set a point A as the middle value between (n 1)Vdc and n Vdc, and a point B as the middle value between n Vdc and (n + 1)Vdc, respectively. When Vcom crosses with the point A, it is set to the beginning instant of the n Vdc output level. And when Vcom crosses with the point B, it is set to the nishing instant of the n Vdc output level. During the duration, the switching functions iterate up and down movements proportionally increasing their pulse widths to make output voltage more sinusoidal.

Ip

Buck Converter

Multilevel PWM Inverter Q11 Q13 Q21 Q23

QA

IL

Vp

Vdc
Q12 Q14 Q22 Q24

Solar Array Tr.1


A/D

Vp Ip

ADCIN1

Tr.2 1:3a

Calculation

1:a

ADCIN2

A/D

Ppv

Ppv Vref1

V1 Vo
S/H

V2

Vdc Vo

ADCIN4

A/D

Vref2 Vcom
Determination Voltage & Duration QA Q11 - Q 14 Q21 - Q 24

ADCIN5

A/D

LPF

Duty Limit

Proportional

SFn

Tk

Integral Integrator with anti-windup

Selection LEVEL + PWM ( +4aVdc ~ -4aVdc )

Gate-amp

Antiwindup

TMS320F241
Fig. 4. Experimental set-up of the PV system employing the proposed 9-level PWM inverter.

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Main Program
START Initialization T1PINT Enable interrupts INT2, INT3 Enable Timer 1 & 2
NO YES

Interrupt Dispatcher for Buck Converter


INT2 T1PINT ISR & Return T1UFINT ISR & Return

T1UFINT
NO

YES

Start Timer 1 & 2

RETURN

(b)
INT = ?
NO

Description
INT2 : Interrupt 2 : Interrupt 3 : Timer 1 : Timer 2 : Underflow : Timer 1 Period Interrupt : Interrupt Service Routine : Analog inputs to the ADC INT3 T1 T2 UF T1PINT ISR ADCIN

CONTROL ROUTINE
NO

Fault = ?

T1UFINT : Timer 1 Underflow Interrupt END

(a)
START T1PINT ISR Read ADCIN1 & 2 for V p, I p Calculate Ppv(k), Ppv(k)

Service Routine for Buck Converter


START T1UFINT ISR Read ADCIN4 for V dc Exacute DC/DC control

Control Routine for Multilevel PWM Inverter


INT3 Read ADCIN5 for V o

Service Routine for Maximum Power Point Tracking (MPPT)

PI control

YES

Ppv(k)

Ppv(k-1)
NO

0
Enable interrupt

Generate command sine wave

Determine output voltage & duration

Ppv(k)
YES

Ppv(k-1)

0
NO

RETURN

(d)

Select LEVEL+PWM from switching function array

Voltage Source Region

Current Source Region Enable interrupt

Vp(k)

Vp(k-1)

0
NO

Vp(k)

Vp(k-1)

0
NO

RETURN

YES

YES

(e)
Vref1 (k-1) a

Vref1 (k)

Vref1 (k-1) a

Vref1 (k)

Vref1 (k-1)

Vref1 (k)

Vref1 (k-1)

Vref1 (k)

Enable interrupt

Vp Ip Ppv Ppv

: Voltage across solar array : PV current : Vp Ip : Calculated slope of Ppv

RETURN

(c)
Fig. 5. Flowchart for the software organization: (a) main program, (b) interrupt dispatcher for buck converter, (c) service routine for maximum power point tracking (MPPT), (d) service routine for buck converter and (e) control routine for multilevel PWM inverter.

reads two converted signals (Vp, Ip) from the ADCIN (analog inputs to the ADC) and starts power calculation

(Ppv) and its slope (DPpv) to determine a maximum power point.

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Fig. 6. Simulation results of output voltage and its spectrum characteristic: (a) 3-level PWM, (b) 9-level, (c) proposed 9-level PWM and (d) 27-level.

Under a stable insolation, the PV and IV characteristics can be separated into two divisions. One is a

current source region, and the other is voltage source region. The maximum power point (MPP) of the PV array

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lies at the boundary between two regions. According to the maximum power transfer theory, the solar array is required to operate on the right side of the curve to perform the tracking process. Otherwise, the dc-to-dc buck converter will operate with the maximum duty cycle, and the solar array voltage will only change with the insolation. Thus the system cannot achieve maximum power tracking and might even mistake the present operating point for the MPP (Hua et al., 1998). Service routine for maximum power point tracking shown in Fig. 5(c) illustrates the detail of decision processes. If a given perturbation leads to an increase or decrease in solar array output power, the next perturbation is made in the same direction. So the maximum power point tracker continuously follows the maximum power point. A dc-to-dc buck converter control consists of two loops. One is the maximum power point tracking loop (Fig. 5(c)), and the other is output voltage regulation loop (Fig. 5(d)). The former interrupted by Timer 1 period interrupt (T1PINT) is used to set a corresponding Vref1. It can be expressed as V ref1 k V ref1 k 1 a 7

and the program returns from the interrupt service routine (ISR). Although the overall system control is implemented by a single DSP, the converter part including MPPT function and the inverter part are independently controlled. A case where the battery is fully charged, it will discharge via the output load. If there is no load in the output, it will maintain a constant voltage level: It means that the output current depends on the output load condition. When the output current increases beyond 10% of rated current, inverter stage stops operation. When voltage across the battery decreases, it automatically receives energy from the input solar array; thus, it does not employ current regulation loop to recharge the battery.

4. Simulation and experimental results 4.1. Comparison of EMI noise source according to the number of output voltage levels As stand-alone photovoltaic power generation systems, low EMI (Electromagnetic interference), audio, RF (radio frequency) noises and less harmonic generation by the inverter should be considered to avoid damage to electronic appliances. To assess the reliability of the proposed multilevel PWM inverter scheme, we rst implemented computer-aided simulations using PSpice to various inverters: SPWM (sinusoidal pulse-width modulation) inverter (3-level), 32-level, 33-level, and proposed multilevel PWM inverter (9-level PWM). The comparison focuses on dv/dt stress and switching noises according to the number of output voltage levels. Fig. 6 shows each simulation result of the output voltage and its spectrum characteristic. All simulation was considered on a no-load and a steady state, and the amplitude modulation ratio is set to 0.8. In case of including PWM function, its switching frequency was set to 20 (kHz). Coupling coecient of each transformer was set to 0.99, but other nonlinear stray components

where a is the amount of disturbance and the sign of a is determined by the slope of calculated power. The latter controlled Timer 1 underow interrupt (T1UFINT) is used to maintain voltage across the battery constant. Fig. 5(e) shows a control routine for the proposed multilevel PWM inverter. The only source of INT3 is Timer 2 underow interrupt (T2UFINT). Once this is determined, the program branches to the Timer 2 interrupt service routine. Prior to branching the next, the contexts are saved in the stack. This is because T2UFINT is made interruptible by T1 interrupts. In the T2UFINT service routine, the program enables the interrupts to allow servicing of T1INT when they are generated. After enabling interrupts, the program read the output voltage, the program generates the reference sine wave, and executes required voltage control algorithm. Once these are completed, interrupts are disabled to restore the context from the stack. Following that, interrupts are re-enabled

Fig. 7. Simulation results of output voltage and its spectrum result at 500 W.

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735
Q11 Q13

were ignored. Among them, the best spectrum characteristic can be found in Fig. 6(d), which is the result of 33level inverter. As shown in Fig. 6(d), the output voltage waveform shows nearly sinusoidal one with good harmonic characteristic, but it requires three large transformers operated in a low frequency and 12 switching devices for three full-bridge modules. Although an output spectrum of the proposed inverter has somewhat large value at switching frequency region, it is respectively small compared to that of sinusoidal PWM inverter shown in Fig. 6(a). Moreover it is reduced proportional to the increase of output power because leakage reactance of the cascaded transformer acts as a high-performance lter as shown in Fig. 7. 4.2. Comparison of total harmonic distortion Total harmonic distortion (THD) of each inverter is given in Fig. 8. It is simulation results considered up to 100-order harmonic components. In this simulation, output LC lter is not equipped with each inverter except SPWM inverter. Without a proper LC output lter, SPWM inverter shows high THD %9.7(%). But once it employs an output lter, THD falls below 2(%). In case of the 9-level inverter, it shows bad characteristic in THD approx. over 15(%) due to the increased low-order harmonics between steps. In case of the proposed one,

Vdc1
Q12 Q14

Q21

Q23

Vdc2
Q22 Q24

Vo
Q31 Q33

Vdc3
Q32 Q34

Q41

Q43

Vdc4
Q42 Q44

Fig. 9. Conguration of the conventional cascaded FB-based inverter (9-level).

its THD changes their value according to load power condition. Although THD is high at a light load, it sufciently meets the general requirement 5(%) below. 4.3. Comparison of other multilevel inverters Table 4 shows a comparison of components with the conventional multilevel inverters: diode-clamped, yingcapacitor, and cascaded FB-cell inverter. In the comparison of power switching devices, we only considered the number of them for the sake of convenience. In practice,

Fig. 8. THD comparison of each inverter according to variation of load power.

Table 4 Component comparison of proposed multilevel inverter and other counterparts Type Item Switch Clapmping-diode Balancing-capacitor DC-bus Transformer Diode-clamped (m 1) 2 = 16 (m 1) (m 2) = 56 N.A. (m 1) = 8 N.A. Flying-capacitor (m 1) 2 = 16 N.A. m1m2 28 2 (m 1) = 8 N.A. Cascaded FB-cell (m 1) 2 = 16 N.A. N.A. m1 4 2 Multi-winding outputs(4) Proposed 8 N.A. N.A. 1 Cascaded type(2)

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the proposed multilevel PWM inverter requires dierent current ratings of switching devices. All output current (75%) ow via the lower full-bridge unit and TR.2. Therefore, careful designs of each inverter and transformer are required considering the eect of power imposed on each transformer. It is likely to be a drawback of the proposed multilevel PWM inverter scheme. In Table 4, m is the number of output levels, and we consider on the case of m = 9. It is clear that the most outstanding advantage of the proposed multilevel PWM inverter is the considerable diminishment of the number of required components. In case of the diode clamped, a large number of clamping diodes are the worst drawback. Lots of balancing capacitors are a weak point of the ying capacitor type inverter. Among them, the cascaded full-bridge cell type looks good to increase the number of output levels. Fig. 9 shows the conguration of the conventional cascaded FB cell type inverter. To synthesize 9-level output voltage, it needs four FB cells. A weak point of this inverter is that it requires an individual input voltage source per individual FB cell. Moreover, an instantaneous peak value of output voltage could not excess the sum of every individual input voltage source. For example, when it has four FB-bridge cells connected with each individual voltage source, which has the same value of Vdc, the instantaneous peak

value of output voltage does not over four times as high as Vdc. Fig. 10(a) shows an eciency comparison between the proposed multilevel inverter and the conventional cascaded FB inverter. This is a simulation result considering line resistance, stray capacitance and inductance. A resistive output load is added to increase the output power. The target output voltage is AC 110 (V), and its frequency is set to 60 (Hz); thus, the input voltage of the cascaded FB-cell (Vdc) would be DC 39 (V), and the turn-ratio (a) of the proposed multilevel inverter becomes 1.625. On the whole, the conventional inverter shows high eciency compared with the proposed one %2(%) over. Of cause, avoiding the transformer has the additional benets of reducing cost, size, weight and complexity of the inverter. However, the removal of the transformer and hence its galvanic isolation capability has to be considered carefully. Fig. 10(b) shows THD comparison results. Even if the proposed multilevel inverter does not employ additional output lters, it shows good harmonic characteristic owing to the eect of ltering by means of the reactance of cascaded transformers In case of the cascaded FB-cell method, THD characteristic does not depend on the output power as shown in Fig. 10(b). In case of the circuit complexity, the cascaded FB-cell type requires a large number of switching devices; more-

(a)

(b)

Fig. 10. Comparison of eciency and THD between proposed inverter and cascaded FB-cell inverter: (a) comparison of eciency and (b) comparison of total harmonic distortion.

Table 5 Specications of the prototype Items Power MOFET Cascaded transformers Battery (Vdc) PV array output Output (Vo) Specications and features Inverter Converter EI lamination PT100BR (series) 9-level PWM FS100UMJ03 FDP038AN06 1:a, 1:3a DC 24 V/100 A DC 51 V/20 A AC 110 V/60 Hz/500 W 30 V/100 A 60 V/80 A (parallel) Here, a = 1.625

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(a)

(b)
Fig. 11. Experimental results of output voltage: (a) no load and (b) 500 W.

(a)

(b)

(c)

(d)

Fig. 12. Variation of output voltage waveform according to load power: (a) no-load, (b) 150 W, (c) 300 W and (d) 500 W.

over, each cell of the cascaded FB-cell type requires its own isolated power supply. The provision of these isolated supplies becomes a limitation in the power electronic circuit design. In case of computational complexity, the proposed method is little complex because it requires more computational time to synthesize fundamental level and PWM signal at the same time; however, we consider the number of controlled switching devices, both inverters show almost same computational complexity. As a result, when it focuses on the simple system conguration and the generation of high quality output voltage with low harmonics and low dv/dt stresses, the proposed multilevel PWM inverter is the best one for the use of a stand-alone PV inverter among variable multilevel inverter schemes.

Amplitude [V]

100

Amplitude [V]
0 20 40 60 80 100

100 50 0

50

10

(a)

Frequency [kHz]

(b)

Frequency [kHz]

Amplitude [V]

Amplitude [V]
0 20 40 60 80 100

100

100

50

50

0 0 2 4 6 8 10

(c)

Frequency [kHz]

(d)

Frequency [kHz]

Fig. 13. FFT results of output voltage: (a) no-load; 0100 kHz, (b) no-load; 010 kHz, (c) 500 W; 0100 kHz and (d) 500 W; 010 kHz.

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Fig. 14. Measured eciency of the proposed PV system.

4.4. Experimental results Table 5 lists the specications of the prototype of 500 W. All switching devices are power MOSFETs, and EI laminated transformers are manufactured for the experiment. Fig. 11 shows experimental result waveform of output voltage at a no-load and full-load 500 (W), respectively. In case of Fig. 11(b), it shows nearly sine wave. The variation of the output voltage waveform can be found more clearly at Fig. 12. As output power increases, the output voltage turns into nearly sinusoidal waveform owing to a ltering eect by means of leakage and series-connected inductances of the cascaded transformer. Fig. 13 shows fast fourier transforms (FFT) results of Fig. 11. From these results, we can know that the proposed multilevel PWM inverter scheme largely depends on the load power condition. Measured eciencies are given at Fig. 14. The eciency of the dc-to-dc buck converter and proposed multilevel inverter are measured independently, and then the total eciency of the PV system was calculated. The eciency of the buck converter is nearly constant at 93(%). The proposed multilevel PWM inverter shows a good eciency %92(%) at a no-load, however it is slightly decreased with an increase of output power because of conduction losses. 5. Conclusion An ecient switching pattern was proposed and applied to the multilevel inverter equipped with two cascaded transformers, which has a series-connected secondary. Operational principle and analysis were illustrated focusing on a change of the switching pattern. The high-performance of the proposed PV system

employing the novel multilevel PWM scheme was veried by simulation and experimental results. A case where the proposed multilevel PWM inverter is applied for the use of a stand-alone photovoltaic inverter, it has several promising advantages. First, it can convert power for ac utility from relatively low dc voltage sources by itself. Second, a galvanic isolation between a solar array and output loads by means of cascaded transformers increases the system reliability. Third, it increases output voltage levels with the reduced number of switching devices. Fourth, it does not require an output lter because high-order harmonics are eectively ltered o owing to the leakage reactance of the cascaded transformers; therefore, it can produce high quality output voltage wave with a good harmonic characteristic. Finally, it reduces dv/dt stresses on power switching devices resulting in low audio and RF noise, EMI problems.

Acknowledgment This work was supported by the Post-doctoral Fellowship Program of Korea Science and Engineering Foundation (KOSEF).

References
Calais, M., Agelidis, V.G., Meinhardt, M., 1999. Multilevel converters for single-phase grid connected photovoltaic systems: an overview. Solar Energy 66 (5), 325335. Hua, C., Lin, J., Shen, C., 1998. Implementation of a DSPcontrolled photovoltaic system with peak power tracking. IEEE Trans. Ind. Electron. 45 (1), 99107. Kang, F.S., Park, S.J., Kim, C.U., 2003. Multilevel Inverter employing Cascaded Transformers. In: Proceedings of IEEE Industrial Electronics Society Conference, pp. 2169 2174. Lai, J.S., Peng, F.Z., 1996. Multilevel Converters-A New Breed of Power Converters. IEEE Trans. Ind. Applicat. 32 (3), 509517. Rashid, M.H., 2001. Power Electronics Handbook. Academic Press, pp. 539562. Rodriguez, J., Lai, J.S., Peng, F.Z., 2002. Multilevel Inverters: A Survey of Topologies, Controls, and Applications. IEEE Trans. Ind. Electron. 49 (4), 724738. Thomas, G., 1994. Power inverter for generating voltage regulated sine wave replica. US Patent no. 5373433. Tolbert, L.M., Peng, F.Z, 2000. Multilevel converters as a utility interface for renewable energy systems. In: Proceedings of IEEE Power Engineering Society Summer Meeting, pp. 12711274.

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