EEEB113 Circuits Analysis 1 Group Assignment, Semester 2 2012/2013 INSTRUCTIONS 1. Form a group comprising of four (4) students (maximum).

2. Prepare a report with the following guidelines: - Paper: A4 (not letter size) - Pages: maximum 10 pages (excluding references) - Font options: Calibri size 11, Times New Roman size 11, Arial Size 10 (unless stated using hand writing). - Maximum Spacing: 1.5 times - References: Compulsory. Failure to provide complete reference listing or copyi ng/plagiarism will result in report rejection. Reports will be tested on www.plagiarismchecker .com - Any other options not mentioned here may be decided by the author(s). 3. Discuss and the following two questions 4. Requirements: a. Report must be submitted by 21 December 2012 b. Attached all circuitry layout & simulation outputs printouts. 5. Marks will be given based on: a) Format - refer to the above guidelines (front page, page no., references & etc.). [15 marks] b) Circuit functionality - worked or otherwise (simulation outputs printouts) [20 marks] c) Technical (i.e. circuit layout/topology) [5 marks] d) Response/simulation outputs descriptions (including hand- calculations). [10 marks] NAME STUDENT ID 1. 2. 3. 4. SUBMISSION DATE Criteria Marks Question 1 a b c d Question 2 a b c d Total Marks EEEB113 Circuits Analysis 1 Group Assignment, Semester 2 2012/2013 Question 1 [50 Marks] Consider the following op-amp circuit in Figure 1. a) Given R1 = 5 k, R2 = 30 k , R3 = 40 k and R4 = 80 k, determine output voltage V0. b) Show each steps taken in determining the output voltage V0 by hand-calculatio ns. c) Given v1 = -16 V, v3 = 16 V and the output voltage V0 is to increase to 25 V. Determine the new values of R1, R2, R3 and R4. d) Show each steps taken in determining the values of all resistors by hand writ ing. e) Use LTSpice to plot the V0 to verify the result obtained in (b).

Note: use uA741 op-amp for the LTSpice simulation. Figure 1 EEEB113 Circuits Analysis 1 Group Assignment, Semester 2 2012/2013 Question 2 [50 Marks] Consider the following series RLC circuit in Figure 2. a) Find v(t) and vR(t) for t > 0. Consider these cases R = 10 , R = 20 , and R = 3 0 . b) Show each steps taken in determining the two responses by hand-calculations. c) Use LTSpice to plot v(t) and vR(t) for t > 0 to verify the responses obtained in (a). d) Clearly explain each of the responses. e) For case R = 10 , determine v(t) for t at 0.8 second. Is it the same as comput ed in (a)? Figure 2