AN29160AA Product Standards Technical Data Sheet</TITLE

Total Pages Code No.
: 60
Page 1
Product Standards
Part No. Package Code No.
AN29160AA
HSOP056-P-0300A
Analogue LSI Business Unit Semiconductor Company Matsushita Electric Industrial Co., Ltd.
Established by Applied by Checked by Prepared by
T.Higuchi
M.Hiramatsu
T.Shimazu
K.Ohta
Established
222916000105030
Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.
AN29160AA
Product Standards
Total Pages 60
Page 2
Contents
Overview . 3 Features .. 3 Applications Package . Type .... Application Circuit Example . 3 3 3 4
Block Diagram.. 6 Pin Descriptions . 7 Absolute Maximum Ratings . Operating Supply Voltage Range ... 9 9
Allowed Voltage Ranges . 10 Electrical Characteristics . 11 Electrical Characteristics (Reference value for design). 13 Control Pin Mode Table.. 21 Test Circuit Diagram. . 22 Electrical Characteristics Test Procedures.. 23 Technical Data 1.I/O block circuit diagrams and pin function descriptions.. 25 2.Power Supply Block Assign.. 36 3.Serial Data Control.36 4.Lock Detect..44 5.Counter Setting45 6.AF Signal Flow.46 7. Cautions about secondary harmonics level of VCO output..53 8. Power Control Sequence.. 54 9. Caution about Regulators.59 Usage Notes . 60
Established
222916000205030
AN29160AA
Product Standards
Total Pages 60
Page 3
AN29160AA
1chip IC for Transceiver (GMRS/ FRS/ PMR etc.)
Overview
AN29160AA is IC for Transceiver. One package involve four systems about IF, PLL, Regulator, and AF. Involving 1st IFamp, 2nd Mixer, 2nd IFamp, FM-Detector, 460MHz PLL, Regulator for RXRF/ TXRF/ VCO/ MCU, OPAMPs for filter and Speaker Amplifier. It is possible to reduce many external parts and space.
Features
(1) Operating Voltage : 6.5V ~ 3.2V (2) Built in 1st IF Amplifier (3) Built in 2nd Mixer (4) Built in 2nd IF Amplifier (5) Built in FM-Detector (6) Built in PLL (Operating frequency :100 ~ 490MHz) (7) Built in Regulator (ILmax=100mA) (8) Built in 3Regulators (ILmax=20mA) (9) Built in Speaker Amplifier (Pmax > 350mW @Vcc=4.5V/ RL=8BTL) (10) ElectricVolume control: 24 steps (11) Built in 7 OPAMPs for Splatter-Filter, Data Filter, Voice Filter, Noise Filter, Microphone Amplifier. (12) Built in RSSI , Noise Squlech. (13) Built in VOX for Hands free comunication. (14) Compact Package : HSOP56pin (0.5mm pitch)
Applications
For Transceiver
Package
56pin Plastic Small Outline Package With Heat Sink (SOP Type)
Type
Silicon Monolithic BiCMOS IC
Established
222916000305030
VCC
+ +
222916000405030
Application Circuit Example1
Established
TX Data De Emphasis RX Data MIC Tone
Comparator
Pre Emphasis
Revised
MCU A/D GND1 51 39 PE VOX BGR Mic Mute SF Amp Mic Amp SQ VREF Ttim. AMP, FMDET PE LIM AF HPF (TX) (5th-HPF) AF Mute Tone LPF (5th-LPF) 50 49 48 47 46 45 44 43 42 40 38 37 36 35 34 33 32 31 30 29 41 Adder 12-bitDIV Mix2 17-bitDIV IF Amp2 1/2 32/33 CP 1/2 OSC GND1 10 VCO 11 12 13 14 15 1/2
LD SQ
Earphone
Speaker
56 55 54 SPGND
53
52
SP Amp
Volume DET 10 pF
Product Standards
IC REG
TX REG
VCO REG
RX REG
MCU REG
IFAmp1 RSSI
LATCH VCC1
SPREF 5 MCU 6 7 8 9 MCU Drive Amp 1stIF BPF Mix1 10.5521.7MHz
Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Logic GND 16 17 18 19 20 21 22 MCU OFF /SLEEP NDET
ANT BPF
TXSW
SPVCC
IF2 IF2 REF2 REF1 23 24 25 26 27
28
EN
60
Total Pages
DATA
PA
CLK
450kHz 2ndIF BPF
RSSI DET
MCU A/D
AN29160AA
Page 4
LNA
RF BPF 465MHz
DAC RX Data De Emphasis MIC
VCC
+ +
222916000505030
Application Circuit Example2
Established
Tone
Comparator
Pre Emphasis
Earphone MCU A/D
Revised
GND1 52 35 PE 34 Mic Mute VOX BGR SF Amp Mic Amp SQ VREF Ttim. AMP, FMDET PE LIM AF HPF (TX) (5th-HPF) AF Mute Tone LPF (5th-LPF) 51 50 49 48 47 46 45 44 43 42 40 39 38 37 36 33 32 31 30 29 41 Adder 12-bitDIV Mix2 17-bitDIV IF Amp2 1/2 32/33 CP 1/2 OSC GND1 10 VCO 11 12 13 14 15 1/2
LD SQ
Speaker
56 55 54 SPGND
53
SP Amp
Volume DET 10 pF
IC REG
TX REG
VCO REG
RX REG
Product Standards
MCU REG
IFAmp1 RSSI
LATCH VCC1
SPREF 5 MCU EN 6 7 8 9 MCU Drive Amp 1stIF BPF Mix1 10.5521.7MHz
AN29160AA
Page

Logic GND 16 17 18 19 20 21 MCU OFF /SLEEP NDET
ANT BPF
TXSW
SPVCC
IF2 IF2 REF2 REF1 22 23 24 25 26 27
28
Total Pages
DATA
PA
CLK
60
450kHz 2ndIF BPF
RSSI DET
MCU A/D
LNA
RF BPF 465MHz
222916000605030
Block Diagram
Established
50 48 Mic Mute VOX BGR Mic Amp SQ VREF Ttim. AMP, FMDET PE LIM AF HPF (TX) (5th-HPF) AF Mute Tone LPF (5th-LPF) PE 45 49 47 46 44 43 42 40 39 38 37 36 35 34 33 32 31 30 29 41 Adder 12-bitDIV Mix2 17-bitDIV IF Amp2 1/2 32/33 CP 1/2
LD SQ
Revised
DET 10 pF IFAmp1 RSSI IC REG TX REG VCO REG RX REG 1/2 OSC GND1 10 11 12 13 14 15 Logic GND 16 17 18 VCC1 7 8 9 19 20 21 IF2 IF2 REF2 REF1 22 23 24 25 26 27 28
56 55 54 SPGND
53
52
51
SF Amp
SP Amp
Product Standards
Volume
MCU REG
LATCH
SPREF
SPVCC
Total Pages 60 6 Page
AN29160AA
AN29160AA
Product Standards
Pin Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Pin name SPVCC SPREF CLKIN DATAIN ENIN MCUREG RXREG TXREG VCC1 VCOREG ICREG OSCI OSCO OSCOUT GND1 CP VSS PLLIN SIGOUT NDET LIMIN PCONT MIX2OUT IFREF1 IFIN IFREF2 RSSIDET TANK DETOUT NFIN PE NFOUT LPF1IN LPF1OUT LPF2IN Type I O I I I O O O I O O I O O O I O O I I O O I O O O O I I O I O I Power Supply Pin for SP amp SP amp reference pin Clock input pin Serial data input Pin Enable input pin Regulator output pin for MCU Regulator output pin for RX RF Regulator output pin for TX RF Power supply pin for Regulator/ Bias Circuit Regulator output pin for VCO Regulator output pin for IC Oscillator input pin Oscillator output pin Divider output Ground Phase comparator output pin Ground pin for Logic PLL input pin LD,ND output pin Noise detection IF amp1 input pin Power Control pin Mix2 output pin Coupling pin for IF amp2 feedback IF amp2 input pin Coupling pin for IF amp2 feedback RSSI rectification pin IF amp2 output pin FM Detector output pin NF amp input pin Zap current applied pin NF amp output pin LPF1 input pin LPF1 output pin LPF2 input pin Description
Total Pages 60
Page 7
Established
222916000705030
AN29160AA
Product Standards
Pin Descriptions (continued)
Pin No. 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 Pin name LPF2OUT BREF VOXDET BGR MICIN MICOUT1 GND1 MICOUT2 HPF1IN HPF1OUT HPF2IN HPF2OUT AMOUT TONE SFIN SFOUT EVOUT SPIN SPOUT1 SPGND SPOUT2 Type O O O O I O O I O I O O I I O O I O O LPF2 output pin Baseband Block Reference pin VOX Detection pin BGR reference pin Microphone amplifier input pin Microphone amplifier output pin Ground Microphone amplifier mute output pin HPF1 input pin HPF1 output pin HPF2 input pin HPF2 output pin,Limiter input pin AF mute output pin Adder input pin SF amp input pin SF amp output pin Electric Volume output pin SP amp input pin SP amp output pin Ground pin for SP amp SP amp output pin Description
Total Pages 60
Page 8
Established
222916000805030
AN29160AA
Product Standards
Absolute Maximum Ratings A No. 1 2 3 4 5 Supply voltage Supply current Power dissipation Operating ambient temperature Storage temperature
Total Pages 60
Page 9
Parameter
Symbol VCC1 SPVCC ICC PD Topr Tstg
Rating 6.7 6.7 517 -30 to +75 -55 to +150
Unit
Note
V A mW C C
*1 *2 *3 *3
Notes) *1: The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2: The power dissipation shown is the value at Ta = 75C for the independent (unmounted) IC package without a heat sink. When using this IC, refer to the PD-Ta diagram of the package standard page 4 and use under the condition not exceeding the allowable value. *3: Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25C.
Operating supply voltage range Parameter Operating supply voltage range Symbol VCC1 SPVCC Range 3.2 to 6.5 V 3.2 to 6.5 * Unit Note *
Note) *:The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.
Established
222916000905030
AN29160AA
Product Standards
Allowed Voltage Ranges
Note) The ranges on the list are the voltages of respective pins in relation to GND. The GND represents the voltage of GND1,VSS and SPGND. And GND1=VSS=SPGND. Do not apply the voltages or the currents from external into the pins which are not on the list.
Total Pages 60
Page 10
Pin No. 1 3 4 5 6 7 8 9 10 11 12 18 21 22 25 30 31 33 35 40 44 46 49 50 53
Pin name SPVCC CLKIN DATAIN ENIN MCUREG RXREG TXREG VCC1 VCOREG ICREG OSCI PLLIN LIMIN PCONT IFIN NFIN PE LPF1IN LPF2IN MICIN HPF1IN HPF2IN TONE SFIN SPIN
Range
0 to 6.5 0 to ICREG 0 to ICREG 0 to ICREG 0 to -20 0 to -20 0 to -100 0 to 6.5 0 to -20 0 to -3 0 to ICREG 0 to ICREG 0 to ICREG 0 to VCC1 0 to ICREG 0 to ICREG 0 0 to ICREG 0 to ICREG 0 to ICREG 0 to ICREG 0 to ICREG 0 to ICREG 0 to ICREG 0 to SPVCC
Unit V V V V mA mA mA V mA mA V V V V V V V V V V V V V V V
Note
Pin No.
Pin name
Range
Unit
Note
Established
222916001005030
AN29160AA
Product Standards
Electrical Characteristics at VCC = 4.5V
Note) Ta = 25C2C, fin = 1kHz unless otherwise specified.
Total Pages 60
Page 11
B No.
< Total > 1 2 3 4 5 6
Parameter
Symbol
Test circuits
Conditions Min
Limits Typ Max
Unit
Notes
Current Drain in RX Mode Current Drain in STBY Mode Current Drain in TX Mode Current Drain in Call Tone Mode Current Drain in Sleep Mode Current Drain in Cutoff Mode
IRX IST ITX ICT ISL ICUT
1 1 1 1 1 1
PLL/ IF/ RXAF/ RXREG/ VCOREG: Active PLL/ IF/RXREG/ VCOREG: Active PLL/ TXAF/ TXREG/ VCOREG: Active PLL/ RXAF/ TXAF/ TXREG/ VCOREG: Active XO/ 1/4Div/ MCUREG/ ICREG: Active V22=L
21 12.3 10.4 16.8 1.8 6
27.3 16 13.5 21.8 2.4 10
mA mA mA mA mA uA
< DC POWER SUPPLY > 7 8 9 10 11 12 13 14 15 IC REG Output Voltage MCU REG Output Voltage in Active Mode MCU REG Output Voltage in Cutoff Mode VCO REG Output Voltage (3cell mode) VCO REG Output Voltage (4cell mode) RX REG Output Voltage (3cell mode) RX REG Output Voltage (4cell mode) TX REG Output Voltage (3cell mode) TX REG Output Voltage (4cell mode) VIC VMCU VMCU2 VVCO3 VVCO4 VRX3 VRX4 VTX3 VTX4 1 1 1 1 1 1 1 1 1 No Load V22=H, No Load V22=L, No Load No Load VCC=6V No Load VCC=6V No Load VCC=6V No Load No Load No Load 2.71 2.71 2 2.81 3.68 2.71 3.68 2.71 3.68 2.8 2.8 2.35 2.9 4 2.8 4 2.8 4 2.89 2.89 2.7 2.99 4.32 2.89 4.32 2.89 4.32 V V V V V V V V V
< IFamp2 + FM DET> 16 17 FM Detection Output Level Distortion VDET DDET 1 fin= 450kHz, fm= 1kHz, f= 1.5kHz fin= 450kHz, fm= 1kHz, f= 1.5kHz -19.5 -16.5 1.5 -13.5 3 dBV %
Established
222916001105030
AN29160AA
Product Standards
Electrical Characteristics at VCC = 4.5V
Note) Ta = 25C2C, fin = 1kHz unless otherwise specified.
Total Pages 60
Page 12
B No.
Parameter
Symbol
Test circuits
Conditions Min
Limits Typ Max
Unit
Notes
< DeEmp + AF HPF + EVOL + Sp amp > 18 19 Standard Output Level Distortion VORX DORX 1 1 Vin44 = -15dBV RL = 8 Vin44 = -15dBV RL = 8 -3 0 1.5 3 3 dBV % *1 *1
< Mic Amp + AFHPF + SF Amp > 20 21 Standard Output Level Distortion VOTX DOTX 1 1 Vin40 = -45dBV RL = 10k Vin40 = -45dBV RL = 10k -12 -9 0.5 -6 2 dBV %
Note)*1: Electric Volume: -8dB Mode
Established
222916001205030
AN29160AA
Product Standards
Total Pages 60
Page 13
Electrical Characteristics (Reference values for design) at VCC = 4.5V, 6.0V Notes) 1. Ta = 25C2C, fin = 1kHz unless otherwise specified. 2. The following values are design reference values. These values do not guarantee the characteristics of the device. Furthermore, they do not guarantee that all devices are tested.
B No. Parameter Symbol
Test circuits
Conditions Min
Reference values Typ Max
Unit
Notes
< DC POWER SUPPLY > 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 IC REG Output Current MCU REG Output Current in Active Mode MCU REG Output Current in Cutoff Mode VCO REG Output Current (3cell) VCO REG Output Current (4cell) RX REG Output Current (3cell) RX REG Output Current (4cell) TX REG Output Current (3cell) TX REG Output Current (4cell) IC REG Ripple Rejection Ratio MCU REG Ripple Rejection Ratio VCO REG (3cell) Ripple Rejection Ratio VCO REG (4cell) Ripple Rejection Ratio RX REG (3cell) Ripple Rejection Ratio RX REG (4cell) Ripple Rejection Ratio TX REG (3cell) Ripple Rejection Ratio TX REG (4cell) Ripple Rejection Ratio ILIC ILMCU ILMCU2 ILVCO3 ILVCO4 ILRX3 ILRX4 ILTX3 ILTX4 RRIC RRMCU RRVCO3 RRVCO4 RRRX3 RRRX4 RRTX3 RRTX4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0.1V Drop from No Load 0.1V Drop from No Load V22=H 0.1V Drop from No Load V22=L 0.1V Drop from No Load 0.1V Drop from No Load 0.1V Drop from No Load 0.1V Drop from No Load 0.1V Drop from No Load 0.1V Drop from No Load Vin = 1kHz, 0.1Vpp RX Mode, IL = 1mA Vin = 1kHz, 0.1Vpp Active Mode, IL = 20mA Vin = 1kHz, 0.1Vpp RX Mode, IL = 20mA Vin = 1kHz, 0.1Vpp RX Mode, IL = 20mA Vin = 1kHz, 0.1Vpp RX Mode, IL = 20mA Vin = 1kHz, 0.1Vpp RX Mode, IL = 20mA Vin = 1kHz, 0.1Vpp TX Mode, IL = 100mA Vin = 1kHz, 0.1Vpp TX Mode, IL = 100mA 1 20 100 20 20 20 20 100 100 mA mA uA mA mA mA mA mA mA dB dB dB dB dB dB dB dB *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1 *1
-60 -60 -60 -60 -60 -60 -60 -60
Note) *1: The above characteristics are logical values derived from the design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, Matsushita will respond in good faith to user concerns.
Established
222916001305030
AN29160AA
Product Standards
Electrical Characteristics (Reference values for design) at VCC = 6.0V
Total Pages 60
Page 14
Notes) 1. Ta = 25C2C, fin = 1kHz unless otherwise specified. 2. The following values are design reference values. These values do not guarantee the characteristics of the device. Furthermore, they do not guarantee that all devices are tested. B No.
< Total > 18 19 20 21 22 23 Current Drain in RX Mode Current Drain in STBY Mode Current Drain in TX Mode Current Drain in Call Tone Mode Current Drain in Sleep Mode Current Drain in Cutoff Mode IRX IST ITX ICT ISL ICUT 1 1 1 1 1 1 PLL/ IF/ RXAF/ RXREG/ VCOREG: Active PLL/ IF/RXREG/ VCOREG: Active PLL/ TXAF/ TXREG/ VCOREG: Active PLL/ RXAF/ TXAF/ TXREG/ VCOREG: Active XO/ 1/4Div/ MCUREG/ ICREG: Active V22=L 21 13 11 17 2 8 35.5 20.8 17.6 28.3 3.1 16 mA mA mA mA mA uA *1 *1 *1 *1 *1 *1
Parameter
Symbol
Test circuits
Conditions
Reference values Min Typ Max
Unit
Notes
< DC POWER SUPPLY > 24 25 26 27 28 29 30 31 32 IC REG Output Voltage MCU REG Output Voltage in Active Mode MCU REG Output Voltage in Cutoff Mode VCO REG Output Voltage (3cell mode) VCO REG Output Voltage (4cell mode) RX REG Output Voltage (3cell mode) RX REG Output Voltage (4cell mode) TX REG Output Voltage (3cell mode) TX REG Output Voltage (4cell mode) VIC VMCU VMCU2 VVCO3 VVCO4 VRX3 VRX4 VTX3 VTX4 1 1 1 1 1 1 1 1 1 No Load V22=H, No Load V22=L, No Load No Load VCC=4.5V No Load VCC=4.5V No Load VCC=4.5V No Load No Load No Load 2.63 2.63 2 2.73 3.57 2.63 3.57 2.63 3.57 2.8 2.8 2.4 2.9 4 2.8 4 2.8 4 2.98 2.98 3 3.08 4.45 2.98 4.45 2.98 4.45 V V V V V V V V V *1 *1 *1 *1 *1 *1 *1 *1 *1
< IFamp2 + FM DET> 33 34 FM Detection Output Level Distortion VDET DDET 1 fin= 450kHz, fm= 1kHz, f= 1.5kHz fin= 450kHz, fm= 1kHz, f= 1.5kHz -20 -16.5 1.5 -13 3 dBV *1 % *1
Established
222916001405030
AN29160AA
Product Standards
Electrical Characteristics (Reference values for design) at VCC = 6.0V
Total Pages 60
Page 15
Notes) 1. Ta = 25C2C, fin = 1kHz unless otherwise specified. 2. The following values are design reference values. These values do not guarantee the characteristics of the device. Furthermore, they do not guarantee that all devices are tested.
B No.
Parameter
Symbol
Test circuits
Conditions Min
Reference values Typ Max
Unit
Notes
< DeEmp + AF HPF + EVOL + Sp amp > 35 36 Standerd Output Level Distortion VORX DORX 1 1 Vin44 = -15dBV RL = 8 Vin44 = -15dBV RL = 8 -3.5 0 1.5 3.5 3 dBV % *1,2 *1,2
< Mic Amp + AFHPF + SF Amp > 37 38 Standerd Output Level Distortion VOTX DOTX 1 1 Vin40 = -45dBV RL = 10k Vin40 = -45dBV RL = 10k -12.5 -9 0.5 -5.5 2 dBV % *1 *1
Note) *1: The above characteristics are logical values derived from the design of the IC and are not guaranteed by inspection. If a problem does occur related to these characteristics, Matsushita will respond in good faith to user concerns. Note)*2: Electric Volume: -8dB Mode
Established
222916001505030
AN29160AA
Product Standards
Total Pages 60
Page 16
B No. Parameter Symbol
Test circuits
Conditions
Unit
Notes
IF Section< IFamp1 + MIX2 > 39 40 41 42 43 44 Gain 1dB Compression Input Level 3rd Intercept Point Input Level Input Resistance Input Capacitance Output Resistance GMX V1dB IP3 ZMXIR ZMXIC ZMXOR 1 fIF1= 21.7MHz fLO= 21.25MHz fIF1= 21.7MHz fLO= 21.25MHz fIF1= 21.65MHz+ 21.6MHz fLO= 21.25MHz fIF1= 21.7MHz fIF1= 21.7MHz fIF2= 450kHz 36 -36 -26 670 4.9 1.5 dB dBm dBm pF k *1 *1 *1 *1 *1 *1
< IFamp2 + FMDET > 45 46 47 48 Input Resistance Gain -3dB Limiting Sensitivity FM Detection Output S/N Ratio ZIF2IR GIF2 LIF2 VDETSN 1 fIF2= 450kHz fIF2= 450kHz fIF2= 450kHz fin= 450kHz, fm= 1kHz, f= 1.5kHz/ 0kHz 43 1.5 70 -75 50 k dB dBm dB *1 *1 *1 *1
< IFamp1 + MIX2 + IFamp2 + FMDET > 49 12dB SINAD Sensitivity1 SENS1 fIF1= 21.7MHz Input 50terminated with CCITT-TEL53 Filter fIF1= 21.7MHz Input 50terminated with 30kHz LPF -103 dBm *1
50
12dB SINAD Sensitivity2
SENS2
-94
dBm
*1
< IFamp1 + MIX2 + IFamp2 + RSSI > 51 52 53 Input Dynamic Range Max Output Voltage Min Output Voltage DIRS VHRS VLRS 1 1 Vin21 = 21.7MHz, -20dBm Vin21 = OFF 1.8 50 2.2 0.1 1.0 dB V V *1 *1 *1
< Noise Filter + SQ > 54 Threshold Level THNQ 1 Voltage on pin20 when pin 19 is set to high level from low level Difference in voltage between pin 20 and THNQ when pin 19 is set to low level from high level 0.77 V *1
55
Squelch Hysteresis
HYNQ
55
mV
*1
Established
222916001605030
AN29160AA
Product Standards
Total Pages 60
Page 17
B No.
Test circuits
Parameter
Symbol
Conditions
Unit
Notes
LOGIC SECTION < SIGOUT > in high electric field or with PLL locked RL=100k in low electric field or with PLL unlocked RL=100k
56
Low Level Output Voltage
LSIG
0.2
0.4
*1
57
High Level Output Voltage
HSIG
MCUREG x0.8
MCUREG
MCUREG
*1
< Serial Data Decorder > 58 59 60 Low Level Input Voltage High Level Input Voltage Input Clock Frequency LSC HSC FSC 0 IC REG x 0.7 0.2 IC REG 1 V V MHz *1 *1 *1
< Cut OFF mode setting > 61 62 Low Level Input Voltage High Level Input Voltage LPC HPC 1 1 Cutoff setting Active setting 0 1.3 0.4 VCC V V *1 *1
Established
222916001705030
AN29160AA
Product Standards
Total Pages 60
Page 18
B No.
Test circuits
Parameter
Symbol
Conditions
Reference Values Min Typ Max
Unit
Notes
RX Voice System < Adder + Electrical Volume > 63 Standard Output Level VEV DOEV 1 Vin49 = 0dBV -8dB Mode THD=5% RL=10k 0dB Mode AC Level on pin49 @ THD=5%, All Mode Step 1 to 23 Vin49 = 0dBV Mute Mode -17 dBV *1
64
Output Dynamic Range
-3
dBV
*1
65
Input Dynamic Range
DIEV
-16
dBV
*1
66 67
Volume Control Attenuation Volume Mute Attenuation
AEV MEV
1 1
40 -
44 -57
48 -
dB dB
*1 *1
< SPAmp > 68 69 70 71 72 73 Max Output Power 1 Max Output Power 2 Max Output Power 3 Max Output Power 4 Max Output Power 5 Max Output Power 6 PSP1 PSP2 PSP3 PSP4 PSP5 PSP6 1 1 Vcc=4.5V, BTL Output THD= 10%, RL=8 Vcc=4.5V, BTL Output THD= 10%, RL=16 Vcc=6V, Single Output THD= 10%, RL=8 Vcc=6V, Single Output THD= 10%, RL=16 Vcc=4.5V, Single Output THD= 10%, RL=8 Vcc=4.5V, Single Output THD= 10%, RL=16 350 200 250 140 130 70 500 300 350 200 190 100 mW mW mW mW mW mW *1 *1 *1 *1 *1 *1
< DeEmp + AFHPF + EVOL + SPAmp > 74 75 76 77 Output Dynamic Range VCC=4.5V Output Dynamic Range VCC=6.0V Output Noise Level Mute Attenuation DORX1 DORX2 NRX MRX 1 1 1 1 THD=10%, RL=8 THD=10%, RL=8 30kHz LPF Vin44 = -15dBV AFMute/ EVMute: Active 2.5 5 9 -53 -65 -45 dBV dBV dBV dB *1 *1 *1 *1
RX Data System < IFAMP2 + FMDET + DataLPF> 78 Standard Output Level VDR 1 fin= 450kHz, fm= 160Hz, f= 0.5kHz -7 dBV *1
Established
222916001805030
AN29160AA
Product Standards
Total Pages 60
Page 19
B No.
Test circuits
Parameter
Symbol
Conditions Min
ReferenceValues Typ Max
Unit
Notes
TX Voice System < MICAMP > 79 Mute Attenuation MMIC 1 Vin40 = -45dBV -60 dB *1
< MICAMP + LIM > 80 Limit Level LIM 1 VIn40 = -30dBV -10 dBV *1
< MICAMP + LIM + SFAMP > 81 82 Output Noise Level Mute Attenuation NRX MRX 1 1 30kHz LPF Vin40 = -45dBV AFMute/ MICMute: Active -65 -65 -55 dBV dB *1 *1
< MICAMP + VOX > 83 84 85 Max Output Voltage Min Output Voltage Output Voltage Difference between RX/TX Mode VHVOX VLVOX DVOX 1 1 1 Vin40 = -10dBV Vin40 = OFF Vin40= OFF 1.8 0 2.2 0.08 30 V V mV *1 *1 *1
TXData System <DataLPF + SFAmp > 86 Standard Output Level VDT 1 Vin33 = 160Hz, 0dBV RL = 10k -18.5 dBV *1
Tone System <Adder + EVOL + SPAmp > 87 88 89 90 Standard Output Level Output Dynamic Range VCC=4.5V Output Dynamic Range VCC=6V Output Noise Level VTR DOTR1 DOTR2 NTR 1 1 1 1 Vin49 = 0dBV -8dB Mode THD=10% RL= 8 -8dB Mode THD=10% RL= 8 -8dB Mode 30kHz LPF 0 5 9 -65 -55 dBV dBV dBV dBV *1 *1 *1 *1
< SFAmp > 91 92 93 94 Standard Output Level Output Dynamic Range Output Noise Level Mute Attenuation VTR DORX NRX MRX 1 1 1 1 Vin49 = 0dBV RL = 10k THD=5%, RL=10k 30kHz LPF Vin49=0dBV SFMute: Active -3 -8.5 -1 -65 -60 -55 dBV dBV dBV dB *1 *1 *1 *1
Established
222916001905030
AN29160AA
Product Standards
Total Pages 60
Page 20
B No.
Test circuits
Reference values Conditions Min Typ Max Unit

Notes
Parameter
Symbol
PLL SECTION < Charge Pump > 95 96 97 98 99 100 101 102 Low Level Output Voltage 1mA mode Low Level Output Voltage 100uA mode High Level Output Voltage 1mA mode High Level Output Voltage 100uA mode Nch Output Current 800uA mode Nch Output Current 100uA mode Pch Output Current 800uA mode Pch Output Current 100uA mode CPVL1 CPVL2 CPVH1 CPVH2 CPN1 CPN2 CPP1 CPP2 ILE 1 1 1 1 1 1 1 1 No load No load No load No load V16 = 1.4V V16 = 1.4V V16 = 1.4V V16 = 1.4V 2.4 2.4 400 50 -1600 -200 -100 800 100 -800 -100 0 0.15 0.15 1600 200 -400 -50 100 V V V V uA uA uA uA nA *1 *1 *1 *1 *1 *1 *1 *1 *1
103 Output Leakage Current < PLL Counter > 104 Input Sensitivity 105 Operating Frequency < X'tal Oscillator > 106 Oscillation Margin1 107 Oscillation Margin2 < 4divider Output > 108 Output Level < IFamp1 + MIX2 > 109 Spurious 1 110 Spurious 2 111 Spurious 3 112 Spurious 4
VCND FCN
1 1
Input 50 terminated Input 50 terminated
-20 100
0 490
dBm MHz
*1 *1
RM1 RM2
f = 10.1MHz CL=16pF Ro= 100 f = 21.25MHz CL=10pF Ro= 100
400 200
800 400
*1 *1
VXO4
fo= 5.3MHz, RL= 10k
-10
dBm
*1
SPR1 SPR2 SPR3 SPR4
fIF1=32.325MHz -35dBm fLO=21.25MHz fIF1=11.075MHz -35dBm fLO=21.25MHz fIF1=15.6MHz -35dBm fLO=10.1MHz fIF1=5.5MHz -35dBm fLO=10.1MHz
-70 -62 -66 -69
dBm dBm dBm dBm
*1 *1 *1 *1
Established
222916002005030
AN29160AA
Product Standards
Control Pin Mode Table
Note) See parameters 61 to 62 in the Electrical Characteristics for control voltage retention ranges.
Total Pages 60
Page 21
Pin No. 22
Description Low Power Control
Pin voltage High Active
Remarks -
Cut Off
Established
222916002105030
AN29160AA
Product Standards
Test Circuit Diagram1
Total Pages 60
Page 22
Established
222916002205030
AN29160AA
Product Standards
Electrical Characteristics Test Procedures
Input C No. <Total> 1 2 3 4 5 6 Current Drain in RX Mode Current Drain in STBY Mode Current Drain in TX Mode Current Drain in Call Tone Mode Current Drain in Sleep Mode Current Drain in Cutoff Mode VCC VCC VCC VCC VCC VCC 4.5V 4.5V 4.5V 4.5V 4.5V 4.5V ICC ICC ICC ICC ICC ICC 1.2V 1.2V 1.2V 1.2V 1.2V 0.5V a a a a a a a a a a a a Parameter Pin No. Conditions Pin No. Output Condition V22 s SW 23 SW 40
Total Pages 60
Page 23
Pin settings SW 44 SW 44A SW 44B SW 49 SW 53A
OFF OFF OFF OFF OFF OFF
ON ON ON ON ON ON
a a a a a a
<DC POWER SUPPLY> 7 8 IC REG Output Voltage MCU REG Output Voltage in Active Mode MCU REG Output Voltage in Cutoff Mode VCO REG Output Voltage (3cell mode) VCO REG Output Voltage (4cell mode) RX REG Output Voltage (3cell mode) RX REG Output Voltage (4cell mode) TX REG Output Voltage (3cell mode) TX REG Output Voltage (4cell mode) VCC VCC 4.5V 4.5V VM11 VM6 No Load 1.2V No Load 1.2V a a a a OFF OFF OFF OFF ON ON a a OFF OFF
VCC
4.5V
VM6
No Load 0.5V
OFF
OFF
ON
OFF
10
VCC
4.5V
VM10
No Load 1.2V
OFF
OFF
ON
OFF
11
VCC
6.0V
VM10
No Load 1.2V
OFF
OFF
ON
OFF
12 13 14 15
VCC VCC VCC VCC
4.5V 6.0V 4.5V 6.0V
VM7 VM7 VM8 VM8
No Load 1.2V No Load 1.2V No Load 1.2V No Load 1.2V
a a a a
a a a a
OFF OFF OFF OFF
OFF OFF OFF OFF
ON ON ON ON
a a a a
OFF OFF OFF OFF
SW3=a SW4=a SW5=a SW10=OFF SW16=OFF SW16B=OFF SW18=a SW30=OFF SW31=a SW33=a SW53=OFF SW54=ON SW54A=OFF
Established
222916002305030
AN29160AA
Product Standards
Electrical Characteristics Test Procedures
Input C No. Parameter Pin No. Conditions Pin No. Output
Conditions
Total Pages 60
Page 24
Pin settings V22 SW 23 SW 40 SW 44 SW 44A SW 44B SW 49 SW 53A
<IFAMP2 + FMDET> 16 FM Detection Output Level fin= 450kHz, VIN23 fm= 1kHz, f= 1.5kHz,0dBm VM29 1.2V b a OFF ON OFF a OFF
17
Distortion
fin= 450kHz, fm= VIN23 1kHz, VM29 f= 1.5kHz,0dBm
1.2V
OFF
ON
OFF
OFF
<DeEmp + AF HPF + EVOL + SpAmp> 18 19 Standerd Output Level Distortion VIN44 Vin = 1kHz,-15dBV VM56 RL = 8 VIN44 Vin = 1kHz,-15dBV VM56 RL = 8 1.2V 1.2V a a a a ON ON OFF OFF OFF OFF a a ON ON
<MicAmp + AF HPF + SF Amp> 20 21 Standerd Output Level Distortion VIN40 Vin = 1kHz,-45dBV VM51 VIN40 Vin = 1kHz,-45dBV VM51 RL = 10k RL = 10k 1.2V 1.2V a a b b OFF OFF ON ON OFF OFF a a OFF OFF
SW3=a SW4=a SW5=a SW10=OFF SW16=OFF SW16B=OFF SW18=a SW30=OFF SW31=a SW33=a SW53=OFF SW54=ON SW54A=OFF
Established
222916002405030
AN29160AA
Product Standards
Technical Data
1.I/O block circuit diagrams and pin function descriptions
Note) The characteristics listed below are reference values based on the IC design and are not guaranteed.
Total Pages 60
Page 25
Pin No.
Pin Name
Waveform and voltage
Function
Inner circuit
DC 1 SPVCC
1 DC Power Supply Pin for SPAMP

12k
SPVCC
1k 1k 1k
DC 2 SPREF SPAMP reference pin

12k
155k
1k
50 1k 50 1k 1k
145k
CLKIN
Clock input pin Pin for sync clock input in order to read serial data
ICREG Serial data input Pin This pin is used by the internal shift register to read serial data at the rising edge of the clock
10k
DATAIN
3,4,5
ENIN
Enable input pin Serial data is deemed to be completed at the rising edge of the signal and the serial data is read by each latch circuit according to the settings in D1,D2,D3 and D4
Established
222916002505030
AN29160AA
Product Standards
Technical Data
1.I/O block circuit diagrams and pin function descriptions (Continued)
Total Pages 60
Page 26
Pin No.
Pin Name
Function
Inner circuit VCC
6 DC 6 MCUREG 2.8V Regulator output pin for MCU

12k 500k 500k
200 4.55k 5k 60.49k 72.5k 20k 1k 25p
ICREG
10k 4.55k 10k 10p
VCC
7
72.5k
RXREG
DC 2.8V
Regulator output pin for RX
12k
20k 5k 34.32k 26.17k 10k 10k
1k 25p
10p
VCC
8 DC 8 TXREG 2.8V Regulator output pin for TX

12k 71.96k 10k 10k 5k 34.28k 26.22k 10k 10k 10p 1k 25p 1k
DC VCC1 4.5V
Power supply pin
Established
222916002605030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 27
Pin No.
Pin Name
Function
Inner circuit VCC
10 DC 10 VCOREG 2.9V Regulator output pin for VCO

12k 5k 36.47k 24.02k 10k 10k 10p 77.3k 20k 1k 25p
VCC
11 DC 11 ICREG 2.8V
72.5k
Regulator output pin for IC
12k
20k 5k 34.32k 26.17k 10k 10k
1k 25p
10p
ICREG 12 OSCI Oscillator input pin

1k
12
1k
300k
13
OSCO
Oscillator output pin
13
ICREG
500
14
OSCOUT
Oscillator frequency/4 output
14
12k
100
400
Established
222916002705030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 28
Pin No. 15
Pin Name
Waveform and voltage 0V
Function
Inner circuit
GND1
Ground pin ICREG
DC 16 CP
Control Voltage
Phase comparator output pin
16
17
VSS
Ground pin for Logic
17
ICREG
450MHz
2.5k 2.5k
18
PLLIN
PLL input pin
1k 1k
18
12k
1.8k
19
SIGOUT
DC
19 LD,ND output pin
1k
ICREG With capacitor 20 NDET With no capacitor

12k 1.2k
Noise detection
20
1k 292k
4.8k
ICREG
10.55MHz 21.7MHz
21
LIMIN
IF amp1 input pin 21

12k
Established
222916002805030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 29
Pin No.
Pin Name
Function
Inner circuit VCC
22
PCONT
DC
22 Power Off pin

12k 64k 210k 64.4k 210k
102k
ICREG
450kHz
23
MIX2 OUT
Mix2 output pin
23
12k
1.5k
With capacitor 24 IFREF1 With no capacitor Coupling pin for IF amp2 feedback 25
12k
ICREG
24
12k
450kHz
1.5k 1k 37k
1k 37k
26
12k
25
IFIN
IF amp2 input pin
With capacitor 26 IFREF2 With no capacitor Coupling pin for IF amp2 feedback
1k 1k
ICREG With capacitor 27 RSSIDET With no capacitor

12k 200 10k
RSSI rectification pin
27
Established
222916002905030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 30
Pin No.
Pin Name
Function
Inner circuit
1k
450kHz
ICREG
100 1k
28
TANK
IF amp2 output pin
29
12k 1k 10p
5k
ICREG
50
29 29 DETOUT FM Detector output pin

12k
112k 133.1k 1k 22p
1k 100 5k
ICREG 30 NFIN NF amp input pin 30

1k
31
PE
Zap current applied pin This is a pin for internal Zap adjustment Which is normally grounded ICREG
50 50k
32
NFOUT
NF amp output pin
32
12k
50
ICREG 33 LPF1IN LPF 1 input pin 33

1k
Established
222916003005030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 31
Pin No.
Pin Name
Function
Inner circuit ICREG

50
34
LPF1OUT
LPF1 output pin
34
12k
50
ICREG 35 LPF2IN LPF2 input pin 35

1k
ICREG 36
12k 50 50
36
LPF2OUT
LPF2 output pin Data amp input pin
ICREG 37
12k 1k 1k 0.7k 20k 300k
37
BREF
DC
Baseband reference pin
With capacitor 38 VOXDET With no capacitor VOX Detection Output 38

12k 200
ICREG
8.33k
Established
222916003105030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 32
Pin No.
Pin Name
Function
Inner circuit VCC

10k 500 150k
39
BGR
DC
1k
BGR reference pin 39

12k 10p 32.2k
200k 1k 500 10k 5p
ICREG 40 MICIN Microphone amplifier input pin 40

1k
ICREG 41 MIC OUT1 Microphone amplifier output pin 41

50
50
43
MIC OUT2
Microphone amplifier mute output pin
42
42
GND1
0V
Ground pin ICREG
44
HPF1IN
HPF1 input pin
44
1k
ICREG 45
12k 50 50
45
HPF1OUT
HPF1 output pin
Established
222916003205030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 33
Pin No.
Pin Name
Function
Inner circuit ICREG
46
HPF2IN
HPF2 input pin
46
1k
ICREG HPF2 output pin Limiter input pin 47

12k 50 50 50k
47
HPF2OUT
48
AMOUT
AF mute output pin
48
12k
50 100k 50k 1k 50 1k
ICREG 49 49 TONE Adder input pin

1k 50 50k 50k 50
ICREG 50 SFIN SF amp input pin 50

1k
ICREG 51
12k 50 50 1k
51
SFOUT
SF amp output pin
Established
222916003305030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 34
Pin No.
Pin Name
Function
Inner circuit ICREG 52

12k 50 100k 22k 1k 50 1k
52
EVOUT
Evol output pin
SPVCC
100 31
53
SPIN
SP amp input pin
53
100 12k 600
300k
100
SPVCC 54
10k 12k 600 300k 100 300k 10k 1k 1k 1k 1k 1k
54
SPOUT1
SP amp output pin
56
SPOUT2
SP amp output pin
56
100k 12k 100 300k 100 300k 100 300k 100
0V 55 SPGND
Ground pin for SP amp
55
Established
222916003405030
AN29160AA
Product Standards
Technical Data
2. Power Supply Block Assign
Total Pages 60
Page 35
VCC
REG,ICREG BB,IF,MICAMP,VOX, GND SPLATTER AMP DATA LATCH CONTROL, ICREG VSS OSC,PLL SPGND SPAMP (Output) SPVCC GND SPAMP (Except Output)
VCC
REG
ICREG
IF
BB
GND LOGIC SPVCC SPAMP Output GND SPGND VSS OSC
PLL
Established
222916003505030
AN29160AA
Product Standards
Technical Data
3. Serial Data Control
Total Pages 60
Page 36
(1) Data Registers and Addresses

LSB D1 D2 D3 D4 1 0 1 1 1 0 1 1 1 1 0 0 D5 D6
LIM
D7
EV1
D8
EV2
D9
EV3
MSB D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23
EV4 EV5 CHP LDSW CHPT CNTT ZMW VSEL RSEL TSEL ZAP0 ZAP1 ZAP2 ZAP3
AFM MICM SLP

0
PIF PNSQ PREF PLPF PHPF PVOL PADD PVOX

1 2 3 4 5 6 7 8
PSP SPPR SPVR PMIC PSPL PTXV PRXV PVCO

9 10 11
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
11
ZEM 12
0 13
1 14
0 15
0 16
(2) Code allocation

Code D1 D2 D3 1 0 Control block Function Used for functional control. (Mute control, Volume control, etc.) Used for power supply mode control. Used for phase comparison frequency setting. Used for PLL output frequency setting.
1 Function control Test mode

Power control
1 1 0
1 1 1 Ref Counter 1 0 0 CH Counter
Established
222916003605030
AN29160AA
Product Standards
Technical Data
3.Serial Control (Continued)
Total Pages 60
Page 37
(3) Serial Data Input Procedure

The shift register sequentially reads the data input status whenever the edge of CLK input rises. All data is set at the rising edge of the D1 write CLK. The latch data that corresponds to the divider selected by D1, D2, and D3 is refreshed at the next rising edge of the EN. To enable the EN signal, set the DATA input status to zero.
1)
Function Control data input DATA EN

MSB Function Control LSB 1 0 1
2)
REF divider data input DATA EN

MSB REF divider (12b) LSB 1 1 1
3)
RF divider data input DATA EN

MSB CH divider (17b) LSB 0 0 1
4)
Power Control data input DATA EN

MSB Power Control LSB 0 1 1
Note) Set the DATA, CLK, and EN pins to low level unless data is input to them.
Established
222916003705030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 38
(4) Serial Data Input Timing and Input Voltage D1 DATA D0(LSB)
tH tsu1 350 ns 150 ns
0.7 X ICREG to ICREG 0V to 0.2V

Clock for the next data
0.7 X ICREG to ICREG CLK EN

50% tsu2 340 ns tH2 330 ns tREC2 330 ns 50% 50%
0V to 0.2V 0.7 X ICREG to ICREG 0V to 0.2V
tsu1: Setup time (Data Clock)350 ns tsu2: Setup time (Clock Enable)340 ns tH: Hold time (Clock Data)150 ns tREC2: Recovery time (Enable falling edge Clock)330 ns tH2: Hold time (Enable rising edge Falling edge)330 ns
* The shift register sequentially reads the data input status whenever the edge of CLK input rises. * To enable the EN signal, set the DATA input status to zero. * Serial data must be input in sequence beginning with the MSB.
Established
222916003805030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 39
(5) Power Control Setting

Power Control Control Block BGR, REG Trim. MCU REG IF/BB REG REF. OSC 1/4 DIVIDER SERIAL DECODER PLL COUNTER/CP IF AMP-1 2nd MIX IF AMP-2 RSSI FM DET NF AMP/SQ BREF, AFMUTE LPF HPF VOLUME ADDER VOX AF POWER AMP MIC AMP SPL FILTER TX REG RX REG VCO REG SERIAL DATA BIT PNSQ PREF PLPF PHPF PVOL PADD PVOX PSP SPPR SPVR PMIC PSPL PTXV PRXV PVCO
PIN22 SLP
PIF
*2
*2 *3
*3
*1) When SLP is "0", set LDSW to 0. *2) FMDET OUT Setting
PIF 1 0 0 1
PREF 1 1 0 0
FMDET OUT Unmuted Muted OFF (HiZ) Don't Use
*3) SFAMP OUT Setting
PSPL PREF SFAmp OUT 1 1 Unmuted 0 1 Muted 0 0 OFF (HiZ) 1 0 Don't Use
Established
222916003905030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 40
(6)Function Control Setting

Control logic Bit Function 1 MUTE MUTE Limiter 100uA NSQ 4V 4V 4V TEST TEST write emulation 0 PASS PASS PASS 800uA LD 2.9V 2.8V 2.8V Normal Normal Normal Normal Default setting *1 1 1 0 0 0 0 0 0 0 *2 0 *2 0 *2 0 *2 Note
AFM AF MUTE MICM Micamp MUTE LIM TX Limiter control PLL charge pump CHP current capacity setting Sigout pin output selection LDSW PLL LD /Noise squelch VSEL VCO REG Output Voltage RSEL RX REG Output Voltage TSEL TXREG Output Voltage CHPT Tr current capacity measurement CNTT Used for counter test ZMW Used for PROM writes ZEM Used for REG triming emulation
for testing for testing for trimming for trimming
*1) Default setting is defined as initial value when pin 22 is set to high level from low level where IC is turned on. *2) Set to 0 when the IC is in usual operation.
Established
222916004005030
AN29160AA
Product Standards
Technical Data
3. Serial Control (Continued)
Total Pages 60
Page 41
(7) EVOL Control Setting

SERIAL DATA EV2 EV3 0 0 0 0 1 0 1 0 0 1 0 1 1 1 1 1 0 0 0 0 1 0 1 0 0 1 0 1 1 1 1 1 0 0 0 0 1 0 1 0 0 1 0 1 1 1 1 1 1 1 BIT EV4 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 1 1 Gain Note EV5 [dB] 0 0 0 -2 0 -4 0 -6 0 -8 Standard Condition 0 -10 0 -12 0 -14 0 -16 0 -18 0 -20 0 -22 0 -24 0 -26 0 -28 0 -30 1 -32 1 -34 1 -36 1 -38 1 -40 1 -42 1 -44 1 Muted 1 Muted
STEP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
default
EV1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1
Established
222916004105030
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 42
(8) SPamp Block Control Circuit List

Circuit SPREF PREcharge SPbuffn1,2,3 SPamp1,2 for for for for Function Reference Voltage External Capacitance Charge charge and Vref Buffer amp BTL amp
PreCharge

53
VIN 100uF Earphone 150ohm Speaker 8 or 16 ohm
155K SPREF
2K
SPamp1 10K

SPbuffn2
2
100K 145K

56
SPbuffn3 ON/OFF Circuit Group

No. Block SPAMP1 ,SPAMP2 SPbuffn1 , SPbuffn2 PREcharge SPREF , Spbuffn3
SPamp2 100K
SPREF Control
Control SPVR Block Function SPREF ON/OFF Control Logic 1 0 Active OFF
Established
222916004205030
SPbuffn1

54
RL 10K 1K
AN29160AA
Product Standards
Technical Data
Total Pages 60
Page 43
Spamp,Spbuffn,PreCharge Control
Control PSP SPPR Block Function
, SP AMP & Buffer ON/OFF , PreCharger & Buffer ON/OFF
Spamp,Spbuffn,PreCharge Control
PSP 1 1 0 0 SPPR 1 0 1 0 Active OFF Active Active OFF OFF OFF Active Active OFF OFF OFF
SPOUT
Comunicationable
SPVR SPPR PSP t1 t2 t3 t1
Recommended Power Sequence

No. t1 t2 t3 time 50 >10 >2 unit ms ms s Charge/Discharge Time 1=R1C1 3=(R2 // RL)C2
Established
222916004305030
AN29160AA
Product Standards
Technical Data
4.Lock Detect
Total Pages 60
Page 44
T1 REFCLK
REF Counter Output
T2
RF Counter Output
<-T4->
T3'
T3''''
PD OUT
<-T4->
T3''
LD
Fref : REFCLK frequency T1 = (1/2) *(1/Fref) T2 = (1/2) *(1/Fref) T3 < 1/Fref : PLL in Lock Condition T4 > 1/Fref : PLL not in Lock Condition *Locked Condition : IF T3 occurred 3 times, LD is High.
Established
222916004405030
AN29160AA
Product Standards
Technical Data
5.Counter Setting
Total Pages 60
Page 45
(1) Counter Setting Method

The frequency dividing ratio is specified by a data-corresponding binary code. The VCO oscillating frequency which corresponds to the reception or the transmission frequency fRF is obtained from the following formula.
fRF =P2[(fosc / 2 )R]

Here, R is the frequency dividing ratio of REF divider, P is the frequency dividing ratio of the RF divider, and fosc is the reference oscillation frequency of the crystal oscillator. Provided that the reference oscillation frequency (fxtal) is 20.85 MHz, R is 1668 in order to obtain a reference frequency of 6.25 kHz (i.e., (fxtal/2)R). Possible Setting Range Frequency dividing ratio of REF divider R=5 to 4095 Frequency dividing ratio of RF divider P=1056 to 131071
(2) Counter Default Setting when pin 22 is set to high level from low level
LSB Counter REF Counter RF Counter D4 0 0 D5 0 1 D6 0 1 D7 1 0 D8 0 0 MSB Counter Default Setting D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 1 1 0 1 0 1 1 1 1 1 0 0 0 0 1 0 0 1 0
REF counter: Frequency dividing ratio of 8082 RX counter: Frequency dividing ratio of 378622 (3) Counter Setting Example The following is an example of the counter setting to reception mode where RX PLL is active. REF counter: 20.85 MHz 6.25 kHz, R=1668 RF counter: f(RF)= 462.7125 MHz 6.25 kHz, P=37017 The following is the configuration of the serial data on each bit.
LSB Counter D1 D2 D3 D4 0 1 D5 0 0 D6 1 0 D7 0 1 D8 0 1 Counter Default Setting D9 D10 D11 D12 D13 D14 0 0 0 0 1 1 0 0 1 0 1 0 D15 0 0 D16 1 D17 0 D18 0 D19 1 MSB D20 0
REF 1 1 1 Counter RF 1 0 0 Counter
Established
222916004505030
AN29160AA
Product Standards
Technical Data
6. AF Signal Flow
Total Pages 60
Page 46
(1) System Diagram

10k Ref OSC Splatter Filter 54 56 VCO 50 52 51 53 ATT
SPAMP
10k
50k
Volume
50k
Adder
MCU 48 Comparator 49
AF Mute
LIM
HPF
36
LPF
47
46
35
Key Touch Tone
Call Tone
MCU
MCU
CTCSS Tone
HPF
41
VOX 38
8.33k
40
Pre Emphasis
Established
222916004605030
MIC
FM DET 29
DeEmphasis
MIC Amp
MIC Mute
43
33
31
30
NoiseAMP
44
34
LPF
Noise Det
45
Comparator
19
MCU
222916004705030
Technical Data
(2) Reception Mode
Established 6. AF Signal Flow

MCU
Revised
MIC Amp
VOX Mode: ON Otherwise: OFF
MIC
40
41
Pre Emphasis
VOX 38
Limitter OFF
LIM 47 50k AF Mute 50k Volume 52 HPF 53 49 Adder SPAMP
Call Tone Key Touch Tone
MIC Mute
HiZ
8.33k 54 10k 10k 56
43
FM DET 29 45 46
44
HPF
DeEmphasis
LoZ 48
Voice
CTCSS Tone
Product Standards
MCU
33 35 36 LPF
34
50 Splatter Filter
51
ATT
VCO Ref OSC
Data
LPF
Total Pages
Muted
MCU Comparator
60
AN29160AA
31
Page 47
30

Noise Det Comparator 19 MCU
NoiseAMP
FMDET Noise
222916004805030
Technical Data
(3) Transmission Mode
Established 6. AF Signal Flow Under the Tx mode, make it does not output Key Tone when any key is hit.
MCU
Revised
Voice
MIC Amp
MIC
40
41
Pre Emphasis
VOX 38
MIC Mute LIM 47 50k AF Mute 50k Volume HPF 48 49 Adder 52 53 45 HPF 46
Limitter ON
LoZ 43 ON OFF
8.33k
LoZ LoZ
OFF
10k 10k OFF
54 56 SPAMP
FM DET 29
44
DeEmphasis
CTCSS Tone
Product Standards
MCU
Data LoZ LoZ

34 35 36 LPF
33
50 Splatter Filter
51
ATT
VCO Ref OSC
LPF
Total Pages 60
MCU Comparator
AN29160AA
Page
31 Noise Det
OFF OFF
48
30
Comparator
19
MCU
NoiseAMP
222916004905030
Technical Data
(4) Call Tone Mode

MCU
Revised
MIC Amp
OFF
MIC
40
41
Pre Emphasis
VOX 38
MIC Mute LIM 47
Limitter OFF
HiZ 43 Muted
AF Mute 50k Volume 52 HPF Adder 50k 45 46
8.33k 54 10k 53 10k 56 SPAMP
LoZ
FM DET 29
44
HPF
DeEmphasis
OFF OFF
48 49
Call Tone
Product Standards
CTCSS Tone
Data LoZ
35 36 LPF
LoZ
MCU
33
34
50 Splatter Filter
51
ATT
VCO Ref OSC
LPF
Total Pages 60
MCU Comparator
AN29160AA
49
Page
31 Noise Det
OFF OFF

Comparator 19 MCU
30
NoiseAMP
222916005005030
Technical Data
(5) Key Touch in Reception Mode

MCU
Revised
MIC Amp
MIC
40
41
Pre Emphasis
VOX 38
MIC Mute LIM 47
Limitter OFF
HiZ 43 Muted
50k 50k Volume HPF 48 49
8.33k 54 10k 52 53 10k Adder SPAMP 56
LoZ
45 HPF 46 AF Mute
Voice
FM DET 29
44
DeEmphasis
Key Tone
Product Standards
CTCSS Tone
MCU
33 34 35 36 LPF
50 Splatter Filter
51
ATT
VCO Ref OSC
Total Pages
Data
LPF
Muted
60
MCU Comparator
AN29160AA
Page
50
31 Noise Det Comparator 19 MCU
30
NoiseAMP
FMDET Noise
222916005105030
Technical Data
(6) Key Touch in Intermittence Mode

MCU
Revised
MIC Amp
MIC
40
41
Pre Emphasis
VOX 38
MIC Mute
Limitter OFF OFF

47
HiZ 43 OFF LIM Muted

50k 50k Volume 52 HPF 48 49
8.33k
LoZ
45 Adder 46 AF Mute
FM DET 29
44
10k 53 10k
54 56 SPAMP
HPF
DeEmphasis
Voice Key Tone
CTCSS Tone
Product Standards
MCU
LoZ LoZ
35 36 LPF
33
34
Data
50 Splatter Filter
51
ATT
VCO Ref OSC
LPF
Total Pages
Muted
MCU Comparator
60
AN29160AA
31
51
Page
30

Noise Det Comparator 19 MCU
NoiseAMP
FMDET Noise
AN29160AA
Product Standards
Technical Data
6. AF Signal Flow
Total Pages 60
Page 52
(7) Recommended Serial Data (a) Reception Mode

MSB 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3
1 1 0
2
0 0 1
LSB 1
1 1 1
ZAP3 ZAP2 ZAP1 ZAP0 TSEL RSEL VSEL ZMW CNTT CHPT LDSW CHP EV5 EV4 EV3 EV2 EV1 LIM MICM AFM 0 0 0 0 *1 *1 *1 0 0 0 *1 1 *1 *1 *1 *1 *1 0 1 0 PVCO PRXV PTXV PSPL PMIC SPVR SPPR PSP PVOX PADD PVOL PHPF PLPF PREF PNSQ PIF SLP
*2
*2
(b) Transmission Mode

MSB 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3
1 1 0
2
0 0 1
LSB 1
1 1 1
ZAP3 ZAP2 ZAP1 ZAP0 TSEL RSEL VSEL ZMW CNTT CHPT LDSW CHP EV5 EV4 EV3 EV2 EV1 LIM MICM AFM 0 0 0 0 *1 *1 *1 0 0 0 0 1 1 1 1 1 1 1 0 0 PVCO PRXV PTXV PSPL PMIC SPVR SPPR PSP PVOX PADD PVOL PHPF PLPF PREF PNSQ PIF SLP
*2
(c) Call Tone Mode

MSB 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3
1 1 0
2
0 0 1
LSB 1
1 1 1
ZAP3 ZAP2 ZAP1 ZAP0 TSEL RSEL VSEL ZMW CNTT CHPT LDSW CHP EV5 EV4 EV3 EV2 EV1 LIM MICM AFM 0 0 0 0 *1 *1 *1 0 0 0 0 1 *1 *1 *1 *1 *1 0 1 1 PVCO PRXV PTXV PSPL PMIC SPVR SPPR PSP PVOX PADD PVOL PHPF PLPF PREF PNSQ PIF SLP
*2
*2
(d) Key touch in Reception Mode

MSB 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3
1 1 0
2
0 0 1
LSB 1
1 1 1
*2
*2
(e) Key touch in STBY Mode

MSB 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3
1 1 0
2
0 0 1
LSB 1
1 1 1
*2
*2
Note) *1: Set as you like. *2: Set these bits to "1" in hands-free Mode.
Established
222916005205030
AN29160AA
Product Standards
Technical Data 7. Cautions about secondary harmonics level of VCO output
Total Pages 60
Page 53
Please set secondary harmonics as -13dB or less to a LO signal level. When secondary harmonics are larger than -13dB, PLL counter may incorrect-operate. It is because counter receives secondary harmonics.
VCO
18
1/2 PLL counter
32/33
17bit Divider
Intensity >-13dB
LO
2nd-order
Frequency
Established
222916005305030
AN29160AA
Product Standards
Total Pages 60
Page 54
Established
222916005405030
AN29160AA
Product Standards
Total Pages 60
Page 55
Established
222916005505030
AN29160AA
Product Standards
Total Pages 60
Page 56
Established
222916005605030
AN29160AA
Product Standards
Total Pages 60
Page 57
Established
222916005705030
AN29160AA
Product Standards
Total Pages 60
Page 58
Established
222916005805030
AN29160AA
Product Standards
Technical Data 9. Caution about Regulators
Total Pages 60
Page 59
MCU REG
VCO REG VCC1 9 10 R91: 3.3
RX REG
TX REG
SPVCC
C11: 0.01u
C12 : 0.1u
C13:1u R92:1.5
C14: 0.01u
C10:1u
C3:1u
C9:1u
R90:2.2
C15:1u
Battery
(*1) C16 (Aluminum or Tantalum ) may be necessary to better receiving sensitivity. (*2) Please use ceramic capacitor (K-rank) for capacitors except C16.
Use of unsuitable external parts of VCC terminal and Regulator outputs may cause oscillation. Set these parts to above recommended values and set current load to values described in below table. Please check the further characteristic in set PCB in use.
External current load range without oscillation RXREG 0 to 20mA MCUREG 0 to 20mA VCOREG 0 to 20mA TXREG 0 to 100mA ICREG 0 to 3mA (RX Mode) / 0 to 4mA (TX Mode)
Established
222916005905030
C16: >10u (*1)
C7:1u
L1 C34: 0.1u
11
IC REG
28
AN29160AA
Product Standards
Usage Notes Pins of this IC should be free of output-VCC short or output-GND short.
Total Pages 60
Page 60
Especially, Pin54 (SPAMP OUT1) and Pin56 (SPAMP OUT2) may be damaged due to output-VCC short. Make sure that the IC is free of output-VCC short. Connect the cooling fin with the GND potential. Design the heat radiation carefully when you take out high power at high VCC .
Established
222916006005030

AN29160AA Product Standards Technical Data Sheet</TITLE

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

AN29160AA Product Standards Technical Data Sheet</TITLE

Uploaded by

Copyright:

Available Formats

Total Pages Code No.

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Application Circuit Example1

SPREF 5 MCU 6 7 8 9 MCU Drive Amp 1stIF BPF Mix1 10.5521.7MHz

Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

IF2 IF2 REF2 REF1 23 24 25 26 27

450kHz 2ndIF BPF

DAC RX Data De Emphasis MIC

Application Circuit Example2

Earphone MCU A/D

SPREF 5 MCU EN 6 7 8 9 MCU Drive Amp 1stIF BPF Mix1 10.5521.7MHz

Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

IF2 IF2 REF2 REF1 22 23 24 25 26 27

450kHz 2ndIF BPF

Total Pages 60 6 Page

Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Symbol VCC1 SPVCC ICC PD Topr Tstg

Rating 6.7 6.7 517 -30 to +75 -55 to +150

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Limits Typ Max

IRX IST ITX ICT ISL ICUT

21 12.3 10.4 16.8 1.8 6

27.3 16 13.5 21.8 2.4 10

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Limits Typ Max

Note)*1: Electric Volume: -8dB Mode

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Reference values Typ Max

-60 -60 -60 -60 -60 -60 -60 -60

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Reference values Min Typ Max

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Reference values Typ Max

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Reference values Min Typ Max

12dB SINAD Sensitivity2

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Reference values Min Typ Max

Low Level Output Voltage

High Level Output Voltage

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Reference Values Min Typ Max

Output Dynamic Range

Input Dynamic Range

Volume Control Attenuation Volume Mute Attenuation

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

ReferenceValues Typ Max

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Reference values Conditions Min Typ Max Unit

Input 50 terminated Input 50 terminated

f = 10.1MHz CL=16pF Ro= 100 f = 21.25MHz CL=10pF Ro= 100

fo= 5.3MHz, RL= 10k

SPR1 SPR2 SPR3 SPR4

-70 -62 -66 -69

dBm dBm dBm dBm

Revised Semiconductor Company, Matsushita Electric Industrial Co., Ltd.

Description Low Power Control