Service Manual: LCT2662 Model

SERVICE MANUAL
Model: LCT2662
Safety Instructions Production specification. Block Diagram Circuit Diagram Disassembly Pin Descriptions LCD Panel specification Exploded View Diagram Spare parts list V-chip password and software upgrade
This manual is the latest at the time of printing, and does not include the modification which may be made after the printing, by the constant improvement of product.
I. Safety Instructions
The l ig h tn i ng fla sh w i th arro wh e ad symb ol , within an equilatera l triangle, is intended to alert the user to the presence of uninsulated dangerous voltage within the prod uct s enclosure that may be of sufficie nt mag nitud e to consti tute a risk of electric shock to persons. The excla mati on po i nt wi thi n a n e q ui l ate ra l tri a n gl e is i nte n de d to a le rt th e u se r to th e presence of important operating and maintenance (s e rv i ci n g ) i n str u ct i o n s i n th e l i te r a tu re accompanying the appliance.
CAUTION
RISK O F ELECT RIC SHO CK DO NO T O PEN
CAUTION: TO REDUCE THE RISK OF ELECTRIC SHOCK, DO NOT REMOVE COVER (OR BACK). NO USER-SERVICEABLE PARTSINSIDE. REFER SERVICING TO QUALIFIED SERVICE PERSONNEL ONLY.
PRECAUTIONS DURING SERVICING

1. In a ddition to safe ty, othe r parts and assemblies are speci fied for conformance with such regulatio ns as those applyi ng to sp urious radiation . These must also be replace d only with specifie d replacements. Exampl es: RF converters, tun er units, a ntenna selection switches, RF cables, noise-blo cking capacitors, noise-bl ocking filters, etc. 2. Use sp ecified inte rnal Wiring . Note especially: 1) Wires covered with PVC tubing 2) Do uble insulated w ires 3) Hig h voltage leads 3. Use specified i nsulating material s for haza rdous live pa rts. Note espe cially: 1) In sulating Tape 2) PVC tubing 3) Spa cers (insu lating barriers) 4) Insula ting sheets for transistors 5) Plastic screws for fixing micro switches 4. When replacing AC primary side compo nents (tran sformers, power cords, n oise blo cking capacitors, e tc.), wra p ends o f wires securely about the te rminals be fore solde ring.
WARNING:
Before servicing this TV receiver, read the X-RAY RADIATION PRECAUTION, SAFETY INSTRUCTION and PRODUCT SAFETY NOTICE.
X-RAY RADIATION PRECAUTION

1. Excessively high can prod uce potentially hazardous X-RAY RADIATION. To avoid such hazards, the high volta ge must no t exceed the speci fied limit. The normal va lue of the high voltage of this TV receiver is 2 7 KV at zero b ean current (mi nimum b rightne ss). The high voltage must no t exceed 30 KV u nder any circu mstances. Each time when a re ceiver req uires servici ng, the high voltage sho uld be checked. The readi ng of the high voltage is re commended to be reco rded as a part o f the service record, It is important to u se an accurate and reliable high voltage meter. 2. The only source of X-RAY RADIATION in this TV receiver is the picture tube. For con tinued X-RAY RADIATION protectio n, the repla cement tube must be exactly the sa me type as specified in th e parts list. 3. Some parts in this TV receiver have special safety related characteristics fo r X-RADIATION protection. For continued safety, the parts rep lacement should be under taken only afte r referring the PRODUCT SAFETY NOTICE.
5. Make sure that w ires do no t contact heat generating parts (he at sin ks, oxide me tal fi lm resistors, fusi ble resistors, etc.) 6. Check if replace d wires do not conta ct sharply edged or po inted pa rts. 7. Make sure that foreign objects (screws, solder drop lets, etc.) do not remain insi de the set.
SAFETY INSTRUCTION
The se rvice shoul d not be attempted by anyone unfamiliar with the ne cessary i nstructio ns on th is TV receiver. The fo llowing are the necessary instru ctions to be ob served before se rvicing. 1. An isolation transformer shoul d be con nected i n the power li ne between the receiver and the AC line when a service is performed o n the primary of the conve rter tra nsformer of the set. 2. Comply wi th all caution an d safety related provided on th e back of the cabi net, inside the cabinet, o n the chassis or p icture tube. 3. To avo id a shock hazard, alw ays discharge the pictu re tube's anode to the chassis g round be fore removi ng the anod e cap.
MAKE YOUR CONTRIBUTION TO PROTECT THE ENVIRONMENT

Used batte ries wi th the ISO symbol for recycling a s well as small accumu lators (re chargeable batteries), mini-batteries (cell s) and starter b atteries should not be thrown into the garbage can. Please leave the m at an ap propriate depot.
-2-
4. Completely discharge the high pote ntial voltage of the picture tube before handli ng. The pi cture tube is a vacuum and if bro ken, the gl ass will explode. 5. When rep lacing a MAIN PC B in the cabinet, always be certai n that all protective are installed properly such as co ntrol knobs, adjustment co vers o r shie lds, barri ers, iso lation resistor networks etc. 6. When se rvicing is re quired, observe the origin al lead dressing. Extra precau tion sho uld be gi ven to a ssure correct lead dressing in the high voltage area. 7. Keep wires away from high voltage or high te mpera ture compone nts. 8. Befo re returning the set to the customer, al ways perform an AC leaka ge current check on the exposed meta llic parts of th e cabine t, such as anten nas, termin als, screw heads, meta l overlay, control shafts, etc., to be sure the set i s safe to operate without danger of electrica l shock. Plu g the AC lin e cord directly to the AC outlet (do not use a line iso lation transformer d uring th is check). Use an AC voltmeter havin g 5K ohms volt sen sitivity or more i n the following manner. Conne ct a 1.5 K ohm 10 watt resistor pa ralleled by a 0.15F AC type capacito r, between a go od earth ground (water pipe, conductor etc.,) and the exposed metallic parts, one a t a ti me. Measure the AC vol tage across the combination of the 1 .5K ohm resistor and 0.15 uF capacitor. Re verse the AC p lug at the AC o utlet and repea t the AC volta ge measurements fo r each exposed metallic part. The me asured voltage must not exceed 0.3 V RMS. This correspo nds to 0.5mA AC. Any val ue exceeding this limit co nstitute s a poten tial sho ck hazard and must be corrected immedia tely. The resista nce me asureme nt shou ld be done betwe en accessi ble exposed metal parts and power cord plug prong s with th e power switch "ON". The resi stance should be mo re tha n 6M o hms.
AC VOLTMETER
PRODUCT SAFETY NOTICE

Many e lectrical an d mechanica l parts in this TV receiver have special safety-related characteristics. These characteri stics are offer passed unnoticed by visual spection and the protecti on afforded by them cannot necessari ly be obta ined by using replacement compon ents rates for a hig her voltag e, wattage , etc. The replacemen t parts w hich have these sp ecial safety characteristics are identifie d by marks on the schematic diag ram and on the parts l ist. Before replacin g any of these compo nents, rea d the parts list in thi s manua l care fully. The use of substitute re placemen t parts which do not have the same safety chara cteristics as speci fied in the p arts list may cre ate shock, fire, X-RAY RADIATION or other h azards.
Goo d ea rth grou nd su ch as th e wat er p ip e , c o n du c t or , etc.
Pl ace this pro be on eac h e x p os ed me t al li c part
AC Leak age Curr ent Check
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KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE
Product Specification
Reference No. Revision Date Page Model No. Customer Model No. Design Code BOM No. : LC26HAB001 :0 : 2005.08.1 : P.1 of 8 : LC26HAB : LCT2662 : LC26 HABCUSXM1 : LC26HABCUSXM1-A01
Artwork Ass'y No.
: 797-L26AB01-01
Description Checked By:
: AKAL LCD TV 26 NTSC AC100V-240 V AC USA Electronic Engineer Mechanical Engineer
Approved By: Approved By:
Engineering Manager PM Department Head
DOC Rev NO. 0
The Latest Revision Details Initial Release
DATE

Reference No Revision Date Page General Description
1. Main features
: LC26HAB001 :0 : 2005.8.1 : P. 2 of 8
Production Description Panel Supplier and Model Chips Solution Market

1.1 VIDEO SECTION
AKAL LCD TV 26 NTSC AC100V-240VAC USA

CHIMEI V270W1-L03 MK8205 USA 26.9/16:9 1280720 0.1555mm0.4665mm 550(nits) 600:1, Typical (1/100 White Window, Dark Room) Hor. And Vert. 170 degree 16.7M Color VGA, SVGA, XGA,WXGA 480p, 576P,720p, 1080i Yes Yes Yes Yes Yes No Full,Fill Aspect Ratio,Nonliner,LB to 16:9, LB subtitles to 16:9 or Anamorphic NTSC M No PAL /NTSC Basic mode (video on graphic mode,resolution1024768) 6W2 Max.(8 ohm) NO Yes Analog-RGB Input (D-Sub 15 Pin Type) 1 D-Sub 9 Pin (RS-233 Input ) 1 Antenna Input (F Type) 1 S-Video Input (Mini Din 4Pin) 1 CVBS Input (RCA Type) 1 Y / Pb / Pr, Y / Cb / Cr (RCA Type) 2 Stereo Audio Input (RCA Type) 3 (3.5mm Phone Type) 1 Audio Output (RCA Type) 1 Yes No English, Franais, Espaol
Display size Display Resolution Pixel Pitch Peak Brightness Contract Ratio View Angle Color Deeps PC Resolution Supporting HDTV Compatible Progressive Scanning Film Mode Pull Down GAMMA Correction Color Temperature Control Comb Filter Second De-interlace for Sub picture Wide Mode TV System Dual Tuner System AV Input Color System PIP 1.2 AUDIO SECTION Audio Output Power Sound Effect Tone Control 1.3 Input Terminals
1.4 Output Terminals 1.5 Others Closed Caption / V-Chip Teletext OSD Language

Reference No Revision Date Page
Stereo Decode Power Rating Power Consumption MTS with SAP AC 100-240V, 50/60Hz 200W
: LC26HAB001 :0 : 2005.8.1 : P. 3 of 8
1.6 Support the Signal Mode This machine can support the different from VGA signal mode in 19 kinds No Resolution Horizontal Vertical Frequency(Hz) Frequency(KHz) 1) 2) 3) 4) 5) 6) 7) 8) 9) 10) 11) 12) 13) 14) 15) 16) 17) 640480 640480 640480 640480 720400 800600 800600 800600 800600 832624 1024768 1024768 1024768 1152864 1152864 1280960 12801024 31.50 35.00 37.50 37.86 31.47 35.16 37.90 46.90 48.08 49.00 48.40 56.50 60.00 63.86 67.52 60.02 64.00 60.00 67.00 75.00 72.81 70.08 56.25 60.32 75.00 72.19 75.00 60.00 70.00 75.00 70.02 75.02 60.02 60.01
Dot Clock Frequency(MHz) 25.18 30.24 31.50 31.50 36.00 36.00 40.00 49.50 50.00 57.27 65.00 75.00 78.75 94.51 108.03 108.04 108.00
1.7 HDTV Mode (YPbPr) No 1) 2) 3) 4) 5) 6) Resolution 480i 480p(720480) 576p(720576) 720p(1280720) 720p(1280720) 1080i(19201080) Horizontal Frequency(KHz) 15.734 31.468 31.25 37.50 45.00 33.75 Vertical Frequency(Hz) 59.94 59.94 50.00 50.00 60.00 60.00 Dot Clock Frequency(MHz) 13.50 27.00 27.00 74.25 74.25 74.25

2. LCD local control button 3. Led indicators : 4. OSD language 5. OSD 6. Remote control unit Customer Remote Code: 609F(NEC) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 POWER button MUTE button 0-9 DIGITAL button PIP button SOURCE button PIP SIZE button PIP POS button VOL +/- button CH +/- button MTS button UP/DOWN,LEFT/RIGHT ENTER buttons SYSTEM button MENU button V-CHIP button CCD button FREEZE button DISPLAY buttons FAVORITE button ADD/ERASE buttons SOUND button PIC SIZE button P.MODE button ZOOM button RECALL button SLEEP button
: LC26HAB001 :0 : 2005.8.1 : P. 4 of 8
Main power : push switch Channel +/- volume up/down menu input. standby : soft touch Power on: Green Standby: Red English, Franais, Espaol Full on screen display
E7501-051001
7. Safety standard 8. EMC standard 9. Performance standard 10. Accessories
UL/CSA/cUL 15 Parts of the FCC rules,CLASS B LCD-TV Standard Battery 2pcs User Manual 1pcs AC Cable 1pcs Remote Control 1pcs The Accessories box 1pcs

Reference No Revision Date Page Technical Data
1. Chassis 2. Power supply TV Remote controller 3. TV system RF input Video input 4. Receiving channels TV CATV 5. Intermediate frequencies 6 . Scanning
7 . AC plug
: LC26HAB001 :0 : 2005.8.1 : P. 5 of 8
MICO AC 100-240 V, 50/60Hz Battery 3V (UM-4/R03/AAA2) NTSC M PAL/NTSC 3.58/NTSC 4.43 VHF-L : 2~6CH VHF-H : 7~13CH UHF : 14~69CH 1~125CH 45.75MHz 15625/15750 50/60 UL Plug V270W1-L03 8 ohm 10W (max) 2 15C ~ 30C 5C ~ 33C 45% ~ 75% 20% ~ 80% See the attachment 1.
Picture Horizontal (Hz) Vertical (Hz)
8. Panel 9. Speaker 10.Operating temperature
Internal Fulfill all specifications
Accept picture/sound reproduction 11. Operating relative Fulfill all specifications humidity Accept picture/sound reproduction 12. Electrical & optical specification 13. Circuit diagram drawing No. 15. Cabinet 16. Cabinet color 17. Packing 18. Container stuffing method 19. Dimension (mm) LCD-TV (No packing) Remote control unit 20. Net weight LCD-TV Remote controller 21. Cell Defect
LC26HAB
1 set per RD/05/P/LC26HAB/CSI/02 REV: 01 883(W) 468(H) 110(D)mm (w/o Stand) 883(W) 532(H) 250(D)mm (with Stand) 183(L) 53(W) 28(T)mm 14.1Kg (with Stand) approx. 70g (approx.) Subject to Panel supplier specification

Reference No Revision Date Page : LC26HAB001 :0 : 2005.8.1 : P. 6 of 8 Limit
51 35 40 50 N/A 15 90 28 30 40 30 45 45 40 1.0 200 -10 300 240 400 300 450 400 MHz Hz dB Lines Lines Lines Lines Lines Lines dB dB dB
Attachment 1Electrical & Optical Specification

No.
1 2 3 4 5 6 7 8
Items
Video sensitivity FM sound sensitivity Color sensitivity CCD sensitivity Minimum NICAM threshold Stereo Channel Separation AGC static characteristic Selectivity
Instruction
For 30dB S/N For 30dB S/N For RF transmission TV screen refreshes 40 times number of mistakes8 Without crackline noise BTSC. Accept. Picture/Sound repr. Adjacent sound carrier Below adjacent sound carrier Adjacent picture carrier Up adjacent picture carrier
Typical
44 21 37 43 N/A 18 90 30 30 45 40 55 57 55 1.0 500 -11
Unit
dBuV dBuV dBuV dBuV dBuV dB dBuV
9 10 11 12 13 14
IF rejection Image rejection AFT pull-in range Chroma sync pull-in range Color killer function Resolution RF Horizontal Vertical Video Horizontal Vertical PAL NTSC PAL NTSC VHF UHF
300 260 410 320 450 400
15 16 17 18 19 20 21
Color Coordination View Angle(Lo/3) Overscan Picture position
White
XW
Full Pattern
0.295 0.300 170
0.2950.02 0.3000.02 170 94~98 3 200 6 0.2~12

Degree
YW Horizontal Vertical Cross hatch signal In all direction
96 2 400 6
% mm Hz Hz KHz
H sync pull-in range V sync pull-in range Audio frequency response 3dB ref. to 1KHz
0.15~12

22 23 24 25 26 27 28 29 30 31 Max Audio Output Power Audio output power 10% THD THD Signal to buzz ratio Minimum volume hum Maximum woofer output power Woofer audio frequency response Tone low frequency Tone high frequency Balance 3dB ref. to 15Hz AV mode 100Hz ref. to 1KHz AV mode 10KHz ref. to 1KHz AV mode Center Max. Min. 32 33 34 35 36 37 38 39 40 41 42 Video input level Audio input level*1 Video output level Audio output level*2 AV Audio input max. level AV Audio output L/R Separation Power consumpution IR receiving distance IR receiving angle left/right Up/down DC 3KV 1min. Operating Stand by 0 Degree 5m 1KHz 10% THD Po=0.5W coeighting coeighting 72 62 0.5 50 6 N/A N/A 8 8 0 3 -35 1.0 1.0 * N/A 0.3 * 2 35 200 3 7 60 20 5
: LC26HAB001 :0 : 2005.8.1 : P. 7 of 8
5.02 4.02 3 30 10 N/A N/A 3 3 2 >2 -30 10.3 0.50.3 N/A 0.50.3 2 30 200 5 6 45 15 10 Vpp Vrms Vrms Vrms Vrms dB W W m Degree Degree mArms dB W W % dB mVrms W Hz dB dB
Dielectric strength
The vibration noise from The distance between electromagnetic devices in LCD- the tester and the TV set LCD-TV set is four times as many as the screen height
No obvious vibration noise can be heard

Reference No Revision Date Page : LC26HAB001 :0 : 2005.8.1 : P. 8of 8
Test Condition All tests shall be performed under the following conditions unless otherwise specified
1 2 3 4 5 6 7 Picture Modulation Sound Modulation Picture to Sound Ratio Sound Artificial Load Resistor Video signal Audio signal 87.5% 27KHz Dev. For DK/I/BG 15KHz Dev. For M/N 10dB 8 ohm Stair and Special 1KHz sine wave 0.5Vrms
Other conditions: A. Switch LCD-TV on and let it warm up for more than 30 minutes. Viewing distance: 3H (H: Panel High) in front of LCD, about 2M. Ambient light: 0.1 cd/ m2 B. Brightness, Contrast, Saturation, Tint, sharpness set at normal. C. Connect RMS volt meter to speaker terminals and adjust the LCD volume to get 500mW RMS power at each terminals. D. With image sticking protection of LCD module. The luminance will descend by time on a same still screen and rapidly go down in 5 minutes, when measuring the color tracking and luminance of a same still screen, be sure to accomplish the measurement in one minute to ensure its accuracy. E. Due to the structure of LCD module. The extra-high-bright same screen should not hold over 5 minutes for fear of branding on the panel. F. RF test point: Video output. Note: *(1) Now this project cannot fit the limited spec. the typical audio input level is 1.0 Vrms, *(2) The audio out level is controlled by the volume level, the range is from 0 to 0.5Vrms.
Flash
LVDS SIGNAL
IR Keypad TV
3
LVDS SIGNAL LVDS PANEL
Tuner
3
AV1 S_Video Y1PbPr Y2PbPr GPIO GPIO AOSDATA1 DACBCLK DACMCLK DACLRC DOUT VGA_L/R S1_AV1_L/R Y1PbPr_L/R Y2PbPr_L/R
Backlight COD_VOUTR Audio Board COD_VOUTL

Speaker
MT8205
MUX
YPbPr
WM8776
VGA
DDR1
DDR2
MT8205P1V3.2
Rev V0.1 V0.2 1.FIRST VERSION
History
P#
Date 2004/11/29 2005/03/09
MT8205E (PBGA388) LCDTV BOARD 4 LAYERS

1. INDEX 2. LDO 3. MT8205E PBGA388 4. MT8205 ANALOG DECOUPLING 5. MT8205 DIGITAL DECOUPLING 6. ICE I/F 7. DDR MEMORY & FLASH 8. DVI INPUT 9. AD9883 10. VGA IN & PC AUDIO IN 11. VIDEO IN & TUNER I/O 12. AUDIO / VIDEO IN CIRCUIT 13. WM8776 AUDIO CODEC 14. LVDS / CRT / TTL OUT 15 BACK LIGHT / KEYPAD 16. READER CARD I/F
1. 2.5V use 5VSB conversion. All 0402 change to 0603 2. LED_RED/GRN CIRCUIT CHANGE 3. Change Power on/off circuit(ORO7 CTRL PIN) 4. WM8776 DVDD Needed 5. Del the Si9936 LVDS Parts 6. Del DVI&AD9883 PARTS
VCC J24 1 2 3 4 5 6 7 8 DIP8/P2.0 5x1 W/HOUSING DIP5/W/H/P2.0
5VSB
+12V
J6 5 4 3 2 1 SYS_PWR
R359 10k
ORO7 High :POWER OFF ORO7 LOW :POWER ON

5VSB
2 Q14 R364 1 SOT23/SMD 2N3904 4.7k 3 ORO7 SCL SDA TXD RXD TXD RXD SCL SDA 3 3 6,9,11,13 6,9,11,13
3
TO Power BD
5VSB
24V J108 1 2 3 4 5 6 8x1 W/HOUSING DIP8/W/H/P2.54 CE16 220uF/16v C220UF16V/D6H11 TUNER_12V ORO7 +12V +12V 2
UP3_0 BLACKLIGHT ON/OFF MUTE<-->UP1_5
INVERTER_PWR
TUNER_12V ORO7
11 3
PWR_GND
MUTE
UP1_5
H1 9 8 7 6 9 8 7 6 1
HOLE/GND 2 3 4 5 2 3 4 5
DV33A +12V
2
For Tuner
2
H2 9 8 7 6 9 8 7 6 1
HOLE/GND 2 3 4 5 2 3 4 5 RxD TxD R51 10k R52 10k 1 2 3 4 J2 + CE93 220uF/16v C220UF16V/D6H11
L14 TUNER_12V FB BEAD/SMD/0805 CE17 47uF/16v
FOR Tuner
CB11 0.1uF
RS-232
H3 9 8 7 6 9 8 7 6 1 HOLE/GND 2 3 4 5 2 3 4 5 9 8 7 6 9 8 7 6 1 H5 HOLE/GND 2 3 4 5 2 3 4 5
4x1 W/HOUSING DIP4/W/H/P2.0
5VSB P5 CONNECTOR DB9 RSRXD 1 6 2 7 3 8 4 9 5 U6 RSTXD 13 8 11 10 1 3 4 5 2 6 R1IN R2IN T1IN T2IN C+ C1C2+ C2V+ VMAX232A R1OUT R2OUT T1OUT T2OUT 12 9 14 7 5VSB TXD VCC GND 16 15 C8 0.1uF RXD TXD RXD EEPROM 24C16 SOP8/SMD
1
5VSB
SYSTEM EEPROM
R53 10k VCC WP SCL SDA 8 7 6 5 R54 10k
CB75 0.1uF 1 2 3 4
U13 NC NC NC GND
C1 C3 C6 C7
0.1uF 0.1uF 0.1uF 0.1uF
SCL SDA
H4 9 8 7 6 9 8 7 6 1
HOLE/GND 2 3 4 5 2 3 4 5 9 8 7 6 9 8 7 6
H6
HOLE/GND 2 3 4 5 1 2 3 4 5
Title
LCD TV - MediaTek MT8205 Solution

AUIO IN/OUT GND ANALOG INPUT GND DIGITAL GND
Size C Date:
A B C D
Doc Number
INDEX
Tuesday, May 10, 2005
E
Rev V0.1 Sheet 1 of 16
Power ON alive source
ADJ/GND
L8 3 IN OUT 2 FB BEAD/SMD/0805 + CE4 220uF/16v + CB4 0.1uF SOT223/SMD CE5 220uF/16v
VCC
ADJ/GND
Vout
U1
CM1117-3.3V
DV33
DV33
5VSB
CE6 +
U35 M1117-3.3V
3 IN OUT 2
L7
FB BEAD/SMD/0805 CB200 0.1uF SOT223/SMD + CE118 220uF/16v CB201 0.1uF
CB5 0.1uF
220uF/16v
DV33A
ADJ/GND ADJ/GND
Vout
DV33A
U5
L11
CM1117-1.8V
L6 OUT 2 DV18A FB BEAD/SMD/0805
DV18A
U3
3 IN
CM1117-3.3V
OUT 2 FB BEAD/SMD/0805 + CE10 220uF/16v AV33
AV33
+ C5 10uF/10v CB6 0.1uF CE11 100uF/16v CB7 0.1uF
IN
+ SOT223/SMD
CE12 220uF/16v
CB8 0.1uF
SOT223/SMD
3
1.25x(1+180/110)=3.3V
1.25x(1+300/680)=1.8V
3
5VSB
CE128 220uF/16v
CE129 220uF/16v
CB212 0.1uF
CB213 0.1uF
CB214 0.1uF
CB215 3300pF
CB216 3300pF
CB217 3300pF
5V ==> +12v
VCC
L107 R3 FB + CE8 100uF/16v C100UF16V/D6H11 R0805/SMD CHOKE-100uH L18W10H18 L/CHOKE/DIP/1810 0 1 2 DIODE SMD 1N4148/SMD R5 10 R0805/SMD U2 8 7 6 5 DRC Ipk VCC CII R6 13k CE7 100uF/16v FB 0 + CE107 100uF/25v/NC C2 270pF
L9 D2 L10 R325 +12V
+12V
SOIC8
+ SWC SWE TC GND 1 2 3 4
R8 1.5k C4 100pF
AZ34063A-PWM
Title

Size C Date:
A B C D
Doc Number
LDO
E
VI[0..23] XTALI XTALO XTALI XTALO 4 4 ANALOGVDD XTALO XTALI GND APLL_CAP GND APLLVDD ANALOGVDD GND VI0 VI1 VI2 VI3 VI4 VI5 VI6 DV18A VI7 VI8 VI9 VI10 VI11 GND VI12 VI13 VI14 VI15 GND VI16 VI17 VI18 VI19 VI20 VI21 VI22 VI23 DVIODCK DV33A DVIODCK DVIDE DVIHSYNC DVIVSYNC DVISCL DVISDA URST# A_DQS[0..3] A_RA[0..11] A_BA[0..1] A_DQM[0..1] A_DQ[0..31] A_CLK A_CLK# A_CKE A_CS# A_RAS# A_CAS# A_WE# SDV25 VREF IOWR# IOCE# GND FCLK FCMD FDAT 8205UP1_[2..7]
VI[0..23] DVIODCK DVIDE DVIHSYNC DVIVSYNC DVISCL DVISDA URST# A_DQS[0..3] A_RA[0..11] A_BA[0..1] A_DQM[0..1] A_DQ[0..31] A_CLK A_CLK# A_CKE A_CS# A_RAS# A_CAS# A_WE# SDV25 VREF IOWR# IOCE# FCLK FCMD FDAT
9 8,9 8,9 8,9 8,9 8 8 6,15 7 7 7 7 7 7 7 7 7 7 7 7 7 7 6 6 16 16 16 6
VGAVSYNC# VGAHSYNC# GND DV18A GND ADCPLLVDD1 ADCPLLVDD GND GND ANALOGVDD
GND AVCM ADCVDD0 CVBS2CVBS2+ CVBS1CVBS1+ CVBS0CVBS0+ GND
ADCVDD0 SCSC+ SYSY+ GND
ADCVDD0 VOCM GND VICM ADCVDD0 CRCR+ CBCB+ YY+ SOY GND
ADCVDD0 REDRED+ GREENGREEN+ VGASOG BLUEBLUE+ GND
D5 1N4148/SMD URST#
R18 10k
ANALOGVDD
4
ANALOGVDD ADCVDD
4 VFEVSS1 AVCM ADCVDD0 CVBS2N CVBS2P CVBS1N CVBS1P CVBS0N CVBS0P ADCVSS0 REFP0 REFN0 ADCVDD1 SCN SCP SYN SYP ADCVSS1 REFP1 REFN1 VFEVDD0 VOCM VFEVSS0 VICM ADCVDD2 CRN CRP CBN CBP YN YP SOY ADCVSS2 REFP2 REFN2 MON0 MON1 ADCVDD3 RN RP GN GP SOG BN BP ADCVSS3 REFP3 REFN3 VSYNC HSYNC DVSS DVDD ADCPLLVSS1 ADCPLLVDD1 ADCPLLVDD ADCPLLVSS SYSPLLVSS SYSPLLVDD TESTP TESTN XTALVDD XTALO XTALI XTALVSS APLL_CAP APLLVSS APLLVDD DMPLLVDD DMPLLVSS VI0 VI1 VI2 VI3 VI4 VI5 VI6 DVDD18 VI7 VI8 VI9 VI10 VI11 DVSS3 VI12 VI13 VI14 VI15 DVSS18 VI16 VI17 VI18 VI19 VI20 VI21 VI22 VI23 VCLK_DVI 4 C3 D3 C1 C2 L11 D1 D2 F2 D4 E1 E2 E3 E4 ADCVDD F1 PWM2VREF F4 AUXTOP F3 AUXBOTTOM G3 GND J3 VPLLVDD G4 VPLLVDD H3 GND K3 GND K4 REXTA J4 VPLLVDD H4 LVDDA L3 AP7 G2 AN7 G1 CLK2+ H2 CLK2H1 GND M12 AP6 J2 AN6 J1 AP5 K2 AN5 K1 LVDDA L4 AP4 L2 AN4 L1 AP3 M2 AN3 M1 GND M11 CLK1+ N2 CLK1N1 AP2 P2 AN2 P1 LVDDA M3 AP1 R2 AN1 R1 AP0 T2 AN0 T1 GND N12 DACVDD N3 DACVREF M4 DACFS N4 GND N11 SVM T4 DACVDD P3 GND R3 DACVDD P4 G U4 GND R4 B U3 R V4 T3 VSYNC U1 HSYNC U2 V1 V2 V3 W1 W2 DV33A AC9 W3 W4 Y1 Y2 Y3 GND P11 Y4 AA1 AA2 AA3 AA4 AB1 AB2 AB3 AB4 AC1 DV18A AC18 AC2 AC3 AC4 GND R11 AD1 AD2 OBO7 AD3 OBO6 AD4 OBO5 AE1 ADCVDD0 ADCVDD0 MPX1 MPX2 GND VREFP4 VREFN4 GND 2 1 C24 D24 A24 Y24 A25 A26 B26 F23 B25 B24 C26 C25 E24 N15 G26 G25 F26 F24 F25 E26 N16 E25 G24 D26 D25 H25 H26 P14 J25 J26 K25 P16 K26 L25 AA24 L26 H24 M25 M26 N25 J23 R16 J24 K23 K24 L23 R14 L24 M23 N26 H23 P26 P25 P15 M24 N23 N24 R26 P24 P23 U23 AA23 R24 R23 T24 R15 T23 U24 W26 V25 V26 V23 U25 T13 U26 T25 T15 T26 R25 W25 W23 Y23 G23 T16 Y26 Y25 AA26 V24 AA25 AB26 T14 AB25 AC26 W24 AC25 AD26 AD25 DVIDE DVIVSYNC DVIHSYNC DV18A AOSDATA0 AOSDATA1 AOSDATA2 DV33A AOSDATA3 DOUT DACBCLK DACLRC DACMCLK GND A_DQ24 A_DQ25 A_DQ26 SDV25 A_DQ27 A_DQ28 GND A_DQ29 SDV25 A_DQ30 A_DQ31 A_DQS3 A_DQM1 GND A_DQS2 A_DQ23 A_DQ22 GND A_DQ21 A_DQ20 DV18A A_DQ19 SDV25 A_DQ18 A_DQ17 A_DQ16 A_RA4 GND A_RA5 A_RA6 A_RA7 A_RA8 GND A_RA9 A_RA11 A_CKE SDV25 A_CLK A_CLK# GND A_RA3 A_RA2 A_RA1 A_RA0 A_RA10 A_BA1 SDV25 DV18A A_BA0 A_CS# A_RAS# GND A_CAS# A_WE# A_DQ8 A_DQ9 A_DQ10 SDV25 A_DQ11 GND A_DQ12 A_DQ13 GND A_DQ14 A_DQ15 A_DQS1 GND DV18A VREF GND A_DQM0 A_DQS0 A_DQ7 SDV25 A_DQ6 A_DQ5 GND A_DQ4 A_DQ3 SDV25 A_DQ2 A_DQ1 A_DQ0
L12 D5 C4 B1 A1 B2 A2 B3 A3 L13 B4 A4 C5 B5 A5 B6 A6 M13 D6 C6 D7 B7 N13 A7 C7 B8 A8 B9 A9 B10 A10 C8 D10 D9 C9 D11 C11 D8 B11 A11 B12 A12 D13 B13 A13 C10 D12 C12 C13 C14 N14 D14 L14 D15 C15 M14 L15 D16 B14 A14 C16 B15 A15 M15 A16 D18 D17 C17 C18 B16 A17 B17 A18 B18 C19 D19 E23 A19 B19 C20 D20 A20 L16 B20 C21 D21 A21 M16 B21 C22 D22 A22 B22 C23 D23 A23 B23
U7
SW1
2=4
ADCVDD
4 3
CE21 10uF/25v
APLLVDD
APLLVDD
VPLLVDD
VPLLVDD
ADCPLLVDD1
ADCPLLVDD1
ADCPLLVDD
ADCPLLVDD
AUXTOP AUXBOTTOM REXTA APLL_CAP
AUXTOP AUXBOTTOM REXTA APLL_CAP
4 4 4 4
PWM2VREF
PWM2VREF
ADCVDD0
ADCVDD0
AVCM VOCM VICM
AVCM VOCM VICM
4 4 4
VREFP4 VREFN4 DACFS DACVREF DACVDD
VREFP4 VREFN4 DACFS DACVREF DACVDD
4 4 4 4 4
LVDDA
LVDDA
IR
IR
15
VFEVDD1 ADCVDD4 SIF AF ADCVSS4 REFP4 REFN4 ADCVSS ADIN4 ADIN3 ADIN2 ADIN1 ADIN0 ADCVDD PWM2VREF AUXVTOP AUXVBOTTOM VPLLVSS VPLLVDD DLLVDD DLLVSS BGVSS REXTA BGVDD LVDDA A7P A7N CLK2P CLK2N LVSSA A6P A6N A5P A5N LVDDB A4P A4N A3P A3N LVSSB CLK1P CLK1N A2P A2N LVDDC A1P A1N A0P A0N LVSSC DACVDDC VREF FS DACVSSC SVM DACVDDB DACVSSB DACVDDA G DACVSSA B R DE VSYNCO HSYNCO VCLK EBO7 EBO6 EBO5 EBO4 DVDD3I EBO3 EBO2 EBO1 EBO0 EGO7 DVSS18 EGO6 EGO5 EGO4 EGO3 EGO2 EGO1 EGO0 ERO7 ERO6 ERO5 DVDD18 ERO4 ERO3 ERO2 DVSS3 ERO1 ERO0 OBO7 OBO6 OBO5
MT8205
DE_DVI VSYNC_DVI HSYNC_DVI DVDD18 AOSDATA0 AOSDATA1 AOSDATA2 DVDD3I AOSDATA3 LIN AOBCK AOLRCK AOMCLK DVSS3 DQ24 DQ25 DQ26 DVDD2 DQ27 DQ28 DVSS2 DQ29 DVDD2 DQ30 DQ31 DQS3 DQM1 DVSS18 DQS2 DQ23 DQ22 DVSS2 DQ21 DQ20 DVDD18 DQ19 DVDD2 DQ18 DQ17 DQ16 RA4 DVSS2 RA5 RA6 RA7 RA8 DVSS18 RA9 RA11 CKE DVDD2 RCLK RCLKB DVSS2 RA3 RA2 RA1 RA0 RA10 BA1 DVDD2I DVDD18 BA0 RCS# RAS# DVSS2 CAS# RWE# DQ8 DQ9 DQ10 DVDD2 DQ11 DVSS18 DQ12 DQ13 DVSS2 DQ14 DQ15 DQS1 AVSS18 AVDD18 RVREF DVSS18 DQM0 DQS0 DQ7 DVDD2 DQ6 DQ5 DVSS2 DQ4 DQ3 DVDD2 DQ2 DQ1 DQ0
SW4P/DIP/FLAT
1=3
8205UP1_[2..7] F_A[8..21] F_D[0..7] F_OE# 6,7 6,7 7
DV33A
F_A[8..21] F_D[0..7] F_OE#
R365 47k
8205UP3_0 8205UP3_1 ICE
8205UP3_0 8205UP3_1 ICE
6 6 6
DACBCLK MPX1 MPX2 ORO[0..7] OGO[0..7] OBO[0..7]
MPX1 MPX2 ORO[0..7] OGO[0..7] OBO[0..7]
12 12 11,13,16 8,11 15
3
VSYNC HSYNC
VSYNC HSYNC
14 14
VGASDA VGASCL RED+ REDGREEN+ GREENBLUE+ BLUEVGASOG VGAHSYNC# VGAVSYNC# CVBS0+ CVBS0SY+ SYSC+ SCY+ YCB+ CBCR+ CRAP[0..7] AN[0..7] CLK1+ CLK1CLK2+ CLK2SCL SDA DACBCLK DACMCLK DACLRC AOSDATA3 DOUT AOSDATA0 AOSDATA1 AOSDATA2 SOY CVBS1+ CVBS1CVBS2+ CVBS2SVM 8205UP3_4 8205UP3_4 8205UP3_5 6 6
VGASDA VGASCL RED+ REDGREEN+ GREENBLUE+ BLUEVGASOG
10 10 12 12 12 12 12 12 12
VGAHSYNC# 10 VGAVSYNC# 10 CVBS0+ CVBS0SY+ SYSC+ SCY+ YCB+ CBCR+ CRAP[0..7] AN[0..7] CLK1+ CLK1CLK2+ CLK2SCL SDA DACBCLK DACMCLK DACLRC AOSDATA3 DOUT AOSDATA0 AOSDATA1 AOSDATA2 SOY CVBS1+ CVBS1CVBS2+ CVBS2SVM R G B GPIO PWM0 PWM1 12 12 12 12 12 12 12 12 12 12 12 12 14 14 14 14 14 14 1,6,9,11,13 1,6,9,11,13 6,13 13 13 6,13 13 6,13 6,13 6,13 11 12 12 12 12 14 14 14 14 14 13 13
1
HWSCL HWSDA TXD RXD IOA[0..7]
HWSCL HWSDA TXD RXD IOA[0..7]
6 6 1 1 6
AE2 OBO4 AF1 OBO3 AF2 OBO2 AE3 OBO1 AF3 OBO0 AE4 OGO7 AF4 OGO6 AC5 OGO5 T11 DVSS18 AD5 OGO4 AE5 OGO3 AF5 OGO2 AC6 OGO1 AD9 DVDD3 AD6 OGO0 AE6 ORO7 AF6 ORO6 AC7 ORO5 AD7 ORO4 AD18DVDD18 AE7 ORO3 AF7 ORO2 AC8 ORO1 AD8 ORO0 AF8 HIGHA7 P12 DVSS18 AE9 HIGHA6 AF9 HIGHA5 AE10 HIGHA4 AF10 HIGHA3 AC11HIGHA2 AD11HIGHA1 AF12 HIGHA0 AE15 AD0 AD15AD1 AC19DVDD18 AC15AD2 AF16 AD3 AE16 AD4 R12 DVSS3 AD16AD5 AC16AD6 AF17 AD7 AD17IOA0 AD14IOA1 AE14 IOA2 AF14 IOA3 AF13 IOA4 AE13 IOA5 AD13IOA6 AC13IOA7 AE8 A16 AC10DVDD3I AC17A17 AE12 IOA18 AD12IOA19 AE11 IOA20 T12 DVSS18 AF11 IOA21 AE17 IOALE AF15 IOOE# AC12IOWR# AC14IOCS# AF18 WR# AE18 RD# AD10DVDD3 AF19 INT0# AE19 UP12 AF20 UP13 AE20 UP14 AD19DVDD18 AD20UP15 AC20UP16 AF21 UP17 AE21 UP30 AD21UP31 P13 DVSS18 AC21PRST# AD22UP34 AC22UP35 AF22 FCICLK AE22 FCICMD AF23 FCIDAT AE23 GPIO0 AD23PWM0 AC23PWM1 AF24 IR AE24 RXD AD24TXD R13 DVSS3 AC24ICE AF25 SCL AE25 SDA AF26 SCL0 AE26 SDA0 AB23 SCL1 AB24 SDA1
8205UP1_2 8205UP1_3 8205UP1_4 DV18A 8205UP1_5 8205UP1_6 8205UP1_7 8205UP3_0 8205UP3_1 GND URST# 8205UP3_4 8205UP3_5 FCLK FCMD FDAT GPIO PWM0 PWM1 IR RxD TxD GND ICE HWSCL HWSDA VGASCL VGASDA DVISCL DVISDA
OBO4 OBO3 OBO2 OBO1 OBO0 OGO7 OGO6 OGO5 GND OGO4 OGO3 OGO2 OGO1 DV33A OGO0 ORO7 ORO6 ORO5 ORO4 DV18A ORO3 ORO2 ORO1 ORO0 F_A15 GND F_A14 F_A13 F_A12 F_A11 F_A10 F_A9 F_A8 F_D0 F_D1 DV18A F_D2 F_D3 F_D4 GND F_D5 F_D6 F_D7 IOA0 IOA1 IOA2 IOA3 IOA4 IOA5 IOA6 IOA7 F_A16 DV33A F_A17 F_A18 F_A19 F_A20 GND F_A21
F_OE# IOWR# IOCE#
BGA388/SOCKET MT8205
8205UP3_5
R G B GPIO PWM0 PWM1
DV33A DV33A DV18A
DV18A Title
DV33A

Size C Date: Doc Number
MT5205BGA388
E
MT8205 ANALOG DECOUPLING

R20 DACVREF DACFS DACVREF DACFS 3 3 DACVREF ADCPLLVDD1 C10 0.1uF/NC C0603/SMD GND AV33 APLLVDD APLLVDD 3 AV33 CE23 + ANALOGVDD ANALOGVDD 3 10uF/25v CB17 0.1uF 10uF/25v DACVDD VPLLVDD LVDDA VPLLVDD LVDDA 3 3 C16 4.7uF C0603/SMD CB18 0.1uF C0603/SMD GND DACVDD ADCVDD DACVDD ADCVDD DACVDD 3 3 C18 4.7uF C0603/SMD CB20 0.1uF C0603/SMD GND APLL_CAP CE78 47uF/16v C19 4.7uF C0603/SMD ANALOGVDD CB21 0.1uF C0603/SMD 33 + CE25 22uF/25v C17 4.7uF C0603/SMD FB BEAD/SMD/0603 + CE24 C13 4.7uF C0603/SMD L18 DACVDD CB15 0.1uF C0603/SMD GND DV33A L19 ANALOGVDD FB BEAD/SMD/0603 C15 0.1uF R22 ADCPLLVDD CB19 0.1uF C0603/SMD C14 4.7uF C0603/SMD CB16 0.1uF C0603/SMD DACFS Y1
4
100k
DV18A
L17 DV18A ADCPLLVDD1 FB BEAD/SMD/0603 C9 4.7uF C0603/SMD CB14 0.1uF C0603/SMD
ADCPLLVDD1
R21 560 GND
XTALI 27MHz C11 33pF
XTALO
FOR DACVDD
ADCPLLVDD ADCPLLVDD 3
GND
C12 33pF DEL
GND
GND
GND
+ C20 1500pF C0603/SMD
GND
AVCM VOCM VICM

3
FOR ADCVDD
AVCM VOCM VICM 3 3 3
GND
R23 APLLVDD
3
Note for Fix or Adj Regulator

ADJ/GND
33 + CE26 22uF/25v
C21 4.7uF C0603/SMD
CB22 0.1uF C0603/SMD
GND
Vout
ANALOGVDD L28 ADC_VDD ADC_VDD FB BEAD/SMD/0805 CB25 + CE28 220uF/16v + CE29 10uF/25v 0.1uF CB26 0.1uF C23 0.1uF GND AV33 AV33 FB BEAD/SMD/0603 CE30 + 47uF/16v LVDDA AV33 CB28 0.1uF C0603/SMD L29 LVDDA CB24 0.1uF C0603/SMD C22 4.7uF C0603/SMD CB23 0.1uF C0603/SMD
VCC
3 VREFP4 VREFN4 ADCVDD0 VREFP4 VREFN4 ADCVDD0 3 3 + 3 CE27 100uF/16v CB27 0.1uF
IN
OUT
U8
CM1117-3.3V
GND
GND
AV33 L30 VPLLVDD FB BEAD/SMD/0603 C25 0.1uF CE31 47uF/16v VPLLVDD C24 4.7uF C0603/SMD + CB29 0.1uF C0603/SMD
SOT223/SMD
PWM2VREF
PWM2VREF
AZ1117
Fix regulator Adj regulator
Rdown 0 ohm 180 1%
Rup
OFF
110 1%
1.25x(1+Rdown/Rup)
1.25x(1+180/110)=3.3V
GND
LVDDA CB30 0.1uF C0603/SMD
AUXTOP AUXBOTTOM REXTA APLL_CAP XTALI XTALO

2
AUXTOP AUXBOTTOM REXTA APLL_CAP XTALI XTALO
3 3 3 3 3 3 ADC_VDD
GND
GND
C26 4.7uF C0603/SMD
GND
VPLLVDD
2
L32 ADC_VDD FB BEAD/SMD/0805 ADCVDD0 AVCM CB34 0.1uF C0603/SMD GND ADCVDD0 CB38 0.1uF C0603/SMD GND ADCVDD0 CB39 0.1uF C0603/SMD GND ADCVDD0 CB45 0.1uF C0603/SMD GND ADCVDD0 CB48 0.1uF C0603/SMD GND
1
C27 4.7uF C0603/SMD
GND
R27 CB36 4.7uF C0603/SMD GND REXTA 3.3k
GND
L37 VOCM ADCVDD0 FB CB44 0.1uF C0603/SMD GND CB41 0.1uF GND PWM2VREF CE32 47uF/16v CB47 0.1uF C0603/SMD C28 4.7uF C0603/SMD CB42 0.1uF C0603/SMD R31 LVDDA L38 FB 50 R34 AUXBOTTOM + VICM 50 AUXTOP TP4 ADCVDD TP3
GND
GND
CB50 0.1uF C0603/SMD GND
1
ADCVDD0 CB52 0.1uF C0603/SMD GND ADCVDD0 CB54 0.1uF C0603/SMD GND
VREFP4 CB56 4.7uF C0603/SMD GND

B
Title

Size C Date:
D
Doc Number
MT8205 DECOUPOMG--ANALOG
E
Rev V0.1 of 16
CB58 4.7uF C C0603/SMD CB60 4.7uF C0603/SMD
Sheet
VREFN4
MT8205 DIGITAL POWER & DECOUPLING

4 4
DV33A
0603 PUT ON NEARLY BGA
DV18A DV18A
CB61 0.1uF
0603 CB62 ON NEARLY BGA PUT

0.1uF
0603 PUT ON NEARLY BGA

CB69 0.1uF C0603/SMD CB70 0.1uF C0603/SMD CB71 0.1uF C0603/SMD CB72 0.1uF C0603/SMD
C29 0.01uF C0603/SMD
C30 3300pF C0603/SMD
C31 3300pF C0603/SMD
C32 3300pF C0603/SMD
C33 3300pF C0603/SMD
C34 3300pF C0603/SMD
Title

Size B Date:
A B C D
Doc Number
MT8205 DECOUPOMG--DIGITAL
Tuesday, May 10, 2005 Sheet
E
Rev V0.1 of 16
ICE SCL SDA SCL SDA 1,9,11,13 1,9,11,13 R311 1k
RN38 IOA[0..7] ICE IOA[0..7] ICE 3 3 IOA0 IOA1 IOA2 IOA3 7 5 3 1 0x4 RN39 IOA4 IOA5 IOA6 IOA7 7 5 3 1 0x4 8 6 4 2 A4 A5 A6 A7
3
8 6 4 2
A0 A1 A2 A3
IOWR#
3
IOWR# IOCE# PWR# PCE#
3 3 7
IOCE# PWR# PCE#
R314 IOWR# PWR# 0 R315 IOCE# PCE# 0 RN40
A[0..7] F_A[8..21] UP1_2 UP1_6 UP1_3 UP3_1

2
A[0..7] F_A[8..21]
7 3,7 8205UP3_0 8205UP3_1 8205UP3_4 8205UP3_5 7 5 3 1
UP1_2 UP1_6 UP1_3 UP3_1 UP1_4 UP1_5 UP3_0 HWSCL HWSDA
15 11 11 15 1 1 1 3 3
8 6 4 2 0x4 RN41
UP3_0 UP3_1 UP3_4 UP3_5
UP1_4 UP1_5 UP3_0 HWSCL HWSDA
8205UP1_2 8205UP1_3 8205UP1_4 8205UP1_5
7 5 3 1 0x4 R313
8 6 4 2
UP1_2 UP1_3 UP1_4 UP1_5
MUTE
8205UP1_6 0
UP1_6
8205UP3_0 8205UP3_1 8205UP1_[2..7] 8205UP3_4 8205UP3_5

1
8205UP3_0 8205UP3_1
3 3
REMOVE WHEN USE ICE MODE R312

8205UP1_7 0 DEL UP1_7
TP28
8205UP1_[2..7] 3 8205UP3_4 8205UP3_5 3 3
TEST POINT DIP1.0 TP/DIP/D1.0
UP3_4 FOR S/W SCL UP3_5 FOR S/W SDA

HWSDA HWSCL R300 R301 R R SDA SCL Title
1

UP3_5 UP3_4 R302 R303 0 0 Size B Date:
A B C D
Doc Number
MT8205 DECOUPOMG--DIGITAL
E
Rev V0.1 of 16
SDV25 A_RA3 A_RA2 A_RA1 A_RA0 A_RA4 A_RA5 A_RA6 A_RA7 A_RA8 A_RA9 A_RA11 A_DQS[0..3] A_RA[0..11] A_BA[0..1] A_DQM[0..1] A_DQ[0..31] A_CLK A_CLK# A_CKE A_CS# A_RAS# A_CAS# A_WE# SDV25 VREF A_DQS[0..3] A_RA[0..11] A_BA[0..1] A_DQM[0..1] A_DQ[0..31] A_CLK A_CLK# A_CKE A_CS# A_RAS# A_CAS# A_WE# SDV25 VREF 3 3 3 3 3 3 3 3 3 3 3 3 3 3 RN2 7 5 3 1 RN4 7 5 3 1 RN6 7 5 3 1 22x4 8 6 4 2 22x4 8 6 4 2 22x4 A_RA10 R59 RN8 7 5 3 1 RN10 47x4 7 5 3 1 RN11 47x4 7 5 3 1 RN13 47x4 7 5 3 1 47x4 SDV25 A_DQ16 A_DQ17 A_DQ18 A_DQ19 A_DQ20 A_DQ21 A_DQ22 A_DQ23 A_DQ24 A_DQ25 A_DQ26 A_DQ27 A_DQ28 A_DQ29 A_DQ30 A_DQ31 RN16 7 5 3 1 RN17 47x4 7 5 3 1 RN19 47x4 7 5 3 1 RN21 47x4 7 5 3 1 47x4 U16 8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2 D_DQ16 D_DQ17 D_DQ18 D_DQ19 D_DQ20 D_DQ21 D_DQ22 D_DQ23 D_DQ24 D_DQ25 D_DQ26 D_DQ27 D_DQ28 D_DQ29 D_DQ30 D_DQ31 D_DQ16 D_DQ17 D_DQ18 D_DQ19 D_DQ20 D_DQ21 D_DQ22 D_DQ23 D_DQS2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 VDD VSS DQ0 DQ15 VDDQ VSSQ DQ1 DQ14 DQ2 DQ13 VSSQ VDDQ DQ3 DQ12 DQ4 DQ11 VDDQ VSSQ DQ5 DQ10 DQ6 DQ9 VSSQ VDDQ DQ7 DQ8 NC NC VDDQ VSSQ LDQS UDQS NC NC VDD VREF DNU VSS LDM UDM WE CK CAS CK RAS CKE CS NC NC A12 BA0 A11 BA1 A9 A10/AP A8 A0 A7 A1 A6 8M x 16 A5 A2 DDR A3 A4 VDD VSS 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 D_DQ31 D_DQ30 D_DQ29 D_DQ28 D_DQ27 D_DQ26 D_DQ25 D_DQ24 D_DQS3 22 D_RA10 D_DQM0 D_WE# D_CAS# D_RAS# D_CS# D_BA0 D_BA1 D_RA10 D_RA0 D_RA1 D_RA2 D_RA3 D_RA8 D_RA9 D_RA11 D_DQ7 D_DQS0 D_RA4 D_RA5 D_RA6 D_RA7 D_DQ3 D_DQ4 D_DQ5 D_DQ6 U15 8 6 4 2 D_RA3 D_RA2 D_RA1 D_RA0 D_DQ0 D_DQ1 D_DQ2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 VDD VSS DQ0 DQ15 VDDQ VSSQ DQ1 DQ14 DQ2 DQ13 VSSQ VDDQ DQ3 DQ12 DQ4 DQ11 VDDQ VSSQ DQ5 DQ10 DQ6 DQ9 VSSQ VDDQ DQ7 DQ8 NC NC VDDQ VSSQ LDQS UDQS NC NC VDD VREF DNU VSS LDM UDM WE CK CAS CK CKE RAS CS NC NC A12 BA0 A11 BA1 A9 A10/AP A8 A0 A7 A1 A6 A2 8M x 16 A5 DDR A3 A4 VDD VSS 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 D_DQ15 D_DQ14 D_DQ13 D_DQ12 D_DQ11 D_DQ10 D_DQ9 D_DQ8 D_DQS1
SDV25 D1V25 D_RA0 D_RA1 D_RA2 D_RA3 RN3 7 5 3 1 75x4 D_RA4 D_RA5 D_RA6 D_RA7 RN5 8 6 4 2 75x4 VREF D_DQM0 D_CLK# D_CLK D_CKE D_RA11 D_RA9 D_RA8 D_RA7 D_RA6 D_RA5 D_RA4 CB76 0.1uF D_RA10 R60 RN9 7 5 3 1 75x4 D_DQ4 D_DQ5 D_DQ6 D_DQ7 RN12 7 5 3 1 75x4 RN14 7 5 3 1 75x4 RN15 D_DQ12 7 D_DQ13 5 D_DQ14 3 D_DQ15 1 75x4 RN18 D_DQ16 2 D_DQ17 4 D_DQ18 6 D_DQ19 8 75x4 RN20 D_DQ20 2 D_DQ21 4 D_DQ22 6 D_DQ23 8 75x4 D_DQM1 D_CLK# D_CLK D_CKE D_RA11 D_RA9 D_RA8 D_RA7 D_RA6 D_RA5 D_RA4 CB105 0.1uF RN22 D_DQ27 1 D_DQ26 3 D_DQ25 5 D_DQ24 7 75x4 RN23 D_DQ31 1 D_DQ30 3 D_DQ29 5 D_DQ28 7 75x4 D_RAS# D_CS# D_BA0 D_BA1 RN24 7 5 3 1 75x4 D_DQS2 R65 R67 R70 R72 R74 R76 R78 R80 75 75 75 75 75 75 75 75 SDV25 CB114 0.1uF CB115 0.1uF SDV25 SDV25 8 6 4 2 SDV25 SDV25 + 2 4 6 8 CE33 270uF/16v OS-CON/NC C270UF16V/D10H12 + CE34 220uF/16v 2 4 6 8 1 3 5 7 D1V25 1 3 5 7 8 6 4 2 8 6 4 2 CB78 0.1uF CB79 0.1uF CB80 0.1uF 75 DV33A 12 D_RA11 D_RA9 D_RA8 RN7 2 4 6 8 75x4 1 3 5 7 R58 10k PWR# 7 5 3 1 A1 A2 A3 A4 A5 A6 A7 F_A8 F_A9 F_A10 F_A11 F_A12 F_A13 F_A14 F_A15 F_A16 F_A17 F_A18 F_A20 F_A21 PCE# F_OE# 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 15 9 10 26 28 11
U14 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 RY/BY A19 A20 CE TSOP OE WE RESET MX29LV160BT 8 6 4 2 D1V25 D1V25 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 A18 NC WP/ACC BYTE VCC 48 pin GND1 GND2 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 16 13 14 47 37 27 46 F_D0 F_D1 F_D2 F_D3 F_D4 F_D5 F_D6 F_D7
4
8 6 4 2
DV33A DV33A R55 A0 F_A19 10k R56 0 R57 R 5VSB
DV33A
FLASHVCC CB77 0.1uF
A_DQ0 A_DQ1 A_DQ2 A_DQ3 A_DQ4 A_DQ5 A_DQ6 A_DQ7 A_DQ8 A_DQ9 A_DQ10 A_DQ11 A_DQ12 A_DQ13 A_DQ14 A_DQ15
8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2
D_DQ0 D_DQ1 D_DQ2 D_DQ3 D_DQ4 D_DQ5 D_DQ6 D_DQ7 D_DQ8 D_DQ9 D_DQ10 D_DQ11 D_DQ12 D_DQ13 D_DQ14 D_DQ15
D_DQ0 D_DQ1 D_DQ2 D_DQ3
M13L128168 8Mx16-6
CB81 0.1uF
CB82 0.1uF
CB83 0.1uF
CB84 0.1uF
CB85 0.1uF
D_DQ8 D_DQ9 D_DQ10 D_DQ11 SDV25
8 6 4 2
D1V25
3
CB86 0.1uF
CB87 0.1uF
CB88 0.1uF
CB89 0.1uF
CB90 0.1uF
CB91 0.1uF
CB92 0.1uF
CB93 0.1uF
NEW ADD
D1V25
RWR# PCE# A[0..7] F_D[0..7] F_OE#
PWR# PCE# A[0..7] F_D[0..7] F_OE#
6 6 6 3,6 3
CB94 0.1uF
CB95 0.1uF
CB96 0.1uF
CB97 0.1uF
CB98 0.1uF
CB99 0.1uF
CB100 0.1uF
CB101 0.1uF
CB102 0.1uF
CB103 0.1uF
CB104 0.1uF
F_A[8..21]
F_A[8..21]
3,6 D_DQM1 D_WE# D_CAS# D_RAS# D_CS# D_BA0 D_BA1 D_RA10 D_RA0 D_RA1 D_RA2 D_RA3
VREF C40 3300pF C41 3300pF C42 3300pF C43 3300pF C44 3300pF C45 3300pF C46 3300pF C47 3300pF
Change to 47 ohm
A_DQS0 A_DQS1 A_DQS2
2
D1V25
R61 R62 R63 R64
47 47 47 47
D_DQS0 D_DQS1 D_DQS2 D_DQS3
A_DQS3
M13L128168 8Mx16-6/NC FOR ENTRY RN25 A_CS# A_RAS# A_CAS# A_WE# A_BA1 A_BA0 A_DQM0 A_DQM1 A_CKE A_CLK A_CLK# R66 R68 R71 R73 R75 R77 R79 7 5 3 1 22x4 22 22 22 22 22 22 22 D_BA1 D_BA0 D_DQM0 D_DQM1 D_CKE TP10 D_CLK D_CLK# CB122 0.1uF CB123 0.1uF + CE36 220uF/16v D1V25 VREF D1V25 1 2 3 4 R69 U17 GND VTT PVIN SD VSENSE AVIN VREF VDDQ 8 7 6 5 + CE35 47uF/16v 4.7k 8 6 4 2 D_CS# D_RAS# D_CAS# D_WE#
CB106 0.1uF
CB107 0.1uF
CB108 0.1uF
CB109 0.1uF DEL
CB110 0.1uF
CB111 0.1uF
CB112 0.1uF
CB113 0.1uF
D_DQS3 D_CAS# SDV25 D_WE# D_DQM1 D_DQS1 D_DQS0 D_DQM0
0402 PUT ON NEARLY BGACB120 CB118 CB119

CB116 0.1uF CB117 0.1uF 0.1uF C0603/SMD 0.1uF C0603/SMD 0.1uF C0603/SMD
CB121 0.1uF C0603/SMD
IC LP2996 DDR Termination SOP8
C48 3300pF
C49 3300pF
C50 3300pF
C51 3300pF
C52 3300pF
C53 3300pF
C54 3300pF C0603/SMD
C55 3300pF C0603/SMD
SDV25 ADJ/GND SDV25

1
VREF VREF
CB132 CB133 CB134 CB135 VREF DECOUPLING 0.1uF 0.1uF 0.1uF 0.1uF
CB136 0.1uF 5VSB U4
CB125 0.1uF SDV25 SDV25 + CE38 + CE37 + CE39 220uF/16v + CE40 220uF/16v
CB126 0.1uF
CB127 0.1uF
CB128 0.1uF
CB129 0.1uF
CB130 0.1uF
CB131 0.1uF
CB124 0.1uF
3 VREF VREF + CE41 CB137 0.1uF

A
IN
OUT
CM1117-2.5V
220uF/16v
Title
SOT223/SMD
220uF/16v Size C Date:

Doc Number
CB138 0.1uF
CB139 0.1uF
CB140 0.1uF
CB141 0.1uF
220uF/16v
DDR MEMORY&FLASH
E
Rev V0.1 7 of 16
Sheet
VCC
D6 VGA_PLUGPWR D19 VGA_PLUGPWR VGA_PLUGPWR DIODE SMD 1N4148/SMD VGA_PWR VGA_PLUGPWR DIODE SMD 1N4148/SMD
CB157 0.1uF 1 2 3 4
U22 NC NC NC GND VCC WP SCL SDA 8 7 6 5
R115 10k VGASCL VGASDA GND
R116 10k VGA_IN_L VGA_IN_R
VGA_IN_L VGA_IN_R
13 13
EEPROM 24C02
P4
3 3
L PHONEJACK STEREO K1 K2 K3 K4 K5 PHONEJACK/DIP
1 2 3 4 G
VGA_R VGA_L
CE100 CE101
10uF/25v 10uF/25v
R323 R324
10k 10k
VGA_IN_R VGA_IN_L
VGASDA VGASCL
VGASDA VGASCL
3 3
HSYNC_VGA VSYNC_VGA
VGAHSYNC# VGAVSYNC#
3 3
VGASDA VGASCL
2
R110 R111
100 VGA_SDA RED_GND 100 VGA_SCL GRN_GND BLU_GND RED GREEN P6 D-SUB15 FEMALE DSUB15/DIP/F 11 1 6 2 7 3 8 4 9 5 10 RED RED_GND GREEN GRN_GND BLUE BLU_GND VGA_PWR HSYNC# FB BEAD/SMD/0603 R299 2.2k L98 VSYNC# FB BEAD/SMD/0603 R298 2.2k VSYNC_VGA BLUE RED_GND GRN_GND BLU_GND RED GREEN BLUE 12 12 12 12 12 12
2
VGA_SDA HSYNC# VSYNC# VGA_SCL
16
12 13 14 15
C157 5pF
L99 HSYNC_VGA
17
C158 5pF
Title

Size B Date:
A B C D
Doc Number
VGA IN&PC AUDIO IN

E
Rev V0.1 10 of 16
CVBS0---TUNER1 CVBS1---FRONT BD AV_IN CVBS2---AV BD (AV/S-V) IN

R40 Y Y_GND CB
4
Y Y_GND CB CB_GND CR CR_GND SOY SY SY_GND SC SC_GND CVBS0 CVBS0_GND CVBS1 CVBS1_GND
12 12 12 TU_VCC J4 TU_12V 1 2 3 4 5 6 7 8 9 10 11 12 CON12 DIP12/P2.0 OGO3 SC_IN 2 1 7 6 12 12 12 3 12 12 12 12 12 12 12 12 FB + 1000uF/16v CB197 0.1uF CE97 VCC SDA SCL SIF1_OUT AF1_OUT TV_GND TV JP1 CON\SVHS TUNER_12V
SY_IN
R41 0 R42 75
SY
AV , TUNER I/O
TUNER_12V 1
CB_GND CR CR_GND SOY SY SY_GND SC SC_GND TV TV_GND CVBS1 CVBS1_GND

3
R43 FB6 0
SY_GND
3 SY_IN 4 5
R44 SC_IN 0 R46 75 R45 0 SC
TU VCC FOR TUNER POWER USE
FOR AV SWITCH IO-1

FB5
R47
SC_GND
ORO7 FOR TUNER SIF SELECT SWITCH IO-1 OGO0 FOR TUNER SIF SELECT SWITCH IO-2 OGO1 FOR TUNER BOARD PAL/NTSC SWITCH
L102 TU_VCC
UP1_2 FOR POWER ON/OFF ORO7 FOR SYS_PWR
ORO6 FOR AUDIO 1st SWITCH IO-1 OGO5 FOR AUDIO 1st SWITCH IO-2 OGO6 FOR AUDIO 2nd SWITCH IO-1 OGO2 FOR AUDIO 2nd SWITCH IO-2 OGO4 FOR AUDIO 2nd SWITCH IO-2
RESERVER
SIF1_OUT AF1_OUT SCL SDA
SIF1_OUT AF1_OUT SCL SDA
12 12 R17 TP20 TP21 TP24 TP25 TP27 TP6 TP7 TP8 TP9 1,6,9,13 1,6,9,13 SOY1 0 R29 OGO0 OGO1 OGO2 OGO4 OGO5 OGO6 OGO3 ORO7 R30 0 R32 75 R33 FB 0 Y_GND 0 Y
ORO6
TUNER_12V L103 TU_12V OGO0 OGO1

2
YPBPR
OGO0 OGO1 OGO2 OGO3 OGO4 OGO5 OGO6 ORO6 ORO7 S1_AV1_L S1_AV1_R YPBPR1_L YPBPR1_R
3 3 3 3 3 3 3
+ CE98 1000uF/16v
CB198 0.1uF R11 0
HP_SENSE
FB2 P2 + 2 YPBPR1_L YPBPR1_R CE14 10uF/25v 5 1 3 6 4 9 7 + 0

2
OGO2 OGO3 OGO4 OGO5 OGO6 ORO6 ORO7 S1_AV1_L S1_AV1_R YPBPR1_L YPBPR1_R
R35 R36 0 R37 75 R19 FB3 0 CB_GND 0 CB
TP5
CE15 8 10uF/25v RCA1X3 RCA5/9P/Y
3 3 11 11 11 11
P1 1 2 3 4 5 6 RCA1X3 RCA3/6P/DIP AV1_IN
R1 R7 18 0 CVBS1
CE9 10uF/25v CE13 10uF/25v
S1_AV1_L S1_AV1_R
R15 56 R16 FB1 0 0 CVBS1_GND R24
R25 0 R26 75 R28
CR
CR_GND
1
S1_AV1_R S1_AV1_L YPBPR1_R YPBPR1_L
FB4 0
Title R39 R38 R48 R49 100K 100K 100K 100K

Size A3 Date: Doc Number
VIDEO IN & TUNER IO

E
Rev V0.1 11 of 16
VGASOG RED+ RED4
VGASOG RED+ REDGREEN+ GREENBLUE+ BLUE-
3 3 3 3 3 3 3 CVBS0_GND 0 47nF R340 C91 CB+ 100 47nF 22 47nF R172 NC CVBS1_GND 0 47nF R342 CR R352 C89 CVBS2+ R169 22 47nF R163 NC CVBS2_GND 0 47nF SY R171 0 22 47nF + R173 NC SY_GND R355 C171 330pF C101 SY0 47nF 47uF/16v /NC SC C104 SIF1_OUT R176 0 R344 0 47nF MPX1 R175 22 47nF C172 330pF C103 SC0 47nF 47nF/NC CE62 AF1_OUT R333 39k R332 39k 47uF/16v MPX2 RED C160 15pF C161 15pF FB BEAD/SMD/0603 L55 RED_IN R179 47nF 75 C107 5pF C108 R178 100 C105 RED+
2
R348 CVBS0 R166 0 22
R338 C94 CVBS0+ 100 Y R160 0
C88 Y+ 47nF
GREEN+ GREENBLUE+ BLUE-
47nF R168 NC R349 C168 330pF C96 CVBS0Y_GND
R161 NC R339 100
C162 30pF C90 Y47nF
CB+ CBCR+ CRY+ YSY+ SYSC+ SCCVBS0+ CVBS03
CB+ CBCR+ CRY+ YSY+ SYSC+ SCCVBS0+ CVBS0CVBS1+ CVBS1CVBS2+ CVBS2-
3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 CVBS2 R162 0 CVBS1 R170 0
R350
CB C98 CVBS1+
R164
R165 NC C169 330pF C100 CVBS1100 R341 CB_GND
C163 10pF C93 CB47nF C95 CR+ 100 47nF C164 10pF R343 C97 CR100 47nF R354 C99 SY+
3
R351
R167
NC CR_GND
R353
C170 330pF C92 CVBS2-
CVBS1+ CVBS1CVBS2+ CVBS2-
FROM Tuner
CE116
OUTPUT
MPX1 MPX2 MPX1 MPX2 3 3
R356 R174 0
C102 SC+
Y Y_GND CB CB_GND CR CR_GND

2
Y Y_GND CB CB_GND CR CR_GND SOY SY SY_GND SC SC_GND
11 11 11 11 11 11 3,11 11 11 11 11
C106 15pF/NC
C165 15pF/NC SC_GND C166 +
NC
R357
AF Path
SOY SY SY_GND SC SC_GND
RED_GND L104 FB
R180
100 47nF C109
RED-
R183 CVBS0 CVBS0_GND CVBS1 CVBS1_GND CVBS2 CVBS2_GND SIF1_OUT AF1_OUT RED
1
0 4.7nF
VGASOG
CVBS0 CVBS0_GND CVBS1 CVBS1_GND CVBS2 CVBS2_GND SIF1_OUT AF1_OUT RED GREEN BLUE RED_GND GRN_GND BLU_GND
11 11 11 11 11 11 11 11 GRN_GND GREEN
L57 GREEN_IN FB BEAD/SMD/0603 R186 75 C112 5pF R185 100
C111 GREEN+ 47nF
C113 GRN_GND L106 FB R187 100 47nF GREEN-
L59 10 10 10 10 10 10 L105 FB Size C Date:

A B C D
C114 BLUE_IN R191 100 47nF R195 75 C116 C115 5pF BLUE+
1
BLUE FB BEAD/SMD/0603
GREEN BLUE
INPUT RED_GND
GRN_GND BLU_GND
BLU_GND
R199
100 47nF
BLUE-
Title Doc Number
LCD TV - MediaTek MT8205 Solution AUDIO/VIDEO IN CIRCUIT

E
Rev V0.1 12 of 16
Sheet
Del Parts
VCC
L61 HPVDD
VGA_IN_L VGA_IN_R
VGA_IN_L VGA_IN_R
10 10
FB TP17 DVI_R TP18 DVI_L VGA_IN_R VGA_IN_L + S1_AV1_R S1_AV1_L CE108 CE109 R212 R214 R216 R217 0 5k 0 0 0 10k 10k AIN2R AIN3L AIN3R AIN4L AIN4R AIN5L AIN5R AINOPL AINVGL AINOPR AINVGR AGND 48 47 46 45 44 43 42 41 40 39 38 37 HPVDD 5k + + 10uF/25v SDA R215 100 SDA14
4
C117 CB161 0.1uF SCL R213 100 SCL14
S1_AV1_L S1_AV1_R
S1_AV1_L S1_AV1_R
10 10
R219
10uF/25v R218 10uF/25v R221
Del TP16 Parts SCL SDA ORO3 ORO4 ORO5 MUTE DACBCLK DACMCLK DACLRC DOUT AOSDATA0 AOSDATA1 AOSDATA2 AOSDATA3
3
YPBPR1_R YPBPR1_L
CE110 CE111
10uF/25v + 10uF/25v +
R222 R223
10k 10k U28
SCL SDA ORO3 ORO4 ORO5 UP1_5 DACBCLK DACMCLK DACLRC DOUT AOSDATA0 AOSDATA1 AOSDATA2 AOSDATA3
1,6,9,11 1,6,9,11 3 3 3 1,6 3,6 3 3 3 3,6 3,6 3,6 3,6 GND ORO3 ORO4 ORO5 TP30 TP31
TP15
R220
CE63 10uF/25v
CB163 0.1uF +
TP13 TP32 TP2
S2_AV2_R CE112 S2_AV2_L CE113
10uF/25v 10uF/25v
R224 R225
10k 10k 1 2 3 4 5 6 7 8 9 10 11 12 AIN2L AIN1R AIN1L DACBCLK DACMCLK DIN DACLRC ZFLAGR ZFLAGL ADCBCLK ADCMCLK DOUT AVDD ADCREFP ADCREFGND VMIDADC AUXL AUXR DACREFP DACREFN VMIDDAC VOUTR VOUTL NC SDA14 SCL14 36 35 34 33 32 31 30 29 28 27 26 25 HPVDD ADCREFP VMIDADC AUXL AUXR HPVDD COD_VOUTR COD_VOUTL + CE68 10uF/25v
+ ADCREFP VMIDADC CE64 CE66 VMIDDAC 10uF/25v 10uF/25v TP22 TP23 + CE67 10uF/25v CB166 0.1uF + CE65 10uF/25v CB165 0.1uF
DACBCLK DACMCLK DOUT
13 14 15 16 17 18 19 20 21 22 23 24
ADCLRC DGND DVDD MODE CE DI CL HPOUTL HPGND HPVDD HPOUTR NC
DACBCLK DACMCLK AOSDATA1 DACLRC
DACLRC
DVDD
HPVDD
CB167 0.1uF
PWM1
PWM1
DACLRC R226 1k L63 DV33 FB DVDD DVDD
WM8776 CE69 COD_VOUTR 10uF/25V CODHPOUTR R227 10k + AUSPR
DV33
PWM0
PWM0
3 TP29 PWM1
CE74 47uF/16v
TWO WIRE SERIAL CONTROL DEVICE ADDRESS 0x34h CODHPOUTL CB170 0.1uF CE71 COD_VOUTL 10uF/25v R229 10k AUSPL
VCC L62 VCC FB + J3 1 2 3 MUST USE SHIELD CABLE MUTE 4

2
WMVDD + WMVREFP 560 + CE115 220uF/16v CB169 0.1uF CODHPOUTR 220uF/16v R230 47k +
2
WMVDD CE70 47uF/16v
CB168 0.1uF
R228 WMVDD CE73 HPOUTR
AUSPR AUSPL
4x1 TO AUDIO BD W/HOUSING DIP4/W/H/P2.0 GND CE75 CODHPOUTL DVDD WMVDD DVDD AVDD 28 5 220uF/16v
HPOUTL R233 47k
U29 VREFP MCLK BCLK LRCLK VREFN DATA0 DATA1 DATA2 VOUT1L VOUT1R VOUT2L VOUT2R ORO3 ML MC MD 10 11 12 13 14 MODE 1 15 R240 R C173 0.1uF R241 0 R242 R243 0 0 DNC ML/I2S MC/IWL MD/DM MUTE MODE PCM/DSD Wolfson-WM8766/8796 ADAC SSOP28/SMD VOUT3L VOUT3R DGND AGND 17 WMVREFP
DACMCLK DACBCLK DACLRC
R231 R232 R234
33 33 33 R362 R363 R361
SACLK SBCLK SLRCK 33 33 33
2 3 4 7 8 9
16 21 22 23 24 25 26 AUAVL AUAVR AULS AULR AUCEN AUSUB TP14 TP12 TP11 TP19 TP26 TP42
AOSDATA0 AOSDATA3 AOSDATA2
DVDD
R238 0
VMID 27
18
VMID CE77 10uF/25v
+ 20 19
NC NC
CB171 0.1uF
Title
Hardware Mode -> 24-bit Right Justified.

Size C Date:

Doc Number
WM8776/WM8766/AUDIO CODEC
E
Rev V0.1 of 16
Sheet
13
LVDS OUT
J8
4 4
AN0 AP0 AN1 AP1 AN2 AP2 CLK1CLK1+ AN3 AP3 AN4 AP4 AN5 AP5 AN6 AP6 CLK2CLK2+ AN7 AP7
+12V
3
VCC
JP2 1 3 2 4 2x2 JP2X2/DIP/P2.54
L3 LVDS FB BEAD/SMD/0805
F1 LVDSVDD 4A/?v FUSE/DIP/P10.0 LVDSVDD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 FI-SE30P-HF LVDS/30P/P1.25/S
CE86 330uF/25v C330UF25V/D8H14
CE87 220uF/16v
CE88 220uF/16v
R277 GPIO 2k R R278 CLK1+ CLK1CLK2+ CLK2AP[0..7] AN[0..7] R G B SVM VSYNC HSYNC CLK1+ CLK1CLK2+ CLK2AP[0..7] AN[0..7] 3 3 3 3 3 3 L76 R G B SVM VSYNC HSYNC 3 3 3 3 3 3 G R279 75 1% C151 33pF 0.082uH L/IND/SMD/0603 C152 33pF GND GPIO 8x1 W/HOUSING DIP8/W/H/P2.54 GRN_OUT 75 GND 75 1% 0.082uH L/IND/SMD/0603 C149 33pF L75 RED_OUT
CB185 0.1uF
CB186 0.1uF
CRT OUT
C150 J9 33pF GND RED_OUT GRN_OUT BLU_OUT SVM HSYNC VSYNC R366 1 2 3 4 5 6 7 8
2
GPIO
L78 B R281 75 1% 0.082uH L/IND/SMD/0603 C154 33pF BLU_OUT Title C155 33pF GND
A B C D

Size B Date: Doc Number
LVDS/CRT OUT
E
Rev V0.1 14 of 16
PANEL INVERTER POWER

UP1_2 UP3_1 UP1_2 UP3_1 6 6,8
4
OBO0 OBO1 OBO2 OBO3 URST# IR URST# 3,6 OBO4 OBO5 IR 3 OBO6 OBO7
OBO0 OBO1 OBO2 OBO3 OBO4 OBO5 OBO6 OBO7
3 3 3 3 3 3 3 3
Inverter_PWR
Inverter_PWR
CE1 470uF/50v
CE2 470uF/50v
CE3 470uF/50v
CB1 0.1uF
CB2 0.1uF PWR_GND
FOR CHI-MEI INVERTER CONNECTOR
J10 Inverter_PWR R336 0 R285 10k 1 2 3 4 5 6 7 8 9 10 11 12 12x1 W/HOUSING R.A DIP12/WH/P2.0/R SELECT 3
UP3_0 PWM0
UP3_0 PWM0
6 3 2
TP1 3 R286 Dimming R288 PWM0 4.7k R291 10k 1 SOT23/SMD 100k Q12 Back Light circuit 2N3904 CB190 0.1uF VCC R50 0 2
R. ANGLE
VCC
VCC
SELECT Hi For External SELECT Low For Internal

R289 R
KEYPAD - MAX 8-KEYS

BL_ON/OFF R293 UP3_0 4.7k 1 Q13 2N3904 SOT23/SMD
R290 0
5VSB 2
OBO0 OBO1 OBO2 POWER OBO3 ON/OFF OBO4 OBO5 R2 510 510 R81 LED_RED LED_GRN UP1_2 0 2 R4
L81 L82 L83 L84 L85 L86
FB FB FB FB FB FB
TV/AV MENU VOLVOL+ CHCH+ IR
R14 10K R0603/SMD OBO6
R13 10K R0603/SMD R9 R10 OBO7 4.7K 4.7K 1 Q1 2N3906 1
1 2 3 4 5 6 7 8 9 10 11 12 12x1 W/HOUSING DIP12/W/H/P2.0
J11 Inverter_PWR 1 2 3 4 5 6 7 8 9 10
DV33A
PWR_GND 10x1 W/HOUSING R.A. DIP10/WH/P2.0/R L89 FB BEAD/SMD/1206 L90 FB BEAD/SMD/1206
Q2 2N3906
5VSB
R57
0 IR & POWER ON LED
DV33A
R. ANGLE
J12
Title

Size C Date:
A B C D
Doc Number
BACK_LIGHT/KEYPAD
E
Rev V0.1 15 of 16
Sheet
TUNER1 IN
P#
Date
TUNER1
ADDRESS TUNER IF
C2 FQ1236 / : NTSC TV
86
AV , TUNER I/O
TU1
FQ1236-MK3
TU_VCC
1J1
D 1 2 3 4 5 6 7 8 9 10 11 12
CON12 M1 M2
TU_12V GND1 GND2 NC NC VS_TUNER SCL SDA AS NC NC AF-R AF-L 2nd SIF OUT CVBS VS_IF AF /MPX
GND3 GND4
SDA SCL 1R1 SIF1_OUT
TH1 TH2 1 2 3 4 5 6 7 8 9 10 11
12 13 14
TH3 TH4
TU_CVBS
1
18
1R21 1R3 56
20
TV
AF1_OUT TV_GND TV
12
1R41
20
TV_GND FB1
GNDS
VCC TU_SCL
GNDS GNDS
FB2 0
9 8 7 6
NC
TU_SDA SIF1_IN AF1_IN TU_CVBS
GNDS 1 GNDS
GND HOLE
NC
9 8 7 6
2 3 4 5
2 3 4 5
9 8 7 6
9 8 7 6
2 3 4 5
GND HOLE
2 3 4 5
GNDS
GNDS
1R5 TU_SCL
100
1
1R6 100
2 2
SCL SDA
TUNER1 SIF1 BPF NTSC 4.5MHzPAL 6MHz

1
SIF_12V
TU_SDA
1R7 1.8K
1
1R8 1k 1C1 10nF
1C2 47pF
1C3 47pF SIF1_IN
1C4
10nF
1R9
1C5
22pF/27pF
1L2
47uH/22uH
1C6
10nF
22
1
1Q1 2N3904
SIF1
2 1 2
2 2 1
2 1
1 31
1C7 820pF/560pF
1L3 1.5uH/1.2uH
1C8 820pF/560pF
1L4 1R10 1.5uH/1.2uH 220 1R11 10
TU_VCC
1L5 FB
VCC 1 2 1 1 1
CE4 CE5 CB3 0.1uF
12
+ 2 1 +
CE3 100uF/16V
+
100uF/16V
+ 2
100uF/16V
CB4 0.1uF
1
CB5 0.1uF
71.5
NC
10uF/25v
GNDS GNDS
GND V B
GND V
GND V
GND V B TU_12V
1L6 FB
GND V
GND V
1R12
1C9
CE6
2 SIF_12V 1
GND V
GND V
AF1_IN
CE7 1 33uF/16V
2 AF1 1 +
TU_12V
1 1
CB6 0.1uF
2 1 +
SIF_12V
CE8 100uF/16V
CE9 220uF/16V
CB7 0.1uF
AF1 SIF1 SIF1_IN
1R14 1 1R15 1 1R16 1
02 02 0/NC 2
AF1_OUT SIF1_OUT SIF1_OUT
AF1_OUT SIF1_OUT
TU_12V
GNDS TU_12V TU_VCC
GND V
TU_VCC
GNDV
GNDS
GND V
AUDIO GROUND
GNDS
VIDEO GROUND
C1
2
22pF
1
NPO
2 D 1 +24V
5% R1 82K
1 D +24V
R2
1 1 2
100K 5% R5 100K 4.7nF NPO C8 C5 4.7uF X5R U1 5%
2 2 1 1
+ C7 C6 1UF C4 100UF/25V
1
R11 R10 10K 5% C12 100NF 10K
+ C10 100UF/25V
X7R
U2A
22UF/16V
C14
5%
100NF X7R
FILM L5 10uH C38
+ OUT 1 1
1
C3 R3
1 2 3 4
PIN NIN AGND EN

ATA-120
PGND SW VPP BS
8 7 6
C9
2
1UF X5R
5% 10K
1
+ 1000UF/25V
2 1
R6 10 5%
AUSPL
C20 2
R47 1K8 5% R4
21
C54 1n
R66 4K7 5%
21
C55 1n
R67 4K7 5%
11
R12 10K 5%
22
10UF
RC4558
1
1UF X5R
2 1 1
R8 10 5% 5% R9 10K D1 MBRS130LTR
5% 100K
AGND
MUTEC C24
1
C11 470NF
R7
21
10K
C 1
R15
22pF 47K 5%
C15 2.2UF D2 6.2V
22
C16
5%
C17
C 100NF 1
X7R
390PF NPO
C21
2
22pF
1
NPO
5% R14 82K
1 +24V
R16
+24V
1 1 1 2 1
5% R36 R37 5% 10K C19 5% 22UF/16V 10K R17 100K NPO C27 4.7uF 4.7nF X5R U3 100K 5%
2 2 1 1
+ C29 C28 1UF C25 100UF/25V
X7R
100NF
U2B
C30
B
L6 10uH C39
X7R
+ OUT 7 1
1
C31 R18
1 2 3 4
PIN NIN AGND EN

ATA-120
PGND SW VPP BS
8 7 6
C32
22
1UF X5R
AUSPR
C40
2 2
R19
R33 1K8 5% 100K
21
R45 4K7 5%
21
R46 4K7 5%
R39 10K 5%
26
10UF
RC4558
1
1UF X5R
2 1 1 1
R20 C33 R22 10 R23 10K 5% D3 MBRS130LTR 470NF FILM 5% 10
C52 1n
C53 1n
AGND
MUTEC C41
R21
21
10K 22pF NS D4
C34
22
C35 100NF
5%
5%
C36
47K R38 5%
2
A
6.2V
390PF NPO
1
X7R
A Title Size B Date: File: 1 2 3 4 5 2-Sep-2005 Sheet of D:\\LCD TV\LCD TV.DdbDrawn By: 6 Number Revision
5% 10K
1
1000UF/25V +
5%
R24
3K 5%
1 1
R25 5% 10K
MUTEC
2
C37 1UF
+24V D D6 1 1N4148
+ C42 100UF/25V R41 5% 10K
Q1 2N3906 2 1
X5R
Q3 2
R29 1K
D 1 MUTE
R40 10K
Q2 2N3904
5%
2N3904
5%
R42
AGND
1k
AGND D10 NC
D7 4.7V
AGND
AGND
D8 1N4148
LOUT Q5 2N3904
R34 1K 5%
R43
C D5
0R
Q4 2N3906 1 MUTEB
C18 NC
AGND
NC
ROUT
R28 1k
AGND 1
R30 22k
R35 1K 5%
Q6 2N3904
D9
R54 10K R55 10K
+ C51 220UF/25V
AGND
1N4148 2 1 +24V
C2 100U/35V C13 100N
1
C22 5%
1
5%
AGND Q7 NC MUTE
22U/16V
+
1K 5%
B
R48 AUSPL 1k8 R49 4K7 R50 4K7 R51 10K
U5A
C60 10UF X5R
1 2
5% 5% R53 100K
2 1
1
5% C45 1n
2 1
1
5% C46
1
5%
RC4558
10U/16V
OUT
1 C26
R13
1
R65 47K 5% R27 NC
R52
22K
22P
1n
1 1
5%
C49
2 AGND
AGND
LOUT ROUT
J10
AGND
R62
10K 5% C44
R63
10K 5%
+24V
rca2
U5B 22U/16V
+ OUT 7
C43
2
10U/16V
R26 1K 5%
1 2
R61 47K 5%
R56 AUSPR
1k8
R57
4K7
R58
4K7
R59
10K
C59 10UF X5R
1 2
5% 5% R60 100K
2 1
1
5% C47 1n
2 1
1
5% C48
1
5%
RC4558
A Title Size B Date: File: 2-Sep-2005 Sheet of D:\\LCD TV\LCD TV.DdbDrawn By: 6 Number Revision
1
R64 22K
C50 22P
2 AGND AGND
1
5%
1n
D1 STTH3L06 D3
1
C11 1KV 470P NTC1

V_BUKE 12 V_BUKE D5 ??
L3
R21 100R 2W
L4
10UH
+24V
400UH
3
PQ32-20 4
C6 25V 1U R8 36K
STTH8R06
1KV 4700P
R4
1
2.5R R13 750K
R15 1.8M
1 2
+24V4A
10 11
R20 100R 2W C14 C15 C16 C17 C12 35V 1000U 35V 1000U 35V 470U 35V 470U 470R/1W 35V 470U 1KV 470P R23 0.1U C18 C19
4A
F1
D L
L1
10mH
L2
10mH
1.6M R6 C1 68K C5 680NF

5 2
250VAC 5A
CX1
R2 1.6M R1 1.6M
1
R14 750K
R16 1.8M C8
CX2
R5 1.6M 1UF 630V
C10 68K R19 450V 100UF 450V 100UF

C9 5 6 TR1 ??
+12V
8 9
0.33U
N
0.33
2
BD1 STBR608
3
$0.28
8
D2 Q1 STP20NM50 1N4148
7
ZCD
VCC
GND COMP
INV
R11 8.2K R17 100K R12
+24V1A
7 12
C2 35V 22U R3 20K C3 C4 100NF 10NF

3
PQ3220
1 2
MULT
CS
CY1 250V1000P
CY2 250V1000P
L6562
U1
GD
R7
10R
+24V4A
10 11
C13 1KV 470P R22 100R 2W

D7 ??
R9 0.33R
R10 0.33R 1.6K
R18
C7
D4 STTH310
5 6 TR2 ??
20K
+12V
8 9
10N
L5
10UH
+12V
+24V1A
7 GND
R37 100R 2W C30 C31 C32 C33 25V 1000U 25V 470U 25V 1000U 25V 470U C29 1KV 470P R42 470R/1W C35 25V 470U C36 0.1U
2A
Q2
BC337
R25 20R R30 22R R27 5.6K

15 C20 DCL PGND VREF STBY SGND DIS 11 12
PQ3220
R36 1N4148 STP12NK80 Q4 OPEN
R24 10K
$0.45
OUT 10
SYNC
VCC
DC
VC
D6
R32 10R
C27 OPEN R40 1.2K R39

1
50V 22UF
C Q3
L5991
RCT
M1
COMP VFB SS ISEN 13
R44 33.2K
R46 30K
C
R33 1K 1K
2
14
BC327
R26 6.8K
16
U3B R41 22K
C34 0.1UF
3.3N
C26 220PF
4
0.47R 3W
C24 8.2N
0.47R 3W
LCD-TV 200W SMPS SPEC: 1. +5V 2. +5VS 3. +12V 4.+24V 5. +24VA 4A 1A (Standby 5V) 2A 4A 1A
R29 5.6K
C25
R34
R35
U2 C28 1KV 470P TL431 R43 75K R38 100R 2W

D8 ??
R28 15K R31 C21 0.1UF C22 50V 2.2U 3.3NF C23 4.7K U3A PC817
3
R45 2.7K
L6
10UH
+24VA
C46 Q6 BC327
L8
R60 100R 2W C47 C48 25V 1000U 25V 1000U C49 R62 25V 470U 470R/1W C50 25V 470U
1A
C51 0.1U
R52 1K
SHORT CIRCUIT PROTECTION

D11 C38 10NF
B J1 +5V +5V +5V GND GND GND +12V +12V 1 2 3 4 5 6 7 8 PH-2.0
1KV 470P
L
1N4148 C40 50V 4.7U R54 43K R53 130K CY3 250V 2200P
R51 120K
AGND AGND B
R59
V_BUKE
R61
2.0K
1
4.7K U4B PC817

2 +12V
R47 30K
C37 1000V 10nF
R50 47K/1W C39 10nF D10 FER107 R49 10R D9 FER104

1 2 3 4 5
TR3 14 13 12
1KV 472P C42 10R 2W

D12 ??
R55
R58 L7 10UH 56K R56 0.01R +5VS
ZD2 BZX79C12RL
R64
+24V
R63 1K ZD1 27V
Q8
4.7K
J2 +5VS +5VS GND GND ON/OFF 1 2 3 4 5 PH2.0 J3 +24V +24V +24V GND GND GND 1 2 3 4 5 6 PH2.5 4 Q5
30K
BC327 R66 10K C52 22NF R65 10K
10 9 8
C41 16V 2200U
16V 2200U
C45 25V 470U
Q7 BC337
R78
D13 1N4148
C53 35V 47U
U5 6 5 4 3 Vstr
R67 10R
Drain 1
D14
FER104
6 ??
MMBT3906 Q13 MMBT3904
R48
25V 2200U C43 C44
1A
R57 0.01R
EC28
Q9 STP22NF0
+5V
4.7K
Q12
NC Vfb GND Vcc FSDM0565
4A
C57 16V 470U R68 1K R69 1.2K R80 470R/1W R70 1.2K R73 R74 R71 5.6K
Q10
$0.60
2
C58 100N
R77 4.7K 10K

R76
BC337 C59 100N
R79
4.7K
47K 4.7K
+12V
U4A PC817
J4 A +24VA +24VA GND GND 1 2 3 4 PH2.0 3
ZD3 22V
C54 35V 47U
C55 0.1U
U6
BC337
PC817B
ON
A
C56 47nF U7 TL431 R72 5.6K

Q11
STBY R75 4.7K

ON/OFF
BC337
Title Size Orcad C Date: File: 3-Jun-2005 Sheet of 6
LCD-TV 200W SMPS Sch

Number Revision
Ver1.0
1/1
Basic Operations & Circuit Description

Main Electric Components (1). MODULE:
There are 1 pc. panel and 2 pcs. PCB including 1 pc. INVERTER board(L), 1 pc. T-CONTROL board,
(2).SIGNAL PROCESS
There are 4 pcs. PCBs including 1 pc. Audio&Tuner board, 1 pc. Main digital board, 1 pc. Keypad board, 1 pc. Remote Control Receiver board,
(3).POWER
There are 1 pc. PCB for power.
PCB function
1. Power:
(1). Input voltage: AC 100V~240V, 47Hz~63Hz. Input range: AC 90V(Min)~264V(Max) auto regulation. (2). To provide power for PCBs. a). +24V for Inverter. b). +5Vsb for standby, c). +5V for signal power, d). +24V for Audio Amp power and converter to e). +12V for Tuner power.
2. Main (Video InterFace) board:

(1).Decoder the video signal (TV,CVBS,S-VIDEO) from analog to digital signal. (2).Converter the Video signals( TV,CVBS,S-VIDEO ) and graphics signal (VGA,YPbPr) from internace to progressive, (3). Converter the Digital to fit the panel display mode and output the LVDS signal to Panel.
3. Tuner & Audio Board: (1)Convert TV RF signal to video and audio signal to Main board.
(2 ). Decoder the TV SIF signal to audio signal, (3 ). Converter the audio to audio Ampifile and out put to the speaker.
4. KEYBOARD
To get the main button control on LCD_TV as SOURCE,MENU, CHANEL +,CHANEL -, VOL +,VOL-, STANDBY functions.
5. Remote control board

Receive the remote signal and active for the control.
6. T-CONTROL board
Converter the LVDS signal to the digital signal for fitting the PANEL.
7. INVERTER board
Converter the low DC voltage +24V to high AC voltage to drive the backlight.
PCB failure analysis

1. CONTROL:
a. Abnormal noise on screen. b. No picture.
2. MAIN (VIDEO):
a. Lacking color, Bad color scale. b. No voice. c. No picture but with signals output, OSD and back light. d. Abnormal noise on screen.
3. POWER:
No picture, no power output.
Basic operation of LCD-TV

1. After turning on power switch, power board sends 5Vst-by Volt to Micro Processor IC waiting for ON signals from Key Switch or Remote Receiver. 2. When the ON signal from Key Switch or Remote Receiver is detected, Micro Processor will send ON Control signals to Power. Then Power sends (5Vsc, 12Vsc, 24V and RLY ON, Vs ON) to PCBs working. This time VIF will send signals to display back light, OSD on the panel and start to search available signal sources. If the audio signals input, them will be amplified by Audio AMP and transmitted to Speakers. 3. If some abnormal signals are detected (for example: over volts, over current, over temperature and under volts), the system will be shut down by Power off.
LCD basic display theory.

When an electrical field is applied to the LC planes, the LC molecules re-align themselves so that they are parallel to the electrical field. This electrical process is known as twisted nematic field effect or TNFE. In this alignment, polarized light is not twisted as it passes through the LC material (see Diagram 3A and 3B). If the front polarizer is oriented perpendicular to the rear polarizer, light will pass through the energized display but will be blocked by the rear polarizer. An LCD in this form is acting as a light shutter. Displays with variable characters are created by selectively etching away the conductive surface that was originally deposited on the glass. Etched areas become the displays background; unetched areas become the displays characters.
Diagram 3A. The off state of a TN LCD-the LC molecules form a twist and therefore cause polarized light to twist as it passes through.
Diagram 3B. The on state-the electrical field re-aligns the LC molecules so they do not twist the polarized light.
Disassembly
In case of trouble, etc., Necessitating disassemble, please disassemble in the order shown in the illustrations. Reassemble in the reverse order. 1. Removal of the Back Cover
2. Removal of the MAIN PCB a. Remove the screws. b . Slide out the LCD chassis slightly; pull up the connector of AC cord from PCB; pull up the LCD PCB from LCD. c . Remove the Anode cap from Thepicture tube. To avaid a shock hazard, be sure to discharge d . Take out the LCD chassis.
IC DESCRIPTION
-MT8205G -AT24C02 -MX29LV160BBTC -LP2996 -AZ1117/H -WM8776 -MX232A -ISAV330
Pinout information
C3 D3 C1 C2 L11 D1 D2 F2 D4 E1 E2 E3 E4 F1 F4 F3 G3 J3 G4 H3 K3 K4 J4 H4 L3 G2 G1 H2 H1 M12 J2 J1 K2 K1 L4 L2 L1 M2 M1 M11 N2 N1 P2 P1 M3 R2 R1 T2 T1 N12 N3 M4 N4 N11 T4 P3 R3 P4 U4 R4 U3 V4 T3 U1 U2 V1 V2 V3 W1 W2 AC9 W3 W4 Y1 Y2 Y3 P11 Y4 AA1 AA2 AA3 AA4 AB1 AB2 AB3 AB4 AC1 AC18 AC2 AC3 AC4 R11 AD1 AD2 AD3 AD4 AE1 VFEVDD1 ADCVDD4 SIF AF ADCVSS4 REFP4 REFN4 ADCVSS ADIN4 ADIN3 ADIN2 ADIN1 ADIN0 ADCVDD PWM2VREF AUXVTOP AUXVBOTTOM VPLLVSS VPLLVDD DLLVDD DLLVSS BGVSS REXTA BGVDD LVDDA A7P A7N CLK2P U? CLK2N LVSSA A6P A6N A5P A5N LVDDB A4P A4N A3P A3N LVSSB CLK1P CLK1N A2P A2N LVDDC A1P A1N A0P A0N LVSSC DACVDDC VREF FS DACVSSC SVM DACVDDB DACVSSB DACVDDA G DACVSSA B R DE VSY NCO HSYNCO VCLK EBO7 EBO6 EBO5 EBO4 DVDD3I EBO3 EBO2 EBO1 EBO0 EGO7 DVSS18 EGO6 EGO5 EGO4 EGO3 EGO2 EGO1 EGO0 ERO7 ERO6 ERO5 DVDD18 ERO4 ERO3 ERO2 DVSS3 ERO1 ERO0 OBO7 OBO6 OBO5
MT8205
AE2 AF1 AF2 AE3 AF3 AE4 AF4 AC5 T11 AD5 AE5 AF5 AC6 AD9 AD6 AE6 AF6 AC7 AD7 AD18 AE7 AF7 AC8 AD8 AF8 P12 AE9 AF9 AE10 AF10 AC11 AD11 AF12 AE15 AD15 AC19 AC15 AF16 AE16 R12 AD16 AC16 AF17 AD17 AD14 AE14 AF14 AF13 AE13 AD13 AC13 AE8 AC10 AC17 AE12 AD12 AE11 T12 AF11 AE17 AF15 AC12 AC14 AF18 AE18 AD10 AF19 AE19 AF20 AE20 AD19 AD20 AC20 AF21 AE21 AD21 P13 AC21 AD22 AC22 AF22 AE22 AF23 AE23 AD23 AC23 AF24 AE24 AD24 R13 AC24 AF25 AE25 AF26 AE26 AB23 AB24 OBO4 OBO3 OBO2 OBO1 OBO0 OGO7 OGO6 OGO5 DVSS18 OGO4 OGO3 OGO2 OGO1 DVDD3 OGO0 ORO7 ORO6 ORO5 ORO4 DVDD18 ORO3 ORO2 ORO1 ORO0 HIGHA7 DVSS18 HIGHA6 HIGHA5 HIGHA4 HIGHA3 HIGHA2 HIGHA1 HIGHA0 AD0 AD1 DVDD18 AD2 AD3 AD4 DVSS3 AD5 AD6 AD7 IOA0 IOA1 IOA2 IOA3 IOA4 IOA5 IOA6 IOA7 A16 DVDD3I A17 IOA18 IOA19 IOA20 DVSS18 IOA21 IOALE IOOE# IOWR# IOCS# WR# RD# DVDD3 INT0# UP12 UP13 UP14 DVDD18 UP15 UP16 UP17 UP30 UP31 DVSS18 PRST# UP34 UP35 FCICLK FCICMD FCIDAT GPIO0 PWM0 PWM1 IR RXD TXD DVSS3 ICE SCL SDA SCL0 SDA0 SCL1 SDA1 DE_DVI VSYNC_DVI HSYNC_DVI DVDD18 AOSDATA0 AOSDATA1 AOSDATA2 DVDD3I AOSDATA3 LIN AOBCK AOLRCK AOMCLK DVSS3 DQ24 DQ25 DQ26 DVDD2 DQ27 DQ28 DVSS2 DQ29 DVDD2 DQ30 DQ31 DQS3 DQM1 DVSS18 DQS2 DQ23 DQ22 DVSS2 DQ21 DQ20 DVDD18 DQ19 DVDD2 DQ18 DQ17 DQ16 RA4 DVSS2 RA5 RA6 RA7 RA8 DVSS18 RA9 RA11 CKE DVDD2 RCLK RCLKB DVSS2 RA3 RA2 RA1 RA0 RA10 BA1 DVDD2I DVDD18 BA0 RCS# RAS# DVSS2 CAS# RWE# DQ8 DQ9 DQ10 DVDD2 DQ11 DVSS18 DQ12 DQ13 DVSS2 DQ14 DQ15 DQS1 AVSS18 AVDD18 RVREF DVSS18 DQM0 DQS0 DQ7 DVDD2 DQ6 DQ5 DVSS2 DQ4 DQ3 DVDD2 DQ2 DQ1 DQ0 VFEVSS1 AVCM ADCVDD0 CVBS2N CVBS2P CVBS1N CVBS1P CVBS0N CVBS0P ADCVSS0 REFP0 REFN0 ADCVDD1 SCN SCP SYN SYP ADCVSS1 REFP1 REFN1 VFEVDD0 VOCM VFEVSS0 VICM ADCVDD2 CRN CRP CBN CBP YN YP SOY ADCVSS2 REFP2 REFN2 MON0 MON1 ADCVDD3 RN RP GN GP SOG BN BP ADCVSS3 REFP3 REFN3 VSYNC HSYNC DVSS DVDD ADCPLLVSS1 ADCPLLVDD1 ADCPLLVDD ADCPLLVSS SYSPLLVSS SYSPLLVDD TESTP TESTN XTALVDD XTALO XTALI XTALVSS APLL_CAP APLLVSS APLLVDD DMPLLVDD DMPLLVSS VI0 VI1 VI2 VI3 VI4 VI5 VI6 DVDD18 VI7 VI8 VI9 VI10 VI11 DVSS3 VI12 VI13 VI14 VI15 DVSS18 VI16 VI17 VI18 VI19 VI20 VI21 VI22 VI23 VCLK_DVI L12 D5 C4 B1 A1 B2 A2 B3 A3 L13 B4 A4 C5 B5 A5 B6 A6 M13 D6 C6 D7 B7 N13 A7 C7 B8 A8 B9 A9 B10 A10 C8 D10 D9 C9 D11 C11 D8 B11 A11 B12 A12 D13 B13 A13 C10 D12 C12 C13 C14 N14 D14 L14 D15 C15 M14 L15 D16 B14 A14 C16 B15 A15 M15 A16 D18 D17 C17 C18 B16 A17 B17 A18 B18 C19 D19 E23 A19 B19 C20 D20 A20 L16 B20 C21 D21 A21 M16 B21 C22 D22 A22 B22 C23 D23 A23 B23
C24 D24 A24 Y24 A25 A26 B26 F23 B25 B24 C26 C25 E24 N15 G26 G25 F26 F24 F25 E26 N16 E25 G24 D26 D25 H25 H26 P14 J25 J26 K25 P16 K26 L25 AA24 L26 H24 M25 M26 N25 J23 R16 J24 K23 K24 L23 R14 L24 M23 N26 H23 P26 P25 P15 M24 N23 N24 R26 P24 P23 U23 AA23 R24 R23 T24 R15 T23 U24 W26 V25 V26 V23 U25 T13 U26 T25 T15 T26 R25 W25 W23 Y23 G23 T16 Y26 Y25 AA26 V24 AA25 AB26 T14 AB25 AC26 W24 AC25 AD26 AD25
BGA388/SOCKET MT8205
12
Pin Descriptions 2.3 Pin Descriptions Table 2-1 provides detail video/audio port pin descriptions. Table 2-1 video/audio port pin descriptions.
Pin E24 C25 C26 A25 A26 B26 B25 B24 A3 A2 A1 C1 C2 Symbol AOMCLK AOLRCK AOBCK AOSDATA0 AOSDATA1 AOSDATA2 AOSDATA3 LIN CVBS0P CVBS1P CVBS2P SIF AF Type O O O O O O O I I I I I I Audio out master clock Audio out left-right clock Audio out bit clock Audio out data line 0 Audio out data line 1 Audio out data line 2 Audio out data line 3 Audio line in Composite Video input 0 Composite Video input 1 Composite Video input 2 Tuner Sound Tuner Sound SIF AF Description
13
AT24C01A/02/04/08/16
Features
Low Voltage and Standard Voltage Operation 5.0 (VCC = 4.5V to 5.5V) 2.7 (VCC = 2.7V to 5.5V) 2.5 (VCC = 2.5V to 5.5V) 1.8 (VCC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) 2-Wire Serial Interface Bidirectional Data Transfer Protocol 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility Write Protect Pin for Hardware Data Protection 8-Byte Page (1K, 2K), 16-Byte Page (4K, 8K, 16K) Write Modes Partial Page Writes Are Allowed Self-Timed Write Cycle (10 ms max) High Reliability Endurance: 1 Million Cycles Data Retention: 100 Years Automotive Grade and Extended Temperature Devices Available 8-Pin and 14-Pin JEDEC SOIC and 8-Pin PDIP Packages
2-Wire Serial CMOS E2PROM

1K (128 x 8) 2K (256 x 8) 4K (512 x 8)
Description
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C01A/02/04/08/16 is available in space saving 8-pin PDIP, 8-pin and 14-pin SOIC packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
8K (1024 x 8) 16K (2048 x 8)
AT24C01A/2/4/8/16
Pin Configurations
Pin Name A0 to A2 SDA SCL WP NC Function Address Inputs Serial Data Serial Clock Input Write Protect No Connect
8-Pin PDIP
14-Pin SOIC 8-Pin SOIC
0180C
2-25
Absolute Maximum Ratings*

Operating Temperature................... -55C to +125C Storage Temperature...................... -65C to +150C Voltage on Any Pin with Respect to Ground ..................... -0.1V to +7.0V Maximum Operating Voltage ........................... 6.25V DC Output Current ......................................... 5.0 mA
*NOTICE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Block Diagram
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each E2PROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices. DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). 2-26 The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect. The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins are no connects. The AT24C16 does not use the device address pins which limits the number of devices on a single bus to one. The A0, A1 and A2 pins are no connects. (continued)
AT24C01A/02/04/08/16
MX29LV160BT/BB
16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
FEATURES
Extended single - supply voltage range 2.7V to 3.6V 2,097,152 x 8/1,048,576 x 16 switchable Single power supply operation - 3.0V only operation for read, erase and program operation Fully compatible with MX29LV160A device Fast access time: 70/90ns Low power consumption - 30mA maximum active current - 0.2uA typical standby current Command register architecture - Byte/word Programming (9us/11us typical) - Sector Erase (Sector structure 16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and 64K-Byte x31) Auto Erase (chip & sector) and Auto Program - Automatically erase any combination of sectors with Erase Suspend capability. - Automatically program and verify data at specified address Erase Suspend/Erase Resume - Suspends sector erase operation to read data from, or program data to, any sector that is not being erased, then resumes the erase. Status Reply - Data polling & Toggle bit for detection of program and erase operation completion. Ready/Busy pin (RY/BY) - Provides a hardware method of detecting program or erase operation completion. Sector protection - Hardware method to disable any combination of sectors from program or erase operations - Temporary sector unprotect allows code changes in previously locked sectors. CFI (Common Flash Interface) compliant - Flash device parameters stored on the device and provide the host system to access 100,000 minimum erase/program cycles Latch-up protected to 100mA from -1V to VCC+1V Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector Low VCC write inhibit is equal to or less than 1.4V Package type: - 44-pin SOP - 48-pin TSOP - 48-ball CSP Compatibility with JEDEC standard - Pinout and software compatible with single-power supply Flash 10 years data retention
GENERAL DESCRIPTION
The MX29LV160BT/BB is a 16-mega bit Flash memory organized as 2M bytes of 8 bits or 1M words of 16 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV160BT/BB is packaged in 44-pin SOP, 48-pin TSOP and 48-ball CSP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29LV160BT/BB offers access time as fast as 70ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29LV160BT/BB has separate chip enable (CE) and output enable (OE) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29LV160BT/BB uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cycling. The MX29LV160BT/BB uses a 2.7V~3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.
P/N:PM1041
REV. 1.2, JUL. 01, 2004
LP2996 DDR Termination Regulator
November 2003
LP2996 DDR Termination Regulator

General Description
The LP2996 linear regulator is designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2996 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs. An additional feature found on the LP2996 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current.
Features
n n n n n n n n Source and sink current Low output voltage offset No external resistors required Linear topology Suspend to Ram (STR) functionality Low external component count Thermal Shutdown Available in SO-8, PSOP-8 or LLP-16 packages
Applications
n DDR-I and DDR-II Termination Voltage n SSTL-2 and SSTL-3 Termination n HSTL Termination
Typical Application Circuit
20057518
2003 National Semiconductor Corporation
DS200575
www.national.com
TS5V330 QUAD SPDT WIDE BANDWIDTH VIDEO SWITCH WITH LOW ON STATE RESISTANCE
SCDS164A MAY 2004 REVISED MAY 2004
D Low Differential Gain and Phase D D D D D D D D D D D

(DG = 0.64%, DP = 0.1 Degrees Typ) Wide Bandwidth (BW = 300 MHz Min) Low Crosstalk (XTALK = 63 dB Typ) Low Power Consumption (ICC = 3 A Max) Bidirectional Data Flow, With Near-Zero Propagation Delay Low ON-State Resistance (ron = 3 Typ) VCC Operating Range From 4.5 V to 5.5 V Ioff Supports Partial-Power-Down Mode Operation Data and Control Inputs Provide Undershoot Clamp Diode Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 2000-V Human-Body Model (A114-B, Class II) 1000-V Charged-Device Model (C101) Suitable for Both RGB and Composite-Video Switching
D, DBQ, OR PW PACKAGE (TOP VIEW)
IN S1A S2A DA S1B S2B DB GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC EN S1D S2D DD S1C S2C DC
RGY PACKAGE (TOP VIEW)
IN
16 15 EN 14 S2D 13 S2D 12 DD 11 S1C 10 S2C
S1A S2A DA S1B S2B DB
2 3 4 5 6 7 8 9
description/ordering information
The TI TS5V330 video switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (EN) input. When EN is low, the switch is enabled and the D port is connected to the S port. When EN is high, the switch is disabled and the high-impedance state exists between the D and S ports. The select (IN) input controls the data path of the multiplexer/demultiplexer. ORDERING INFORMATION
TA QFN RGY SOIC D 40C to 85C SSOP (QSOP) DBQ TSSOP PW PACKAGE Tape and reel Tube Tape and reel Tape and reel Tube Tape and reel ORDERABLE PART NUMBER TS5V330RGYR TS5V330D TS5V330DR TS5V330DBQR TS5V330PW TS5V330PWR TE330 TS5V330 TE330 TOP-SIDE MARKING TE330
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2004, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
GND
DC
VCC
19-0175; Rev 3; 5/96
15kV ESD-Protected, +5V RS-232 Transceivers

_______________General Description
The MAX202EMAX213E, MAX232E/MAX241E line drivers/receivers are designed for RS-232 and V.28 communications in harsh environments. Each transmitter output and receiver input is protected against 15kV electrostatic discharge (ESD) shocks, without latchup. The various combinations of features are outlined in the Selection Guide. The drivers and receivers for all ten devices meet all EIA/TIA-232E and CCITT V.28 specifications at data rates up to 120kbps, when loaded in accordance with the EIA/TIA-232E specification. The MAX211E/MAX213E/MAX241E are available in 28pin SO packages, as well as a 28-pin SSOP that uses 60% less board space. The MAX202E/MAX232E come in 16-pin narrow SO, wide SO, and DIP packages. The MAX203E comes in a 20-pin DIP/SO package, and needs no external charge-pump capacitors. The MAX205E comes in a 24-pin wide DIP package, and also eliminates external charge-pump capacitors. The MAX206E/MAX207E/MAX208E come in 24-pin SO, SSOP, and narrow DIP packages. The MAX232E/ MAX241E operate with four 1F capacitors, while the MAX202E/MAX206E/MAX207E/MAX208E/MAX211E/ MAX213E operate with four 0.1F capacitors, further reducing cost and board space.
____________________________Features
o ESD Protection for RS-232 I/O Pins: 15kVHuman Body Model 8kVIEC1000-4-2, Contact Discharge 15kVIEC1000-4-2, Air-Gap Discharge o Latchup Free (unlike bipolar equivalents) o Guaranteed 120kbps Data RateLapLink Compatible o Guaranteed 3V/s Min Slew Rate o Operate from a Single +5V Power Supply
MAX202EMAX213E, MAX232E/MAX241E
_________________Pin Configurations
TOP VIEW
C1+ 1 V+ 2 C1- 3 C2+ 4 C2- 5 V- 6 T2OUT 7 R2IN 8 16 VCC 15 GND 14 T1OUT
MAX202E MAX232E
13 R1IN 12 R1OUT 11 T1IN 10 T2IN 9 R2OUT
________________________Applications
Notebook, Subnotebook, and Palmtop Computers Battery-Powered Equipment Hand-Held Equipment
Ordering Information appears at end of data sheet.
DIP/SO Pin Configurations and Typical Operating Circuits continued at end of data sheet.
_____________________________________________________________Selection Guide
PART MAX202E MAX203E MAX205E MAX206E MAX207E MAX208E MAX211E MAX213E MAX232E MAX241E No. of RS-232 DRIVERS 2 2 5 4 5 4 4 4 2 4 No. of RS-232 RECEIVERS 2 2 5 3 3 4 5 5 2 5 RECEIVERS ACTIVE IN SHUTDOWN 0 0 0 0 0 0 0 2 0 0 No. of EXTERNAL CAPACITORS 4 (0.1F) None None 4 (0.1F) 4 (0.1F) 4 (0.1F) 4 (0.1F) 4 (0.1F) 4 (1F) 4 (1F) LOW-POWER SHUTDOWN No No Yes Yes No No Yes Yes No Yes TTL THREESTATE No No Yes Yes No No Yes Yes No Yes
LapLink is a registered trademark of Traveling Software, Inc.

________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
15kV ESD-Protected, +5V RS-232 Transceivers MAX202EMAX213E, MAX232E/MAX241E

Table 3. DB9 Cable Connections Commonly Used for EIA/TIAE-232E and V.24 Asynchronous Interfaces
PIN CONNECTION Received Line Signal Detector (sometimes called Carrier Detect, DCD) Receive Data (RD) Transmit Data (TD) Data Terminal Ready Signal Ground Data Set Ready (DSR) Request to Send (RTS) Clear to Send (CTS) Ring Indicator
Handshake from DCE
2 3 4 5 6 7 8 9
Data from DCE Data from DTE Handshake from DTE Reference point for signals Handshake from DCE Handshake from DTE Handshake from DCE Handshake from DCE
____________Pin Configurations and Typical Operating Circuits (continued)

TOP VIEW
+5V INPUT 0.1F 16 1 0.1F* 6.3V C1+ 1 V+ 2 C1- 3 C2+ 4 C2- 5 V- 6 T2OUT 7 R2IN 8 16 VCC 15 GND 14 T1OUT 11 TTL/CMOS INPUTS 10 T2IN T2 T2OUT 7 0.1F* 16V 3 4 5 C1+ VCC V+ 2 +10V -10V 0.1F* 16V +5V TO +10V C1- VOLTAGE DOUBLER C2+ +10V TO -10V C2- VOLTAGE INVERTER 0.1F* 6.3V
V-
MAX202E MAX232E
13 R1IN 12 R1OUT 11 T1IN 10 T2IN 9 R2OUT TTL/CMOS OUTPUTS
T1IN
T1
T1OUT 14 RS-232 OUTPUTS
12
R1OUT
R1 5k
R1IN 13 RS-232 INPUTS
DIP/SO
R2OUT
R2 5k
R2IN
PIN NUMBERS ON TYPICAL OPERATING CIRCUIT REFER TO DIP/SO PACKAGE, NOT LCC. * 1.0F CAPACITORS, MAX232E ONLY.
GND 15
14
______________________________________________________________________________________
Issued Date: September 18, 2003 Model No.: V270W - L03
Approval
TFT LCD Approval Specification
MODEL NO.: V270W1 - L03

Customer: Approved by: Note:
LCD TV Marketing and Project Management Dept. Project Manager
- CONTENTS -
1 / 26
The information described in this technical specification is tentative and it is possible to be changed without prior notice. Please contact CMO s representative while your product design is based on this specification. Version 2.0
Approval
- CONTENTS REVISION HISTORY 1. GENERAL DESCRIPTION
1.1 OVERVIEW 1.2 FEATURES 1.3 APPLICATION 1.4 GENERAL SPECIFICATIONS 1.5 MECHANICAL SPECIFICATIONS -------------------------------------------------------------------------------------------------------------
3 4
2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT 2.2 ELECTRICAL ABSOLUTE RATINGS 2.2.1 TFT LCD MODULE 2.2.2 BACKLIGHT UNIT
-------------------------------------------------------
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE 3.2 BACKLIGHT UNIT
-------------------------------------------------------
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE 4.2 BACKLIGHT UNIT
-------------------------------------------------------
10
5. INPUT TERMINAL PIN ASSIGNMENT

5.1 TFT LCD MODULE 5.2 BACKLIGHT UNIT 5.3 BLOCK DIAGRAM OF INTERFACE 5.4 LVDS INTERFACE 5.5 COLOR DATA INPUT ASSIGNMENT
-------------------------------------------------------
11
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS 6.2 POWER ON/OFF SEQUENCE
-------------------------------------------------------
15
7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS 7.2 OPTICAL SPECIFICATIONS
-------------------------------------------------------
17
8. PACKAGING
8.1 PACKING SPECIFICATIONS 8.1 PACKING METHOD
-------------------------------------------------------
21
9. DEFINITION OF LABELS
9.1 CMO MODULE LABEL
-------------------------------------------------------
23
10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS 10.2 SAFETY PRECAUTIONS
-------------------------------------------------------
24
11. MECHANICAL CHARACTERISTICS
-------------------------------------------------------
25
2 / 26
Approval
REVISION HISTORY
Version Ver 1.0 Ver 2.0 Date August 1,03 Sep. 18,03 Page Section Description (New) All 17 All 7.2 Preliminary Specification is first issued. Contrast ratio:Typ. (600) 600 Response time TR:Typ. (15) 15 TF: Typ. (10) 10 Gray to Gray: Typ (16.6) 16.6 Center Luminance of White: Min. (450) 450 Typ. (550) 550 Average Luminance of White: Min. (400) 400 Typ. (450) 450
Color Chromaticity Min. Typ. Max. Red Rx (0.616)(0.646)(0.676) Ry (0.302)(0.332)(0.362) Green Gx(0.239)(0.269)(0.299) Gy(0.570)(0.600)(0.630) Blue Bx(0.112)(0.142)(0.172) By(0.042)(0.072)(0.102)
Viewing Angle Horizontal x+ Typ. (85) 85 x- Typ. (85) 85 Vertical Y+ Typ. (85) 85 Y- Typ. (85) 85 Shock (Non-Operating) Max. Value (100) 100 Vibration (Non-Operating) Max. Value (1.0) 1.0
Min.
Typ.
Max.
0.616 0.302 0.239 0.570 0.112 0.042
0.646 0.332 0.269 0.600 0.142 0.072
0.676 0.362 0.299 0.630 0.172 0.102
2.1
3 / 26
Approval
1. GENERAL DESCRIPTION
1.1 OVERVIEW
V270W1- L03 is a 27 TFT Liquid Crystal Display module with 14-CCFL Backlight unit and 1ch-LVDS interface. This module supports 1280 x 720 WXGA format and can display true 16.7M colors ( 8-bit/color). The inverter module for backlight is build-in.
1.2 FEATURES
- Ultra wide viewing angle Super MVA technology - High brightness (550 nits) - High contrast ratio (600:1) - Fast response time - High color saturation NTSC 75% - WXGA (1280 x 720 pixels) resolution, true HDTV format. - DE (Data Enable) only mode - LVDS (Low Voltage Differential Signaling) interface
1.3 APPLICATION
- TFT LCD TVs
1.4 GENERAL SPECIFICATIONS

Item Active Area Bezel Opening Area Driver Element Pixel Number Pixel Pitch (Sub Pixel) Pixel Arrangement Display Colors Display Operation Mode Surface Treatment Specification 597.12(H) x 335.88 (V) (26.97 diagonal) 603.22 (H) x 341.98 (V) a-si TFT active matrix 1280 x R.G.B. x 720 0.1555 (H) x 0.4665 (V) RGB vertical stripe 16.7M Transmissive mode / Normally black Anti-glare with anti-reflective coating Hard coating (2H), Haze: 40% Reflection Rate: < 2% Unit mm mm pixel mm color Note (1) -
1.5 MECHANICAL SPECIFICATIONS

Item Horizontal(H) Vertical(V) W/O INV Depth(D) W/I INV Weight Min. 40 Typ. 637.55 379.8 40.5 4300 Max. 36 41 Unit mm mm mm mm g Note Module Size Depth(D) -
Module Size
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions. Note (2) Module Depth does not include connectors.
4 / 26
Approval
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Storage Temperature Operating Ambient Temperature Shock (Non-Operating) Vibration (Non-Operating) (a) 90 %RH Max. (Ta 40 C). (b) Wet-bulb temperature should be 39 C Max. (Ta > 40 C). (c) No condensation. Note (2) The temperature of panel display area surface should be 0 C Min. and 60 C Max. Note (3) 2 ms, half sine wave, 1 time for X, Y, Z. Note (4) 10 ~ 500 Hz, 10 min, 1 time each X, Y, Z. Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the module would not be twisted or bent by the fixture. Symbol TST TOP SNOP VNOP Value Min. -20 0 Max. +60 +50 100 1.0 Unit C C G G Note (1) (1), (2) (3), (5) (4), (5)
Note (1) Temperature and relative humidity range is shown in the figure below.
Relative Humidity (%RH)

100 90 80
60
Operating Range
40
20 5 -40 -20 0
Storage Range
20 40 60 80
Temperature (C)
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2.2 ELECTRICAL ABSOLUTE RATINGS 2.2.1 TFT LCD MODULE
Item Power Supply Voltage Logic Input Voltage Symbol Vcc VIN Value Min. -0.3 -0.3 Max. +6.0 4.3 Unit V V Note (1)
2.2.2 BACKLIGHT UNIT

Item Lamp Voltage
On/Off Control Voltage Internal/External PWM Select Voltage Internal PWM Control Voltage External PWM Control Voltage Operating Temperature Storage Temperature
Symbo VL
VBLON VSEL VIPWM VEPWM TOP TST
Test
595% RH 595% RH
Min.
0
Type
Max.
3.0K
Unit
Note
VRMS (1), (2), IL = 4.7 mA
-0.3
0 -30
75 80
(3)
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation should be restricted to the conditions described under Normal Operating Conditions. Note (2) Specified values are for lamp (Refer to 3.2 for further information). Note (3) Protect inverters from moisture condensation and freezing.
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Parameter Power Supply Voltage Ripple Voltage Rush Current White Black Vertical Stripe LVDS differential input high threshold voltage LVDS differential input low threshold voltage LVDS common input voltage Terminating Resistor Power Supply Current Note (2) Measurement Conditions: Symbol Vcc VRP IRUSH lcc VTH VTL Vic RT Min. 4.5 -100 1.125 Value Typ. 5.0 2.1 1.4 1 1.2 1.25 100 Max. 5.5 200 3 +100 1.375 Ta = 25 2 C Unit V mV A A A A mV mV V ohm Note (2) (3)a (3)b (3)c
Note (1) The module should be always operated within above ranges.
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+5.0V Q1 2SK1475 Vcc FUSE R1 47K C3 (LCD Module Input) 1uF
(High to Low) (Control Signal) R2 SW 1K +12V 47K
Q2 2SK1470
VR1 C1
C2
0.01uF 1uF
Vcc rising time is 470s

+5V
0.9Vcc 0.1Vcc
GND 470s
Note (3) The specified power supply current is under the conditions at Vcc = 5 V, Ta = 25 2 C, fv = 60 Hz, whereas a power dissipation check pattern below is displayed. a. White Pattern b. Black Pattern
Active Area
Active Area
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c. Vertical Stripe Pattern
R G B R G B B R G B R G B R B R G B R G B R R G B R G B
Active Area
3.2 BACKLIGHT UNIT

Parameter Lamp Input Voltage Lamp Current Lamp Turn On Voltage Operating Frequency Lamp Life Time Power Consumption Symbol VL IL VS FL LBL PL Min. 1008 4.4 1200 1790 54 50K Value Typ. 1120 4.7 56 92 Max. 1232 5.0 3000 3000 58 Unit
Ta = 25 2 C Note
VRMS IL = 4.7 mA mARMS (1) VRMS (2), Ta = 25 C (2), Ta = 0 C VRMS KHz (3) Hrs (5) W (4), Inverter Input
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
A A A A A A A A A A A A A A
HV (Pink) HV (White) HV (Pink) HV (White) HV (Pink) HV (White) HV (Pink) HV (White) HV (Pink) HV (White) HV (Pink) HV (White) HV (Pink) HV (White)
1 2 1 2 1 2 1 2 1 2 1 2 1 2 LV (Gray)
LCD Module
Inverter
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup.
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Otherwise the lamp may not be turned on. Note (3) The lamp frequency may produce interference with horizontal synchronous frequency from the display, and this may cause line flow on the display. In order to avoid interference, the lamp frequency should be detached from the horizontal synchronous frequency and its harmonics as far as possible. Note (4) PL =(lamp1-lamp14 IL VL )/0.8, PL is based on the inverter efficiency, which is 80%. Note (5) The lifetime of a lamp is defined as the time in which it continues to operate under the condition Ta = 25 2 oC and IL = (4.35) ~ (4.95) mArms until one of the following events occurs: (a) When the brightness becomes equal or less than 50% of its original value. (b) When the effective discharge length becomes equal or less than 80% of its original value. (Effective discharge length is defined as an area that has equal or more than 70% brightness compared to the brightness at the center point.) Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the inverter must have specifications for the modularized lamp. The performance of the Backlight, such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for the lamp. All the parameters of an inverter should be carefully designed to avoid producing too much current leakage from high voltage output of the inverter. When designing or ordering the inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module should be operated in the same manners when it is installed in your instrument.
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4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
SCAN DRIVER IC
LVDS INPUT /
RX0(+/-) RX1(+/-) RX2(+/-) RX3(+/-) RXC(+/-)
OVER DRIVING CONTROLLER /
TIMING CONTROLLER
TFT LCD PANEL (1280x3x720)
INPUT CONNECTOR (JAE-FI-SE30P-HF)
Vcc GND
DATA DRIVER IC DC/DC CONVERTER & REFERENCE VOLTAGE
VL
LAMP CONNECTOR
BACKLIGHT UNIT
4.2 BACKLIGHT UNIT

Lamp connector HV : BHR-03-VS-1(JST) *7 LV : ZHR-2 (JST) *1 1 LV(Gray) 1 HV(Pink) 2 HV(White)
2 HV(White) 1 HV(Pink) 2 HV(White)
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 I25 26 27 28 29 30 Name NC NC NC NC NC NC NC GND RX3+ RX3RXCLK+ RXCLKGND GND RX2+ RX2RX1+ RX1RX0+ RX0GND GND GND GND GND VCC VCC VCC VCC VCC Description No Connection No Connection No Connection No Connection No Connection No Connection No Connection Ground Positive LVDS differential data input. Channel 3 Negative LVDS differential data input. Channel 3 Positive LVDS differential clock input. Negative LVDS differential clock input. Ground Ground Positive LVDS differential data input. Channel 2 Negative LVDS differential data input. Channel 2 Positive LVDS differential data input. Channel 1 Negative LVDS differential data input. Channel 1 Positive LVDS differential data input. Channel 0 Negative LVDS differential data input. Channel 0 Ground Ground Ground Ground Ground +5.0V power supply +5.0V power supply +5.0V power supply +5.0V power supply +5.0V power supply
Note (1) Connector Part No.: FI-SE30P-HF (JAE) Note (2) The first pixel is even.
5.2 BACKLIGHT UNIT

Pin 1 2 Symbol HV HV Description High Voltage High Voltage Color Pink White
Note (1) Connector Part No.: BHR-03VS-1 (JST) or equivalent Note (2) Users connector Part No.: SM02(8.0)B-BHS-1TB (JST) or equivalent Pin 1 2 Symbol LV NC Description Low Voltage No Connection Color Gray
Note (1) Connector Part No.: ZHR-2 (JST) or equivalent Note (2) Users connector Part No.: S2B-ZR-SM3A-TF (JST) or equivalent
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5.3 BLOCK DIAGRAM OF INTERFACE CNF1
Rx0+ R0-R7 G0-G7 B0-B7 DE TxIN Rx0Rx1+ Rx1Rx2+ Rx2Rx3+ Rx3Host Graphics Controller LVDS Transmitter THC63LVDM83A (LVDF83A)
R0~R7 G0~G7 B0~B7 DE : Pixel R Data : Pixel G Data : Pixel B Data : Display timing signal
51
100pF
RxOUT
51 51
100pF
R0-R7 G0-G7 B0-B7 DE
51 51
100pF
51 51
100pF
51
CLK+ PLL CLK-
51
100pF
PLL
DCLK Timing Controller
51
LVDS Receiver THC63LVDF84A
Notes: 1) The system must have the transmitter to drive the module. 2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is used differentially.
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5.4 LVDS INTERFACE
SIGNAL TRANSMITTER THC63LVDM83A PIN INPUT INTERFACE CONNECTOR Host TFT-LCD PIN RECEIVER THC63LVDF84A OUTPUT TFT CONTROL INPUT
R0 R1 R2 R3 R4 R5 G0 G1 G2 G3 G4 G5 B0 B1 B2 B3 B4 24bit B5 DE R6 R7 G6 G7 B6 B7 RSVD 1 RSVD 2 RSVD 3
51 52 54 55 56 3 4 6 7 11 12 14 15 19 20 22 23 24 30 50 2 8 10 16 18 25 27 28
TxIN0 TxIN1 TxIN2 TxIN3 TxIN4 TxIN6 TxIN7 TxIN8 TxIN9 TxIN12 TxIN13 TxIN14 TxIN15 TxIN18 TxIN19 TxIN20 TxIN21 TxIN22 TxIN26 TxIN27 TxIN5 TxIN10 TxIN11 TxIN16 TxIN17 TxIN23 TxIN24 TxIN25
TA OUT0+ TA OUT0-
Rx 0+ Rx 0-
TA OUT1+ TA OUT1-
Rx 1+ Rx 1-
TA OUT2+ TA OUT2-
Rx 2+ Rx 2-
TA OUT3+ TA OUT3-
Rx 3+ Rx 3-
27 29 30 32 33 35 37 38 39 43 45 46 47 51 53 54 55 1 6 7 34 41 42 49 50 2 3 5
Rx OUT0 Rx OUT1 Rx OUT2 Rx OUT3 Rx OUT4 Rx OUT6 Rx OUT7 Rx OUT8 Rx OUT9 Rx OUT12 Rx OUT13 Rx OUT14 Rx OUT15 Rx OUT18 Rx OUT19 Rx OUT20 Rx OUT21 Rx OUT22 Rx OUT26 Rx OUT27 Rx OUT5 Rx OUT10 Rx OUT11 Rx OUT16 Rx OUT17 Rx OUT23 Rx OUT24 Rx OUT25
R0 R1 R2 R3 R4 R5 G0 G1 G2 G3 G4 G5 B0 B1 B2 B3 B4 B5 DE R6 R7 G6 G7 B6 B7 Not connect Not connect Not connect
DCLK
31
TxCLK IN
TxCLK OUT+ RxCLK IN+ 26 TxCLK OUT- RxCLK IN-
RxCLK OUT
DCLK
R0~R7: Pixel R Data (7; MSB, 0; LSB) G0~G7: Pixel G Data (7; MSB, 0; LSB) B0~B7: Pixel B Data (7; MSB, 0; LSB) DE : Display timing signal
Notes: 1)RSVD(reserved)pins on the transmitter shall be H or L.
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5.5 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for the color. The higher the binary input, the brighter the color. The table below provides the assignment of color versus data input. Color Black Red Green Basic Blue Colors Cyan Magenta Yellow White Red(0) / Dark Red(1) Red(2) Gray : Scale : Of Red(253) Red Red(254) Red(255) Green(0) / Dark Green(1) Green(2) Gray : Scale : Of Green(253) Green Green(254) Green(255) Blue(0) / Dark Blue(1) Blue(2) Gray : Scale : Of Blue(253) Blue Blue(254) Blue(255) 0 1 0 0 0 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 1 0 0 0 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 1 0 0 0 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 Red 0 1 0 0 0 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 1 0 0 0 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 1 0 0 0 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 1 0 0 0 1 1 1 0 0 1 : : 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 1 0 0 0 1 1 1 0 1 0 : : 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 1 0 1 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 1 0 1 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 Data Signal Green 0 0 1 0 1 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 1 0 1 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 1 0 1 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 1 0 1 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 1 0 1 0 1 1 0 0 0 : : 0 0 0 0 0 1 : : 0 1 1 0 0 0 : : 0 0 0 0 0 1 0 1 0 1 1 0 0 0 : : 0 0 0 0 1 0 : : 1 0 1 0 0 0 : : 0 0 0 0 0 0 1 1 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 1 1 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 1 1 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 Blue 0 0 0 1 1 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 1 1 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 1 1 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 1 1 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 1 : : 0 1 1 0 0 0 1 1 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 1 0 : : 1 0 1
R7 R6 R5 R4 R3 R2 R1 R0 R7 R6 G5 G4 G3 G2 G1 G0 R7 R6 B5 B4 B3 B2 B1 B0
Note (1) 0: Low Level Voltage, 1: High Level Voltage
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram. Signal Clock Vertical Active Display Term Item Frequency Frame Rate Total Display Blank Total Display Blank Symbol 1/Tc Fr Tv Tvd Tvb Th Thd Thb Min. 70 48 730 720 10 1450 1280 170 Typ. 74.25 60 750 720 30 1650 1280 370 Max. 80 850 720 130 2000 1280 720 Unit Note MHZ Hz Tv=Tvd+Tvb Th Th Th Tc Th=Thd+Thb Tc Tc -
Horizontal Active Display Term
Note: Because of this module is operated by DE only mode, Hsync and Vsync input signals should be set to low logic level or ground. Otherwise, this module would operate abnormally.
INPUT SIGNAL TIMING DIAGRAM
Tv Tvd Tvb
DE Th
DCLK Tc DE Thb Thd
DATA
Valid display data (1280 clocks)
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6.2 POWER ON/OFF SEQUENCE To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the diagram below.
Power Supply VCC

0V 0T110ms 0T250ms 0T350ms 1sT4
0.9 VCC 0.1VCC
0.9 VCC 0.1VDD
T1
T3
T2
T4
Signals
0V
VALID
Power Off
Power On
Backlight (Recommended) 450msT5 100msT6

T5
50%
50%
T6
Power ON/OFF Sequence
Note. (1) The supply voltage of the external system for the module input should be the same as the definition of Vcc.
(2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD operation of the LCD turns off before the backlight turns off, the display may momentarily become abnormal screen. (3) In case of VCC = off level, please keep the level of input signals on the low or keep a high impedance. (4) T4 should be measured after the module has been fully discharged between power of and on period. (5) Interface signal shall not be kept at high impedance when the power is on.
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Ambient Temperature Ambient Humidity Supply Voltage Input Signal Inverter Current Inverter Driving Frequency Inverter Symbol Value Unit o Ta C 252 Ha %RH 5010 VCC 5.0 V According to typical value in "3. ELECTRICAL CHARACTERISTICS" IL 4.7 mA FL 56 KHz --
7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should be measured under the test conditions described in 7.1 and stable environment shown in Note (7). Item Contrast Ratio Response Time Center Luminance of White Average Luminance of White White Variation Cross Talk Red Color Chromaticity Green Blue White Viewing Angle Horizontal Vertical Symbol CR TR TF Gray to gray LC LAVE W CT Rx Ry Gx Gy Bx By Wx Wy x+ xY+ YCondition Min. 400 Typ. 600 15 10 16.6 450 400 0.616 0.302 0.239 0.570 0.112 0.042 0.255 0.263 550 450 0.646 0.332 0.269 0.600 0.142 0.072 0.285 0.293 85 85 85 85 Max. 25 20 Unit ms ms ms Note
Note(2) Note(3) Note(4)
x=0, Y =0 Viewing Normal Angle
CR10
cd/m2 Note(5) cd/m2 Note(8) 1.6 Note(6) 4.0 % 0.676 0.362 0.299 0.630 0.172 0.102 0.315 9, 300K 0.323 No gray scale Deg. inversion -
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Note (1) Definition of Viewing Angle (x, y): Viewing angles are measured by Eldim EZ-Contrast 160R Normal x = y = 0 yX- = 90 xx x+ y+ y+ 12 oclock direction y+ = 90
6 oclock y- = 90
y-
x+
X+ = 90
Note (2) Definition of Contrast Ratio (CR): The contrast ratio can be calculated by the following expression. Contrast Ratio (CR) = L255 / L0 L255: Luminance of gray level 255 L 0: Luminance of gray level 0 CR = CR (5) CR (X) is corresponding to the Contrast Ratio of the point X at the figure in Note (8). Note (3) Definition of Response Time (TR, TF):
Gray Level 255

100% 90%
Gray Level 255
Optical Response Gray Level 0

10% 0%
TF
TR
Time
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Note (4) Definition of Gray to Gray Switching Time:
Drive signal of LCD Panel
Time
100% 90%
Optical Response
10% 0%
Gray to gray switching time
Gray to gray switching time
Time
The driving signal means the signal of gray level 0,63,127,191,255. Note (5) Definition of Luminance of White (LC, LAVE): Measure the luminance of gray level 255 at center point and 5 points LC = L (5) LAVE = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5 L (x) is corresponding to the luminance of the point X at the figure in Note (8). Note (6) Definition of Cross Talk (CT): CT = | YB YA | / YA 100 (%) Where: YA = Luminance of measured location without gray level 0 pattern (cd/m2) YB = Luminance of measured location with gray level 0 pattern (cd/m2) Active Area
YA, U (D/2,W/8)
(0, 0)
(0, 0) (D/4,W/4)
Active Area
YB, U (D/2,W/8)
YA, L (D/8,W/2)
Gray 128
YB, L (D/8,W/2) YA, R (7D/8,W/2) YB, D (D/2,7W/8) (D,W)
Gray 0 0 Gray
Gray 128
YB, R (7D/8,W/2) (3D/4,3W/4)
YA, D (D/2,7W/8)
(D,W)
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Note (7) Measurement Setup: The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature change during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight for 1 hour in a windless room.
LCD Module LCD Panel Center of the Screen Display Color Analyzer (Minolta CA210)
Light Shield Room (Ambient Luminance < 2 lux)
Note (8) Definition of White Variation (W): Measure the luminance of gray level 255 at 5 points W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Horizontal Line D
D/4 D/2 3D/4
Vertical Line
W/4
2 X
W/2
: Test Point X=1 to 5
3W/4
Active Area
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8. PACKAGING 8.1 PACKING SPECIFICATIONS (1) 4 LCD TV Modules / Carton (2) Carton Dimensions : 742(L) X 327 (W) X 510 (H) (3) Weight : Approximately 19Kg ( 4 Modules Per Carton) 8.2 PACKING METHOD Figures 8-1 and 8-2 are the packing method
LCD TV Module
Tape
Carton dimensions: 742(L)x327(W)x510(H)mm Weight : Approx 19Kg(4 modules per 1 carton)
Anti-Static Bag
PE Foam(Bottom)
Drier
Carton
Carton Label
Figure.8-1 packing method
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Corner Protector:L1020*50mm*50mm Pallet:L1100*W1100*H135mm Bottom Cap:L1100*W1100*H120mm Pallet Stack:L1100*W1100*H1163mm Gross Weight:180kg
PE Sheet Carton Label Film
Bottom Cap PP Belt
Figure. 8-2 packing method
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9. DEFINITION OF LABELS
9.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
CHI
MEI
E207943
V270W1
MADE IN TAIWAN
OPTOELECTRONICS
-L03 Rev. XX
MADE IN TAIWAN
XXXXXXXYMDLNNNN
(a) Model Name: V270W1-L03 (b) Revision: Rev. XX, for example: A0, A1 B1, B2 or C1, C2etc. (c) Serial ID: X X X X X X X Y M D L N N N N Serial No. Product Line Year, Month, Date CMO Internal Use CMO Internal Use Revision CMO Internal Use Serial ID includes the information as below: (a) Manufactured Date: Year: 1~9, for 2000~2009 Month: 1~9, A~C, for Jan. ~ Dec. Day: 1~9, A~Y, for 1st to 31st, exclude I ,O, and U. (b) Revision Code: Cover all the change (c) Serial No.: Manufacturing sequence of product (d) Product Line: 1 -> Line1, 2 -> Line 2, etc.
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10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly. (2) It is recommended to assemble or to install a module into the users system in clean working areas. The dust and oil may cause electrical short or worsen the polarizer. (3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and Backlight. (4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the damage and latch-up of the CMOS LSI chips. (5) Do not plug in or pull out the I/F connector while the module is in operation. (6) Do not disassemble the module. (7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily scratched. (8) Moisture can easily penetrate into LCD module and may cause the damage during operation. (9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD modules in the specified storage conditions. (10) When ambient temperature is lower than 10C, the display quality might be reduced. For example, the response time will become slow, and the starting voltage of CCFL will be higher than that of room temperature.
10.2 SAFETY PRECAUTIONS

(1) The startup voltage of a Backlight is approximately 1000 Volts. It may cause an electrical shock while assembling with the inverter. Do not disassemble the module or insert anything into the Backlight unit. (2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap. (3) After the modules end of life, it is not harmful in case of normal operation and storage.
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11. MECHANICAL CHARACTERISTICS
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Exploded View Diagram
SPARE PART LIST

LC26HABCUSXM1-A01 AKAI MICO USA LCT2662(FULL PIP) Unit PCS PCS PCS PCS PCS PCS PCS M M M PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS SET SET SET PCS PCS PCS PCS PCS PCS PCS PCS Quantity 1 1 7 1 1 1 1 0.04 0.105 0.03 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 7 2 1 1 1 1 1 1 2 1 1 1 1 5 Item Component Description/Country Origin , ELECT PART 1 E1301-041090 CAPACITOR EC V A SAII 100M 16DC T05 2 E1501-001001 RESISTOR CBF H 1/6W 100J T52 3 E1501-001004 RESISTOR CBF H 1/6W 103J T52 4 E2509-094001 DIODE LED A D3.0 GR/RD (LT036 5 E2701-023002 DETECTOR IR AT138A 6 E3101-171001 PLUG V HX2007(PH)-12A P2.0 12P WHT 7 E3204-023001 SOCKET AC HF-301 FOR 26LA 8 E3403-001001 TUBE SHRINKABLE D30.0 BLK 600V 9 E3403-004001 TUBE SUMITUBE D5.0 BLK 600V 10 E3403-005001 TUBE SHRINKABLE D20.0 BLK 11 E3421-229007 WIRE ASSY 1H3.96-2KN3 0N2 L400 CJ 12 E3421-925029 WIRE ASSY PH2.0-12Y/12Y L=550MM KEY 13 E3421-925030 WIRE ASSY PH2.0-8Y/8Y 5V/12V L=220 14 E3421-925031 WIRE ASSY PH2.0-5Y/5Y L=250MM 5VSB 15 E3421-925032 WIRE ASSY PH2.0-4Y/4Y L=450MM AMP2 16 E3421-925033 WIRE ASSY PH2.0-12Y/12Y L=250MM IN 17 E3421-925034 WIRE ASSY PH2.0-10Y/10Y L=250MM INV 18 E3421-925035 WIRE ASSY PH2.0-4Y/4Y L=100MM AUDI 19 E3421-925036 WIRE ASSY PH2.0-12Y/12Y L=280MM TU 20 E3421-925037 WIRE ASSY TTJC3-2Y L=450MM SPK-R 21 E3421-925038 WIRE ASSY TJC3-2Y L=850MM SPK-L 22 E3421-925039 WIRE ASSY LVDS L=300MM 30P/30P 23 E3421-925040 WIRE ASSY TJC3-6Y/6Y L=350MM POWER 24 E3421-941001 WIRE ASSY 1KN5-2TKN0 45 L110 BJ 25 E3451-000406 WIRE WD 1672#20 RED L=250MM 26 E3451-000407 WIRE WD 1672#20 BLACK L=250MM 27 E3731-052020 PCB KEY V0 124.5X20.5MM W 1.6MM 2 LA 28 E4101-027001 SWITCH POW MR-22-N2BB-F2 ROCKET 29 E4102-044001 SWITCH TACT H 6*6*5W 30 E4801-123001 SPEAKER 8 OHM 10W D2.5X4" YDT711 (SG 31 E6203-024001 DISPLAY LCD 27" V270W1-L03 32 E7802-004001 PCB ASSY MAIN BOARD FOR 27" LCD MICO 33 E7802-004002 PCB ASSY POWER200 BOARD FOR 27" LCD 34 E7802-004003 PCB ASSY TUNER AMP BOARD FOR 27" LCD , MECH PART 1 200-26LA21-03AV CABINET FRONT SIL (L/S-01) + BLK (SA 2 202-26LA11-01AV BACK CABINET 26LA A (470+70%) 3 206-26LA01-01PV THE BACK COVER SPEAKER 26LA P (470 4 230-26LA11-01RV STAND COVER 26LA R (470+70%) 5 269-290803-01S POWER LENS (D) 2908 6 269-290804-01L SENSOR LENS (D) 2908 7 277-26LA01-01S FUNCTION KNOB 26LA 8 361-101261-01 CABLE TIE
9 370-42D101-01 RUBBER FOOT 20X20X7.0MM 42D1 10 379-972501-01Y SPECIAL RUBBER PARTS SPK 9725 11 379-972502-01Y SPECIAL RUBBER PARTS 9725 12 388-L27AB01-01H POWER PLATE AKAI LC26HAB H 13 389-26LA01-05H PVC PLATE AKAI FOR TERMINAL SHEET LC 14 389-26LA02-01H OTHER PVC PLATE 26LA 15 389-27LA01-01H PVC SHEET FOR BACK CABINET GATE 16 423-27LA07-01 STAND SUPPORT PLATE SPCC 27LA 17 423-27LA08-01 METAL PLATE FOR STAND SUPPORT PLATE 18 423-27LA09-01 METAL PLATE FOR WALL BRACKET 27LA 19 426-27LA11-01 SUPPORT BRACKET FOR POWER JACK 27LA 20 428-27LA11-01 MAIN METAL PLATE FOR PANEL 27LA 21 436-27LA01-01 BACK TERMINAL SHEET 27LA 22 449-27LA01-01 METAL PLATE FOR STAND BASE 23 481-27LA01-01 SHIELD COVER FOR MAIN PCB 27LA TINPL 24 481-27LA02-01 SHIELD COVER FOR POWER PCB 27LA TINP 25 486-M32111-01 NAME PLATE M AKAI 26 521-100105-01 FELT PAPER 100X10X0.5 27 521-150105-01 FELT PAPER 150X10X0.5 28 563-119SERIAL NO. LABEL 29 579-LC2701-02 UPC LABEL (50X23MM) OF UNIT LCT2716 30 579-LC2702-02 UPC LABEL OF G/B LCT2716 31 580-L26AB01-03 IB E FOR AKAI LC26HAB USA MICO 32 590-LC2701-02 WARRANTY CARD AKAI LCT2716 216X279 33 590-LC2701-03 INSERTION CARD AKAI LC26HAB 34 601-305008-00 MACH.SCREW CTS 3X8 BZN + 35 601-305010-00 MACH.SCREW CTS 3X10 BZN + 36 602-305004-10 MACH. SCREW PAN-WASHER M3X4 NIP +H 37 602-305008-10 MACH.SCREW WHR 3X8 NIP + 38 604-305022-00 MACH. SCREW BINDING M3X22MM B ZNP +H 39 604-508022-00 MACH. SCREW BINDING M5X22MM B ZNP +H 1 610-300210-10 TS RBD3X10 A NIP +H 2 614-300108-10 S-TAP SCREW BID 3.0X8 3 614-400412-10 S-TAP.SCREW BID 4X12 D NIP + 4 614-400420-10 S-TAP.SCREW BID 4X20 T NIP + 5 615-400414-10 S-TAP.SCREW BWH 4X14 T NIP + 6 802-005005-20 TAPE 2S T4000 5X50M , PACKING 1 300-27AB01-02C POLYFOAM TOP 27AB 2 300-27AB02-02C POLYFOAM BOTTOM 27AB 3 310-111404-07V POLYBAG 11"X14"X0.04 4 310-453510-07V BAG LAMIFILM 5 510-27LA02-02K GIFT BOX AKAI LCT2716 (MICO) K 7 E3404-157001 AC CORD UL 1.88M MET-4D7+SJT 16AWG/ 8 E7301-010002 BATTERY AAA R03P1.5V <2> 9 E7501-051004 REMOTE CRTL FOR 27" USA LCT2716
PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS PCS RLS PCS PCS PCS PCS PCS PCS PCS SET
4 8 8 1 1 2 1 1 1 2 1 1 1 1 1 1 1 10 25 1 1 2 1 1 1 3 5 30 12 2 8 11 4 40 8 8 0.0198 1 1 1 1 1 1 2 1
If you forget your V-Chip Password

- Omnipotence V-Chip Password: 8205. - Press MENU button. - Press LEFT RIGHT buttons to highlight "MISC" Menu. - Press Up, Down buttons to highlight "Parentald". - Press ENTER button to pop up "Input your Password Please". - Use the Number buttons (0~9) to enter an omnipotence Password. - Press ENTER button to confirm and your can select "CHANGE PASSWORD". - Suggest: Change to your familiar Password again.
Software upgrade
- Connect the RS-232C input jack to an external control device (such as a computer) and software upgrade.
Type of connector; D-Sub 9-pin male

No. 1 2 3 4 5 6 7 8 9 Pin name No connection RXD (Receive data) TXD (Transmit data) DTR (DTE side ready) GND DSR (DCE side ready) RTS (Ready to send) CTS (Clear to send) No Connection
1 5
9 6
RS-232C configurations
7-wire configuration (Standard RS-232C cable) PC PDP PC 3-wire configuration (Not standard) PDP
RXD TXD GND DTR DSR RTS CTS
2 3 5 4 6 7 8
D-Sub 9
2 3 5 6 4 8 7
D-Sub 9
TXD RXD GND DSR DTR CTS RTS
RXD TXD GND DTR DSR RTS CTS
2 3 5 4 6 7 8
D-Sub 9
2 3 5 4 6 7 8
D-Sub 9
TXD RXD GND DTR DSR RTS CTS
Software upgrade Process

- Power Switch OFF. - Connect the serial port of the control device to the RS-232 jack on the LCD-TV back panel. RS-232C connection cables are not supplied with the LCD-TV. - Power Switch ON. The power indicator on the front of the panel should now display red, means that the LCD-TV is in standby mode. - Copy the software (MTKTOOL) to the computer. - Open the software (MTKTOOL.EXE) - Select MTK 8205 and Point "browse" on the interface of the MTKTOOL.exe. - Select the file which will be update. - Point "update" on the interface of the MTKTOOL.exe. - Waiting for the upgrader programing, when it is finished, the bar will display 100%. - After the upgrader is finished, shut down the power switch, take out the RS-232C connection after the power indicator is extinguished.
Note: After upgrading, the first time of power on will be some long.

Service Manual: LCT2662 Model

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Service Manual: LCT2662 Model

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SERVICE MANUAL

PRECAUTIONS DURING SERVICING

X-RAY RADIATION PRECAUTION

MAKE YOUR CONTRIBUTION TO PROTECT THE ENVIRONMENT

PRODUCT SAFETY NOTICE

Goo d ea rth grou nd su ch as th e wat er p ip e , c o n du c t or , etc.

Pl ace this pro be on eac h e x p os ed me t al li c part

AC Leak age Curr ent Check

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

Artwork Ass'y No.

Description Checked By:

: AKAL LCD TV 26 NTSC AC100V-240 V AC USA Electronic Engineer Mechanical Engineer

Approved By: Approved By:

Engineering Manager PM Department Head

DOC Rev NO. 0

The Latest Revision Details Initial Release

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

Production Description Panel Supplier and Model Chips Solution Market

AKAL LCD TV 26 NTSC AC100V-240VAC USA

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

7. Safety standard 8. EMC standard 9. Performance standard 10. Accessories

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

Picture Horizontal (Hz) Vertical (Hz)

8. Panel 9. Speaker 10.Operating temperature

Internal Fulfill all specifications

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

Attachment 1Electrical & Optical Specification

300 260 410 320 450 400

Color Coordination View Angle(Lo/3) Overscan Picture position

0.295 0.300 170

0.2950.02 0.3000.02 170 94~98 3 200 6 0.2~12

YW Horizontal Vertical Cross hatch signal In all direction

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

No obvious vibration noise can be heard

KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE

LVDS SIGNAL LVDS PANEL

Backlight COD_VOUTR Audio Board COD_VOUTL

Rev V0.1 V0.2 1.FIRST VERSION

Date 2004/11/29 2005/03/09

MT8205E (PBGA388) LCDTV BOARD 4 LAYERS

VCC J24 1 2 3 4 5 6 7 8 DIP8/P2.0 5x1 W/HOUSING DIP5/W/H/P2.0

ORO7 High :POWER OFF ORO7 LOW :POWER ON

UP3_0 BLACKLIGHT ON/OFF MUTE<-->UP1_5

L14 TUNER_12V FB BEAD/SMD/0805 CE17 47uF/16v

4x1 W/HOUSING DIP4/W/H/P2.0

0.1uF 0.1uF 0.1uF 0.1uF

LCD TV - MediaTek MT8205 Solution

Rev V0.1 Sheet 1 of 16

Power ON alive source

L8 3 IN OUT 2 FB BEAD/SMD/0805 + CE4 220uF/16v + CB4 0.1uF SOT223/SMD CE5 220uF/16v

FB BEAD/SMD/0805 CB200 0.1uF SOT223/SMD + CE118 220uF/16v CB201 0.1uF

L9 D2 L10 R325 +12V

+ SWC SWE TC GND 1 2 3 4

LCD TV - MediaTek MT8205 Solution

Rev V0.1 Sheet 2 of 16

9 8,9 8,9 8,9 8,9 8 8 6,15 7 7 7 7 7 7 7 7 7 7 7 7 7 7 6 6 16 16 16 6

GND AVCM ADCVDD0 CVBS2CVBS2+ CVBS1CVBS1+ CVBS0CVBS0+ GND

ADCVDD0 SCSC+ SYSY+ GND

ADCVDD0 REDRED+ GREENGREEN+ VGASOG BLUEBLUE+ GND

AUXTOP AUXBOTTOM REXTA APLL_CAP

AUXTOP AUXBOTTOM REXTA APLL_CAP

AVCM VOCM VICM