6.

012 Microelectronic Devices and Circuits Fall 2005

Lecture 201

Lecture 20 Transistor Ampliers (II) Other Amplifier Stages November 17, 2005 Contents: 1. Commonsource amplier (cont.) 2. Commondrain amplier 3. Commongate amplier

Reading assignment: Howe and Sodini, Ch. 8, 8.78.9

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 202

Key questions What other amplier stages can one build with a sin gle MOSFET and a current source? What is the uniqueness of these other stages?

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 203

1. Commonsource amplier with currentsource supply

VDD

iSUP signal source RS vs VGG iD + vOUT signal load RL

VSS

Loadline view:
iSUP=ID load line VGG-VSS=VDD-VSS

ISUP

VGG-VSS

VGG-VSS=VT 0 VSS VDD VOUT

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 204

Current source characterized by high output resistance: roc. Then, unloaded voltage gain of commonsource stage: |Avo | = gm (ro //roc ) signicantly higher than amplier with resistive supply. Can implement current source supply by means of p channel MOSFET:
VDD

VB signal source RS vs VGG

iSUP

iD

+ vOUT

VSS

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 205

Relationship between circuit gures of merit and device parameters Remember: gm = 2

W nCox ID L

1 L ro nID ID Then: Circuit Parameters Device |Avo | Rin Rout Parameters gm (ro//roc ) ro//roc ISU P
W

nCox

L
adjustments are made to VGG so none of the other parameters change CS amp with current supply source is good voltage am plier (Rin high and |Av | high), but Rout high too voltage gain degraded if RL ro//roc .

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 206

Commonsource amplier is acceptable voltage amplier (want high Rin, high Avo , low Rout ):
RS + vin Rout + vout

vs

Rin

Avovin

RL

... but excellent transconductance amplier (want high Rin, high Gmo , high Rout ):
RS + vin iout

vs

Rin

Gmovin

Rout

RL

For commonsource amplier: Gmo = gm

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 207

Commonsource amplier does not work as transresis tance amplier (want low Rin, high Rmo , low Rout ):
iin Rout + vout

is

RS

Rin

Rmoiin

RL

nor as current amplier (want low Rin, high Aio , high Rout ):
iin iout

is

RS

Rin

Aioiin

Rout

RL

Need new amplier congurations.

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 208

2. Commondrain amplier

VDD signal source RS signal load RL

vs iSUP

+ vOUT

VGG VSS

How does it work? VGG, ISU P , and W/L selected to bias MOSFET in saturation, obtain desired output bias point, and de sired output swing. vG iD cant change vOU T (source follower) to rst order, no voltage gain: vout vs but Rout small: eective voltage buer stage (good for making voltage amp in combination with commonsource stage).

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 209

Smallsignal analysis Unloaded smallsignal equivalent circuit model:

+ +

G gmvgs

vgs vin
- S

ro
+

roc
-

vout
-

+ vgs -

vin
-

gmvgs

ro//roc

vout
-

vin = vgs + vout vout = gmvgs(ro //roc) Then: Avo = gm 1 1 gm + ro //roc

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2010

Input impedance: Rin = Output impedance:

+ + vgs -

it
+

RS

vin
-

gmvgs

ro//roc

vt

vgs=-vt effectively:
resistance of
value 1/gm
it
+

gmvt

ro//roc

vt

Rout small!

1 1 = 1 gm + ro //roc gm

Loaded voltage gain: Av = Avo RL RL 1 1 RL + Rout RL + gm

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2011

Eect of back bias: If MOSFET not fabricated on isolated pwell, then body is tied up to wafer substrate (connected to VSS ):
VDD signal source RS VSS vs iSUP vOUT VGG VSS + signal load RL

Two consequences: Bias aected: VT depends on VBS = VSS VOU T = 0 Smallsignal gures of merit aected: signal shows up between B and S (vbs = vout).

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2012

Smallsignal equivalent circuit model:

G gmvgs gmbvbs
D

vgs vin
- S -

ro
+

vbs
+B

roc

vout
-

vbs=-vout

+ vgs -

vin
-

gmvgs

gmbvout

ro//roc

vout
-

gm gm Avo = <1 1 gm + gmb + ro //roc gm + gmb Also: Rout = 1

1 gm + gmb + ro //roc

1 gm + gmb

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2013

Relationship between circuit gures of merit and device parameters: gm =

2

W nCox ID L

gmb

= gm 2 2p VBS

Circuit Parameters Device |Avo | Rin Rout 1 Parameters gmgm mb

gm+gmb +g ISU P W nCox L
adjustments are made to VGG so none of the other parameters change CD amp useful as a voltage buer to drive small loads (in a multistage amp, other stages will be used to provide voltage gain).

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2014

3. Commongate amplier Need to handle currentmode signal sources:

VDD

iSUP iOUT VSS signal source is RS signal load RL

IBIAS

VSS

How does it work? since source is signal input terminal, body cannot be tied up to source (Cdb is signicant) iSU P , IBIAS , and W/L selected to bias MOSFET in saturation, obtain desired output bias point, and de sired output swing iS iD iOU T no current gain: is = iout (current buer)

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2015

Bias: select ISU P , IBIAS , and W/L to get proper qui escent IOU T and keep MOSFET in saturation.
VDD

ISUP IOUT VSS

IBIAS

VSS

ISU P + IOU T + IBIAS = 0 Select bias so that IOU T = 0 VOU T = 0. Assume MOSFET in saturation (no channel modulation): ID = W nCox (VGS VT )2 = ISU P = IBIAS 2L

but VT depends on VBS : VT = VT o + n( 2p VBS 2p ) Must solve these two equations iteratively to get VS .

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2016

Smallsignal circuit (unloaded)

+ G D

iout

vgs
- S -

gmvgs

gmbvbs

ro roc

vbs
+ B

is

vbs=vgs

is

vgs
+

gmvgs

gmbvgs

ro

iout

is

gm

gmb

ro

iout

is = iout Aio =

iout = 1 is

Not surprising, since in a MOSFET: ig = 0.

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2017

Input resistance:
+

vgs
+

gmvgs

gmbvgs

ro roc RL

it

vt
-

vgs=-vt

gmvt it vt

gmbvt

ro

roc//RL
-

Do KCL on input node: vt (roc //RL )it it gmvt gmbvt =0 ro Then: 1 + roc //RL 1 ro Rin = gm + gmb + r1o gm + gmb Very small.

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2018

Output resistance:
+

vgs
-

gmvgs

gmbvgs

ro roc
+ -

it vt

RS

vgs
-

gmvgs

gmbvgs

ro
+ -

it' vt'

RS

Do KCL on input node: it Notice also: vgs = itRS Then: Rout 1 = roc//{ro [1+RS (gm +gmb + )]} roc//[ro (1+gm RS )] ro
vt + vgs gmvgs gmb vgs =0 ro

Very large, because of the feedback eect of RS .

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2019

Summary of MOSFET amplier stages:

stage
common source

Avo , Gmo , Aio

Gmo = gm

Rin

Rout
ro //roc

key function
transconductance amp.

common drain

Avo

gm gm +gmb

1 gm +gmb

voltage buer

common gate

Aio 1

1 gm +gmb

roc //[ro(1 + gm RS )]

current buer

In order to design ampliers with suitable performance,

need to combine these stages multistage ampliers

6.012 Microelectronic Devices and Circuits Fall 2005

Lecture 2020

Key conclusions
Dierent MOSFET stages designed to accomplish dier ent goals: Commonsource stage:
large voltage gain and transconductance, high in put resistance, large output resistance excellent transconductance amplier, reasonable volt age amplier Commondrain stage:
no voltage gain, but high input resistance and low output resistance good voltage buer Commongate stage:
no current gain, but low input resistance and high output resistance good current buer