CAR PARK DIGITAL CONTROLLER

2010
CAR PARK DIGITAL
CONTROLLER

MOHAMAD MUDDASSIR
GHOORUN
TP018073
 CAR PARK DIGITAL CONTROLLER

DIGITAL ASSIGNMENT:
CAR PARK CONTROLLER

BY

MOHAMAD MUDDASSIR GHOORUN

MODULE CODE: EE008-3-5-2-DELC

LECTURER: MR. HUSSEIN FADHIL

HAND OUT DATE:14 DEC 09

HAND IN DATE:15 JAN 10

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 CAR PARK DIGITAL CONTROLLER

TABLE OF CONTENTS:
1.OBJECTIVE
2.INTRODUCTION
3.SCHEMATIC OF DESIGN
4.CONSTRUCTION OF THE SYNCHRONOUS BCD UP/DOWN
COUNTER

 TRUTH TABLE
 K-MAPS
5.THE UP DOWN COUNTER
6.TRUTH TABLE AND K-MAP FOR DECODER
7.BCD TO 7-SEGMENT DECODER CIRCUIT
8.THE DISPLAY OUTPUT

 NUMBER OF SLOTS
 FULL DISPLAY
9.FINAL CIRCUIT
10.EXPLANATION OF OTHER PARTS USED
11.PRACTICAL DESIGN
12.CONCLUSION
13.SPECIFICATIONS
14.REFERENCES

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1. OBJECTIVE:

The objective of the assignment is to design and construct a car

park digital controller circuit for 99 car parking slots using sequential and
combinational logic circuits which will receive the digital signals from two
sensors, one allocated in the ENTRANCE and another one in the EXIT of
the car park to display the number of empty slots or to display the word
FULL in case no more empty slots are available .

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 CAR PARK DIGITAL CONTROLLER

2.INTRODUCTION:
The car parking digital controller is a device usually
implemented in order to reduce daily parking commotion by indicating how
many parking slots are available. We could implement this technique in
APIIT’s parking as recently we have been facing some parking issues. This
controller will not only help us to ease the traffic parking issues but will also
drastically reduce the traffic jams due to over-parking sometimes people
face when they want to go out from their parking slots.

This controller may be of great use in public places like universities, malls,
condominiums, and crowded places amongst many others.

This design is based on two BCD up/down counters which receive clock
pulse from the ENTRANCE (EN) and EXIT (EX). The output of these
sensors is HIGH whenever there is a car either entering or leaving the car
park. Both these sensors are connected to a sequential digital circuit and
its output is connected to a decoder which in turn is connected to the 7
segment display to show how many empty slots are available or to display
the word “F U L L” when there is no more available empty slots.

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3.SCHEMATIC OF THE DESIGN:

This schematic is based on three principles:

1. The inputs:

As we’ve mentioned before, the circuit receives signals (or

clock pulse) from both the EN (entrance) and the EX (exit).

2. The combinational logic comprising of the decoder and the counter:

By using K-maps and logic equations, we can either count up

or down according to the incoming input signal from the EX and the
EN. The output of the circuit is then sent to the decoder.

3. The output:

The output of the decoder is then connected to the 7

segment display for the final stage of our design.

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INPUTS

EN EX OUTPUT

COUNTER DECODER
7- SEGMENT
DRIVER

PROCESSING
STAGE

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4.CONSTRUCTION OF THE SYNCHRONOUS

BCD UP/DOWN COUNTER:

 STEP1#

The synchronous BCD up/down counter will count up and down from 0 to
9. The amount of bits required for this design is given by the formula below:

n n
(2 – 1). Therefore, (2 – 1) must be equal to 9.

2n = 10

n = log 10/log 2

n = 3.3

Therefore, the amount of bits required is 4.

Another more simpler method to calculate the amount of bits is to

write the number in binary form. Thus, the number 9 is denoted by
1001. From here also, we can see that we need 4 bits for this
design.

Moreover, the importance of these bits is that each bit will have to
be represented by a flip flop. Hence, we’ll need 4 flip flops.

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 CAR PARK DIGITAL CONTROLLER

 STEP 2#
0000
1001 0001

1000 0010

0111 0011

0110 0100
0101

As we can see from the above diagram, counting is done in both

directions, meaning that when the counter reaches 9 (1001) while
counting up, the next number will be 0 (0000). Also, when counter
is counting down and is at 0 (0000), the next number will be 9
(1001).

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 STEP 3#

TRUTH TABLE FOR THE BCD UP/DOWN COUNTER:

PRESENT NEXT STATES JK INPUTS

STATE UP DOWN UP DOWN
𝑄𝐴 𝑄𝐵 𝑄𝐶 𝑄𝐷 𝑄𝐴 𝑄𝐵 𝑄𝐶 𝑄𝐷 𝑄𝐴 𝑄𝐵 𝑄𝐶 𝑄𝐷 𝐽𝐾𝐴 𝐽𝐾𝐵 𝐽𝐾𝐶 𝐽𝐾𝐷 𝐽𝐾𝐴 𝐽𝐾𝐵 𝐽𝐾𝐶 𝐽𝐾𝐷
0 0 0 0 0 1 0 0 0 1 9 1 0 0 1 0 0 0 1 1 0 0 1
1 0 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 1
2 0 0 1 0 3 0 0 1 1 1 0 0 0 1 0 0 0 1 0 0 1 1
3 0 0 1 1 4 0 1 0 0 2 0 0 1 0 0 1 1 1 0 0 0 1
4 0 1 0 0 5 0 1 0 1 3 0 0 1 1 0 0 0 1 0 1 1 1
5 0 1 0 1 6 0 1 1 0 4 0 1 0 0 0 0 1 1 0 0 0 1
6 0 1 1 0 7 0 1 1 1 5 0 1 0 1 0 0 0 1 0 0 1 1
7 0 1 1 1 8 1 0 0 0 6 0 1 1 0 1 1 1 1 0 0 0 1
8 1 0 0 0 9 1 0 0 1 7 0 1 1 1 0 0 0 1 1 1 1 1
9 1 0 0 1 0 1 0 1 0 8 1 0 0 0 1 0 0 1 0 0 0 1
10 1 0 1 0 X X X X X X X X X X X X X X X X X X
11 1 0 1 1 X X X X X X X X X X X X X X X X X X
12 1 1 0 0 X X X X X X X X X X X X X X X X X X
13 1 1 0 1 X X X X X X X X X X X X X X X X X X
14 1 1 1 0 X X X X X X X X X X X X X X X X X X
15 1 1 1 1 X X X X X X X X X X X X X X X X X X

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 CAR PARK DIGITAL CONTROLLER

 STEP 4#

GETTING THE MOST SIMPLIFIED EXPRESSIONS FROM THE K-

MAP:

 PART 1: FOR THE DOWN COUNT:

𝑄𝐶 𝑄𝐷 𝑄𝐶 𝑄𝐷
𝑄𝐴 𝑄𝐵 00 01 11 10 𝑄𝐴 𝑄𝐵 00 01 11 10
00 1 00
01 01 1
11 X X X X 11 X X X X
10 1 X X 10 1 X X

JKA =B’C’D’ JKB = BC’D’ + AD’

𝑄𝐶 𝑄𝐷
𝑄𝐶 𝑄𝐷
𝑄𝐴 𝑄𝐵 00 01 11 10
𝑄𝐴 𝑄𝐵 00 01 11 10
00 1
00 1 1 1 1
01 1 1
01 1 1 1 1
11 X X X X
11 X X X X
10 1 X X
10 1 1 X X

JKC = BD’+CD’+AD’
JKD = 1

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 PART 2: FOR THE UP COUNTER:

𝑄𝐶 𝑄𝐷 𝑄𝐶 𝑄𝐷
𝑄𝐴 𝑄𝐵 00 01 11 10 𝑄𝐴 𝑄𝐵 00 01 11 10
00 X 00 1
01 X 1 01 1
11 1 X X 11 X X X X
10 X X 10 X X

JKA = BCD + AD JKB = CD

𝑄𝐶 𝑄𝐷 𝑄𝐶 𝑄𝐷

𝑄𝐴 𝑄𝐵 00 01 11 10 𝑄𝐴 𝑄𝐵 00 01 11 10

00 1 1 00 1 1 1 1

01 1 1 01 1 1 1 1

11 X X X X 11 X X X X

10 X X 10 1 1 X X

JKD = 1

JKC = A’D

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5.THE UP DOWN COUNTER:

Using the above equations (both up and down), the following
circuit has been made and tested successfully. The OR gate in the circuit is
to choose which part of the circuit to activate that is we can choose either
the up counter or the down counter.

U13
J1

AND3U7 U16
U14
Key = U U15

OR2
AND3 AND4
AND3
U17

OR2
U1 U2 U3 U4
V1 SET SET SET SET
5V J Q J Q J Q J Q
CLK CLK CLK CLK
K ~Q K ~Q K ~Q K ~Q
RESET RESET RESET RESET
U6

JK_FF JK_FF JK_FF JK_FF

DCD_HEX_DIG_BLUE
U10
U20A

AND4
74LS32N U12 U19
U5

OR3 OR2
AND3
U9
U11
U18
J2 AND3
OR2
U8 OR2
Key = D
AND3

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6.TRUTH TABLE FOR THE DECODER:

Digits INPUTS OUTPUT 7 SEGMENT TERMINALS

A B C D DISPLAY a b c d e f g
0 0 0 0 0 0 1 1 1 1 1 1 0
1 0 0 0 1 1 0 1 1 0 0 0 0
2 0 0 1 0 2 1 1 0 1 1 0 1
3 0 0 1 1 3 1 1 1 1 0 0 1
4 0 1 0 0 4 0 1 1 0 0 1 1
5 0 1 0 1 5 1 0 1 1 0 1 1
6 0 1 1 0 6 1 0 1 1 1 1 1
7 0 1 1 1 7 1 1 1 0 0 0 0
8 1 0 0 0 8 1 1 1 1 1 1 1
9 1 0 0 1 9 1 1 1 1 0 1 1
X X X X X X X X X X X X X
X X X X X X X X X X X X X
X X X X X X X X X X X X X
X X X X X X X X X X X X X
X X X X X X X X X X X X X

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KARNAUGH MAP EXPRESSION

a 𝑏
𝐶𝐷 𝐶𝐷
AB 00 01 11 10 𝐴𝐵 00 01 11 10
00 1 1 1 00 1 1 1 1
01 1 1 1 01 1 1
11 X X X X 11 X X X X
10 1 1 X X 10 1 1 X X

a = A +C +BD + BD 𝑏 = 𝐵 + 𝐶𝐷 + CD

𝑐 𝑑
𝐶𝐷 𝐶𝐷
𝐴𝐵 00 01 11 10 𝐴𝐵 00 01 11 10
00 1 1 1 00 1 1 1
01 1 1 1 1 01 1 1
11 X X X X 11 X X X X
10 1 1 X X 10 1 1 X X

𝑐 =𝐵+𝐶+𝐷 𝑑 = 𝐴 + BC + BD + CD + BCD

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 CAR PARK DIGITAL CONTROLLER

𝑒 𝑓
𝐶𝐷 𝐶𝐷
𝐴𝐵 00 01 11 10 𝐴𝐵 00 01 11 10
00 1 1 00 1
01 1 01 1 1 1
11 X X X X 11 X X X X
10 1 X X 10 1 1 X X

𝑒 = 𝐵𝐷 + 𝐶𝐷 𝑓 = 𝐴 + 𝐵𝐶 + 𝐵𝐷 + 𝐶𝐷

SUMMARY
𝑔
PIN EQUATION
a A + B + BD +B’D’
𝐶𝐷
𝐴𝐵 00 01 11 10 b B’ + C’D’ +CD
00 1 1 c B + C’ + D
01 1 1 1
d A + B’C + B’D’ + CD’ + BC’D
11 X X X X
e B’D’ + CD’
10 1 1 X X
f A + BC’ + BD’ + C’D’

𝑔 = 𝐴 + 𝐵𝐶 + 𝐵𝐶 + 𝐶𝐷 g A + BC’ + B’C + CD’

Table 4: Decoder Equations

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7. BCD TO SEVEN SEGMENT DECODER

CIRCUIT:

R1

J1 J2 J3 J4 50Ω
CK
V1
12 V
Key = A Key = B Key = C Key = D U5

A B C D E F G

U3 U2 U1

NOT NOT NOT

U6
U10
AND2
U7 OR2
U9
AND2
U8 OR2

OR2

U14
U11
OR2
U13
AND2

U12
OR2

AND2
U15

OR3

U16

AND3
U17 U20

AND2
U18 OR5

AND2
U19

AND2

U21

U23
AND2

U22 OR2

AND2
U24

AND2
U25 U27

AND2
U26 OR4

AND2

U28

AND2
U29 U31

AND2
OR4
U30

AND2

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8.THE FINAL DISPLAY OUTPUT:

The final output will be given by the 7 segment display. The final output is
divided into 2 main parts:

1. Free slots display

2. FULL display

The free slots display is the combinational logic equations and the output of
each decoder is connected to each of these displays.

5 R8
GND
50Ω
CK GND

U1 U2
7 DA OA 13 12 R1 R2 15
1 DB OB 12 16 R3 17
50Ω18 20 19 A B C D E F G
2 DC OC 11 R4
6 DD OD 10 50Ω 22 R5 21
OE 9
24 R6 50Ω 25
5 ~EL OF 15
26 R7 50Ω
4 ~BI OG 14 50Ω
3 ~LT 50Ω
50Ω 23
4511BD_5V
27

The above shows an example of BCD to 7 segment display. The resistors

are limiting resistors used to protect the common cathode 7 segment
display.

NOTE:THE ABOVE CIRCUIT IS NOT USED IN THE ACTUAL CIRCUIT. I

AM ONLY USING THIS AS AN EXAMPLE.

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 FULL DISPLAY:

The condition for the FULL display is that the both counters’ outputs should
be 0. All the flip flops’ outputs (0000 for both counters) should be taken and
ANDED altogether, and then sent to the display.

VCC
R1 R2 R3
20VJ1 R4
50Ω 50Ω 50Ω
50Ω

Key = C
CK CK CK CK

U9 U1 U2 U3

A B C D E F G A B C D E F G A B C D E F G A B C D E F G

The above circuit is just an example on how to display the word FULL on
the 7 segment. Let us analyze this more closely; For the F, U, L, L to
display; we need to activate part of the LEDs in the 7 segment as shown
below:

F: a, e, f, g

U: b, c, d, e, f

L: d, e, f

L: d, e, f

NOTE: THIS ABOVE CIRCUIT IS AN EXAMPLE I USED TO EXPLAIN

ABOUT HOW TO DISPLAY “FULL”. THIS CIRCUIT IS ACTUALLY NOT
BEING USED IN OUR CIRCUIT.

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 9.GROUPING ALL THE PARTS TO MAKE THE

R5
U13
J1
50Ω
AND3U 7 U16
U14
Ke y = U U15
OR2 U53
AND3 AND4
CAR PARK DIGITAL CONTROLLER

AND3 A 0
B 1
C 2
U17 D 3
4
5
6
OR2 DCD_7SEG_P
U1 U3 U4
U2
V1 SET SET SET
5V J Q
SET
J Q J Q R2 R3 R4
J Q R1
CLK CLK CLK
CLK 50Ω 50Ω 50Ω
K ~Q K ~Q K ~Q 10Ω
K ~Q CK
RESET RESET RESET
FINAL CIRCUIT:

CK CK CK
RESET
JK_FF JK_FF JK_FF
JK_FF U45
U46 U47 U48
U10 A B C D E F G
A B C D E F G A B C D E F G A B C D E F G
U20A
AND4
74LS32N U12 U19
U5
U42
OR3 OR2
AND3
U9
U11 AND4
U18 U44
J2 AND3
OR2
U8 OR2 U43 AND2
Ke y = D
AND3

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CK CK
AND4
U52 U54
U33
U51 A B C D E F G A B C D E F G
A 0
AND3U32 U36 B 1
U34 C 2
U35 D 3
4
5
OR2 6
AND3 AND4
AND3 DCD_7SEG_P
U37
U40 OR2
U21 U22 U23 U24
SET SET SET SET
J Q J Q J Q J Q
AND5 CLK CLK CLK CLK
K ~Q K ~Q K ~Q K ~Q
RESET RESET RESET RESET
JK_FF JK_FF JK_FF JK_FF
U41
U28
NOR2
U49 AND4
U30 U39
U25
U50
S Q OR3 OR2
AND5 AND3
R ~Q U27
U29
SR_FF U38
AND3
OR2
U26 OR2
AND3
 CAR PARK DIGITAL CONTROLLER

10.EXPLANATION OF THE OTHER ELEMENTS

USED IN THE CIRCUIT:
As we can see from the circuit, a NOR gate and a latch have been included
in the circuit. Here below, we are going to look at their uses:

 SR LATCH:

U 50
S Q

R ~Q

S R _FF

Both the entry and exit of the car park are connected to sensors which
detects the incoming or outgoing of vehicles in and out of the park.
According to our requirements, when a car comes in, the counter is
supposed to count down and vice versa. An S-R latch is also called a set-
reset latch. An input on S sets the latch, making true and false. An
input on R resets the latch; becomes false and becomes true. The
output of the circuit is stable in either state with the inputs removed. We
can remove the input that caused a particular output and the output will be
unchanged. The state, and so the output, will only change when the
complementary input is applied. Such a circuit is said to
be bistable because it has two stable states.

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S R Q Operation

0 0 Hold (no
count)

0 1 0 1 Reset(count
up)

1 0 1 0 Set(count
down)

1 1 ? ? Unstable(No
count)

Table 3-1 S-R Latch Truth Table

 CLOCKPULSE:
The output of 10 while counting down or after 9 while counting up
needs to change. This will depend on the clock pulse of the down
circuit as shown in the circuit diagram. This is why we take 1001 (for
the counting up) and 0000(for the counting down) and AND them as
shown in the circuit. Their outputs are then applied to a NOR gate
and then sent to the clock pulse. By doing so, we will be able to
increase or decrease the output of the higher significant number.

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11.PRACTICAL PART

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