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Contents
FPGAs, or Field Programmable Gate Arrays show enormous promise for embedded systems - from ASIC prototyping to medical to military to telecommunications. FPGAs are exciting and powerful! But they have their downside as well. This Insiders Guide 2009 edition outlines the FPGA ecosystem, provides an in-depth survey analysis, offers vendor interviews, and details the FPGA vendor community. THE FPGA ECOSYSTEM FPGA SURVEY RESULTS INTERVIEWS WITH KEY FPGA VENDORS INTERVIEWS WITH KEY FPGA TOOLS VENDORS INTERVIEWS WITH KEY FPGA BOARD VENDORS INTERVIEWS WITH KEY FPGA SERVICE PROVIDERS INTERVIEWS WITH KEY FPGA IP & MISC. PROVIDERS APPENDICES A. Top Internet Resources for FPGAs B. New FPGA-related Products (last six months) C. Vendor Guide: FPGA Manufacturers D. Vendor Guide: FPGA Tool Vendors E. Vendor Guide: FPGA Board Vendors F. Vendor Guide: FPGA / DSP Vendors G. Vendor Guide: FPGA Misc. H. Vendor Guide: IP for FPGAs I. Vendor Guide: FPGA Design Services
FPGAS, TOOLS, AND BOARDS: CONTENTS DECEMBER 1, 2008
FPGAS, TOOLS,
EXECUTIVE SUMMARY
FPGAs, or Field Programmable Gate Arrays, show enormous promise for embedded systems from ASIC prototyping to medical to military to telecommunications applications. A savvy engineer might consider FPGAs because of their processing power, their flexibility and reprogrammability, their ability to combine and implement intellectual property (IP), or a litany of many reasons. FPGAs are exciting and powerful! But they have their downside as well: they are notoriously difficult to program, have a relatively steep learning curve, and the ecosystem of providers, tools companies, media outlets, IP, and services around FPGAs is weakly developed. This Insider's Guide is here to help. First, it outlines the key issues in using FPGAs, identifying the top Internet resources and categorizing FPGA vendors by product or service offering. Second, a survey of FPGA experts and evaluators provides insights into what real engineers are doing (or trying to do) with FPGAs, alongside interviews with vendors of FPGA hardware, software, and/or services. Finally, appendices identify the most important Internet resources and classify companies by product or service offering.
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BOARDS: TABLE OF CONTENTS
COPYRIGHT, DISCLAIMER, LICENSE AGREEMENT

Copyright 2008-09, eg3.com. All rights reserved. No part of this guide may be reproduced or cited in any form without express written consent of the publisher. This guide is considered a private communication between the purchaser / downloader and the publisher no citation in public fora is intended or allowed. This document is not to be posted to corporate intranets or shared among users; users are encouraged to go to http://www.eg3.com/report-fpga/ to download their own personal copy. Disclaimer: every attempt has been made to obtain accurate information. However, due to the nature of technical information, this report represents tentative conclusions only and the publisher accepts no liability for any actions taken or conclusions drawn from this material. All users are advised to thoroughly research any FPGA-related choice and to conduct extensive due diligence on their own prior to purchasing or employing any particular FPGA, board, tool, and/or IP product. eg3.com and eg3 are registered trademarks. All other marks are property of their respective owners. Any slights against persons or organizations are unintentional. Contact us at info@eg3.com, or Tel. 510-713-2150 so that we can correct them. License agreement: No reproduction or further dissemination allowed. By downloading this guide, you agree to use only one copy per individual (individual license) or multiple copies per one single company (company license). You agree not to further copy, disseminate, email, post to a company intra or extranet, post to the Internet, cite in marketing or trade literature, or cite in published magazines. You agree that this document is for internal use only, and understand that all copies are marked with product watermarks to identify and hold responsible the original downloader. You understand that the report is delivered electronically in Adobe PDF format, not hard copy, and you understand that printing or viewing the report is your responsibility. You understand that the information contained in the report is the best available to eg3.com at the time of publication, but that errors and omissions may nonetheless occur. You agree to hold eg3.com harmless for the use of any information contained in this report, and you recognize your responsibility to do due diligence - further researching any product(s) that you may select for your design project(s). You understand that the guide is delivered as is and that no refunds are allowed for purchased copies.
Copyright 2008 eg3.com No Reproduction or Further Dissemination Allowed.
0.1
The FPGA Ecosystem

If the Internet were a city - a city of FPGA technology what sites would you want to see? How would you know the lay of the land? What sites are the most important? What issues, tensions, and competitions organize the FPGA ecosystem? . INTERNET TOUR & OVERVIEW: WHY FPGAS? FPGA LEARNING SITES ON THE INTERNET THE FPGA ECOSYSTEM FPGA VENDORS FPGA TOOLS FPGA INTELLECTUAL PROPERTY (IP) FPGA BOARDS FPGA DESIGN SERVICES
FPGAS, BOARDS, AND TOOLS: THE FPGA ECOSYSTEM
FPGAS, TOOLS,
EG3.COM INSIDERS'
GUIDE: PHILOSOPHY
Who are the insiders in FPGA? Who really knows the technology in and out? If FPGAs were a city - who would be the best guides? Despite what the journalists at EE Times, FPGA Journal, or Embedded Systems Design might say, the smartest people on FPGAs are the people who are already working with FPGAs. Or perhaps the vendors of FPGA hardware, tools, IP, or services. With all due respect to our fellow journalists, the real FPGA experts are not media reporters! As Woody Allen said, Those who can't do, teach. Those who can't teach, teach gym. (http://www.humorsphere.com/movie_quotes/woody-allen.htm, 16 October 2008). Those who understand FPGAs, do FPGAs. Those of us who don't, consolidate information and write guides. Our goal, therefore, is not to write the definitive guide to FPGAs but rather to help you (the engineer, FPGA designer, or programmer) to understand the high level issues surrounding FPGAs and to identify the best jumping off places in the FPGA community for you to get your design started. As for FPGA insiders, there are two basic expert groups: Insider Group #1: the engineer users of FPGAs, i.e. your peers. Those who have gone before you and already used an FPGA in their design, a design tool, or a board. Included are also those currently considering FPGAs, i.e. at the first steps in their design cycles wrestling with many of the issues common to FPGA newcomers. We shall call the first group experts and the second group, newbies. Insider Group #2: the vendors of FPGA technologies. Companies like Xilinx, Altera, Lattice; software vendors like Aldec, Altium, or Mentor Graphics; board makers like National Instruments, Bittware, Vmetro, or Pentek. We use surveys to tap the knowledge of the first group, and interviews to tap the knowledge of the second. In addition, we provide a brief introductory sketch of the FPGA ecosystem with lots of links to more information and cool sites on the Web. We hope you find this guide a useful starting point on your personal FPGA educational journey. Comments? Questions? Please contact us at info@eg3.com or Tel. 510-713-2150.
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BOARDS: THE FPGA ECOSYSTEM
WHO THIS GUIDE IS FOR

This guide is first and foremost a guide for electronic design engineers considering FPGAs, FPGA tools, Intellectual Property (IP), and/or boards. It is for designers at the early phase of a design when they must try to understand all the hardware, software, and services available in the FPGA ecosystem and attempt to research the best choice of possible outside vendors. It is therefore for: Engineers - anyone involved in FPGA design, tools, IP, or boards. Managers - managers or engineering team managers whose design(s) involve FPGA technology In addition, this year we have a special focus on design services for FPGAs. There are more and more design service companies, eager to help you with your FPGA-based design, and we hope both to identify the universe of possible design partners as well as help you think through the pros and cons of outsourcing all or part of yoru FPGA design.
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Finally, the members of the FPGA vendor community will surely rush to download the guide, especially the survey, and use it to bolster (or challenge) their preconceived notions of how the FPGA ecosystem operates. They may find it interesting, but ultimately the guide is for practical engineers and managers who want a single-stop to getting started with FPGAs.
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INTERNET TOUR & OVERVIEW: WHY FPGAS?

If the Internet were a city - a city of FPGA technology - what sites would you want to see? How would you know the lay of the land? What sites are the most important? What issues, tensions, and competitions organize the FPGA ecosystem? Engineers are fond of Google, and rightly so, but a simple Google search for FPGA (http://www.google.com/search?hl=en&q=FPGA) returns over 10,100,000 results. The #4 result is an outdated site at the University of Idaho, and the #2 result is fpga4fun.com, a useful but basic hobbyist site (10 September 2008). Google provides a sheet quantitative breadth of information, but with little organization. This guide, in contrast, seeks to approach the topic of FPGAs in an organized way, and help orient you to understand the FPGA ecosystem and the actors within it as well as the available sources of design information. To use a real world example - if you were in Rome, or at the Prado museum in Madrid, Spain, you might hire a guide. Find a resident who could quickly show you the highlights to which you could backtrack at the end of your tour for more detailed viewing. Here, then, are the highlights of the FPGA ecosystem.
WHY FPGAS?
Before we even begin our tour of the FPGA ecosystem, however, we should stop for a moment and clarify why many engineers are considering FPGAs today for their embedded designs. Why are you considering FPGAs? What factors in your design are encouraging you to take the leap to FPGA technologies? Heretofore, most embedded designs were based on standard microcontrollers or microprocessors, some as simple as 8-bit architectures like the 8051 or others like 32-bit ARMs. Why then migrate to an FPGA? From the high end down, many high volume designs are based on ASICs. Why would an ASIC designer migrate down to an FPGA? What advantages do FPGAs bring to either the embedded group or the ASIC group?
At the highest level, FPGAs can bring these important factors to bear: Programming power. Compared with standard microprocessors, FPGAs provide much greater raw processing power, especially because they give the designer the choice to run applications in hardware vs. software. Reprogrammability / Reconfigurability. Compared with ASICs and with standard microprocessors, FPGAs can be reprogrammed or reconfigured. Because of the growing market in intellectual property (IP), FPGAs are a good choice for purchasing and configuring intellectual property to create highly customized and efficient designs.
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Intellectual Property (re)Use. Few designs are completed by just one person these days, especially in more complex applications. Buying or obtaining third party IP is increasingly important, and FPGAs allow you to mix and match third party IP to create a solution customized for your application but drawing on the knowledge of the design community. Low Cost vs. ASICs. ASIC designs are very expensive (especially the up-front Nonrecurring Engineering Costs (NRE)), and FPGAs allow ASIC designers to prototype quickly and efficiently, and in more and more cases to avoid doing an ASIC altogether (deploying in an FPGA instead).
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Altera (http://www.altera.com/), the number two FPGA vendor by market share, outlines the advantages of FPGAs in this fashion: Increase productivityWhether you are a hardware designer or software developer, [Altera] ha[s] tools to provide you with unprecedented time and cost savings. Protect your software investment from processor obsolescenceAltera's embedded solutions protect the most expensive and time consuming part of your embedded designthe software. Scale system performanceIncrease your performance at any phase of the design cycle by adding processors, custom instructions, hardware accelerators, and leverage the inherent parallelism of FPGAs. Reduce costReduce your system costs through system-level integration, design productivity, and a migration path to high-volume structured ASICs. Establish a competitive advantage with flexible hardwareChoose the exact processor and peripherals for your application. Deploy your products quickly and feature-fill over time to accelerate your time-to-market and establish a competitive advantage. (http://www.altera.com/technology/embedded/fpgas/emb-why-use.html, 10 September 2008). Competitor Xilinx has a nice summary of the "target markets" that are ideal for FPGA designs: Aerospace / Defense Automotive Broadcast Consumer Data Processing and Storage Industrial / Scientific / Medical Wired Communications Wireless Communications (http://www.xilinx.com/esp/, 10 September 2008). Our survey (see below) confirms that these are common verticals for FPGAs. FPGAs are also used more and more in signal processing (DSP) applications, low power consumer devices, and even parallel processing applications in network computing or server farms.
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Indeed, the FPGA vendor community has its sites set on ASICs and low power consumer applications - areas that were not once FPGA strongholds. Actel, for example, argues that FPGAs are now ready for low power applications: The Actel IGLOO family of reprogrammable, full-featured flash FPGAs is designed to meet the demanding power, area, and cost requirements of today's portable electronics. Based on the Actel nonvolatile flash technology and single-chip ProASIC3 FPGA architecture, the 1.2 V to 1.5 V operating voltage family offers the industry's lowest power consumptionas low as 5 W. The IGLOO family supports up to 3 million system gates with up to 504 kbits of true dual-port SRAM, up to 6 embedded PLLs, and up to 620 user I/Os. (http://www.actel.com/products/igloo/, 10 September 2008). In fact, dont miss their July, 2007, white paper, The New Power-Smart Power Paradigm at http://www.actel.com/documents/PowerSmart_WP.pdf. In conclusion, FPGAs should interest you if Your application requires a lot of processing power (as in military or medical imaging); You might be considering an ASIC, but want to prototype or perhaps even deploy the first generation in an FPGA to avoid the high costs and high risks of ASICs. Your application benefits from the flexibility and reprogrammability of FPGAs. You are interested in obtaining and implementing third party Intellectual Property (IP) in a non-ASIC design.
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FPGA LEARNING SITES ON THE INTERNET

In the age of the Internet, the good news is that one can quickly surf from site to site to gain education on a topic (whether it be FPGAs or Hawaii Vacations / Maui). That said, it is often difficult to identify the best or top sites for a given topic. Between eg3.com's mission as the leading indexing service on the Internet and our FPGA survey, we can identify these as the best sites to begin learning about FPGAs.
BEST FPGA PORTALS AND WEBSITES

Beyond the vendors themselves, there are a few must see sites on the Internet for learning about FPGA design. The top sites are: 1. Techonline (http://www.techonline.com/) - numerous webinars on FPGAs, VHDL, Verilog and other technical topics. If you enter FPGA in the top search bar, and check the box for "webinar" you get a nice listing of all available webinars on the topic. Here is the exact URL http://www.techonline.com/TechSearch/Search.jhtml?c7=NetSeminars&queryText=FP GA&site_id=TechOnline&Site+ID=TechOnline&sortSpec=score+desc&Search.x=6&Sear ch.y=14.
2. DSP-FPGA.com (http://www.dsp-fpga.com/) - online magazine from Open Systems Publishing, focusing most on FPGA boards and DSP issues.
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3. FPGA Journal (http://www.fpgajournal.com/) - in-depth original articles, the latest industry news, and rich technical resources for programmable logic designers, as well as new product, promotion and event announcements from industry-leading companies 4. Programmable Logic DesignLine (http://www.pldesignline.com/)- This site provides the practical how-to information needed to program, develop, and implement field programmable gate arrays (FPGAs) and programmable logic devices (PLDs) in wireless, networking, industrial, automotive, and other design applications 5. FPGA World (http://www.fpgaworld.com/) - portal and conference on FPGAs. 6. FPGA Central (http://www.fpgacentral.com/ - a new portal and RSS feed dedicated to FPGAs. In addition, the newsgroup comp.arch.fpga has a pretty high level standard of discussion (with a lot of spam, of course). If you are new or have questions, you can usually post a question and get some help from the community. New for 2008/09 is the new conference, FPGA Summit (http://www.fpgasummit.com/) to be held 10-11 December 2008 in San Jose, CA. eg3.com, of course, tracks all FPGA-related sites including portals, media, news releases and new product announcements, white papers, seminars/webinars, etc. at http://www.eg3.com/fpga.htm. You can also sign up for e-clips, our news alert service, at that link and be alerted when we find news and/or new items each week. As for real-world trade shows and print publications, as well as more general sites, check out Appendix A for a complete list.
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BASIC OVERVIEWS AND ONLINE TUTORIALS

What if you are very (very) new to FPGAs? Fortunately, there are a few very basic overviews to FPGAs on the Internet. At the most basic, visit Wikipedia's FPGA entry at http://en.wikipedia.org/wiki/FPGA. While simplistic, this site overviews FPGAs with a brief history, applications, main vendors, and other discussion. If you are new to FPGAs it is a useful primer; if you are already experienced, it is not worth a visit. A popular tutorial is at http://www.tutorial-reports.com/computer-science/fpga/ with useful sections on: FPGA Overview Logic Block FPGA Routing Techniques FPGA Structural Classification Programming Methodology FPGA Design Flow Xilinx has a nice (if vendor-sponsored) tutorial called, Getting Started with FPGAs, at http://www.xilinx.com/company/gettingstarted/index.htm. Dont miss the resources section which also points you to all sorts of Xilinx-friendly demos and evaluation kits. A new contender in the FPGA space is National Instruments (http://www.ni.com/) which has published a very good overview not so much to FPGA design but to why to use FPGA-based boards for data acquisition and other embedded design goals at http://zone.ni.com/devzone/cda/tut/p/id/6984. Its called Introduction to FPGA Technology: Top Five Benefits.
NEW & RECOMMENDED BOOKS

The book market for FPGAs is not the best, suffering as you would expect from small press runs and fast-moving technology. Nonetheless, if you are new to FPGAs, there are some recent books
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that you should consider purchasing and reading. After all, an FPGA project is a big deal and for a small cost, you can educate yourself on many of the major issues. Here are three of the best, newer books on the subject: Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation (http://www.amazon.com/exec/obidos/ASIN/0123705223/Eg3communicationA/) - The main characteristic of Reconfigurable Computing is the presence of hardware that can be reconfigured to implement specific functionality more suitable for specially tailored hardware than on a simple uniprocessor. Reconfigurable computing systems join microprocessors and programmable hardware in order to take advantage of the combined strengths of hardware and software and have been used in applications ranging from embedded systems to... (7 November 2008) FPGA Based Design and Applications (http://www.amazon.com/exec/obidos/ASIN/0387726683/Eg3communicationA/) FPGA Based Design and Applications presents recent advances in field programmable gate array (FPGA) technologies, focusing primarily on applications, design methodology, and technology evolution. This book serves as a reference for FPGA based design and applications in networking and communication, digital signal processing, highperformance computation, and reconfigurable computing. Materials presented here are based on the most recent... (1 October 2008) Digital Systems Design with FPGAs and CPLDs (http://www.amazon.com/exec/obidos/ASIN/075068397X/Eg3communicationA/) This textbook explains how to design and develop digital electronic systems using programmable logic devices (PLDs). Totally practical in nature, the book features numerous (quantify when known) case study designs using a variety of Field Programmable Gate Array (FPGA) and Complex Programmable Logic Devices (CPLD), for a range of applications from control and instrumentation to semiconductor automatic test equipment. (27 March 2008). You can also search for new books at Amazon.com. The trick is to find their advanced search page, which is rather hidden at http://www.amazon.com/b/ref=sv_b_0/104-91429409616753?ie=UTF8&node=241582011 and enter FPGA in the title field. You can then reverse sort by publication date to get the most recent, or sort by best selling to see what other engineers are purchasing.
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FPGA VENDOR EDUCATION SITES: HIDDEN GEMS

Wikipedia, online tutorials, and the free sites of the Internet are great. However, for those in business environments that are truly serious about deploying FPGAs, vendor sites actually have some of the best educational materials on the Internet. Our survey results confirm this as Xilinx is the number one FPGA information site on the Internet, and Altera is the number four. So dont miss the Xilinx and Altera websites. The caveat is that the FPGA vendors are (of course) trying to convince you to use their own FPGA technologies, so their learning sites are often biased in their favor. That said, these vendors offer excellent webinars, white papers, online tutorials, and demos - most of which are free of charge, and all of which are good introductions to FPGAs and FPGA technology. In addition, each company partners with third party training companies or distributors to offer real-world seminars and training courses on FPGAs. These are excellent, inexpensive ways to learn about FPGAs. Xilinx Start with Xilinx at http://www.xilinx.com/support/education-home.htm. Here you will find training courses, training providers, curriculum providers, quickstart packages, events, webcasts, and real-world events. For example, you can click on the link for curriculum path --> embedded and end up at the course, Fundamentals of FPGA Design (http://www.xilinx.com/support/training/abstracts/fundamentals.htm). Clicking on the registration link for your region will bring you to an authorized training center such as Technically Speaking (http://www.technically-speaking.com/). Dont miss the Xilinx webcast archive at http://www.xilinx.com/events/webcasts_od.htm.
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Altera
Altera's technology center is at http://www.altera.com/technology/tc-index.html. Here you will find overviews to Digital Signal Processing, Embedded Processors, Parallel I/O, System Integration, Memory, High-speed Serial I/O, and Signal Integrity. Altera's education and events section at http://www.altera.com/education/eduindex.html has links to training courses, webinars, events, university programs, and product demos. As with competitor Xilinx courses range from the broad Introduction to FPGAs to Introduction to VHDL to very specific courses on technology issues and product-specific questions. Delivery choices range from Altera-based instructors, to online presentations, to interactive webinars. If you become an Altera customer, there are forum sites such as http://www.alteraforum.com/ where you can exchange ideas and questions with other users and Altera staff.
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Training resources are not confined to the big two (Altera and Xilinx), however. Actel, for example, has online learning at http://www.actel.com/support/training/descriptions.aspx. Courses topics include VHDL, introduction to (Actel) FPGAs, designing for low power, introduction to PCI, and general overviews to Actel design tools. Lattice, in turn, has a nice webinar archive at http://www.latticesemi.com/support/training/index.cfm. Beyond even Actel or Lattice, you should thoroughly investigate the websites of the tools, boards, and service vendors as many have papers, webinars, demos, tutorials and other on- and off-line resources that can help you educate yourself even if you ultimately decide to go with a different vendor. The bottom line is that many - if not all - of the various companies in the FPGA ecosystem often have white papers, demos, free tools, or webinars - so keep your eye out for them. Many of the bigger players have real-world seminars and educational events - so check their events calendar or "seminars" sections for those. Most are free or conducted at a very nominal charge, and they offer a great opportunity to learn about FPGA technology from real Insiders.
DISTRIBUTORS: ANOTHER HIDDEN GEM

The large FPGA vendors provide much of their product through distributors, and they work with these distributors to educate the community on FPGA technology. Therefore, another excellent source of education on FPGA is the distributor sites such as Arrow Electronics (http://www.arrownac.com/), or Nu Horizons (http://www.nuhorizons.com/). Watch each for both online and real-world evaluation boards and webinars/seminars - all great opportunities to learn about FPGAs. Arrows special programmable logic section is at http://www.arrownac.com/products/semiconductor/programmable-logic/. Occasionally, they have special seminars, webinars, and development kit offers at that URL. And Nu Horizons special FPGA area is at http://www.nuhorizons.com/xilinx/fpga/. In September, 2008, for example, Nu Horizon hosted a series of workshops on the Xilinx Virtex-5 FXT platform of FPGAs from Xilinx, the industrys first FPGAs with embedded PowerPC 440 processor blocks, high-speed RocketIO GTX transceivers and dedicated XtremeDSP processing capabilities (http://www.nuhorizons.com/xpresstrack/FXT/ 12 September 2008). Another was Fundamentals of FPGA Design in Raleigh, NC, on 11 November 2008 (http://www.nuhorizons.com/xpresstrack/fpga/index-NA.asp). Take Away. Check the distributor websites as well as those of the large FPGA vendors for free or low cost seminars, webinars, and evaluation kits to try before buying and learn about FPGAs quickly and easily.
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FPGA TOOL VENDORS: A THIRD SOURCE OF FPGA EDUCATION

A few of the major FPGA tool vendors also have learning or educational sites. First and foremost, Mentor Graphics has a wealth of white papers, webinars, and real-world seminars on their FPGA design flow. Check it out their FPGA learning site at http://www.mentor.com/training_and_services/training/courses/fpga_pld/. Check the vendors in the Appendices on the Web, and keep your eye out for learning opportunities. Ask or look for: Demos / evaluation boards and/or free FPGA tools Webinars or other online tutorials Real-world Seminars (often with free lunch), as opportunities to learn about FPGA technology White papers
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Aldec (http://www.aldec.com/), for example, has both real-world and online seminars (http://www.aldec.com/Events/default.aspx) as well as an extensive section on downloadable demos for their products (http://www.aldec.com/Downloads/default.aspx). Dont miss their tutorials on VHDL, SystemC, and Verilog.
FPGA CONFERENCES
For those who have the time and money to attend, there a a few targeted conferences on FPGA issues and several broader trade shows that touch on FPGA issues. The new kid on the block is the FPGA Summit (http://www.fpgasummit.com/) which will occur 9-11 December 2008 in San Jose, California. It targets FPGA-based designs, and doesnt seem to have great coverage of FPGA-based boards or independent third party tools. Still, as a first run conference, and if you are interested in the pure FPGA-based design route, it is definitely worth attending. Another, more academic, conference is FPGA World (http://fpgaworld.com/conference/) held in Stockholm, Sweden, each year. Among broader conferences the big three that touch on FPGAs are the Design Automation Conference (http://www.dac.com/) which occurs yearly in the early summer; DesignCon (http://www.designcon.com/) which occurs yearly in January; and DVCon (http://www.dvcon.org/) which occurs each spring. None specifically focus on FPGAs, but all have some coverage - if you can attend only one, attend DesignCon as it has the most FPGA orientation, which isnt to say, much. Your best bet is still probably the free seminars from the FPGA vendors themselves or their distributors or the webinars online from TechOnline.
THE FPGA ECOSYSTEM

Once you have decided to consider FPGAs, you have a few basic alternatives. These might be considered the sections of the FPGA city. These are: The FPGA vendors - Altera, Xilinx, and the like. These are the producers of FPGAs each with a competing offering and a competing ecosystem of tools and boards to encourage you to design in their FPGA. 2. FPGA tool vendors - vendors like Mentor Graphics, Synplicity / Synopsys, Aldec, or Altium who provide FPGA and FPGA/PCB tools to help you design FPGAs 1.
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and FPGA boards. These tools are somewhat competitive with the free tools of the FPGA vendors and somewhat complementary to those tool flows. 3. FPGA IP (Intellectual Property) - companies like CAST or PLDA that specialize in selling IP as well as free IP from the FPGA makers or tool producers like Mentor Graphics or Synopsys. 4. FPGA Board Vendors - these participants range from Acromag to Pentek to Vmetro, these are vendors who have already designed in an FPGA / or FPGAs into a board and thus have done much of the hard FPGA design work and FPGA / PCB design integration for you. A very special subset is those that concentrate on DSP, and they run from FPGA prototyping boards (for ASIC development) to deployable FPGA boards to allin-one platforms like National Instruments' CompactRIO. 5. FPGA Design Service Companies - these companies range from single person consultants to larger companies, that specialize in taking all or part of your design and doing it themselves. Rather than hire internal staff, you can go to these companies to either find temporary engineers or to outsource your design to their own engineers, whether in the USA or abroad. New for 2008 - you can search our online FPGA service directory at http://www.eg3.com/search-services.cgi?query=FPGA. Is there a best FPGA vendor? Of course there is. Despite the desires of each vendor to be identified as the best or leading, however, the reality is that the choice that is best for one design is not necessarily the choice that is best for another. Take away. The best FPGA vendor will vary based on your own business and technical design needs. The point of this Insiders' Guide, therefore, is not to solve your design challenges nor to identify the best FPGA, tool, or board for your design. The point of this guide is to identify the must see stops on the Internet, FPGA vendors, tools vendors, or board suppliers. Turning first to FPGA vendors, a must see destination is EDN magazines 2004 "Programmable Logic Directory" at http://www.edn.com/index.asp?layout=article&articleid=CA421504. Sadly, this useful directory has not been updated since. But it does provide a useful starting point to all the FPGA vendors and product information, at least as of 2004. A second useful - if somewhat outdated - guide to FPGAs can be found at http://www.fpgaguide.com/. This guide offers a vendor-independent PLD search engine to find the best fitting FPGA or CPLD device for your requirements. The devices are preselected by gate-complexity and year of introduction. It has a useful selector for identifying potential FPGA/PLD choices, but there is no guarantee of its accuracy. Finally, the easiest way is to simply surf to each FPGA vendor one-by-one and browse their website, looking for technical information and product specifications. Here are the major FPGA vendors (in alphabetical order) with descriptions and keywords taken from their websites: Actel Corporation (http://www.actel.com/) - As the leader in single-chip FPGAs, Actel Corporation offers Flash- and antifuse-based solutions that are live at power-up, low power, and highly secure. Actel also provides IP cores, including CoreMP7, its soft ARM7 core; design suites; programming tools; and design services. Altera (http://www.altera.com/) - Altera is the world's pioneer in system-on-aprogrammable-chip (SOPC) solutions. As a leading supplier of FPGAs, CPLDs, structured ASICs and embedded processors, Altera combines programmable logic technology with design software, IP, and design services to offer designers high-value programmable solutions. Central to Altera's embedded solutions is the Nios II processor, a userconfigurable, general-purpose RISC embedded processor, and... Lattice Semiconductor Corp. (http://www.latticesemi.com/) - Lattice Semiconductor Corporation provides the industry's broadest range of Programmable Logic Devices
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(PLD), including Field Programmable Gate Arrays ( FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products. Xilinx (http://www.xilinx.com/) - Supplier of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support.
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Another vendor targeting the FPGA market with a non-FPGA out-of-the-box product is Cypress Semiconductor (http://www.cypress.com). Cypress' PSoC(R) Mixed-Signal Arrays are programmable systems-on-chips that integrate a microcontroller and the analog and digital components that typically surround it in an embedded system. A single PSoC device can integrate as many as 100 peripheral functions with a microcontroller, saving customers design time, board space, power consumption, and from 5 cents to as much as $10 in system costs (http://www.cypress.com/products/?gid=13&fid=24&GoGatewayCategoryID=PSoC&, 12 September 2008). We have vendor interviews with most of the key players. (The ones that are absent are absent because they failed to respond to repeated requests. Viva bureaucracy!)
FPGA TOOLS
FPGAs have a bad reputation as difficult to program and design for. The good news is that most of the FPGA makers provide free or low cost tools or development environments to work with their FPGAs. (They also provide Intellectual Property (IP) blocks, see below). In general, the advantages to using the FPGA makers' tools are that the tools are customized to their particular FPGAs (who would know better their own FPGA than the vendors themselves?) and that they are generally free or low-cost. The disadvantage is that the FPGA vendors attempt to lock you in because their tools only work with their own FPGAs as generally do their Intellectual Property (IP) blocks (such as PCI, or PCI Express). Here is a chart with direct links to the tools sections of each FPGA vendors' website:
Tools from FPGA Vendors ___________________________________________________________

Vendor Actel Altera Lattice Xilinx Tools URL: http://www.actel.com/products/software/. http://www.altera.com/products/software/sfw-index.jsp http://www.latticesemi.com/products/designsoftware/index.cfm http://www.xilinx.com/products/design_resources/design_tool/index.htm
In addition to tools, most also provide design services or link to registered partner companies that will provide design services to get your design up and running quickly. One of the most visible is that provided by Avnet (http://www.em.avnet.com/). According to their website: Avnet helps specify, develop and design FPGAs by serving as an extension of the design team. Avnet provides the additional resources and knowledge base during the critical implementation phase, so customers can meet aggressive time-to-market milestones.
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Services include: Core Integration - Avnet has developed high-level building blocks that can be easily adapted to new designs. Design Optimization - Avnet can take existing designs and optimize them for FPGAs, improving performance, density, power consumption and reliability. Technology Migration - Avnet can take designs in older technologies and target them to newer devices, saving money and improving product availability. Complete System Design - Avnet can do complete system designs, adding the support and interface devices necessary to implement an entire application. C Code Conversion - Utilizing Celoxica's DK1 Design Suite, Avnet can convert C code to an EDIF netlist or RTL VHDL. (http://www.eg3.com/shorturl/fpga1.htm 12 September 2008)
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Finally, most provide development or evaluation boards either directly or via distribution so that you can test and debug your FPGA designs prior to full commitment. Altera's development kits and evaluation boards are well organized at http://www.altera.com/products/devkits/kitindex.html where you can find kits sold directly by Altera as well as links to kits provided by third parties (some of which also provide design services). Check the website of each FPGA vendor to look for free or low cost tools, IP, design services, and evaluation or development boards.
FPGA TOOLS: THIRD PARTY OFFERINGS

The great advantage to FPGA vendor tools - that they are closely coupled with their own hardware - becomes the great disadvantage as well. If you are FPGA agnostic, i.e. not sure at this point which FPGA best fits your design tools, there are third party vendors that provide software tools that are hardware agnostic, meaning that they do not lock you into a particular hardware vendor. In fact, one argument is that you should prefer independent third party tools because the FPGA that might work best for your design #1 might not be the FPGA that works best for design #2, etc., and you do not wish to be locked in to a particular Xilinx or Altera design flow. Nothing in life is free, and this goes for free FPGA design tools as well! Broad FPGA Tools There are many vendors of FPGA- or ASIC-related tools, but two in particular really target broad FPGA design in competition (cooperation?) with the free tools of the FPGA vendors themselves. They are: Altium (http://www.altium.com/) - Altium Designer provides electronic designers and engineers with a single, unified application that incorporates all the technologies and capabilities necessary for a complete electronic product development. Altium Designer integrates board- and FPGA-level system design, embedded software development, and PCB layout, editing and manufacturing within a single design environment. Mentor Graphics Corporation (http://www.mentor.com/) - Mentor Graphics is a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions
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that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. Altium targets the PCB/FPGA integration issues, whereas Mentor has a somewhat broader focus on FPGA/ASIC tool flow including but not limited to FPGA/PCB integration. According to the Mentor product literature, only Mentor has a unified flow that lets you design for Any Silicon: PLD, FPGA, Platform FPGA, Structured ASIC, ASIC Prototypes, ASICs and SOCs Any Vendor: Actel, Altera, Atmel, ChipExpress, Lattice, Xilinx, plus any ASIC foundry Any Language: VHDL, Verilog, SystemVerilog, C/C++, PSL, SVA (http://www.mentor.com/products/fpga_pld/fpga_advantage/index.cfm 12 September 2008) Specialized FPGA Tools Beyond these two companies that have made a broad commitment to FPGA tools, there are a number of vendors that offer software tools for FPGA development, usually in line with products or offerings that are also applicable to ASICs. These fall into a number of broad categories, and here are some highlights of the more prominent vendors. Agility Design Solutions Inc. (http://www.agilityds.com/) - Agility speeds the development of signal processing algorithms offering complete solutions for algorithm acceleration, prototyping and implementation in both software and hardware. The solutions include Agilitys unique software technologies for MATLAB to C and C to FPGA synthesis and a rich portfolio of synthesizable algorithmic functions and FPGA hardware platforms. Agility completes the solutions with services delivered by a team of... Aldec, Inc. (http://www.aldec.com/) - Aldec is currently delivering high performance, mixed HDL-based design entry and verification software to support the development and verification of IC designs. The products also support Co-Simulation of C/C++ and Matlab/Simulink for verification of both software algorithms and HDL based descriptions from one environment. CriticalBlue (http://www.criticalblue.com/) - CriticalBlue delivers Cascade, an embedded system design tool that synthesizes optimized programmable coprocessors to accelerate embedded software within FPGAs, structured ASICs and platform SoCs. Cascade analyzes executable software code to identify functions to be offloaded from the main processor onto a coprocessor. Dynalith Systems Co., Ltd. (http://www.dynalith.com/) - Dynalith Systems provides innovative verification solutions that include functional & behavioral level verification, cost-effective HW accelerator, and virtual prototyping: iNTUITION for prototyping and acceleration, iPROVE for acceleration and virtual prototyping, and iTUTOR and iNCITE for education/training. With these solutions, design in FPGA can be run along with HDL simulator, high-level language (C/C++, SystemC, Matlab, Simulink)... EVE (Emulation & Verification Engineering) (http://www.eve-team.com/) - EVE offers ZeBu, a high-performance verification platform for ASIC, FPGA, IP, and Embedded Systems. Designed around a pioneering hardware-assisted architecture to debug hardware and validate software of SoC designs of 1 to 100 millions ASIC gates, ZeBu
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supports interactive read/write internal access to the design without compiling internal probes, co-verification with a HDL/C/C++ test benches at signal and transaction level up to 12MHz. . . GateRocket, Inc. (http://www.gaterocket.com/) - GateRocket offers the industrys first Device Native verification solution for Field Programmable Gate Arrays (FPGAs). This product can cut in half the time it takes to develop the electronic products that enrich our lives every day. As FPGAs become larger and ever more complex, electronic design engineers face a crisis in their inability to adequately verify and test these advanced designs. GateRocket provides a new, Device Native... Mirabilis Design (http://www.mirabilisdesign.com/) - VisualSim enables quick performance analysis, power evaluation and architecture exploration for the design of electronics and real-time software. VisualSim is used for designing Large Complex Systems, ICs, Processors, FPGA, Real-Time Software and Network Systems. VisualSim is a graphical modeling and simulation environment. Models of the proposed system are constructed by engineers in VisualSim using parameterized modeling library and... Synplicity, Inc. / Synopsys (http://www.synplicity.com/) - Innovative synthesis, verification, and physical implementation software solutions for designers of programmable logic, ASICs, Structured / Platform ASICs, and SoCs. The industry's most widely used FPGA synthesis solution, Synplify Pro uses a true timing-driven approach to synthesis. All products support industry-standard design languages (VHDL and Verilog) and run on most popular computing platforms. Temento Systems S.A. (http://www.temento.com/) - Temento Systems S.A.is an innovative provider of Test, Debug and Verify Solutions for FPGA, System On Chip (SoC), Boards and Hardware Platforms. Temento Systems products are used by different functional teams (Development, Industrialization, Manufacturing, Maintenance) and in major companies from various industrial sectors worldwide : Semi-conductor, Telecommunications, Consumer Electronics, Computer, Automotive, Aerospace. Consult Appendix D for a full list of FPGA tool vendors).
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FPGA INTELLECTUAL PROPERTY (IP)

One of the attractive features of FPGAs is their promise to allow the designer to mix and match IP that is both internal and external - to allow each design to be fully customized for the design needs, and to give wings to the promise of design reuse. While IP is also heavily employed in the ASIC market, it has developing roots in the FPGA community. What resources, therefore, exist to help you figure out whether, and how, to employ IP in your next FPGA design? Internet Resources First and foremost, here are some of the best Internet sites for identifying IP: SOCcentral (http://www.soccentral.com/) - System on a Chip (SoC) and ASIC design information, EDA tools and design methodologies, intellectual property (core IP), design reuse, or programmable logic (including FPGA, PLD and CPLD design). Design and Reuse (http://www.design-reuse.com/) - The world's largest directory of Virtual Components, Software and Services for designing systems on chip IP exchange on Internet works; test it by getting a free IP and look at the new format of IP Exchanger. Part of the massive Techweb database.
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OpenCores (http://www.opencores.org/) - OpenCores is a loose collection of people who are interested in developing hardware, with a similar ethos to the free software movement. Currently the emphasis is on digital modules called 'cores', since FPGAs have reduced the incremental cost of a core to approximately zero. ChipEstimate.com (http://www.ChipEstimate.com/) - Now owned by Cadence, ChipEstimate.Com is an intuitive new tool for IC designers that generates fast and accurate chip estimates. The tool makes it easy for designers to visualize tradeoffs between key design metrics, and across technology nodes and process variants. InCyte lets users generate accurate and optimized chip estimates at the architectural stage of the design process, resulting in significantly shorter design times and lower design costs.
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eg3.com tracks the keyword IP at http://www.eg3.com/intellectual-property.htm. IP From the FPGA Vendors Xilinx, Altera, and other FPGA vendors are keen to have you design (and deploy) lots of devices with their FPGAs, and so they attempt to make it easy by providing free or low cost tools as well as free or low cost IP. As is the case with tools, the upside to IP from these vendors is that it is closely matched to the hardware. The downside is that it is usually not broadly portable to other hardware options. That said, you can check out the IP subsections of each major vendor.
IP from FPGA Vendors ___________________________________________________________

Vendor Actel Altera Lattice Semiconductor Xilinx IP URL: http://www.actel.com/products/ip/default.aspx http://www.altera.com/products/ip/ipm-index.html http://www.latticesemi.com/products/intellectualproperty/index.c fm http://www.xilinx.com/ipcenter/
Each vendor attempts to catalog available IP and provide a quasi-store front at which the developer can identify useful IP. Both Xilinx and Altera have invested heavily in their own IP cores: Microblaze (http://www.xilinx.com/products/design_resources/proc_central/microblaze.htm) for the former, and Nios/Nios II (http://www.altera.com/products/ip/processors/nios2/ni2-index.html) for the latter. Actel has taken a different approach, forming a partnership with ARM to provide the 32-bit ARM Cortex-M1 "free" with Actel-based design: Developed by ARM in collaboration with Actel, the 32-bit ARM Cortex-M1 processor is the first ARM processor designed for FPGA implementation. With a balance between size and speed, the free Cortex-M1 processor operates at up to 68 MHz and can be implemented in as few as 4,410 tiles. A streamlined three-stage pipeline solution, the Cortex-M1 processor runs a subset of the classic Thumb-2 instruction set so existing Thumb code can be utilized without change. More details are at http://www.actel.com/products/mpu/CortexM1/ (12 September 2008). In addition to their own (or licensed) processor cores, the vendors provide much of the plumbing involved in many designs - ethernet, PCI Express, Video Codecs, etc. - i.e., IP that is commonly used and does not constitute the real value add of a design. All of this is aimed at getting your
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design up quickly and effectively, and we should add to lock you in to some extent to their silicon so beware of the lock in downside to such IP! IP From the Third Party Vendors As is the case with FPGA tools, a market has emerged for independent IP. The advantage here is that this IP is not tied to specific hardware, giving you design freedom. The disadvantage is that it isn't generally free and, in the case of tools vendors, is affiliated with a particular design flow. Among the EDA tools vendors, most now offer IP. Synopsys, for example, has an important microsite on IP at http://www.synopsys.com/products/designware/designware.html. It is focused largely on protocol IP such as USB, Wireless USB, PCI Express, PCI, Xaui, etc. Similarly, Mentor Graphics has its own IP microsite at http://www.mentor.com/products/ip/index.cfm. Beyond the FPGA vendors and the EDA vendors lie a group of smaller companies that specialize in delivering IP for FPGA and/or ASIC designs. One of the more interesting is CAST, inc., a small New Jersey company that has specialized in IP that works. They provide over 100 different popular and standards-based IP cores: 8- and 16-bit processor compatibles for the Z80 and 68000; 32025 and 32025TX DSPs; and more successful 8051 variations and installations than anyone else. Bus and network interfaces including Ethernet MACs, LIN, CAN, SPI, PCI and PCI Express. The widest range of image compression cores available anywhere, from JPEG through JPEG 2000. Security-ready AES, MD5, and SHA encryption cores. Peripherals such as controllers for smart card readers and video displays. An assortment of synchronous UARTs and an SDLC for communications. A variety of basic logic parts and models. A cost-effective solution for extending product life through 2901 processors, Z80 support functions, controllers, peripherals, and many more replacement parts. (http://www.cast-inc.com/ 12 September 2008) Similar to the advantage of third party tools, one of the major advantages of using CAST (third party) IP is that it is hardware neutral and thus will not lock you into a particular FPGA vendor. Besides CAST, other specialized IP vendors are: Cambridge Consultants (http://www.cambridgeconsultants.com/) - Cambridge Consultants is a leading technology and innovation company, renowned for its ability to solve technical problems and provide creative, practical solutions to business issues. They offer an extensive library of analogue, digital, mixed-signal and wireless IP cores together with embedded software development tools, protocol stacks and design platforms for ASIC and FPGA. Our IP cores are portable and flexible, and can be... Eureka Technology Inc. (http://www.eurekatech.com/) - Eureka Technology is a leading intellectual property (IP) provider for ASIC and FPGA designs. The company offers a wide range of fully synthesizable, silicon-proven system core logic functions and peripheral functions to support different bus standards and CPU interfaces, including PCI, PCI-X, PCI Express, Cardbus, PowerPC, ARM, MIPS, ARC, SH2/3/4, SDRAM, DDR/DDR2 SDRAM, NAND Flash, Flash/SRAM/EEPROM, SD memory, SDIO, CompactFlash and PCMCIA. nSys (http://www.nsysinc.com/) - nSys Verification Suite (nVS) family is the largest collection of Verification IPs in native Verilog that is available from a single source. Hundreds of ASIC/FPGA/IP developers are currently using the nVS family to benefit
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from widely accepted and proven Bus Function Models, Monitor, Assertions based Checkers and Test Suites. [Intellectual Property] PLDA (http://www.plda.com/) - PLDA, the largest provider of IP cores for the logical and transport layers of PCI, PCI-X and PCI Express (The Linley Group, Apr 2006), designs and sells a wide range of ASIC, structured ASIC and FPGA interfacing solutions for the PCI Express, PCI, PCI-X, and derivative protocols. The company offers complete solutions, including IP cores, hardware, software, and comprehensive technical support provided directly by the IP designers. RF Engines Ltd (RFEL) (http://www.rfel.com/) - Electronics design and IP (Intellectual Property) company specialising in the development of high performance digital signal processing (DSP) techniques and the development of new products. Provide individual IP Cores and System-Level Cores for Xilinx and Altera FPGAs, intended for use in high performance radio systems, and other signal processing based designs. The company also provides products and complementary System Design and... (See Appendix H for a complete list).
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FPGA BOARDS
If designing FPGAs weren't difficult enough, once an FPGA is designed it has to be integrated onto a printed circuit board. ASIC design companies have whole teams devoted to ASIC / board integration as they would if there were an FPGA / board integration issue. And Altium and Mentor Graphics, as we have seen above, have complete design solutions for this problem, but what do you do if you are in a hurry? The FPGA boards market has four basic groups of board solutions. FPGA development or evaluation boards - these are boards provided by Xilinx, Altera, or another FPGA maker to seed the market by making their FPGAs easy to design with. These are not generally meant as production boards, and are sometimes available through distributors like Avnet or Arrow. 2. FPGA boards for ASIC Prototyping - these are boards, often from Third Parties, that are not meant for deployment but rather for quick and effective prototyping of what will ultimately become an ASIC. 3. FPGA deployment boards - these are FPGA-based single board computers or blades that are meant for actual deployment. Vendors compete to provide boards that are both easy to prototype on and/or easy to deploy. DSP is an especially important subset of this group. 4. FPGA modules - this is a new type of FPGA-based board that is meant as both a development and deployment platform, not particularly for FPGA experts. The best example of this is the CompactRIO product from National Instruments but there are now other examples on the market as well. We shall consider each of these in turn. 1.
FPGA DEVELOPMENT OR EVALUATION BOARDS

The FPGA manufacturers are very eager for you to develop using their products, and so it is usually a simple matter to get your hands on a development board. Simply check their websites and stay alert for special offers or promotions (usually tied to their latest and greatest FPGA). Altera, for example, has a specific web section on development boards at http://www.altera.com/products/devkits/kit-dev_platforms.jsp as well as a special online store (http://www.buyaltera.com/) from which to order kits. And in some cases the development kits are sold in association with third parties that also offer services. One such company is Dallas
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Logic which specializes in digital electronic design, circuit board design, and the delivery of board assemblies for prototype and small production runs (http://www.dallaslogic.com/). Xilinx development boards information is at http://www.xilinx.com/products/devboards/. Similarly to Altera, you can search by application, vendor, or desired FPGA. Lattice development board information is at http://www.latticesemi.com/products/developmenthardware/fpgafspcboards/index.cfm?source =topnav. Don't forget to check out the major distributors like Avnet and Nu Horizons. They often have special offers on new development boards, as well as affiliated design services and educational seminars/webinars - unfortunately, their websites are very difficult to navigate, and it is usually much easier to begin at Xilinx or Altera and follow their own links to get to the development boards. So, first decide which FPGAs are of interest, then find the development boards, and then go to the distributor site. Watch out, however, for special offers and seminar/evaluation kit combinations as these do occur and originate on the distributor websites.
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FPGA BOARDS FOR ASIC PROTOTYPING

One of the larger uses of FPGAs is for ASIC prototyping, an application that requires not just advanced FPGAs but good board and tool support. In this case, there are many third parties that specialize in FPGA boards that are for prototyping. An example board vendor that specializes in this niche is Gidel (http://www.gidel.com/) . The company provides development tools and universal FPGA platforms for systems, ASIC prototyping and algorithm development. GiDEL's high productivity software tools complement high-performance PCI boards and stand-alone boards that offer outstanding cost/performance advantages. GiDEL PROC FPGA boards are used as critical part of vision, imaging, DSP, pattern matching machines and systems. There is also The Dini Group (http://www.dinigroup.com/). If you are not certain whether you will end up with an ASIC or an FPGA, or you want to outsource some of the design services as well as purchase a development board, there are companies that hybridize the board and design services purchase. AMIRIX (http://www.amirix.com/), for example, provides PCI and PCI/e Platform FPGA Development Boards, as well as standard and custom derivative reference designs, for researchers and OEMs looking to develop embedded FPGA System-on-a-Chip (SoC) solutions using Xilinx FPGAs. Trenz Electronic of Germany (http://www.trenz-electronic.de/) has a similar profile, also focused on Xilinx FPGAs. In most cases, these are really service companies and you are paying for their design expertise as much as for the boards. Consequently the business relationship and negotiations are essentially a service negotiation and not a product purchase.
FPGA DEPLOYMENT BOARDS

Because of the attractiveness of FPGAs, there are more and more companies and products that offer deployable boards based on FPGA technology. Application areas include medical, military, and high-end telecommunications and the efforts are to offer standardized products that get you started with a board for which you do hardware and software customization. The great thing here is that much of the initial IP for the FPGA as well as the FPGA/board lay out is already taken care of. Acromag, one vendor specializing in FPGA-based boards, has a useful on-demand PowerPoint presentation on FPGA boards at http://www.acromag.com/software/downloads/Custom_Board_Level_FPGA_Solutions.wmv Another representative example here is Vmetro (http://www.vmetro.com/). According to their literature:
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For leading-edge DSP and data communications, VMETRO provides a range of FPGA hardware solutions based on Xilinxs Virtex-II Pro, Virtex-4 and Virtex-5 FPGA devices. The functionality of Virtex-5 LXT and SXT members now include features such as embedded Ethernet EMACS, PCI Express support alongside RocketIO/GTP high-speed serial communications for highly integrated solutions. Board formats for FPGA solutions that VMETRO can provide range from XMC/PMC mezzanine cards to 6U VME/VXS and VPX. (http://www.vmetro.com/category3949.html 12 September 2008) Vmetro was very assertive this past year in promoting the new FMC standard from VITA (http://www.vita.com/). On 23 April 2008, they announced their ADC510, the industrys first FPGA Mezzanine Card (FMC/VITA 57) module. The introduction of the first FMC module marks a new generation in I/O aimed at FPGAs developers continue to benefit from highbandwidth, low-latency coupling between an FPGA and I/O with a new level of industry standard flexibility, commented Thomas Nygaard, Chief Technology Officer of VMETRO. FMC modules such as the ADC510 can be integrated with baseboards such as VMETROs FPE650 (a 6U VPX board with four Xilinx Virtex-5 FPGAs and two FMC sites) to create very powerful solutions ((http://www.vmetro.com/article4602-3759.html). A final interesting FPGA deployment approach comes from National Instruments (http://www.ni.com/). The innovative Austin-based company launched their CompactRIO product a few years back. Their whole philosophy is really to focus less on the FPGAs and more on the application, and hopefully to enable a whole group of domain experts to harness FPGAs via CompactRIO and NIs LabView software. According to the product information: The National Instruments CompactRIO programmable automation controller is an advanced embedded control and data acquisition system designed for applications that require high performance and reliability. With the system's open, embedded architecture, small size, extreme ruggedness, and flexibility, engineers and embedded developers can use COTS hardware to quickly build custom embedded systems. NI CompactRIO is powered by National Instruments LabVIEW FPGA and LabVIEW Real-Time technologies, giving engineers the ability to design, program, and customize the CompactRIO embedded system with easy-to-use graphical programming tools. (http://www.ni.com/compactrio/whatis.htm 12 September 2008) The positive value in CompactRIO is that it is easy to learn and quick to deploy, while the negative is that it is expensive (especially on a per unit basis) and has a lock in to NI technology, although they do allow you to port your code to processors such as Analog Devices BlackFin. Check out the CompactRIO home page at http://www.ni.com/compactrio/. A world away, Altium (http://www.altium.com/) has come up with a rather similar concept with their Innovation Station. You can ready the flashy marketing literature on it at http://www.altium.com/AltiumInnovationStation/.
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FPGA DEPLOYMENT BOARDS: DSP

Another very common use is for DSP-related applications that can really profit from the processing power and reconfigurability of FPGAs. Indeed, Xilinx even has a special section of its website on DSPs at http://www.xilinx.com/products/design_resources/dsp_central/grouping/index.htm. Among board vendors, many concentrate on FPGA boards for DSP-intensive applications. BittWare, Inc. (http://www.bittware.com/), for example, is a DSP board vendor in Concord, New Hampshire, that has concentrated on DSP boards and has recently launched a series of Altera-based FPGA boards for great processing power. Pentek (http://www.pentek.com/) is
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another vendor that has added FPGA boards to its DSP board line up. That company has an excellent white paper on the XMC standard or VITA 42. The paper explains the rationale for FPGAs in formerly pure DSP applications well: In recent years, FPGAs (field programmable gate arrays) have permeated mezzanine card architectures for reasons entirely incidental to XMC, and yet today FPGAs represent the single most significant catalyst for XMC adoption. FPGAs offer a collection of resources ideally suited for peripheral I/O functions. FPGAs may be configured to implement numerous electrical interface standards as well as a variety of protocol engines. By reconfiguring its FPGA, not only can a single I/O product replace several legacy products, it can also adapt to future standards and protocols as well. This forestalls product obsolescence, both at the board level and at the deployed system level. Another reason FPGAs find their way onto mezzanine cards is their unmatched ability to implement real-time signal processing and high-level local control. FPGAs deal effectively with the very high frontend data rates for A/D and D/A converters, network interfaces, sensor arrays and highspeed data channels by mustering a troop of high-performance hardware resources, configured to match the specific task at hand. For more sophisticated front-end processing, most FPGAs now feature DSP engines with built-in hardware multipliers to tackle the toughest algorithms with ease. Arrays of these engines can be deployed in parallel, completely surpassing the capabilities of general-purpose programmable RISC or DSP processors that must execute serial instructions. By performing these types of intensive protocol, formatting, decoding and DSP functions on the mezzanine, the workload for the processor on the carrier board can be significantly reduced. This may lead to fewer processors or fewer processor boards in the system, for considerable savings in system cost and size. (http://www.pentek.com/tutorials/16_1/XMC.cfm 12 September 2008) One of the major application areas for FPGA-based boards is software radio. Again, Pentek has published a niece overview to the topic, FPGAs for Software Radio (http://www.pentek.com/deliver/TechDoc.cfm/FPGAsfwrad.pdf?Filename=FPGAsfwrad.pdf 12 September 2008). Other vendors active in the FPGA/DSP space include Innovative Integration (http://www.innovative-dsp.com/), Lyrtech Inc. (http://www.lyrtech.com/), Vmetro (http://www.vmetro.com), Hunt Engineering (http://www.hunt-dsp.com/) and Mango DSP, Ltd. (http://www.mangodsp.com/) among others.
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FPGA DESIGN SERVICES

Ultimately, your company is in business to get a product out the door, quickly and under budget, with all the cool new features that will excite your customers and generate product sales. Management may therefore want to consider seriously what part of your design process to keep in house vs. what part to outsource, whether outsourcing is bringing in temporary engineering talent to outsourcing to consultants in your home country to outsourcing to full design companies half a world away. Outsourcing has clearly hit the FPGA field, especially (but not only) where FPGAs intersect with ASICs, and so for the first time we have a special Appendix I on FPGA Design Services. You can use this as a quick index to companies that offer design services.
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As a project manager, therefore, you might want to think about what parts of your design is your special competency and what parts are less relevant. If some of these other parts are more common to many designs, these may be excellent candidates to outsource. Why reinvent the wheel? Why struggle on certain aspects of FPGA design, in which others may already excel and already have done it many times? Take Away. Design service outsourcing is ultimately all about a division of labor between you and the outside design company or consultant. What do you do best? What is not your core competency that might be done more effectively by a specialized outsider? Finding Design Partners There are a few great ways to locate FPGA design partners. First and foremost, eg3.com has spent much of the past year working on our own design partner database, released now in beta form as eg3.com connect (http://www.eg3.com/connect). Click on search services and enter keywords like FPGA PCI Express to browse for service partners that offer both. In addition, Xilinx, Altera, and other FPGA vendors often have partner programs and online catalogs wherein you can search for FPGA design partners. Here are links: Actel Partner Program - http://www.actel.com/products/partners/default.aspx Altera Partner Program - http://www.altera.com/corporate/partners/prt-index.html Xilinx Partner Program http://www.xilinx.com/ise/embedded/epartners/listing.htm
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Another good resource for locating consultants is the IEEE Consultants Database at http://www.ieeeusa.org/business/consultants/cgibin/consultant.cgi?task=display_page/page=home.html/sid=/id=101244720. You can enter search terms like FPGA as well as specify locations and other variables to help identify knowledgeable third parties for your FPGA project. Evaluation a Potential Design Partner All the issues involved in working with outside parties are beyond the scope of this guide. Suffice it to point out that common sense tells you Evaluate skillsets - ask for past projects, examples of past expertise. Check references - ask for and follow up with references from previous clients. Look for skill examples - use their websites and portfolios to look for projects that they have done that are similar to your needs, check white papers, presentations, technical conferences, etc., to validate skills. Start small - do a small project first and see how they work out.
A good example of online technical presentations that establish credibility for FPGA designs comes from Octera at http://www.octera.com/technology/. They also have a decent overview to the whole choosing a design partner issue.
1.21
FPGAS, TOOLS,
For a nice general overview to design service outsourcing, check out the white paper from SSI Embedded at http://www.ssiembedded.com/Consult_White_Paper.pdf. Its not specific to FPGAs but it covers many of the basic issues involved in design outsourcing. Finally, check out Appendix I for design service companies, and spend some time surfing to and researching websites before you decide whom to contact. Then send out queries and set up brief email or phone interviews for your short list.
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1.22
FPGA Survey Results

What do real users of FPGAs think? Are there hidden gotchas amongst FPGAs, tools, and/or boards? How do expert users differ from novices or newbies? We polled our e-clips audience, and present herein our survey results from September, 2008. FPGA USERS SURVEY SURVEY DEMOGRAPHICS AND FPGA EXPERTISE VERTICAL INDUSTRIES APPLICABLE TO FPGAS REASONS ENCOURAGING DESIGNERS TO USE FPGAS FPGA VENDORS: FAMILIARITY AND OPINIONS FPGA TOOLS: FAMILIARITY AND OPINIONS FPGA IP: FAMILIARITY AND OPINIONS FPGA BOARDS: FAMILIARITY AND OPINIONS FPGA DESIGN INFORMATION FPGA ANECDOTES
FPGAS, TOOLS, AND BOARDS: SURVEY RESULTS
FPGAS, TOOLS,
FPGAS: USER SURVEY

What do real users of FPGAs think about FPGAs? Are they a good design choice? Are there hidden gotchas in the design process? Do you need to be an expert to program them, or are the commercially available design tools sufficient? And what about newbies - people selecting FPGAs for the first time? How do their preconceptions of FPGAs compare and contrast with the experts who have at least one FPGA design under their belt? eg3.com operates one of the largest news services in the embedded systems industry, e-clips (http://www.eg3.com/eclips/). With 43,000 subscribers, e-clips is a useful community that eg3.com can poll about their pre- and post-design experiences. To that end, we sent out a request in September, 2008, and had 680 willing volunteers take an extensive survey on FPGAs, tools, and boards. This was way up from last years 359, perhaps indicating increasing popularity for FPGAs as well as increasing popularity for this guide, itself. Below we present our analysis and results.
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BOARDS: FPGA SURVEY RESULTS
SURVEY DEMOGRAPHICS AND FPGA EXPERTISE

680 persons responded to our survey on their hopes, frustrations, fears, and design experience with FPGAs. 369 of these were students or academics, so in most answers below we have excluded this group from our analysis since we are focused on commercial applications. For the questions and graphs below, we indicate how many actual respondents there are for each question, which is a smaller subset as well.
JOB TITLE
What sorts of persons are interested in FPGAs? As is true for most embedded systems, the days of software guys vs. hardware guys no longer apply. Of the 289 people who provided a job title, 46.00% - a plurality - indicated that they both do hardware and software, followed by 15.2% doing software only, 20.4% doing hardware only, and 18.3% managing an engineering team. With FPGAs providing a choice between running an application in hardware vs. in software, design trade-offs are facilitated by people with expertise in both, as well as design teams that have both software and hardware guys.
EXPERIENCE WITH FPGAS

How experienced is this community with FPGAs? Are there a lot of FPGA experts out there, or a lot of people coming in to FPGAs for the first time? We were very curious about FPGA experience, and can provide this graph of the total community:
2.1
FPGAS, TOOLS,
Years Experience with FPGAs

> 10 years 4-10 years 1-3 years < 1 year Considering FPGAs 0.00% 5.00% 10.00% 15.00% 20.00% 25.00% 30.00% 35.00%
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n=311
A majority of survey respondents have less than three years with FPGAs, but there are good minorities with over ten years and from 4-10 years. In addition, fully 26.37% indicated that they were considering FPGAs - up from 19.65% last year - further indicating that FPGAs are increasing in popularity as a design choice. For the analysis that follows, we designated those with more than one year experience as our expert group, and those with no experience our newby group. We hope that by comparing experts and newbies, we can help readers of this guide to learn from the experience of the experts as well as the naivete of the newbies.
PROJECT SIZE
This year we asked about FPGA team size, to get a sense of the big vs. small dynamic in FPGA designs.
Typical Project Size

>25 persons 10-25 persons 5-10 persons 2-5 persons 1 person 0.00% 10.00% 20.00% 30.00% 40.00% 50.00% 60.00%
n=295
2.2
FPGAS, TOOLS,
Typical project size is 2-5 persons (51.53%); in all but 26.10% of cases individuals are collaborating in FPGA designs. FPGAs are a team project.
INVOLVEMENT WITH FPGAS

How involved are survey respondents with FPGAs and with the various components of the FPGA ecosystem?
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Involvement with FPGAs / Total Group

IP for FPGAs Open Source FPGA tools FPGA third party tools FPGA tools from FPGA vendors FPGA deploy boards FPGA dev boards FPGA(s) for ASIC prototyping FPGA(s) for FPGA deployment -50.00% n=262 -30.00% -10.00% 10.00% 30.00% Used 50.00% 70.00% 90.00%
Never used
Currently Evaluating
Frequently used
We assigned positive percentage values to current evaluating, used and frequently used and a negative percentage value to never used. This allowed us to sum the percentages to create a (rough) score by which we can measure how many people are most involved with a particular subset. Here are the scores for the total group:
FPGA dev boards FPGA tools from FPGA vendors Open Source FPGA tools FPGA deploy boards FPGA(s) for FPGA deployment FPGA third party tools IP for FPGAs FPGA(s) for ASIC prototyping
Score 53.36% 52.89% 39.29% 38.33% 34.55% 28.77% 23.28% 4.63%
2.3
FPGAS, TOOLS,
Most people use FPGA development boards and tools from the FPGA vendors themselves; the least use FPGAs for ASIC prototyping. IP also scores near the bottom in terms of familiarity. Among the expert group the scores were as follows:
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FPGA(s) for FPGA deployment FPGA(s) for ASIC prototyping FPGA dev boards FPGA deploy boards FPGA tools from FPGA vendors FPGA third party tools Open Source FPGA tools IP for FPGAs
Score 52.04% 16.40% 78.79% 66.83% 78.11% 44.79% 49.49% 49.52%
And if we compare the score order of the experts vs. the newbies to rank each item by familiarity, we get: Experts Rank: FPGA dev boards FPGA tools from FPGA vendors FPGA deploy boards FPGA(s) for FPGA deployment IP for FPGAs Open Source FPGA tools FPGA third party tools FPGA(s) for ASIC prototyping 1 2 3 4 5 6 7 8 Newby Rank: 2 3 4 7 6 1 5 8
We have bolded those categories in which the rank difference is greater than two. Newbies rank open source FPGA tools as the most familiar FPGA subset, whereas experts (and the total group) rank FPGA development boards as most familiar. Similarly, newbies rank FPGAs for FPGA deployment in No. 7, vs. No. 4 for experts. Coming with less experience and closer to the academic environment, newbies are more likely to be familiar with open source tools and more focused on FPGAs themselves, while experts are more focused on practical deployment (e.g., boards) than on the more ivory tower issues involved in FPGA design and open source (translation: academic) projects. For the experts as for the total group, the highest involvement is with FPGA development boards and with tools from the FPGA vendors themselves. This dynamic shows up elsewhere in the survey. It is both important and not surprising: the FPGA manufacturers know their own technology best, have huge incentives to provide basic software, and thus most FPGA designers end up interacting with the vendor-supplied FPGA development boards and/or software. Take Away. The big FPGA vendors, notably Xilinx and Altera dominate the ecosystem - they should be your first stop in selecting an FPGA and you should be comfortable not just with their FPGA technology but with their tool chain as well. In addition, as we shall see later, it is usually not a choice of either software from the FPGA vendors or third party software, but rather both. Even if you buy an FPGA board you will be
2.4
FPGAS, TOOLS,
working with a Xilinx, Altera, Lattice, or Actel FPGA and accordingly with their development tools. If you choose to use third party vendors or open source software, these will be in addition to and not instead of the FPGA vendor choice. Turning to FPGAs for ASIC prototyping, this category is a bit misleading in terms of raw numbers. ASIC prototyping - by the very fact that ASIC design starts are relatively few - is something that is done by a relative minority of engineers. But to those who are doing ASICs and are involved in ASIC prototyping, FPGAs can be an excellent vehicle. FPGA development boards, in contrast to FPGAs for ASIC prototyping, are used by a wide group because they have wide applicability to many, many designs. Take away: if you are considering FPGAs as an ASIC prototyping tool, dont be discouraged by the smaller numbers of survey respondents. This important facet of FPGAs is, by its very nature, a smaller community. On the other hand, the FPGA vendors are keen to win over ASIC designs for FPGA deployment. So if you are considering using an FPGA to prototype for an ASIC, consider (if possible) deploying in the FPGA as well. We are sure that the sales engineers from Xilinx or Altera would love to have the opportunity to compare and contrast their FPGA technology with ASICs.
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VERTICAL INDUSTRIES APPLICABLE TO FPGAS

If you ask a person with a hammer, so the saying goes, everything will appear to be a nail. So it is with hardware and software vendors. If you ask the marketing or sales rep at an FPGA vendor, what applications are especially good for FPGAs, you will often be told, everything. More realistically, FPGAs are often seen as applicable for signal processing and data applications, and these days for more and more consumer applications. So we asked our audience, Which vertical industries have you primarily or often used FPGAs for? The answers did not differ substantially among the three groups.
2.5
FPGAS, TOOLS,
Vertical Industries for FPGAs

40.00% 35.00% 30.00% 25.00% 20.00% 15.00% 10.00% 5.00% 0.00% Test and measurement Automotive and/or Transportation Medical Military and/or Avionics Networking / Telecomm Industrial auto/process control Computer peripherals Consumer electronics Mobile / Wireless Other
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n=256
Industrial control and telecommunications infrastructure were statistically tied at 33.96% for each. Mobile wireless was at 29.81%, followed by computer peripherals at 26.79%. What is striking about this data is the sheer breadth of application areas in which FPGAs play. FPGAs are clearly a technology with broad reach, and in terms of your own design technology or career seem to be a good bet beyond one single vertical industry. Take Away. Dont forget about your own career development. FPGAs are a technology with broad applicability and many (emerging) features that make them highly competitive - choosing an FPGA for a design today may set up your professional skills to be in higher demand tomorrow. One caveat is in order. Asking a group of engineers the vertical industries that they are designing for may not be indicative of the total dollar volume, of FPGAs shipped, for any given industry. One design win in consumer electronics, for example, may mean many millions of units shipped vs. one design win in telecom infrastructure which might be just a thousand units. This is a quantitative graph, but it indicates that FPGAs are applicable to a wide variety of vertical markets.
2.6
FPGAS, TOOLS,
REASONS ENCOURAGING DESIGNERS TO USE FPGAS

FPGAs are known for their high performance and reprogrammability, and have been widely used for ASIC prototyping as well as in DSP (signal processing) applications. What reasons did the survey group use for looking at FPGAs? Again there were no significant differences among the groups.
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What reasons encourage you to use FPGAs?
FPGA Flexibility
FPGA Reprogrammability
ASIC Prototyping
FPGA for DSP
FPGA Processing Pow er
-40.00% -20.00% NA
0.00%
20.00% Important
40.00% Neutral
60.00%
80.00%
100.00% 120.00% Essential
n=254
Not Important
Very important
Flexibility and reprogrammability are the key factors that draw engineers to FPGAs with over 25% indicating that these characteristics are essential to their design choice. Sheer processing power, while attractive, scores only 15.61% essential and ASIC prototyping has the highest negatives, which again is to be expected.
FPGA VENDORS: FAMILIARITY AND OPINIONS

When making the major commitments of life - whom to marry, what car to buy, what neighborhood to live in, what FPGA to include in a design - everyone would like the benefit of the experiences of a large group of people, from that early moment of choice all the way through to project completion. Indeed, this is why we emphasize in our survey results the experiences of experts as a window into expertise and newbies as a window into ones original preconceptions. That said, two caveats are in order:
2.7
FPGAS, TOOLS,
Small Sample Size - our sample size, given the vagaries of engineering and the Internet, is small enough that all results herein should be taken skeptically. Many differences are within, or close to, the margin of error. So take these conclusions more as anecdotal opinions than hard survey facts. 2. Design Uniqueness. - each FPGA-based design is unique, addressing a unique set of design needs, cost parameters, and designer preferences. Just because the crowd thinks that such-and-such is fantastic, or hasnt heard of such-and-such does not mean that your own FPGA choice should follow the crowd logic. Read and research everything, but ultimately make an in-depth choice of the best FPGA, tool, and/or board for your own personal design project, and the crowd be damned. That said, we asked engineers a range of questions on their familiarity and opinions of different vendors and design choices. It is a useful look at the before and after FPGA experience, of interest, to any engineer currently selecting an FPGA, tool, and/or board.
1.
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FAMILIARITY WITH FPGA
VENDORS
Familiarity with FPGA Vendors / Total Group

Xilinx Altera Actel Lattice Cypress (pSOC) -80.00% -60.00% -40.00% -20.00% n=248-201 Never used 0.00% 20.00% 40.00% 60.00% 80.00% 100.00%
Evaluating
Familiar
Used Once
Used Frequently
It is not surprising the Xilinx is the most familiar of the FPGA vendors. What is surprising is the extent to which Xilinx dominates the industry with only 12.44% indicating that they had never used Xilinx. Altera is behind at number two (25.95% say that they have never used Altera), while Actel, Lattice, and Cypress (which we included because of their FPGA-like pSOC product) are quite behind. Market share and mind share seem to go together - but this does not, of course, mean that on a technical level Xilinx or Altera will necessarily be your best bet. We eliminated MathStar (defunct) and Quicklogic and Atmel (now deemphasizing the FPGA market) in this years survey.
2.8
FPGAS, TOOLS,
Does familiarity breed contempt? Or are Xilinx and Altera users happy with their choice? Only the experts really know, with real designs under their belt, and here is the data from the expert group.
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FPGA Recommendations / Expert Group

Altera Xilinx Lattice Cypress (pSOC) Actel -20.00%
n=83-145
0.00%
Not recommend
20.00%
Neutral
40.00%
Recommend
60.00%
80.00%
100.00%
120.00%
Strongly recommend
Used Frequently
Evidently, familiarity breeds success in the FPGA market as Xilinx and Altera expert users are very satisfied with their choice. Both of the big vendors have happy customers, but Xilinxs seem to be even happier! Take Away. The survey results indicate that generally most FPGA users are very happy with their FPGA vendor, but that Xilinx users are the happiest of all. Actel in contrast has high negatives (13% not recommend vs. 2.07% for Xilinx). Actel has focused strongly on low power issues in recent years, and perhaps the negatives occur from customers that are not low power customers that nonetheless get entangled with Actel for other reasons, only to find out that their designs are not a great fit and/or great priority for the company. But even with Actel, the vast majority of users are satisfied. The bottom line is that if you do your technological home work, you have a very good chance of being very satisfied with your FPGA vendor choice regardless of which company it is. Take away. Because each design project is unique, be aware that what might work for most engineers might not work for you because your design is unique, and your requirements might be better fit on a technical level by a smaller more niche FPGA vendor. On the other hand, having a robust ecosystem is important and having a large user community is part of that ecosystem. Xilinx and Altera have the largest. A robust ecosystem means many third party tools, a vibrant user community, and larger pool of possible technical hires or consultants, and a larger market commitment to product longevity. These may trump the technical merits of FPGAs from smaller vendors or start-ups.
2.9
FPGAS, TOOLS,
Looking at the big picture of customer satisfaction, comparing the positive scores among newbies vs. those of experts, the newbies are consistently less positive than the experts. This is good news for those involved in FPGAs, because it shows that experience confirms that, generally, the FPGA experience is a good one. Satisfaction Not satisfied at all Not satisfied Neutral Satisfied Very satisfied Percent 0.99% 1.48% 20.69% 56.16% 18.23%
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Almost 75% (74.39%) of expert users indicated that they were satisfied or very satisfied with their FPGA vendor.
SATISFACTION IN GENERAL WITH FPGAS

How satisfied, in general, is the community with FPGAs? Would they recommend them to their peers? Is it a generally pleasant and productive design experience? We asked a range of general questions, and this year there were more than enough experts to focus on the opinion of those who have real design experience with FPGAs.
Question: Do not agree: Neutral: Agree: Score: FPGAs are as easy to design with as standard MCU/MPUs (-)12.37% 24.23% 62.89% 74.74% The technical support from big FPGA vendors is good (-)5.15% 28.87% 65.46% 89.18% The technical support from distributors like Avnet or Arrow is good (-)7.94% 41.27% 37.57% 70.90% The big FPGA vendors have helpful seminars, webinars, and other ways to learn about FPGAs (-)5.70% 24.35% 65.80% 84.46% I would recommend that other engineers use FPGAs (-)1.03% 11.79% 86.67% 97.44% FPGA projects have many hidden 'gotchas' or unforeseen design complexities (-)12.63% 41.58% 42.11% 71.05% FPGAs have good price/performance for designs (-)4.66% 22.80% 71.50% 89.64% Again, we assigned negative values to do not agree to allow for a summation / score. What is striking about these data from the experts (n=200) is how generally satisfied the respondents are. The highest negatives are on the ease-of-use of FPGAs (around 12% negative), but tech support especially from the Xilinx and Altera sort of vendors scores very well. Fully 86.67% would recommend that other engineers use FPGAs. Another area is that while there are many engineers satisfied with distributor support, the positive numbers for Avnet and Arrow are significantly lower than for the FPGA vendors themselves, in fact the lowest of any of the questions presented. Again this confirms the primary survey theme: go to the FPGA source (aka Xilinx or Altera) rather than distributors or others. Copyright 2008 eg3.com No Reproduction or Further Dissemination Allowed. 2.10
FPGAS, TOOLS,
FPGA TOOLS: FAMILIARITY AND OPINIONS

FPGAs are nothing without tools, but one of the unusual characteristics of FPGAs is the depth of free tools provided by the FPGA vendors vs. the paid tools of a vibrant third party ecosystem. As we discussed in the introduction there are several sources of FPGA tools: The FPGA vendors themselves like Xilinx, Altera, Lattice, etc. - who usually provide free or low cost tools and intellectual property (IP) to entice designers to use their FPGAs; Third party tools providers like Altium, Mentor Graphics, Synplicity/Synopsys, Aldec and others who provide tools for sale; Open source FPGA tools; and Tools from board vendors like Pentek, National Instruments, Bittware or others that work in tandem with their FPGA-based boards.
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(See the Interview section for some interesting vendor perspectives on FPGA tools, free vs. third party). From the community perspective, we asked developers their opinions about FPGA tools and the tools ecosystem focused on three big groups: free tools from the FPGA vendors themselves, commercial third party tools, and open source FPGA tools.
Familiarity with FPGA Tools / Total Group
Open Source FPGA tools
3rd party FPGA tools (Mentor, Altium, etc.)
FPGA vendor tools (Xilinx, Altera, etc.) -60.00% -40.00% -20.00% n=322-389 Never used Evaluating Familiar Used Once Used Frequently 0.00% 20.00% 40.00% 60.00% 80.00% 100.00%
First, you can see that the free vendor tools from Xilinx and Altera enjoy enormous familiarity. This is a no brainer since everyone who might be interested in FPGAs is going to eventually try out the tool chain of the relevant vendor. And second, in contrast, both the free open source and paid third party tools have very large unfamiliarity scores. 46.27% have never used the tools, a factor which indicates just how undeveloped the FPGA tools ecosystem is. Price cant be the problem, either, as fully 43.71% have never used the open source tools either.
2.11
FPGAS, TOOLS,
Take Away. The community remains relatively unaware of open source and third party FPGA tools. However, the communitys lack of awareness may be your own competitive advantage by finding a (relatively unknown) tool that improves your productivity! Comparing the total group with the experts group, you can see that the depth of the awareness problem:
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Familiarity with FPGA Tools / Expert Group
FPGA vendor tools (Xilinx, Altera, etc.)
-60.00 -40.00 -20.00 0.00% 20.00 40.00 60.00 80.00 100.00 120.00 % % % % % % % % %
n=166-192 Never used Evaluating Familiar Used Once Used Frequently
Even the experts are relatively unaware of the third party and open source FPGA tools at 33.73% and 38.60% never used. For the FPGA vendor tools, the never used component drops to 3.34% vs. 9.51% for the total group. Take Away. When it comes to tools, pay attention first and foremost to the tools of your FPGA vendor. After that, you can be ahead of the pack by doing some research to identify possible open source or third party tools that your FPGA vendor may be unaware of, or not motivated to promote. In many cases, these third party tools may increase your productivity and speed your design so your research may be rewarded. There are not, of course, great differences between the total group and the experts. What stands out most dramatically is that 100% of the experts are involved with the FPGA vendor tools: these tools are critical to using FPGAs. In other words, when you are evaluating an FPGA vendor you should also evaluate their tool chain. Download their demo or free evaluation tools and make sure that you like the look, feel, and usability of their tools and IDEs. It is not just the technical specifications of an Altera, Lattice, Actel, or Xilinx but also the usability of their tools that are important in getting your design to market efficiently and on time. Following that, 65.45% of experts actively use at least one third party tool, with only 39.62% using open source tools. Clearly, therefore, the third party tools are most often complementary and
2.12
FPGAS, TOOLS,
not fully competitive with the vendor-supplied FPGA tools. Thus in evaluating an FPGA choice you should consider the third party tool ecosystem as well as a factor. Would the community recommend tools? Are they satisfied or dissatisfied with the FPGA vendor tools, the third party tools, and/or the open source tools? Since only the experts have real indepth familiarity with tools, lets look at whether or not they would recommend various types of FPGA tools:
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FPGA Tools Recommendations / Expert Group
FPGA vendor tools (Xilinx, Altera, etc.) -80.00% -60.00% -40.00% -20.00% 0.00% n=198 Not recommend Neutral 20.00% 40.00% 60.00% 80.00% Strongly recommend 100.00 %
Recommend
Their most positive experience is with the FPGA vendor tools, which with 198 persons responding, no single person indicated that they would not recommend the tools (!). Only 8.67% were neutral. This indicates again, that there are very high levels of satisfaction with the Xilinx, Altera, Lattice, Actel tool chains at a general level. With respect to open source or third party tools, the negatives grow somewhat but remain low. Only about 6% would not recommend this tools choice. The difference is primarily in the neutral area, in which almost 40% of third party and 53% of open source are neutral. Take Away. Most users love their FPGA vendor tools, but are more lukewarm with respect to open source and/or third party tools.
2.13
FPGAS, TOOLS,
What are the general opinions of tools? We asked a large set of questions about the FPGA tools experience.
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Opinions of FPGA Tools / Total Group
90.00%
70.00%
50.00%
30.00%
10.00%
-10.00%
-30.00% There are FPGA tools There are There are FPGA tools from third many good many good many good from the parties like tools for tools for FPGA tools major FPGA Mentor that make FPGA/Board integrating IP vendors like Graphics, into FPGAs Altera, Xilinx, FPGA design integration Altium, easy Actel - are Synplicity helpful and others are a good value n=206 Do not agree Neutral The lack of FPGA tools FPGA tools from major FPGA tools is from major a big problem FPGA FPGA vendors are vendors are sufficient not sufficient / one needs to use paid 3rd party tools as w ell
Agree
Here again, we see a very strong positive opinion of FPGAs and FPGA tools. There is a small but significant minority, however, that sees a need for third party FPGA tools at 12.37% indicating that FPGA tools from FPGA vendors are not sufficient and 37.57% indicating that you should use third party tools. 29.32% indicate that the lack of FPGA tools is a problem. So, bottom line, the situation is mixed. There is high satisfaction with the existing tools, but a vague underlying desire for better tools. Here is a chart showing the scores and differences between the total group and the experts:
2.14
FPGAS, TOOLS,
Total Grp Experts Diff FPGA tools - from the major FPGA vendors are helpful 92.00% 96.20% 4.20% There are many good FPGA tools that make FPGA design easy 93.26% 93.41% 0.14% There are many good tools for FPGA/Board integration 86.15% 86.26% 0.11% There are many good tools for integrating IP into FPGAs 87.17% 85.56% -1.61% FPGA tools - from third parties - are a good value 83.25% 81.77% -1.48% FPGA tools from major FPGA vendors are sufficient 70.62% 64.48% -6.14% FPGA tools from major FPGA vendors are not sufficient 61.38% 58.43% -2.95% The lack of FPGA tools is a big problem 50.26% 45.56% -4.71% The highest divergence occurs on whether FPGA tools from FPGA vendors are sufficient, with experts being more likely to give negatives. Similarly, more experts are more likely to see the lack of FPGA tools as a problem and slightly less likely to see the FPGA tools from FPGA vendors as helpful. Take Away. Experienced users are more skeptical of tools, perhaps because actual use creates an awareness of the real limitations inherent in FPGA tools.
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FPGA IP: FAMILIARITY AND OPINIONS

Intellectual Property or IP is used in most FPGA designs. Indeed, IP use and reuse is one of the Holy Grails of FPGA-based design. Designers often create their own IP, purchase third party IP, and/or use IP provided by the FPGA vendor or board manufacturer (in the case of third party boards). In many cases there are tools and IDEs to help facilitate FPGA IP integration and verification. The downside to IP is there is a lot of distress in terms of IP purchase, integration, and verification. So we asked the survey group about their experiences with IP, specifically IP for FPGAs.
Familiarity with Intellectual Property ("IP") / Total Group
Open Source IP
3rd party FPGA IP tools (CAST, PLDA, Mentor, Synopsys, etc.) FPGA vendor IP (Xilinx, Altera, etc.)
-50.00%
-30.00%
-10.00%
10.00%
30.00%
50.00%
70.00%
90.00%
n=192
Never used
Evaluating
Familiar
Used Once
Used Frequently
2.15
FPGAS, TOOLS,
Again, one sees that the FPGA vendor supplied IP is the most known with third party IP and open source IP basically tied. The expert group did not differ significantly from the total group in its relationship to IP. After usage, what were the opinions of IP? It happens to be one of the more troublesome areas of FPGA designs, somewhat more troublesome than tools.
AND
Intellectual Property Recommendations / Expert Group
Open Source IP
3rd party FPGA IP tools (CAST, PLDA, Mentor, Synopsys, etc.) FPGA vendor IP (Xilinx, Altera, etc.)
-20.00%
n=175
0.00%
20.00%
40.00%
Neutral
60.00%
80.00%
100.00% 120.00%
Not recommend
Recommend
Strongly recommend
Whereas zero percent of experts checked not recommend for FPGA vendor tools, .82% indicated not recommend in terms of IP. 8.16% would not recommend open source IP, and 4.63% would not recommend third party IP. The numbers are slightly lower for open source and third party IP vs. tools, indicating perhaps a small trend favoring IP from these sources although at a general level satisfaction with IP is high across the board and highest, again, with the FPGA vendor IP. What is the general opinion of FPGA IP?
2.16
FPGAS, TOOLS,
Opinions on IP / Total Group

70.00% 60.00%
AND
50.00% 40.00%
30.00% 20.00% 10.00%
0.00% -10.00%
-20.00% -30.00%
FPGA IP is helpful There is a lot FPGA IP - from FPGA IP from FPGA IP from The lack of FPGA IP is a major FPGA of good FPGA third parties is major FPGA IP a good value vendors is vendors is not big problem sufficient sufficient FPGA Cores help make FPGA easy
n=188
Do not agree
Neutral
Agree
Again, as we have seen throughout the survey the general attitudes are very positive. Most users seem to be satisfied with their IP choices for FPGAs. Indeed, there were no statistically significant differences between the total group and the expert subgroup.
2.17
FPGAS, TOOLS,
FPGA BOARDS: FAMILIARITY AND OPINIONS

FPGAs are ultimately put onto printed circuit boards or PCBs. Even if you are only working on the FPGA portion of a design, your FPGA will probably sit on some PCB somewhere, and there are FPGA/board integration issues. (Consider Mentor Graphics or Altiums products if you want to design your own PCB). In fact, many embedded systems engineers turn to third party boards as either evaluation or deployment boards.
AND
FPGA Boards Familiarity / Total Group

Development Boards
Deployment Boards
DSP boards
ASIC Boards
-70.00% n=162-172
-50.00%
-30.00%
-10.00% Evaluating
10.00% Familiar
30.00% Used Once
50.00%
70.00%
90.00%
Never used
Used Frequently
Not surprisingly, almost everyone has used FPGA evaluation boards. Fewer have used FPGAs in deployable boards, about the same have used DSP boards with FPGAs, and the fewest have used FPGAs for ASIC prototyping. There are no real surprises here. But how happy are designers with FPGA boards? Here there are some surprises - some of which might be very relevant to your FPGA board choice.
2.18
FPGAS, TOOLS,
FPGA Board Satisfaction / Expert Group

Evaluation Boards Deployment Boards
AND
DSP Boards ASIC Boards

-20.00% n=171 0.00% 20.00% 40.00% Neutral 60.00% 80.00% 100.00% 120.00%
Not recommend
Recommend
Strongly recommend
As with many other questions in the survey, it is striking how positive users are about the FPGA vendor products. Clearly, using an evaluation board from Xilinx or Altera is an excellent choice. For third party boards, the negatives are higher both absolute negatives (e.g., 6-7% typically would not recommend a third party choice) and in the lukewarm recommendation of neutral (in the 55% range for all vs. 19% for the FPGA vendor boards). On the other hand, the awareness of third party boards is also not as great, so it may be a situation in which unfamiliarity with the products creates skepticism and negative ratings. Take Away. Boards, as so many other FPGA related products, are clearly best for evaluation purposes from the FPGA vendors themselves. For deployment, DSP, and/or ASIC prototyping, the third party ecosystem has positive reviews overall but not near the state of euphoric endorsement that characterizes the FPGA vendor boards. In this situation, we would recommend choosing a third party board from a vendor that works closely with a semiconductor partner. What then were the general opinions about FPGA boards? As for the other research areas, we asked a series of questions on the topic.
2.19
FPGAS, TOOLS,
FPGA Boards General Opinions / Total Group

110.00%
AND
90.00%
70.00%
50.00%
30.00%
10.00%
-10.00%
-30.00% There are many ASIC FPGA boards good FPGA prototyping are are useful for boards. a good choice DSP The major FPGA vendors provide many good FPGA Eval Boards FPGA boards The lack of are a good FPGA boards is solution vs. a big problem "doing it all yourself" FPGA "development boards" are useful
Do not agree n=186
Neutral
Agree
Here again most of the responses were highly positive. Only in the area of the relative lack of good FPGA boards were there some negatives at 9.60% indicating do not agree. Evaluation and development boards scored the highest marks.
FPGA DESIGN INFORMATION

eg3.com is all about finding the best information on the Internet for topics in embedded systems, and in this case about FPGAs. Our information on FPGAs is updated weekly and each
2.20
FPGAS, TOOLS,
week we send out new alerts via e-clips to interested engineers based on keyword topics, including FPGAs (http://www.eg3.com/eclips/). That said, it was interesting to poll the audience on what sources of information they have found useful in their hunt for FPGA educational information. Here is one final graph in the survey indicating the relative popularity of various sources of information, both on and off the Internet.
AND
2.21
FPGAS, TOOLS,
FPGA Information Sources / All Respondents

Xilinx online FPGA education eg3.com FPGA coverage embedded.com Altera online FPGA education fpga-guide.com FPGA journal eLetter Programmable Logic Designline Techonline Webinars fpgaw orld.com DSP-FPGA.com comp.arch.fpga FPGA Blog FPGA Central Avnet Worldw ide FPGA seminars Design and Reuse Design Automation Conference EDAcafe (edacafe.com) FPGA Summit (Conference) FPGA w orld (conference) SOCcentral.com DesignCon Conference FPGA Developer eLetter -60.00% -40.00% -20.00% n=354 Never used Not very useful 0.00% 20.00% 40.00% Useful 60.00% 80.00% 100.00%
AND
Not useful
Neutral
Very useful
2.22
FPGAS, TOOLS,
Again what is surprising here is that the Number 1 and Number 4 most popular resources were Xilinx and Alteras websites. Take away. The vendor sites themselves are excellent resources of FPGA information, but when using vendor sites do not forget that they are not neutral but rather biased as sales tools to sell their own products.
AND
Among media sites, eg3.com did well as did embedded.com, both better then FPGA-centric sites. There is somewhat of a bias, therefore, towards general coverage - perhaps reflective of FPGAs broad reach. Another way to look at this is that the survey respondents are a broad crosssection of FPGA users, while the FPGA centric portals and eLetters really focus on FPGA designers - i.e., Xilinx and Alteras big customer wins and not the many, fractured small users of FPGAs. Thats just speculation, but nonetheless the relative weakness of FPGA sites indicates that at a minimum, they do not yet have broad crowd appeal.
FPGA ANECDOTES
Finally, we wanted some qualitative opinions about the FPGA experience. Imagine you were at a trade show event, drinking beers with fellow design engineers or programmers, and you asked them their best and worst experience with FPGAs. Obviously this would not be a scientific sample - the ones who chimed in with their worst or best experience might be the most gregarious or just the most drunk. But nonetheless it is always interesting and valuable to hear word-forword what others have experienced on the long road to a successful electronic design. We therefore asked three anecdotal questions: As a potential user or evaluator of FPGAs, what has been your biggest difficulty so far? What sort of information would you like to find available? 2. As a user of FPGAs, what WARNING message would you like to convey to other, future users of FPGAs? What has been your greatest problem(s)? 3. As a user of FPGAs, what POSITIVE message would you like to convey to other, future users of FPGAs? What has been your greatest success or positive experience with FPGAs? Here are some anecdotes: 1.
BIGGEST DIFFICULTY
Whether to use an FPGA or not? Performance comparison when the alternative designs one might use are/seem so different. Board design process. Difficulty in understanding and evaluating all the FPGA Families. Timing closure of big designs; lack of good tools for timing closure and incapability of FPGA to handle multiclock designs. Also good freely accessible online tutorials [are lacking], which [would help] makes a newbie familiar with the FPGA Interface; how does it work and so on.. All - would be really helpful. More information about warnings and errors for debugging. Getting to know design details from User Blogs. email contacts of IP holders [are lacking].
2.23
FPGAS, TOOLS,
Overall pricing (HW,SW and UP). Optimization behaviour of tool is difficult to understand for big designs. No good technical support for FPGA based embedded designs (Microblaze). FPGA designers are for the most part when starting a new project with a new FPGA are left to their own to figure which is the most cost effective FPGA for their design before the design even exists but tools have to be purchased to evaluate the design from many companies and lack of equivalence tables from vendors means time and money are wasted in figuring out which IC is right for a project. therefore better cross comparison information should be available as well as free development tools from vendors which are not stripped down versions of their development systems. More info' on actual mapping to specific FPGAs. Also, more on actual selection criteria. FPGA tools, FPGA boards. I am still in the process to learn, I would to want applications, with port USB-PC control and management is used. Difficult to evaluate all, the models and evaluation are difficult for new ones. Found it difficult to use GNU compiler tools for Xilinx PPC and Microblaze embedded CPUs. I think a software like LABVIEW from National Instrument can match with other software for example ISE from Xilinx and use both of them to simulate the project as a real but using training board like Spartan3 need a lot of time to see the result and compile the program on chip and I think it's not really useful. I need more tutorials, more simple designs to understand FPGA environment. While the HDL languages are relatively simple the concepts of electronic circuitry are tricky. There is a lot of good info available. It just means studying and practice.
AND
WARNING MESSAGES
Speed of operation. Power consumption. Not easy to debug. Interfacing devices such as sensors, webcam, camera, etc. Lack of FPGA boards. The warning I [would] like to convey [to] other users of FPGA's are that you select your FPGA based on the requirement and not what is advertised. Evaluate your requirement first before choosing suitable FPGA for your application. FPGA's are a tool - they do not replace the need for astute field design - waste (time & resources) are issues to be avoided.
2.24
FPGAS, TOOLS,
Advertising and sparkle sheets are not real products, nor does the purchase of an FPGA guarantee quality factory support. You have to change your mind regarding FPGA programming in comparison with MCUs. Parallel vs. sequential logic! FPGA designs are much dependent on design architecture and description. Careful understanding of design entry (usually VHDL/Verilog) is per is not sufficient to achieve good results. It's necessary to know implementation. Be very careful while designing PCB with FPGA. It takes a lot of patience to study them. The crossing the desert phase takes a lot of time, but it is satisfying! The start-up of new designs can be slow. The idea of using 3rd party IP can be very misleading and time consuming as you try to integrate an IP that you should have designed from scratch yourself. There has been no problems so far other than timing mismatch between prototype FPGA and final product ASIC. Try the free tools , try samples , try EVERYTHING before you buy. Stay AWAY from companies who doesn't offer samples and at least some trial tools.
AND
POSITIVE MESSAGES
High performance, freedom of design. We use FPGAs and CPLDs to teach Digital Circuits and develop new projects. Working with them is easy and permits us to modify the circuits very quickly. High level design tools such as Handel-c allows to reduce time to market. However, it is specific for special boards and vendors. The FPGA world is about to come and every Computer Engineer should be familiar with it. These FPGAs are going to rock the world! That [FPGA is] going to rule the future [of] technology - so be prepared for it! FPGAs allow you to do almost anything you can imagine. FPGAs give you a lot of design power and are robust for deployments, and don't forget that they are reprogrammable, offering you simple ways to upgrade your systems. For systems with small production runs or long life cycles part obsolescence can be factored out. FPGAs when used wisely can be extremely cost-effective in this regard. In the long term it makes systems more reliable when systems can be returned years into the future and still have a replacement without replacing software implementations.
2.25
FPGAS, TOOLS,
Very good base for verifying implementation before actual ASIC is developed. Reprogrammability is very useful and mistakes can be avoided before the actual IC is taped out. With FPGAs simultaneously we can find power, speed and area consumption and in short it is the best way of optimization of any digital circuit. They are a quick , simple solution. On 3- 4 recent projects we could save time, money and the final Gerber files showed us more than 30% savings between hardware, board size etc. And, our all time favorite user feedback on the FPGA experience, from last years survey: One can perform thousands of mistakes, [and] every mistake is a great experience!
AND
2.26
Interviews with Key FPGA Vendors

One of the hassles in selecting an FPGA is going from vendor to vendor asking different questions and trying to compare notes. In addition, it is the FPGA vendor community that really has the most in-depth experience in FPGA design issues and customer relations. Thus, in this section we provide email interviews with major FPGA vendors on various important topics. In each case, keep in mind that the vendor is putting his or her best foot forward. These are informative but polemical pieces explaining one or more sides of an issue. In some cases we have more than one interview per topic, which allows comparison of responses. In all cases, remember to check with the vendors that interest you directly as the technical details of your project as well as their FPGA offerings are subject to change. ALTERA: FPGAS AND THE TRANSITION TO 40 INTELLITECH: FPGAS AND SECURITY LATTICE SEMICONDUCTOR: TRUE NON-VOLATILE AND FULL FEATURED, ECONOMICAL FPGAS XILINX: FPGAS AND SOFTWARE DEVELOPMENT TOOLS XILINX: FPGA LEARNING & EVALUATION OPPORTUNITIES
NM
FPGAS, TOOLS, AND BOARDS: VENDOR INTERVIEWS: FPGAS
FPGA INSIDERS GUIDE: VENDOR INTERVIEWS
ALTERA: FPGAS AND THE TRANSITION TO 40 NM

1 October 2008: FPGAs and the Transition to 40 nm INTERVIEWEE. DAVID GREENFIELD,
SENIOR DIRECTOR OF PRODUCT MARKETING, HIGH-END PRODUCTS
TEL. 408-544-7000 EMAIL. catalog@altera.com COMPANY. ALTERA WEB. http://www.altera.com/

Q. First of all, tell us a little bit about yourself and your responsibilities at Altera. A. I am responsible for Alteras high-density and high-performance Stratix product families. I joined Altera in 1995 and have held several management and marketing positions, including director of tools marketing and EDA relations, and manager of target applications. Before joining Altera, I held ASIC marketing, field applications engineering, and design center manager positions with Wyle Electronics, and staff design-engineering positions with Hughes Aircraft. I earned a BS in engineering from Harvey Mudd College, an MS in electrical engineering from University of Southern California, and an MBA from UCLA.
Q. Altera, obviously, is one of the Big Two when it comes to the FPGA ecosystem. Can you outline, very briefly, the products that the company provides and your position as a leading FPGA vendor? A. Altera is the leader in innovative programmable solutions, and has been ever since inventing the worlds first programmable logic device in 1983. Alteras solutions address a range of design concernsfrom power consumption to performance to costfor customers in a wide variety of industries, including automotive, broadcast, computer and storage, consumer, industrial, medical, military, test and measurement, wireless, and wireline. In addition to devices, Alteras comprehensive solutions portfolio contains fully integrated software development tools, versatile embedded processors, optimized intellectual property (IP) cores, reference design examples, and a variety of development kits. The Altera product lines are as follows: MAX CPLDs: Instant-on capability, combined with single-chip, non-volatile, and easeof-use characteristics in a wide range of packaging options, make MAX CPLDs ideal for virtually any digital control function. Cyclone FPGAs: For cost-sensitive, high-volume applications, Altera offers the Cyclone FPGA seriesthe industrys only FPGAs designed from the ground up for low cost. Each series member is optimized individually for cost and delivers a high-volume solution thats competitive with ASICs and ASSPs. The density range for the Cyclone FPGA series is 2,910 to 120K logic elements. Arria GX FPGAs: Arria GX FPGAs use proven transceiver technology that supports a variety of serial interface protocols such as PCI Express, Gigabit Ethernet, and Serial RapidIO, to bridge serial interfaces to legacy parallel interfaces or other serial interfaces. The Arria GX family is comprised of five devices ranging in density from 21,580 to 90,220 logic elements.
Copyright 2008 eg3.com No Reproduction or Further Dissemination Allowed
Stratix FPGAs: Alteras Stratix series of high-density, high-performance FPGAs feature unprecedented densities, performance, and low-power leadership. The Stratix FPGA series is comprised of devices ranging in density from 10K to 680K logic elements. HardCopy ASICs: Through its unique FPGA front-end design flow, HardCopy ASICs enable designers to use Alteras Stratix series FPGAs to develop, verify, and finalize their system design before committing to production volumes. This unique flow allows designers to deliver their systems to market on average 9 to 12 months sooner than competitors. Quartus II software: Alteras Quartus II design software is number one in performance and productivity for CPLD, FPGA, and HardCopy ASIC designs. Nios II embedded processor: As a 32-bit soft processor core, the Nios II offering can be implemented in any of Alteras FPGA or HardCopy ASIC device families, insulating designers embedded software investment from processor obsolescence. The proven Nios II processor is the most popular configurable soft processor in the industry.
Q. Most of our readership are not on the cutting edge of FPGAs but rather are practical designers that need to get an FPGA-based design out of the door quickly and efficiently. That said, peel back the curtain a bit, and share with us Alteras vision of the transition to 40 nm for FPGAs. A. The move to 40 nm is a significant step for the FPGA industry and this process offers clear benefits over prior nodes, including the 65-nm node and the emerging 45-nm node. With Altera at 40 nm, it's not about sacrificing one benefit to gain another. Alteras 40-nm solutions give designers the benefits of high density, high performance, and low power. Culminating a multi-year effort of planning, development, and close collaboration with our foundry partner TSMC, Alteras Stratix IV and HardCopy ASIC IV families enable early and broad access to 40-nm technology that would otherwise be out of reach for many customers. As a result, Altera customers gain access to the most advanced custom logic products delivering the capabilities, performance, density, and power consumption to address the most pressing needs of todays system designers. These parts are on track to ship to customers before the end of this year (2008).
Q. What application areas do you think will be the first to benefit from 40 nm? What sorts of engineers and design companies do you think should really be paying attention? A. Altera 40-nm devices meet the diverse high-end application needs in a large number of markets such as wireless and wireline communications, military, broadcast, and ASIC prototyping. With the increasing demand for services such as video over Internet, high-speed wireless data, and digital TV, designers must deliver solutions that provide higher data rates, higher interface bandwidths, and increased data processing all in a power-efficient manner. To address these design challenges, Altera is leveraging its innovations in transceivers, memory interfaces, lowpower technology, and FPGA core architecture to offer new capabilities with its 40-nm devices. The capability of 40-nm products also illuminates which applications will most significantly benefit here. With up to 48 transceivers, hard IP support for PCI Express (Gen1 and Gen2, x1 x8), twice the density of any other FPGA family, faster performance (both core and I/O), and lower power than any prior generation, any customer design focused on leading performance while balancing power will see compelling advantages. These devices are on track to sample this year, which could provide a 12-month advantage for Altera customers.
Q. One of Alteras more unique offerings is the HardCopy ASIC. Tell us about this and about how it works with FPGA-based designs and possible transitions to ASICs. A. Prototyping based on Stratix series FPGAs allows you to get your system and system software/firmware ready prior to HardCopy ASIC design handoff. One design, using one RTL, one set of IP cores, and one tool (Quartus II design software), delivers both FPGA and ASIC implementations. Since all test insertion is managed by the HardCopy Design Center, designers dont need to spend any time on design for test. In addition, designers spend zero time on design for manufacturability or design for yield. Alteras extensive design experience and solid, long-standing partnership with TSMC means excellent built-in manufacturability, yield, and reliability.
Q. Moving away from the high end, tell us about Alteras lower end, more costsensitive FPGAs. Is there anything new there that developers might want to know about? A. In the cost-sensitive segment, Altera continues to innovate and provide leading edge solutions. The zero-power MAX IIZ CPLDs are the newest addition to our CPLD series. Ideal for portable and other power-, space-, and price-constrained applications, MAX IIZ devices come in ultrasmall packages with more logic and I/O resources than are offered by traditional macrocellbased CPLDs in the same package size. In the FPGA arena, Alteras Cyclone III FPGAs offer an unprecedented combination of low power, high functionality, and low cost. In addition to strong customer adoption of these devices in the military, broadcast, and portable device market over the past year, Altera also now offers automotive-grade versions of the devices. To assist designers new to FPGA-based processors, Altera offers the Nios II Embedded Evaluation Kit, Cyclone III Edition. The Nios II evaluation kit is a feature-rich, low-cost platform that provides a fast and simple hands-on way for embedded designers to assess the Nios II processor, SOPC Builder system design software, and their custom applications. Combining a Cyclone III Starter Board and a touch-screen LCD in a unique Plexiglas case, the Nios II evaluation kit allows developers to launch example applications, such as networking and audio and image processing, with the touch of a finger. Altera continues to invest in the cost-sensitive portion of the market and will have new solutions to share in 2009.
Q. Finally, Altera is known for providing high-quality development tools and IP for your customers. Can you describe those for us, and if there is anything new for 2008/09, please share that. A. The Altera Quartus II design software offers complete automated system definition and implementation, all without requiring lower-level HDL or schematics. The Quartus II software also is the only software from an FPGA vendor offering multiprocessor (e.g., the Intel Core 2 Duo and Quad and AMD Athlon 64 X2) support, taking advantage of todays dual- and quad-core computers. Over the past five years, Quartus II software has consistently delivered the industrys fastest compile times for high-end FPGAs, averaging a 20 percent reduction annually. Quartus II softwares incremental compilation feature offers users a second-to-none productivity advantage, capable of delivering up to a 70 percent compile-time reduction compared to a standard compilation. Additional key features include:
SOPC Builder: Offers support for incremental compilation and has key IP blocks in its design library, including JTAG and SPI interfaces. MegaCore IP Library: Integrated in Quartus II software, allows users easy access to Alteras portfolio of IP cores, including PCI Express Gen2 hard IP. TimeQuest timing analyzer: Allows creation, management, and analysis of complex timing constraints as well as advanced timing verification.
Altera offers a broad portfolio of easy-to-use IP cores. These IP cores are high-quality building blocks that can be dropped into system designs, increasing productivity by avoiding the timeconsuming task of creating complete designs from scratch. Alteras extensive IP portfolio includes communications and I/O interconnect technologies (such as Ethernet, PCI, PCI Express, and Serial RapidIO) and a broad range of cores for embedded systems and DSP applications. Q. Thank you for this interview.
INTELLITECH: FPGAS AND SECURITY

25 October 2008: FPGAs and Security INTERVIEWEE. CJ CLARK CEO, INTELLITECH CORP. TEL. 603-868-7116 EMAIL. scansalesatintellitechperiodcom COMPANY. INTELLITECH CORPORATION WEB. http://www.intellitech.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Intellitech. A. I think most people in the industry know me from my work as chair of IEEE 1149.1/JTAG. My first job was back in 1978 for Plantronics/Wilcom, so I have seen a lot and I fortunately got involved in electronics at a very young age. I sit on two industrial advisory boards for the University of New Hampshire, I guest lecture on the IEEE series Mission-Critical FPGA-based Embedded Systems and I hold a few patents related to test and FPGA configuration. As CEO my responsibilities are mostly for setting the strategic direction for the company and anticipating our customers needs rather than just reacting to them. I work with a great group of people at Intellitech, many for ten plus years now that do the rest of the work, executing on that strategic direction.
Q. Everyone is familiar with Xilinx and Altera but not so much the vendors in the FPGA ecosystem more generally. Can you tell us briefly about your product offerings, especially as they relate to FPGA-based designs? A. Yes, thank you for asking. SystemBIST is our IC that provides key ecosystem functions for FPGA based PCBs. Those functions are FPGA parallel and serial configuration, FPGA Trojan protection, FPGA bitstream security, watch dog timers, periodic event control, power-on reset, embedded JTAG test and an in-the-field update engine. SystemBIST provides the FPGA configuration over both the high-speed parallel configuration bus as well as over JTAG. Whats different than say using a commodity FLASH or PROM is that the sequence is programmable using our software GUI. You can specify how to program the FPGAs, for instance loading a different bitstream based on what size FPGA is present or based on what daughter boards is present. What we call conditional based configuration. PCBs with FPGAs have power on reset ICs and watch dog timer ICs. Whats different is that our built in POR and watch dogs are programmable in their behavior. At power-up a reset IC will just toggle reset, however with SystemBIST you can direct what you want to happen, perhaps hold the CPU reset low until after all FPGAs are configured and then release the reset. Similar things can be done with the watch dog, since its integrated with our on-chip FPGA configuration engine and JTAG engine. Powerup sequences with the DC/DC converters can be controlled by SystemBIST and integrated with the FPGA configuration strategy rather than implementing with the mission mode CPU or homebrew CPLD design. We control the DC/DC converters via GPIO or program the voltage levels via the I2C interface. Since we have built-in JTAG based test, we can do things like voltage margining while running structural or at-speed based tests, all of course without handshaking with the mission mode CPU and firmware. SystemBIST is a smart board manager, it takes care of a lot of the housekeeping functions needed in FPGA based PCBs. It really can be a big mistake to integrate the infrastructure needed for FPGA programming, embedded test or in-the-field updates with the mission mode software. It adds to the complexity and needs to be developed entirely by engineers familiar with the software, CPU and firmware. SystemBIST keeps the nonmission functions, the auxiliary functions; separate, which makes development, bring-up and
maintenance easier. There is less debug as the ecosystem strategy can be executed from our high level software tools and validated prior to embedding. With ad-hoc approaches, the tools arent available, therefore debug and development is done manually by the firmware engineer. SystemBIST designs dont have to wait for the OS to boot for instance to do something as simple as run an embedded test or configure an FPGA. SystemBIST is easier for the FPGA engineer, who may not be experienced at writing embedded software, to use our GUI to develop the configuration strategy and the remote updating capabilities. Embedded test is easier as test engineers can import their manufacturing JTAG tests into SystemBIST without having embedded software engineering expertise or trouble the embedded firmware developer to do it.
Q. Are your products competitive or complementary to those of the big FPGA vendors? In what ways? A. They are complementary really. Any of my contacts within the FPGA vendors see selling the FPGAs themselves as their priorities, FPGA configuration is just a necessary thing that the FPGA companies provide application notes for. A key capability of SystemBIST is the embedded selftest, which is an area that FPGA companies just dont want to go into.
Q. Security is a growing concern worldwide, and yet security can mean so many things. In the FPGA world, security is often explained as security against reverse product engineering. What other meanings of security do you see as relevant to FPGA-based designs? A. Thats a great question, Im glad you asked. The emphasis on security has been against bitstream reverse engineering and copying by non-connected third parties. The current security, using AES encryption and a key programmed into the FPGA doesnt help too much against product overbuilding or cloning by connected parties. The keys are generated in the FPGA tools as plain text files which are typically sent to the contract manufacturer so they can be programmed in. Product overbuilding and cloning is typically done by knowledgeable insiders, ex-employees or unscrupulous contract manufacturer who builds more products to sell on the spares or other markets. That took place in the Cisco cloning case investigated by the FBI. PCBs need better protection, a PUF, a Physically Un-clone-able Feature. SystemBIST provides this with its unique on-chip customer ID and serial number. Two other important areas are in security against hacking and security against Trojan bitstreams being loaded. If a key is present, depending on which FPGA youre using, the FPGA bitstreams that are not encrypted can be loaded into the FPGA. Battery backed security keys are easy to defeat by simply removing the battery or shorting the battery leads until the battery is dead. An attacker may not be looking to steal your FPGA design but to replace it with a trojan design. If you are making an ATM machine, voting machine, secure communications or gambling machine, think of how the operation would be compromised if an attacker could load in their own FPGA bitstream that mimics the operation but perhaps games the system in their favor or collects passwords. Any publicly available bitstream storage device or commodity flash is easy for a hacker to re-program using the same tools you used to program them with. Hackers might not be trying to load Trojans but get your hardware platform to do something else, maybe enable a feature that shouldnt be enabled.
Q. Can you explain specifically what ways your product brings new levels of security? At a technical level, can you explain how it interacts with the on-board FPGA and thereby secures it?
A. Sure. The new security levels are in multiple areas. Our software generates a SystemBIST image which is a binary representation of all of the things you would like your ecosystem to do, FPGA configuration, DC/DC converter control, embedded test etc. The image data is compressed and encrypted, its not just straight bitstreams that can easily be discovered and replaced by a hacker. Further, they are tied to your customer code; even another customer who is using our tools will not be able to create an image that matches yours. SystemBIST has active security through tokens and secure hash. We provide a small amount of IP that you design into your FPGA with your 128-bit security key. SystemBIST sends challenge/response tokens to the FPGA over JTAG or over I2C to the FPGAs (one at a time) and expects a calculated hash response, which it compares internally to SystemBIST. If an FPGA fails to authenticate, then SystemBIST will execute a user defined operation, which could be something as simple as reprogramming the FPGA or it could hold the entire PCB in reset until it is powered down. Similarly, the FPGA design is looking for this challenge/response pair and it can disable its internal logic if the data is not correct or never appears. This security becomes a bit more universal; it can be used with AES capable FPGAs or FPGAs without AES. Copying the bitstream will not help an attacker, as the operation wont work in another system. Loading a trojan bitstream with JTAG wont work either as SystemBIST is constantly checking for the FPGA authenticity. There is no non-volatile storage that the unauthorized bitstreams can be stored in. Cloners cant buy SystemBIST devices with your customer code and security key or the software to generate new images, so it becomes impossible to make more copies of your product than you authorize. Our update mechanism is also secure. It is far superior compared to sending bitstreams over the internet or open text files like STAPL. STAPL is tough to use these days anyway, its JTAG only, doesnt support parallel FPGA configuration needed for speed and is an open text file that is very easy to hack. SystemBIST checks for authenticity of the FPGA update, the update is correctly targeted for this system, its the right version and it has the proper secure hash algorithm values in it. Bits that get modified on the way to the product by an attacker will cause the hash to be incorrect and prevent SystemBIST from performing the update.
Q. Whats the connection between JTAG test and FPGA configuration? And why is embedded test important, how does it differ from software based self-test? A. Thats a great question as well. Software based functional test is typically developed by someone who is expert with the system architecture and has the ability to write embedded firmware. IEEE 1149.1/JTAG in contrast was developed so testing could be performed without being experts in the mission mode logic. Home-brew functional test is not well understood by third parties like contract manufacturers, they cant change the test or diagnose failing boards very well, and its not cost effective for them to become experts in the functionality of one customers product. JTAG/1149.1 testing however is very well known by the CM. JTAG tests most likely are already available for production, with SystemBIST it becomes quite easy to import and re-use them for embedded test in the field. There is much more automation in test generation with 1149.1 compared to software functional test which is typically a manual effort. 1149.1 tests tend to be much better at pinpointing a fault than a functional test. FPGAs typically have to be configured in order to maximize test coverage. Consider an FPGA with LVDS I/O connected to an LVDS device. An unprogrammed FPGAs I/O is LVTTL, so the 100-ohm termination resistor will look like a dead short to any JTAG pin toggling. The FPGA would have to be configured to run an interconnect test across the I/O to the other device. In todays systems, we program the FPGAs multiple times, we download test helper circuits (which we call TEST-IP) into the FPGAs to facilitate at-speed testing. We download BER engines to the FPGAs to test the SERDES connections at speed. We download memory BIST engines to the FPGAs to test the DDR2/DDR3 connections at speed. With SystemBIST, the user can embed these tests and use the built-in periodic suite to get asynchronous voltage margining for instance during the DDR or BER tests. You could try to do this all with firmware and the mission mode CPU, but its a bit more messy. Functional test usually is an end-to-end test, where for instance
tests of multiple SERDES connections are tested together, with a dependency on an error-free DDR memory interface to store the packets. The PLL and DC-to-DC converter have to be functioning as well. With JTAG based BER tests checking for proper DC levels and checking that the PLL jitter is not out of spec is part of the start-up test before the channel is even atspeed. With whole board functional test, if one item is wrong its hard to tell what went wrong since so much of the system is functioning and interacting. With directed tests like BER, we concentrate on testing one element. JTAG based at-speed testing or what we call emulation based testing is more directed, its essentially datasheet testing with little emphasis on the top level functionality of the systems. In our online presentations we show this layered approach to embedded test, a pyramid representing the entire test development. The manufacturing tests which already exist can be imported, this provides us with a base-line structural test for the PCB, checking all the interconnects, checking connections to mezzanine cards and DDR memories. The next level is the at-speed testing, this is where the FPGAs are programmed with special designs which can be executed via JTAG, then the mission mode functional test can be added at the top. With SystemBIST you have a lot more known variables and a lot less work to do. CPU based functional test can have grey areas where its not known if a failure in the field is due to the software or to the hardware. SystemBIST test gives you that extra data point; it tells you if the hardware is failing with no ambiguity. SystemBIST stores all of the failures in non-volatile memory, for retrieval by the mission mode CPU or manually with a JTAG tool to extract the failures. There is never the possibility of a NFF, no fault found as the failures are always stored and can be used with our software to determine a net/pin or register level fault. There is a new effort within the IEEE called P1687 or IJTAG. This standard uses 1149.1 to access on-chip instruments like our FPGA BER and DDR BIST, however these instruments will be on Asics and commodity parts. In my opinion, the momentum is building towards more structured test via 1149.1 and away from software based functional test. It is much like the history of integrated circuit test. IC test was done with functional testers years ago, but as the logic complexity increased it became too expensive to develop manual functional tests. Structured tests via scan were done since ATPG automatic test pattern generation could be done for stuck at faults. Then tools became more robust and could generate transition faults and path delay faults via scan; now we have logic BIST and on-chip memory BIST, all which run at speed. But very little of the test is based on the functional design of the IC.
Q. How much does SystemBIST cost? Would you explain your business model and any different options in terms of engagement? A. SystemBIST is roughly $10-15 depending on your volume. That cost of course is completely recouped in removing other FPGA configuration methods, reducing the FLASH memory size, removing CPLD power sequencers, power on reset chips, watch dog timers and other parts. Our business model is that we sell the silicon, we license the software tools that go with it, and we provide services that guarantee our customers success. Once your design team is using a structured method for FPGA configuration and embedded test, where the infrastructure is not mixed in with the mission mode functionality, then engineering functions that typically are done in-house can be outsourced to third parties, such as Intellitech, who can work simultaneously on the ecosystem without being in the critical path of the mission mode firmware development.
Q. How would you recommend a potential customer find out about SystemBIST? Do you offer online webinars? Training seminars? Demos? How can one try before buying? A. Much of this is on our website. You can see a webinar, take a look at the reference designs and read our white papers on SystemBIST on the website. We have a new live webinar coming in
December. There is an evaluation PCB as well. Our application engineers will help the designer get SystemBIST designed into their PCB.
Q. Thank you for this interview.
LATTICE SEMICONDUCTOR CORP.: TRUE NON VOLATILE AND FULL FEATURED, ECONOMICAL FPGAS
1 October 2008: True Non-Volatile and Full Featured, Economical FPGAs INTERVIEWEE. DOUG HUNTER DIRECTOR OF CORPORATE MARKETING TEL. 503-268-8000 EMAIL. doug.hunter@latticesemi.com COMPANY. LATTICE SEMICONDUCTOR WEB. http://www.latticesemi.com/
Q. Obviously, the two giants in FPGA are Altera and Xilinx. Help us help our readership by giving us a few bullet points of how Lattice is unique and different in your technology offerings. A. A primary focus of ours is non-volatile FPGAs. By combining SRAM and Flash memory on a single die, we provide single chip, instant-on and highly secure design solutions. We also focus on FPGAs that combine economy with high-end features such as 3.125Gbps SERDES, DDR2 and full-feature DSP. More specifically, for single chip, high security and instant-on operation, the LatticeXP2 is the industrys only true 90nm non-volatile FPGA solution. For economical FPGAs with SERDES, high memory content, high end DSP or DDR2, the LatticeECP2M is the industry-leading device. Lattice also provides the Lattice ispMACH 4000ZE, an ultra low-power CPLD family, and the Lattice MachXO crossover PLD that combines the benefits of CPLDs and FPGAs. Our product portfolio also includes innovative programmable mixed signal products for clock and power management applications.
Q. When we talked about this interview, beforehand, you indicated that Lattice takes a lot of pride in producing affordable FPGAs that are fuller featured. Can you expand on how your products provide more features at a lower cost for FPGAbased projects? A. When Lattice entered the FPGA market there were already entrenched competitors. To be successful, we chose to develop highly differentiated products that delivered a compelling value proposition to our customers. So, we focused on two key differentiators non-volatility and economy --and set about developing technology and products in each area. Traditionally, FPGA companies have focused on two basic product lines: low-cost devices with reduced features, and high-cost devices that are feature rich. Historically, low-cost FPGAs were little more than stripped down versions of higher end devices. So the value proposition was spend less, get less. Not very compelling. We saw an opportunity to fill a void in the market by developing an economical, feature rich FPGA product line. We were able to do this by designing these FPGAs from the ground up. From initial planning with customers through architectural definition, design and choice of manufacturing process technology, we designed our economy FPGAs with the features system designers agree are essential to high-volume applications, and delivered them at a price that has finally made widespread adoption of high-volume FPGAs economically attractive. Some of the techniques that make this possible include the use of
compact wirebond, rather than flip chip, packaging, hybrid analog digital SERDES for an area savings of approximately 60% and considered architectural decisions, such as optimized, selective support for distributed memory. Also, while competitive devices were using expensive proprietary boot PROMs to load the configuration, we designed our FPGAs to work with inexpensive third party SPI memories, at a cost per bit many times lower than the proprietary boot PROMs.
Q. Tell us a little bit about the software tools that come with Lattice. Are they free? How do they compare with those of Xilinx or Altera? A. Lattice provides a variety of FPGA and CPLD software design tool suites so that our customers can choose the one that best fits their needs and budget. We also provide a design tool suite for our mixed-signal products, and an Integrated Development Environment (IDE) for our Mico32 embedded microprocessor, the industrys only open source microprocessor. Two of our tool suites, ispLEVER Starter and ispLEVER Classic, are downloadable from the Lattice website at no cost. Our flagship, full featured tool suite, ispLEVER, is $1295 and is available in Windows, UNIX and Linux versions. New users who previously have designed with Xilinx or Altera tools are able to adapt quickly to Lattice tools. Unlike Xilinx and Altera, though, we include within our tool suite synthesis and simulation tools, optimized for Lattice devices, from EDA industry leaders Aldec and Synplicity. We believe that a combination of industry-leading front-end tools with our own proprietary back-end tools is a powerful value proposition for our customers. Our tool set includes many unique capabilities, including our Power Calculator, which allows a customer to specify parameters such as voltage, temperature, process variations, air flow, heat sink, resource utilization, activity and frequency, which in turn calculates a devices static (DC) and dynamic (AC) power consumption. Our Reveal logic analyzer is our next-generation in-system logic analysis tool that uses a signal-centric model for embedded logic debug. Our ORCAstra software is a Windows-based graphical user interface that enables configuration of the operational modes of our FPGAs by programming control bits into on-chip registers. This new ability to explore configuration options quickly, without recompiling the FPGA design, dramatically speeds design validation.
Q. One area that Lattice has had early leadership in is in non-volatility. Can you explain the reasons why FPGA developers might prefer non-volatility, and what Lattice offers that leverages this desire? A. Non-volatile technology has always been the technology of choice for programmable logic because it provides unique system-level benefits such as a single-chip solution, instant-on capabilities and high security. While historically there has been a significant price premium for non-volatile devices, Lattice provides this sophistication without significantly impacting the cost or performance of the product. Its important to understand that true non-volatile FPGAs employ high-performance, embedded Flash memory technology. We have worked closely with our foundry partner Fujitsu to develop proprietary embedded Flash technologies that enable exceptionally high performance. "Instant-on," a feature that allows an FPGA to be used immediately upon startup, is essential in many applications. Typical SRAM FPGAs require 10s to 100s of milliseconds at startup using external boot PROMs. This prevents the use of SRAM FPGAs in certain critical control logic sections of systems that must be "live" immediately upon the application of power. Lattice has
developed proprietary circuit design techniques that allow its non-volatile devices, such as our LatticeXP2 and MachXO, to become active virtually instantly after startup (~1-2 mS). Design security is also a key advantage of our non-volatile FPGAs, in two distinct ways. First, our embedded Flash memory allows the entire user design to be stored in on-chip Flash memory, enabling a space saving single-chip solution. The configuration bitstream is never exposed, as it is when using SRAM FPGAs with boot PROMs. It is virtually impossible for a hacker to access the configuration data of a non-volatile FPGA. Second, our embedded Flash memory allows us to support true AES encryption of the configuration bitstreams. It supports the storage of a user-programmable, on-chip 128-bit encryption key. Once this key is stored on-chip, the user can encrypt the configuration bitstream for a given design and transmit it to the FPGA (over unsecured transmission lines). Once on chip, the bitstream is decrypted using the stored AES key, and is never exposed off-chip. There are other FPGAs that are called non-volatile, but they are not true single-chip, embedded Flash solutions. Instead, they combine two independent chips (a Flash memory and an SRAMbased FPGA) in a single package using a stacked die technology. Compared to true non-volatile FPGAs, these hybrid products have severe limitations.
Q. How do the pros of non-volatility compare and contrast with the (renewed) interest in CPLDs? A. CPLDs such as our MachXO and ultra low-power ispMACH 4000ZE devices are by definition non-volatile, so they offer the same benefits of a single-chip solution, instant-on capabilities and design security. Programmable logic users now require higher macrocell densities. However, CPLDs have not been economically feasible beyond ~512 MCs. To address this need, we developed our MachXO crossover family by combining these two complementary differentiators and extending our FPGA architecture to a very low-density range. We have been able to extend the logic density range for CPLDs to over 2,000 Logic Cells (roughly equivalent to ~1,200-1,500 macrocells) while substantially improving both cost and performance. As a result, CPLDs are now attractive design solutions for a variety of applications.
Q. Finally, what sort of online resources can you point us to where one can learn more about Lattice? Are there particular webcasts, white papers, tutorials or other items online that a developer can investigate before having to make a commitment to Lattice? (Please give us the exact URLs, if available). A. Technology & Market Solutions: http://www.latticesemi.com/solutions/index.cfm?source=topnav Webcasts: http://www.latticesemi.com/corporate/webcasts/index.cfm Non-Volatile FPGAs: http://www.latticesemi.com/products/fpga/xp2/index.cfm?source=topnav Low Cost FPGAs: http://www.latticesemi.com/products/fpga/ecp2/index.cfm?source=topnav High-End FPGAs: http://www.latticesemi.com/products/fpga/sc/index.cfm?source=topnav
Ultra Low Power CPLDs: http://www.latticesemi.com/products/cpldspld/ispmach4000ze.cfm?source=topnav Intellectual Property: http://www.latticesemi.com/products/intellectualproperty/index.cfm?source=topnav Design Tools: http://www.latticesemi.com/products/designsoftware/isplever/index.cfm?source=topnav Q. Thank you for this interview.
XILINX: FPGAS AND SOFTWARE DEVELOMENT TOOLS

1 October 2008: FPGAs and Software Development Tools INTERVIEWEE. TOM FEIST Sr. Marketing Director, ISE Design Suite TEL. 503-484-1345 EMAIL. tom.feist@xilinx.com COMPANY. XILINX, INC. WEB. http://www.xilinx.com/
Q. First of all, tell us a little bit about yourself and your role at Xilinx. A. Ive been in the EDA/Silicon industry for more than 19 years. For the past two and a half years Ive been responsible for the marketing of Xilinx Embedded and DSP tools, IP and partnerships. In July of this year, I took over as Senior Marketing Director for the Xilinx ISE Design Suite, which added the ISE Foundation development tool suite and connectivity IP to my marketing responsibilities. Prior to Xilinx, I was Vice President of Marketing and International Sales for AccelChip (acquired by Xilinx), group director of marketing for Mentor Graphics synthesis technologies and Vice President of Marketing for Exemplar Logic. I have also served as a Product Marketing Manger, Technical Marketing Engineer, Account Manager, and Senior Field Application Engineer elsewhere within the EDA industry.
Q. Xilinx is known, obviously, as a leader if not the leader in the FPGA space. Before we turn to development tools, can you outline the Xilinx FPGA offerings very briefly? A. Xilinx FPGAs fall into two categories; the Virtex series of high-performance FPGAs and the low-cost Spartan series of FPGAs which targets high volume applications. The Virtex-5 family is the fifth generation in the award-winning Virtex series. Built upon the industry's most advanced 65nm triple-oxide technology, breakthrough new ExpressFabric technology and proven ASMBL (Advanced Silicon Modular Block) architecture, the Virtex-5 family includes five domain-optimized platforms for high-speed logic, digital signal processing (DSP), embedded processing and serial connectivity applications. The Virtex-5 familys five distinct platforms gives designers the most choice offered by any FPGA family. Each platform contains a different ratio of features to address the needs of a wide variety of advanced logic designs. In addition to the most advanced, highperformance logic fabric, Virtex-5 FPGAs contain many system-level hard-IP blocks, including powerful 36-Kbit block RAM/FIFOs, second generation 25 x 18 DSP slices, SelectIO technology with built-in digitally controlled impedance, ChipSync sourcesynchronous interface blocks, system monitor functionality, enhanced clock management tiles with integrated DCM (Digital Clock Managers) and phase-locked-loop (PLL) clock generators, and advanced configuration options. Additional platform- dependant features include power-optimized high-speed serial transceiver blocks for enhanced serial connectivity, PCI Express compliant integrated Endpoint blocks, tri-mode Ethernet MACs (Media Access Controllers), and highperformance PowerPC 440 microprocessor embedded blocks. These features allow designers to build the highest levels of performance and functionality into their FPGA-
based systems to offer a programmable alternative to custom ASIC technology. Customers can use Xilinx EasyPath FPGAs to achieve significantly lower unit costs for volume production once their design is fixed and no longer requires the full programmability of standard Virtex FPGAs. The Extended Spartan-3A family of Field-Programmable Gate Arrays (FPGAs) solves the design challenges for many high-volume, cost-sensitive electronic applications. With 12 devices ranging from 50,000 to 3.4 million system gates, the Spartan-3A family provides a broad range of densities and package options, as well as integrated DSP MACs to deliver lower total system costs when compared to alternative solutions. The low-cost family also includes the non-volatile Spartan-3AN devices, which combine leading-edge FPGA and Flash technologies to provide a new evolution in security, protection and functionality, ideal for space-critical or secure applications. The Extended Spartan-3A family improves system performance and reduces the cost of configuration. These enhancements, combined with proven 90nm process technology, deliver more functionality and bandwidth per dollar than ever before, setting a new standard in the programmable logic industry. Because of its exceptionally low cost, the Extended Spartan-3A family is ideally suited to a wide range of consumer electronics applications, including broadband access, home networking, display/projection, and digital television equipment.
Q. Many surveys, including our own, indicate that software development tools are a critical factor in the FPGA design experience. What sorts of FPGA development tools does Xilinx offer? In particular what does one get with ISE Design Suite 10.1? A. The ISE Design Suite 10.1, the latest release, delivers the perfect combination of design performance and productivity. Whether your design requires a flexible embedded processing solution, a specialized flow for DSP development, or just optimal highperformance logic, the ISE Design Suite 10.1 can be configured to achieve your design goals quickly. The ISE Design Suite combines the Xilinx Design Tools and IP for Embedded, DSP, and Logic design. This includes the following individual products: o o o o o o o o o ISE Foundation Software ISE Foundation Software with the ISE Simulator Platform Studio and the Embedded Development Kit (EDK) PlanAhead Design and Analysis Tool ChipScope Pro Tool ChipScope Pro Serial I/O Toolkit System Generator for DSP AccelDSP Synthesis Tool CoreGen tool and LogicCore IP
Q. Can an engineer try these before committing to use Xilinx? In what ways can the development tools be used to try before buying Xilinx silicon? A. Xilinx makes it easy to evaluate our world-class FPGA, DSP and Embedded Processing system design tools in the ISE Design Suite. If the customer is looking at Xilinx for the
first time or considering additional ISE Design Suite products for their FPGA design environment, a free, downloadable 60-day evaluation gets you started quickly. In addition, Xilinx offers ISE WebPACK software. This is the ideal downloadable solution for FPGA and CPLD design offering HDL synthesis and simulation, implementation, device fitting, and JTAG programming. ISE WebPACK provides the tools and features along with the same easy-to-use design environment as our award winning ISE Foundation design tools providing instant access to the ISE features and functionality at no cost.
Q. What about third party FPGA tools? What companies in that space are prominent partners of Xilinx? A. Xilinx has a host of 3rd party partners we work closely with. Because our devices can be used in signal processing, embedded, logic and system level solutions we work with many companies to provide a whole product solution. For example in the embedded space, we work with 3rd parties such as Agilent, GreenHills, Mentor Graphics, Lauterbach, LynuxWorks, Wind River Systems and others to provide integrated SW development solutions. In the area of DSP, we partner with, The MathWorks, Synplicity (Synopsys) and National Instruments. Finally, to provide comprehensive RTL solutions we work closely with Cadence, Mentor Graphics, Synopsys and others to provide verification solutions and with Mentor Graphics and Synopsys (Synplicity) for synthesis. In addition we work with several ESL partners to provide high-level design options to our customers.
Q. One of the most confusing issues in the development tools area is comparing and contrasting the free tools offered by vendors like Xilinx and the paid tools offered by third party vendors. Where do you see the role of each? Where is there overlap? A. Many Xilinx customers use a combination of our ISE Design Suite and tools from EDA vendors. However, because of the diversity in the Xilinx customer base, where we work with all sizes of companies, we see those that can afford and want to take advantage of EDA tools and startups that cannot. For those with very tight budgets we feel it is important to offer a comprehensive and integrated flow into our devices. However, for those that can afford it, we encourage customers to leverage whatever third party tool they wish to use in combination with ours. As for the roles of each, Xilinx views parts of our solution as core to Xilinx; for example the map, place and route technology found in ISE Foundation. With the different ratio of features in our silicon to address the needs of a wide variety of logic designs and integrated IP, this technology is critical to our goal of offering the highest performance and lowest cost devices to our customers. Advancements in this technology such as SmartCompile and SmartGuide have enabled customers to cut compile times, resulting in more design iterations per day which is very important considering that we deliver the industrys largest FPGAs. As our devices have grown over the years, so has the need for physical synthesis, this is why we also invest in our XST synthesis tool, providing tighter linkages from VHDL or Verilog to the end device. However, many companies do use a combination of XST, Synopsys/Synplicity and Mentor Graphics. The reason behind this is that with any one
design, synthesis results will vary, by trying two or three tools there is the possibility of getting a higher performing design or one with lower area depending on the design goals. We also see our CoreGen tool offered in the ISE Design Suite, which we use to deploy the vast IP offerings from Xilinx, as a core technology for us. Because Xilinx offers more than 200 IP cores, it is imperative that we provide an easy to use delivery tool so that customers can rapidly take advantage of our IP. Another core example is Platform Studio, which is part of our Embedded Development Kit. Platform Studio enables rapid integration of the more than 60 embedded IP cores available in support of the MicroBlaze and embedded PPC405/440 processors. In addition, Platform Studio enables the software drivers needed by software developers. Software developers then can use our Eclipse based IDE, Platform Studio-SDK, or choose a third party IDE to develop code. In the area of critical tools for Xilinx, or tools that we provide to fill gaps in what is available in the market, we provide tools like ChipScope Pro, which inserts logic analyzer, bus analyzer, and virtual I/O low-profile software cores directly into a design, allowing users to view any internal signal or node, including embedded hard or soft processors. With ChipScope Pro we interface with Agilent bench test equipment. This synchronizes the ChipScope Pro tool to Agilent's FPGA Dynamic Probe scope option. This unique partnership between Xilinx and Agilent gives deeper trace memory, faster clock speeds, more trigger options, all using fewer pins on the FPGA. We are also working with embedded trace companies to leverage this technology into the software debug world. Also in the critical bucket, are our DSP tool offerings, AccelDSP and System Generator for DSP. Several years ago, Xilinx noticed that there were great tools from The MathWorks (MATLAB and Simulink) for DSP algorithm design and verification, but they lacked a path into implementation on FPGAs. To enable a rapid path to implementation Xilinx partnered with The MathWorks and released System Generator, which leveraged the Simulink environment and married it with our DSP IP to provide an integrated DSP development environment. About three years ago, Xilinx acquired AccelChip, enhanced this offering with AccelDSP a MATLAB based algorithmic synthesis tool. Today Synplicity and The MathWorks also offer tools in this space, but when we started out, Xilinx was the only vendor. In the area of RTL simulation, Xilinx provides ISE Simulator to address the cost sensitive market. We however work with all the EDA companies providing simulation technology to provide customers more comprehensive environments over what we offer. Finally, the third category is what we call context. Tools we look to the EDA companies to provide. A great example of this is our ESL initiative where we work with many of the C to Gates companies to providing flows that we are not. In summary, our goal is to ensure customers targeting our devices have complete comprehensive solutions and to foster the ecosystem around tools and IP.
Q. One of the critiques about the FPGA vendor tools from Xilinx and Altera is that they, allegedly, result in vendor lock-in? What are your feelings about lock in? A. IP is critical to customers time to market. Xilinx invests heavily in this area to provide soft and hard IP for connectivity, wireless, video, DSP, embedded and other standards. The reason we invest here is to provide highly optimized cores that provide the best quality of results in our devices to save our customers time and money. Because many of our tools are built around our IP, for example in DSP and the embedded space, customers may feel that they are locked in, but in the same respect, they are increasingly using our IP because of demands placed on their businesses such as cost,
CAPX, OPEX and schedule pressures. If they choose not to use IP they have the choice to move between vendors, however this may come at a cost of larger less efficient designs and slower time to market. This is just the nature of FPGA architectures and is very analogous with the embedded space where moving between processors is difficult if you have invested in assembly code.
Q. Another critique is that choosing Xilinx- or Altera-based tools, first, means that the developer is choosing silicon first rather than using independent development tools to identify the best silicon for the design, and then choosing this best silicon. What is your response to this objection? A. It is difficult to choose the best silicon without looking at the total solution. The best solution is a combination of tools, IP, reference platforms and silicon features. Without this combination, the company evaluating an FPGA cannot get a real feel how there design will perform and at what cost. On simple designs it might be possible just to use a vendor independent RTL synthesis tool, however most designs leverage different many aspects of the ISE Design Suite to complete the design. We encourage the use of nonXilinx point tools in this flow, however no one 3rd party vendor independent company is providing the breath of solution needed for customers to really evaluate what is the best silicon for the design. Q. Thank you for this interview.
XILINX: FPGA LEARNING & EVALUATION OPPORTUNITIES

1 October 2008: FPGA Learning & Evaluation Opportunities INTERVIEWEE. TEL. EMAIL. COMPANY. STUART ELSTON 720 652 3880 stuart.elston@xilinx.com XILINX, INC.
WEB. http://www.xilinx.com/
Q. First of all, tell us a little bit about yourself and your position at Xilinx. A. Im the senior manager of World Wide Customer Education at Xilinx, where Im responsible for managing an education program that trains about 15,000 students per in a classroom setting. Ive been with Xilinx education services for 13 years and my previous roles have included Applications Engineer, Managing European Technical Support Group, Managing European Strategic Applications Team and Titanium Services, Managing European Services Business Development and XPA program, and World Wide Services Research and Development
Q. We want to dive into helping our audience learn and evaluate FPGAs at Xilinx, but first just give us a very quick sketch of Xilinxs FPGA offerings. A. Xilinx FPGAs fall into two categories; the Virtex series of high-performance FPGAs and the low-cost Spartan series of FPGAs, which targets high volume applications. The Virtex-5 family is the fifth generation in the award-winning Virtex series. Built upon the industry's most advanced 65nm triple-oxide technology, breakthrough new ExpressFabric technology and proven ASMBL (Advanced Silicon Modular Block) architecture, the Virtex-5 family includes five domain-optimized platforms for high-speed logic, digital signal processing (DSP), embedded processing and serial connectivity applications. The Virtex-5 familys five distinct platforms gives designers the most choice offered by any FPGA family. Each platform contains a different ratio of features to address the needs of a wide variety of advanced logic designs. In addition to the most advanced, highperformance logic fabric, Virtex-5 FPGAs contain many system-level hard-IP blocks, including powerful 36-Kbit block RAM/FIFOs, second generation 25 x 18 DSP slices, SelectIO technology with built-in digitally controlled impedance, ChipSync sourcesynchronous interface blocks, system monitor functionality, enhanced clock management tiles with integrated DCM (Digital Clock Managers) and phase-locked-loop (PLL) clock generators, and advanced configuration options. Additional platform- dependant features include power-optimized high-speed serial transceiver blocks for enhanced serial connectivity, PCI Express compliant integrated Endpoint blocks, tri-mode Ethernet MACs (Media Access Controllers), and highperformance PowerPC 440 microprocessor embedded blocks. These features allow designers to build the highest levels of performance and functionality into their FPGAbased systems to offer a programmable alternative to custom ASIC technology. Customers can use Xilinx EasyPath FPGAs to achieve significantly lower unit costs for volume production once their design is fixed and no longer requires the full programmability of standard Virtex FPGAs.
The Extended Spartan-3A family of Field-Programmable Gate Arrays (FPGAs) solves the design challenges for many high-volume, cost-sensitive electronic applications. With 12 devices ranging from 50,000 to 3.4 million system gates, the Spartan-3A family provides a broad range of densities and package options, as well as integrated DSP MACs to deliver lower total system costs when compared to alternative solutions. The low-cost family also includes the non-volatile Spartan-3AN devices, which combine leading-edge FPGA and Flash technologies to provide a new evolution in security, protection and functionality, ideal for space-critical or secure applications. The Extended Spartan-3A family improves system performance and reduces the cost of configuration. These enhancements, combined with proven 90nm process technology, deliver more functionality and bandwidth per dollar than ever before, setting a new standard in the programmable logic industry. Because of its exceptionally low cost, the Extended Spartan-3A family is ideally suited to a wide range of consumer electronics applications, including broadband access, home networking, display/projection, and digital television equipment.
Q. Many people in our readership are investigating FPGAs for the first time. Lets focus first on the Web. Where do you recommend they begin investigating FPGA technology at Xilinx.com? A. Weve set up our Web site in a fashion that recognizes that not all users of FPGA technology approach their design challenges in the same way. So weve organized our homepage to take visitors directly to one of three high-level overviews to begin with. They can engage with our Web site by either starting with Technology Solutions (http://www.xilinx.com/technology/index.htm), where they can begin learning about Embedded Processing, DSP, Connectivity, Memory, Power and other horizontal solutions; Products & Services (http://www.xilinx.com/products/index.htm), where they can learn about specific FPGA families or development kits; or Market Solutions (http://www.xilinx.com/esp/index.htm), where they learn how Xilinx FPGAs can be used in Consumer, Automotive, Broadcast, Consumer, Data Processing and Storage, Industrial, Scientific and Medical, Wired and Wireless Communications applications.
Q. Tell us about the free software development tools that one can download from Xilinx.com. What are they? How are they meant to convey the Xilinx FPGA experience before actually committing to using a Xilinx FPGA? Can you give us a URL where they can go to download the free software and demos? A. If the customer is looking at Xilinx for the first time or considering additional ISE Design Suite products for their FPGA design environment, a free, downloadable 60-day evaluation gets them started quickly. In addition, Xilinx offers ISE WebPACK software. This is the ideal downloadable solution for FPGA and CPLD design offering HDL synthesis and simulation, implementation, device fitting, and JTAG programming. ISE WebPACK provides the tools and features along with the same easy-to-use design environment as our award winning ISE Foundation design tools providing instant access to the ISE features and functionality at no cost.
Q. Xilinx seems to work very hard at providing evaluation kits for your FPGAs. Where is the best place to browse the available evaluation kits? And, also what is the relationship with Avnet or other distributors in terms of evaluation kits?
A. The best place to start is the Board & Kits page on Xilinx.com (http://www.xilinx.com/products/devboards/index.htm). Here they can quickly find our features kits, as well as links to third-party kits. Our kits range from evaluation and starter kits that enable designers to begin designing with specific FPGA families, to full on development kits like our XtremeDSP Video Starter Kit Spartan-3A DSP Edition (http://www.xilinx.com/products/devkits/DO-S3ADSP-VIDEO-SK-UNI-G.htm) that gives developers the hardware and software they need to kick-start their designs targeting specific applications. We work closely with our distributors and other third parties so that they can also deliver development kits that meet specific customer needs. We like to work with these third parties because it gives our mutual customers a broad range of systems to choose from within the Xilinx ecosystem. It also provides us with a scalable model for delivering a broad range of kits.
Q. On the training front, we notice that you have curriculum paths on Connectivity, DSP, Embedded, and FPGA. Tell us about this training. What does it cover? How much does it cost? Where and when is it offered? Basically, how can an engineer use this training to educate himself about FPGAs? A. Xilinxs programmable devices are extremely flexible and powerful. As a result, they are used in many different products and in many different industries. Depending on the product, some customers might want to exploit the DSP power of our technology whilst others focus on the benefits of an embedded solution. To help FPGA designers get straight to the knowledge they need for the functions they are designing, we have created curriculum paths that suggest the right courses in the right order. The curriculum paths generally take a student from no knowledge through to advanced level. On the Xilinx training website (http://www.xilinx.com/support/education-home.htm ) we not only publish our curriculum paths, but also describe pre-requisite knowledge needed to get the best from a class and also self-assessments to help engineers make the right choices.
Q. What are Xilinx Authorized Training Partners (ATPs)? When would you recommend that someone turn to a Xilinx partner for training? A. ATPs are Xilinxs industry-leading network of dedicated training providers. These companies are chosen for their dedication to and knowledge of Xilinx products, a history of delivering high quality services and a passion for delivering the best quality education experience for our customers. These far-reaching networks of 23 providers understand the needs of the local markets and can provide a tailored learning experience. We recommend that engineers wanting to take Xilinx classes turn to their local training provider first (http://www.xilinx.com/support/training/atp.htm).
Q. Tell us about Xilinx real-world seminars. What sorts of seminars do you provide, and what is the best way to find out about them in advance? Do you offer seminars with your distributor partners like Avnet or Nu Horizons? A. We offer seminars on a wide range of topics, from embedded and DSP systems design, to specific applications such as automotive. These seminars will either take place in the form of workshops are the various trade shows we participate in, to Mobile Workshops we run ourselves, and seminars run by our distributors which might often cover technologies from some of our partners. The Events page on Xilinx.com has a listing of Events, Seminars, Webcasts and training programs (http://www.xilinx.com/events/index.htm). Our distributors also run a variety of
seminars, workshops and even online demonstrations. Information can be found on their web sites. Q. Finally, tell us a little bit about pre-sales technical support. What is the recommended way to engage with a Xilinx FAE? What sorts of customers can contact Xilinx for pre-sales issues in terms of an FPGA design, and how do you recommend that they do that? A. When a user needs help, the best place from them to start is signing up for My Support (http://www.xilinx.com/support/services/mysupport.htm) on Xilinx.com, which provides designers with award winning online support, with the added benefit of personalization. Key Features of MySupport include: MyAlerts Users are instantly informed when any new information is posted that meets their specific needs Support News Users can access the latest information about Xilinx software and IP cores Whats New Users can access the latest information about products, silicon solutions, and design resources Tech Tips Users can access the latest technical information about development tools, device families, interface tools, etc. Forums Users can collaborate with other designers in discussion groups or chat rooms; join the popular newsgroup comp.arch.fpga Answer Database Customers can use our Advanced Search or Answer Browser tools to search our database archives, technical tips, application notes, or software manuals. Easily access the latest technical answers from our huge database of over 4,000 answers, indexed in logical categories Problem Solvers Users can get instant help for installation and configuration, PCI applications, JTAG implementation. They can troubleshoot their configuration or installation problem using a series of diagnostic questions within an interactive tool that can save you hours of work. If a user still needs help, they can open a WebCase (http://www.xilinx.com/support/clearexpress/websupport.htm) to submit a technical support request and they will be contacted by the appropriate field office. Q. Thank you for this interview.
Interviews with FPGA Tool Vendors

One of the hassles in selecting FPGA Tools or IP is going from vendor to vendor asking different questions and trying to compare notes. In addition, it is the vendor community that really has the most in-depth experience in FPGA tools. Thus, in this section we provide email interviews with major FPGA tool and software vendors on various important topics. In each case, keep in mind that the vendor is putting his or her best foot forward. These are informative but polemical pieces explaining one or more sides of an issue. In some cases we have more than one interview per topic, which allows comparison of responses. In all cases, remember to check with the vendors that interest you directly as the technical details of your project as well as their tool or software offerings are subject to change. AGILITY: FPGAS FOR FAST IMAGE PROCESSING ALGORITHMS ALDEC, INC.: ACTIVE-HDL 8.1 & NEW VERIFICATION TECHNOLOGIES ALTIUM: INNOVATION IN FPGAS AND BOARD DESIGN BLUE PEARL SOFTWARE: VALIDATING TIMING CONSTRAINTS IN FPGAS BYTE PARADIGM: TESTING & DEBUGGING FPGA-BASED SYSTEMS GATEROCKET: DEVICE NATIVE FPGA VERIFICATION & DEBUG IMPULSE: "C"
TO
FPGAS, TOOLS, AND BOARDS: VENDOR INTERVIEWS: TOOLS
FPGA PROGRAMMING SOLUTIONS
MATHWORKS: MATLAB AND SIMULINK FOR FPGA DEVELOPMENT MENTOR GRAPHICS: VENDOR INDEPENDENCE FOR FGPA DESIGNS NATIONAL INSTRUMENTS: DEVELOP AND DEPLOY FPGAS EASILY SYNOPSYS, SYNPLICITY BUSINESS GROUP: TOOLS FOR FPGA INDEPENDENCE TARAY: NEW TECHNOLOGIES FOR FPGA BOARD DESIGN
AGILITY: FPGAS FOR FAST IMAGE PROCESSING ALGORITHMS

10 October 2008: FPGAs for Fast Image Processing Algorithms INTERVIEWEE. LARRY MELLING, VP MARKETING TEL. 650 846 2555 EMAIL. larry.melling@agilityds. com COMPANY. AGILITY DESIGN SOLUTIONS INC. WEB. http://www. agilityds.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Agility. A. I am vice president of marketing for Agility Design Solutions, responsible for corporate and product marketing. I have more than 15 years of executive management experience in bringing technology to market for both hardware and software development. I joined Agility (formerly Catalytic) from Virtio Corporation, which provides system models for pre-silicon software development. Prior to Virtio (now part of Synopsys), I was vice president of marketing at IKOS Systems (now part of Mentor Graphics Corporation), a leading provider of emulation and acceleration products for SoC verification. I have Bachelor of Science degree in Electrical Engineering from Purdue University and started my career as a design engineer at Hewlett Packard.
Q. Algorithms are one of the most common functions performed by DSPs and/or FPGAs, so can you explain to us at a basic level the how your company helps out algorithm developers? A. Algorithms start as abstract, implementation agnostic mathematical models. The Agility approach is to provide a development environment that starts with the algorithm in its abstract form (MATLAB or C model/description) and enable fast implementation through automation. The value is starting from the abstract model and maintaining a verification flow from abstract model to implementation. This is especially valuable for mathematical models that are done in floating point and rely on mathematical manipulations to process incoming images or signals. The process of implementation can include floating point to fixed point conversion and modification from frame based processing to stream processing to give two examples of some of the transformation that occurs. The Agility environment helps developers with these transformations as well as the analysis of the algorithm to determine performance bottlenecks and the dynamic range of data. The overall impact our customers realize is a time savings of 50 to 75% of schedule for their algorithm implementation.
Q. In our pre-interview discussions, you emphasized Agilitys skill in helping designers working with algorithms to take algorithms written in C or MATLAB and accelerate their implementation in FPGAs. Often, these algorithms are manually transferred to RTL. Can you explain how your products work with C or MATLAB to improve this process? A. Starting from a MATLAB algorithm the first step is to create C-code which is functionally equivalent to the original MATLAB. Agilitys MCS (MATLAB to C Synthesis) automates this
step. Actually, translating even a simple MATLAB function to C is fraught with peril
once youre aware of the pitfalls. If you are interested in the details you can download our whitepaper MATLAB to C Pitfalls, but I will quickly highlight a few here:
MATLAB doesnt require definition of data types This is a mixed blessing. It makes it very easy to put together a proof of concept, but when it comes time to translate to C, a lot hinges on correctly interpreting the intent of the MATLAB designer as opposed to working off a precise specification. RESULTING MANUAL EFFORT The types and sizes of all variables (and possibly memory allocation) must be declared MATLAB is a vector language Translating a vector-based description to a scalar-based description is harder than it sounds. Beyond the obvious fact that the code becomes a lot more verbose, there is the potential to miss data dependencies, which prevent you from simply turning a vector operation into a scalarized loop. RESULTING MANUAL EFFORT you may need to create several copies of sub-functions for each signature and carefully analyze data dependencies. MATLAB supports type polymorphism Polymorphism means that operations and functions behave differently when called with different types of arguments. For example, a multiplication can be a real multiplication or a complex one. RESULTING MANUAL EFFORT you may need to create several versions of the code for a given operation, and several copies of sub-functions for each possible signature For most algorithm projects just creating a functionally equivalent C model can take weeks of effort and if you are ultimately going to FPGA this is just step 1 of the translation process. With an automation tool like Agilitys MCS this time to generate a functionally equivalent C model is reduced to the time it takes to generate the C code typically minutes. The next step is to translate the C code into an FPGA. If you dont use high-level synthesis the process is to manually converting the abstract C code into RTL. Making use of high-level synthesis tools like Agilitys DK Design Suite speeds the conversion. I have highlighted three key areas where our C-base approach adds value by saving time. Faster verification Contrasting C vs. RTL for verification is easy, especially abstract C code. Abstraction equates to performance. C-code that is synthesis-ready is less abstract than the original C code, but still is more abstract than the original RTL that would be hand-written or generated by the C synthesis process. The impact is faster turn-around times and more confidence that changes and improvements havent compromised the functionality. If the tool used also supports hardwarein-the-loop execution with the test bench, designers get even higher performance and confidence that the portion of the algorithm implemented in an FPGA works. Partitioning Algorithm implementation is a balancing act of performance, cost and power trade-offs. Most often a combination of hardware and software is used to implement the algorithm. Using profiling on the abstract algorithm model gives immediate focus on the performance bottlenecks. This information, along with the developers experience, makes it easier to determine whether an FPGA can help break these bottlenecks. Once identified, defining the interface for the portions of the algorithm that will run on the FPGA must be easy to handle in a good algorithm development environment. This is where using high-level synthesis to create all the necessary interface control logic delivers big time savings and correct-by-construction results over hand developed interfaces and control.
Parallelism The goal for moving an algorithm to an FPGA is to gain performance through parallelism. Again this is where developers will want a development tool to enable them to quickly direct the compiler to which functions/lines of code are to be executed sequentially and which can be run in parallel. The better the control provided the designer and the faster the turn-around time the bigger the savings in development time and the higher the quality of results. In Agilitys experience with over 1000 algorithm implementation projects, development teams can complete their implementation in less than the time of hand-coding RTL. As algorithm complexity grows, this will only compound the development time if using conventional handcoding techniques and create more demand for teams to use tools designed for algorithm
implementation like Agilitys DK Design Suite.
Q. Are there any differences between starting with C vs. starting with MATLAB that developers should be aware of? A. Mechanically there is an extra step to generate C from MATLAB that isnt required if you start from C. The process to get from C to the FPGA is identical whether you wrote the C or you use MCS to generate the C. The developer will have to add the parallelization and other hardware elements to the C code. This is one of the areas we are exploring adding automation, but this is just an investigation at this time.
Q. What about your own tools, Pixelstreams and DK Design Suite, how do these compare with other high level design tools MATLAB or Simulink? A. PixelStreams was designed as a solution for quickly implementing high-performance streambased image processing and by developing the PixelStreams library of functions in the DK Design Suite environment they are easily parameterized and customized creating a powerful, programmable toolset for image processing. A PixelStreams application is built from a network of filters connected together by streams. Filters can generate streams (for example, a sync generator), transform streams (for example, a color space converter), or absorb streams (for example, video output). Streams consist of flow control, data transport and high-level type information. The data component in turn contains: An active flag (indicating that this pixel is in the current region-of-interest). Optional pixel data (in 1-bit, 8-bit or signed 16-bit monochrome, 8-bit YCbCr or RGB color). An optional (x, y) coordinate. Optional video sync pulses (horizontal and vertical sync, blanking and field information for interlaced formats).
Combining all of these components into a single entity gives us great flexibility. Filters for example can perform purely geometric transforms by modifying only the coordinates, or create image overlays by just modifying the pixel data. This gives you a brief high-level view of PixelStreams focus from a technology perspective, but the value is once again saving implementation time. For more details you can download our Bringing Imaging to the SystemLevel whitepaper. Many imaging applications need to rely on FPGA to meet the performance requirements to process live video and output the results at the 30 to 60 fps rates typically required for video. PixelStreams gives the developer a toolbox to build up their image-processing algorithm in FPGA quickly.
As far as comparing to MATLAB and Simulink, I think the big difference is they arent targeting a specific vertical segment to provide a tuned solution for that segment and PixelStreams is focused on rapid development of streaming video solutions onto FPGA.
Q. What about the trade-off and choices between implementations in FPGAs and implementation in DSPs? Do you or Agility have any preferences, opinions, or suggestions in this respect? A. The choice between FPGA and DSP is often dictated by performance requirements, IO connectivity and availability of reusable IP. For example, IO connectivity relates to architecture so if I am bringing camera input into the system for analysis and the best way to connect the camera is using an FPGA and existing IP for a camera link interface that means my video stream is on the FPGA so it could make sense to do some conversion or filtering of the video while on the FPGA. Similarly, if I start reading data from a disk and using a DSP to process the data, but cant process it fast enough to meet my output speed requirements I would look at adding an FPGA to offload data processing that could be paralleled on an FPGA. In all these cases it is a trade off between development time and functionality/performance. With Agility we provide complete solutions so you can assemble the most efficient system quickly with our FPGA platforms rich with IO and all the necessary IP to drive the IO, the tools to quickly integrate and implement your own design.
Q. Often, developing algorithms isnt the best use of an engineers time. He might want to purchase tools to help him do it better, or he might want to outsource this piece of his design. Recently your company started a focus on design services. Tell us about your services. A. Typically algorithms represent differentiating intellectual property for customers giving their products sharper images, faster response times, cleaner audio, etc. Getting these algorithms implemented requires a different skill set than developing the algorithms. Because Agilitys products are built for getting from algorithm to implementation quickly our technical team has become expert users of the products making them real power users of the technology. This combined with their backgrounds in image and signal processing gives us a valuable team of resources that can deliver a turnkey solution to customers and leave behind the tools and training so the customer can modify and evolve their designs rapidly too.
Q. Finally, tell us a little about your pricing models both for your products and your services. Can you give us a ballpark idea for how much things cost as well as the process of engagement? A. The pricing model is very broad representing the broad spectrum of solutions required for customers. For example a low-end simple prototyping system starts as low as $1,000 and in contrast we have done programs that the solution including services was $250,000. What is different about Agility is we have the ability to configure solutions to meet customers needs. So it is the engagement process that is really the focus, we meet with customers to understand what they need to accomplish and can outline options from complete turnkey solutions to product and training. Q. Thank you for this interview.
ALDEC, INC.: ACTIVE-HDL 8.1 & NEW VERIFICATION TECHNOLOGIES

1 October 2008: Active-HDL 8.1 & New Verification Technologies INTERVIEWEE. LORI NGUYEN, DIRECTOR OF MARKETING TEL. 702.990.4400 EXT. 254 EMAIL. sales@aldec.com COMPANY. ALDEC, INC. WEB. http://www.aldec.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Aldec. A. I have 13 years of experience in High-Tech Marketing, working for Hewlett Packard, Micron and Aldec; 3 years in EDA. My primary responsibilities are to oversee all Marketing Activities for Aldec, including: PR, Editorial, Advertising, Webinar/Seminar/Training/Tradeshow Events, product management, UNITE EDA Partner Program Management, channel management, collateral development, and all standard business marketing functions.
Q. Before we talk a little about your new, Active-HDL 8.1, can you give us a very brief outline of Aldec. What is your value proposition for FPGA developers? What are the product offerings? A. Aldec has been in the EDA business for 24 years offering HDL simulators & verification tools for the FPGA designer. Aldec tools offer high value, such as equivalent or better performance, more features and at an affordable price. Aldec offers a patented technology suite including: design entry, HDL simulators, co-simulation, design rule checking, hardware-assisted verification (emulator/accelerator/prototyping), co-verification, IP Cores, DO-254 compliance tool sets and engineering specialty solutions.
Q. Moving on to Active-HDL 8.1, this is a pretty big release for Aldec. What are its highlights? A. Aldec is one of the first-to-market an FPGA simulator with full Assertions & Coverage support at an affordable price. Active-HDL 8.1 supports SystemVerilog IEEE 1800 Assertions/Coverage, PSL & OVA. The product includes assertion & coverage viewer, breakpoint editor, code coverage viewer, advanced dataflow, assertion libraries, HDL editor and language assistant support. Active-HDL 8.1 also includes enhanced support for VHDL 2008 (IEEE Standard P1076-2008) including new constructs and libraries. The new release supports new and updated libraries including: Assertions, OVL 2.2 and VTL. A new DPI-wizard to help create quick interfaces between SystemVerilog and C applications is now included in Active-HDL 8.1. The DPI-wizard allows simple entry of C/C++ tasks and functions and generates C wrappers, and sample SystemVerilog files. The wizard also creates a configuration file for compiling generated C files into a dynamic-link library.
Q. One feature that caught my eye in reviewing it, was the new Code2Graphics. How does this work?
A. The Code2Graphics converter is a tool designed for automatic translation of text sources into Active-HDL block and state diagrams. It analyzes VHDL, Verilog, or EDIF source files and generates one or more block diagram files depending on the number of design entities, modules, or cells found in the analyzed file. The Code2Graphics converter also translates a text description of a state machine written in VHDL or Verilog code into a flat or hierarchical state diagram.
Q. Another interesting feature is the linkage between Active-HDL and the Mathworks products, Simulink and Matlab. Tell us a little about what Mathworks users might get from this relationship. A. Active-HDL 8.1 is one of the few FPGA simulators to provide a full co-simulation solution for DSP designs, which is included in our PE and EE Active-HDL 8.1 configurations, unlike the competition who may not offer a solution at all or only as an optional upgrade. MATLAB users can benefit via the interface with Active-HDL 8.1, which allows scalar and array data exchange and built-in MATLAB command or M-file execution during HDL simulations in Active-HDL. The interface allows you to generate complicated stimulus in a testbench, describe functionality of some design units at a high level of abstraction, post-process simulation data(e.g. compute Fast Fourier Transform of the DSP block output) and visualize simulation data (statistical analysis, spectral analysis, etc.). Active-HDL 8.1 MATLAB interface is using the HDL simulator as primary verification environment, requesting MATLAB services from within VHDL or Verilog code. Unlike some competing solutions, this interface does not require additional MATLAB toolboxes, but can use them if they are available. Simulink users benefit from the interface to Active-HDL 8.1, by being able to place HDL black boxes directly on the Simulink diagram. Simple one-click procedure in Active-HDL generates M-file that is dropped into a black box, providing HDL model description and informing Simulink how to start Active-HDL during simulation. HDL-Simulink interface parameters such as type cast, precision, quantization and overflow handling are fully configurable from the Simulink diagram level. The interface allows Simulink users to keep their tool as test environment, enabling in-system verification of HDL components or even the entire HDL design. Simulink interface is further enhanced by support of other vendor blocksets (Altera DSP, Synplify DSP, Xilinx System Generator, etc.).
Q. A big development in the EDA space is the movement towards higher-level languages like SystemC or SystemVerilog, not to mention the whole ESL phenomenon. What new features exist to help developers follow this migration in EDA and make it easy or if not easy, less painful? A. First Ill mention that we are seeing the adoption of SystemVerilog from several of our customers, a smaller percentage, are moving towards SystemC and the ESL higher level languages and methodologies. Active-HDL 8.1 provides support for SystemVerilog verification methodologies and System-level verification solutions utilizing SystemC with its transactionlevel models (TLMs). SystemVerilog Active-HDL 8.1 supports IEEE 1800TM SystemVerilog, a unified hardware description and verification language and supports all three groups of constructs: design, assertions, and verification; most recent improvements were added in strings, classes and DPI areas. Future construct support, interoperable SystemVerilog verification methodologies, will include Open Verification Methodology (OVM) 2.0. SystemC Modeling the behavior of the entire system using a high-level language such as C, C++, or
MATLAB, Active-HDL 8.1 includes SystemC/C++ debugging, tracing source code, setting breakpoints, waveform viewing, watch/call stack viewing and total visibility in the design heiarchy, which is crucial for Electronic System Level (ESL) designers.
Q.
I notice that Active-HDL 8.1 supports a PCB Interface, what are the Benefits of this integration for PCB designers?
A. Yes, Active-HDL 8.1 and the CADSTAR product from Zuken provide an interface for robust and seamless PCB I/O pin conversion. Todays challenges with the FPGA to PCB flow is: I/O changes due to PCB constraints: Pin swapping, adjusting I/O properties, saving discrete component costs and I/O changes due to FPGA constraints: Timing, dedicated/special-purpose pins, voltage/termination compatibility and simultaneous switching outputs (SSO). Active-HDL 8.1 and CADSTAR together solve these challenges. Active-HDL generates pin constraints file and integrates Synthesis, implementation and export/import of pin file to CADSTAR tools from its Design Flow Manager. Then, Active-HDL exports FPGA Pin information to CADSTAR PCB design editor and FPGA pin information is shared between FPGA and PCB design environments. For optimum Place and Route, PCB design require pin swapping. Pin swap in PCB requires updated file to be send back to Active-HDL to update the FPGA. Active-HDL imports SWAP Pin file and generates new constraints file for the FPGA Place and Route tool to update the FPGA. CADSTAR provides complete PCB design and layout tool set. Reads Active-HDL data (Pin File) and assigns pins for PCB design. Generates swap pin file for future constraints changes and optimizes routing pattern of the PCB design. The combined strength of Aldec Active-HDL 8.1 and Zuken CADSTAR, provides a full system level design and verification environment delivering quality and reliability.
Q.
In addition to Mixed-Language Simulation, Active-HDL 8.1 provides full Design Creation & Entry, what features does this include?
A. Active-HDL 8.1 provides design creation and entry on ALL configurations of Active-HDL 8.1. This subset of features includes: design entry, Block and State Diagram editing, waveform editor, stimulus generation, language assistant, templates and auto-complete, the Code2Graphics Converter, Macro/Tcl/Tk/Perl script support and legacy schematic design import and symbol import/export. These features are included in every shipping Active-HDL 8.1 product/configuration.
Q. How much does the product cost? And can you point us to website URLs where a potential customer can learn about your products before buying? Are there webinars, tutorials, downloads, etc., that you would recommend? A. Active-HDL 8.1 prices start at $3,600 and go up from there - our prices are typically more affordable than the competition. Active-HDL is available in three Product Configurations Designer Edition (DE), Plus Edition (PE) and Expert Edition (EE). The software is available in floating or node-locked configurations for the Windows operating system. Absolutely, below are the key product links to learn more about Active-HDL 8.1: Active-HDL 8.1 Product Info: http://www.aldec.com/activehdl/ Active-HDL 8.1 Movies/Tutorials: http://www.aldec.com/Products/Movies.aspx?productid=ff724e4e-71f8-48db-bdf656f43fddf586 Download Free Eval Version: http://www.aldec.com/Downloads/default.aspx Technologies Info: http://www.aldec.com/Technologies/default.aspx
Technical Documents: http://www.aldec.com/TechnicalDocuments/ Webinars/Events: http://www.aldec.com/Events/default.aspx Q. Thank you for this interview.
ALTIUM: INNOVATION IN FPGAS AND BOARD DESIGN

24 October 2008: Innovation in FPGAs and Board Design INTERVIEWEE. MARCELLE DOUGLAS, PRODUCT MARKETING MANAGER TEL. +61 2 8969 4400 EMAIL. Marcelle.douglas@altium.com COMPANY. ALTIUM LIMITED WEB. http://www.altium.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Altium. A. I have more than 13 years experience in the electronic design industry and a total of almost 20 years in the software industry. Some of my recent roles for Altium Ltd. have been as Product Marketing Manager and as Technical Marketing Editor, publishing in a range of well-known industry magazines and journals. I have completed a Bachelor of Science Computer Science with Honors from National University in California.
Q. With respect to your Altium Designer product, how does the product positioning differ from those of other third parties in the FPGA space like Mentor Graphics or Synplicity? What does your target project look like? What is a typical customer? What specific needs do you address, uniquely? A. At its core, Altium Designer differs in being a unified design solution, the only one of its kind on the market. Unified means a single data model, a single design process, a single design application; and a single, coherent model for the design all visible to the entire design team, across FPGA design, PCB layout, and the touch-points and outputs to manufacturing and the mechanical design elements. Thats quite a summary. Perhaps the better comparison is in asking how many tools are required to complete a design from concept to manufacture. If the answer is more than one, you dont have a unified solution at your fingertips. Altium Designer provides that single, unified solution. This unified approach means that any designer, across any discipline, operating in any vertical market, can benefit from adopting Altium Designer. It equips them to create their next generation of electronic products, in a world that is competitive, that is seeing seismic shifts in where design is done, and who is tapping into tomorrows devices. Because Altiums solutions are designed for use by all electronics engineers, there is no typical user or project per se. A snapshot, however, of projects and customers shows that Altium solutions are used daily by many of the worlds leading organizations across a range of industries including telecommunications, automotive, aerospace, defense, medicine, science, and consumer electronics. Altium Designer is used on PCB layout, rapid prototyping and FPGA synthesis to prototype and then to final layout and manufacture.
Q. Tell us about the Altium Desktop Nanoboard. Is this primarily for evaluation / prototyping? Deployment? Both? How does it compare with a complete do-itfrom-scratch approach? A. The Altium Desktop NanoBoard is a high-capacity, low-cost reconfigurable hardware platform based on the power of programmable devices. It is also much more than that, delivering unprecedented power for rapid system development and implementation into the hand of
todays engineers. A little explanation on why this is important most platform solutions today are based on a specific FPGA device technology. This means they require an implementation that is rigid and tightly coupled to the platform itself. This implementation will almost certainly be limited to the HDL language of that specific platform and will forever trap the engineer into requiring technology from only the device vendor. The Altium Desktop Nanoboard overcomes this by not only offering the programmable hardware platform that is reconfigurable, but more importantly one that is vendor independent an industry first. Engineers can suddenly explore their designs upfront without having to commit to a particular type of implementation and before its decided what their product will even do. They can rapidly develop, implement, debug, and deploy an entire design before even moving to the production PCB. Design focus is suddenly back onto product innovation and less into managing the complexities of design implementation. Naturally, this opens up education possibilities not just for graduates but even the most experienced engineers. But the single biggest advantage is that do-it-from scratch for product design is finally brought into the 21st century. When you look at how most system design is done today its an obvious case of the cobblers children wearing the worst shoes. No one today would dream of using a hand crank to start their car. But ironically thats exactly how electronic design today is approached with outdated and disparate tools based on design flows from over twenty years ago. So, as part of a new approach, the Altium Desktop Nanoboard provides engineers with an architecture to work seamlessly and in full synchronization within a development environment for maximum flexibility, real-time on-board power monitoring for system analyses, and automatic peripheral and daughterboard configuration. The need then for working in a simulated environment or building multiple working prototypes (which are both costly and timeconsuming) is no more. And do-it-from scratch approach is once again focused on real innovation where the real design value is. To underscore this point, one Altium customer reduced his prototype model from weeks to five days.
Q. One of the most exciting new products has been Altiums Innovation Station. What is the concept behind the Innovation Station? What sort of projects is it most applicable to? A. The Altium Innovation Station brings together the award-winning Altium Designer unified electronics design software with the Altium Nanoboard reconfigurable hardware platforms to provide a complete electronics design and deployment environment. The high level concept is to provide a complete design environment that puts programmed device intelligence at the center of the design process to support continuous design innovation. This means a whole new approach to electronics design with a number of immediate benefits for engineers. For example, IP that is programmed into the system is much easier to protect that the physical IP as the source isnt shipped with the product. Soft design can happen before the hardware platform is designed, and can continue after the hardware is manufactured and even delivered to the customer. It also provides the basis of an electronic ecosystem to better connect with customers. The Altium Innovation Station offers a number of design advantages such as libraries that are more than component symbols and low-level code libraries complete with preconfigured hardware and software drivers. Hardware blocks that go beyond mere schematics based on plug-and-play hardware I/O modules that are ready to connect to chosen processor and FPGA and on-the-fly hardware generation for the most versatile deployment options are just a few of
the features it has. This makes the Altium Innovation Station ideal for projects requiring system configurability and reusable standard hardware and software components. Any project requiring high computational and programmable capabilities such as systems prototyping and industrial automation make ideal project candidates. Or, it can be used by design teams simply wanting to explore an idea on a quick, prototype platform.
Q. Altium is often perceived as focused most strongly on FPGA / PCB integration. Yet many of our readers are interested in FPGA design only, and often turn first to the free tools of Xilinx or Altera. How do your products compete with (or complement) the free tools provided by Xilinx or Altera? A. From a design perspective, Altium Designer would be used as a replacement for vendor tools. Because the system works with and creates vendor tool compatible projects, designers can move between the two environments for specific tasks when needed. However, when preparing a design for download to an FPGA, Altium Designer uses the vendorsupplied tools to handle the low-level mapping and place-and-route functions for the specific target devices. This is done transparently through the Altium Designer GUI and the designer does not need to manually run the vendor tools to create the necessary bit files or download to the FPGA device. In other words, we use specific functions of the vendor tools as device-specific drivers for low level functions so that the designer doesnt have to. And thats the beauty of the system. Altium Designer is completely part and vendor neutral and supports a wide variety of devices. Also, while Altium Designer has its own target-independent synthesis engine, it does support both vendor synthesis engines and some popular third-party synthesis tools as well.
Q. Recently Altium made an exciting announcement regarding 3D PCB technology. Tell us about this initiative and how you are helping developers see their PCBs within the final system and integrate them in 3D. A. Yes, its very exciting because for the first time, electronics designers working in the 3D world can design in real-time 3D! Real-time collaboration between electronics and mechanical designers has recently been made possible with new 3D PCB Visualization technology, allowing engineers to fit their boards into enclosures in real-time, in 3D, and without guesswork. By using a non-proprietary STEP 3D file format as a mechanism, Altium Designer allows ECADMCAD collaboration without forcing organizations to purchase costly integration add-ons or use a specific mechanical CAD package. Altium Designer lets designers create the board shape directly from the case model, do full mechanical fit and clearance checking, and update their board design or component choice and placement to ensure a perfect fit and conformance to physical design constraints. If the mechanical designer changes the case design for example, this is updated within Altium Designer. The complete board design can be outputted afterwards for use by the mechanical engineers. This technology significantly reduces the number of time-consuming, error-prone and costly design iterations currently necessary to close the ECAD-MCAD loop. More importantly it allows real collaboration not possible before between increasingly interdependent areas of design. No more doh moments when the electronics doesnt fit the casing!
Q. Tell us a little bit about your company. A. Altium has headquarters in Sydney, Australia with sales offices worldwide, and resellers in all major markets around the world. Altium provides world-leading unified design solutions for creating next generation electronic products. Nick Martin, CEO, founded Altium in 1985 with a vision that still guides the company today: to provide every engineer and system designer with easy access to the best possible design tools. Consequently, we develop market and support unified an electronic product development solution that helps all engineers and designers to turn their design ideas into products as easily, efficiently and cost-effectively as possible. This is the driving force behind Altium and is still the vision that guides our strategies today and into the future. We believe that seeing is believing, so one of the best ways to start investigating Altium Designer is to sign up for one of our regular live Web conferences. Altium engineers will demonstrate the system while you watch and ask questions from the comfort of your own computer. Follow the link from the Altium home page at http://www.altium.com/ We also have a very comprehensive set of on-demand demo videos available at the Altium DEMOcenter, which can be found at http://www.altium.com/Evaluate/DEMOcenter/. For more detailed product evaluations, we recommend customers contact their nearest Altium Sales and Support Center or Value-Added Reseller, who can arrange for special evaluation kits and licenses. http://www.altium.com/Contacts/.
Q. What do you believe is the next generation of electronic design? How does Altiums approach work and why do I need to move to the next generation design solution? A. Electronics design technologies and the electronics industry is rapidly changing. The rise of globalized markets and manufacturing, and increasingly sophisticated product designs and new technologies mean that more complex designs need to be brought to market more easily and with a greater emphasis on innovation. The electronics design process itself has also fundamentally changed. More developers are involved in the process, design disciplines are merging, cross-team collaboration has become essential, and software-centric design is now defining what was once defined by hardware. The issue is that yesterdays approaches are based on yesterdays design models. They are reaching the point of diminishing returns with respect to coping with todays design requirements. No matter how much you might add features and improve the loose connections between the individual data systems of the process, the fact remains they will still remain as silos struggling to interact. Altiums next generation solution puts soft design at the center of product development. All team members can plug into a single design environment and approach that works off of a single date model. Concept exploration without having to commit to hardware is real-time and rapidly taking any custom board design to manufacture is suddenly possible (rapidly here meaning 3050% faster results). In short, Altium Designer provides one coherent system for tackling what is essentially a single task developing an electronic product from concept to reality. To put it simply, why would you just continue to just get by, when you can easily go forward into the future of what will be electronic design?
BLUE PEARL SOFTWARE: VALIDATING TIMING CONSTRAINTS IN FPGAS

1 October 2008: Validating Timing Constraints in FPGAs INTERVIEWEE.
BILL ALEXANDER, VP,
MARKETING TEL. 408-961-0121 EMAIL. info@bluepearlsoftware.com COMPANY. BLUE PEARL SOFTWARE WEB. http://www.bluepearlsoftware.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Blue Pearl Software. A. Im the vice president of marketing at Blue Pearl Software, responsible for product marketing and corporate marketing for the company. I started working in semiconductor design in England and migrated to the United States with National Semiconductor. I worked for a number of small and large semiconductor companies including Product Marketing at LSI Logic before moving to work for EDA companies such as Avanti and Synopsys. I joined Blue Pearl Software over 3 years ago to bring our productivity improving products to market and grow a successful start-up in Silicon Valley.
Q. Most of our readership for this guide is interested in using FPGAs for actual deployment, as opposed to using them for ASIC prototyping. Do your products fit this sort of need? And, of course, could you please just give us a few bullet points about your products and your value proposition for the FPGA community? A. Blue Pearl Software has 3 products that are integrated into a single executable that allows designers of ASICs and FPGAs to improve their productivity and reduce design time. Indigo RTL Analysis is a functional analysis and linting tool that parses RTL descriptions to provide valuable feedback on potential errors for both the design and the design flow. Indigo helps designers write correct RTL quicker. Cobalt Timing Constraint Generation generates SDC timing constraints from the RTL description to provide the designer with a comprehensive set of accurate constraints to enable faster timing closure. Cobalt saves designers a huge amount of time writing timing constraints and the comprehensive SDC file generated achieves faster implementation of a correct chip. Azure Timing Constraint Validation reads in the RTL description and the SDC file for that design to automatically validate the timing constraints which significantly lowers the risk to implement a digital design. Azure saves designers a lot of time checking whether they have a correct SDC to use for chip implementation.
Q. As design complexities increase apparently so does the importance of timing constraints. For those who havent necessarily thought about this issue head-on, can you explain why timing constraints are increasingly important in complex FPGA designs?
A. FPGA designs are increasingly becoming larger and more complex, like ASIC designs. They often have embedded processors, intellectual property, other pre-existing modules and multiple clocks. These designs increasingly push the limits of area, power, and performance. The fastest timing routes quickly become congested and it gets more difficult to optimize for performance. Timing constraints, which include clock rates, i/o delays, and timing exceptions are provided to the synthesis and Place & Route tools, to direct them to achieve the necessary timing targets to meet the performance requirements and close timing quickly. For large, complex chips the SDC file can quickly get very large, hundreds of Megabytes to Gigabytes, and designers spend more and more time generating the SDC file and ensuring that it is correct for the design. Blue Pearls Cobalt Timing Constraint Generation tool automatically generates the timing exceptions from RTL saving designers many weeks of work and Azure Timing Constraint Validation validates the SDC file against the RTL description to assure the designer that he is using a correct file for chip implementation.
Q. What solutions does Blue Pearl offer for timing constraints? In the pre-interview back and forth, you mentioned that your Azure Timing Constraint Validation addressed just this need. Can you tell us about it? A. In addition to Cobalt Timing Constraint Generation, which has been on the market for 2 years, Blue Pearl also offers Azure Timing Constraint Validation. Many designers use a system-on-chip (SOC) design methodology and use Intellectual Property (IP) blocks from 3rd party vendors and legacy code from previous generations of designs. That means that they are dealing with RTL descriptions with which they are not familiar and, to get the best performance, they need to check that the constraints they have are correct. Azure Timing Constraint Validation is extremely helpful to provide validation of the existing constraints for the legacy and IP blocks that are major chunks of their design. Azure assures the designer that he is using a correct file for chip implementation, significantly reducing design risk. Designers often write constraints with wild cards, which cover multiple paths in the design. Such a generalized false path constraint can include a path that is not false, and no timing gets reported at timing analysis (STA). This can result in a timing error that could make the design non-functional. Checking these generalized constraints for accuracy is vital to achieving a correct design. Azure performs a thorough analysis for all specified paths and provides the designer with a much higher level of confidence in the SDC being used to drive synthesis and Place &Route. Moreover, as these blocks are integrated into their chip, Azure can check that the block level constraints are valid in that chip application. Azure can also check the chip level constraints written for that application. Azure is our latest tool that we have introduced to the market and can be used by designers using any digital chip design flow.
Q. Moving upwards a bit, how does your product work with the other software products out there for FPGA design, such as those supplied by the FPGA vendors themselves as well as third party tools chains like those provided by Mentor Graphics, Synplicity/Synopsys, etc.? A. We have partnered with Synplicity/Synopsys and Mentor Graphics to ensure that we understand the SDC that they support. That means that designers can use both Cobalt and Azure with tools from Synopsys and Mentor. We have also partnered with the major EDA vendors such as Magma to ensure that our tools are integrated with their ASIC flows. We do work with Actel, Altera and Xilinx to be compatible with their design flows as well.
Q. How much do your tools cost? What is the business engagement model? A. We have an ASIC EDA tool model of pricing for our tools that includes time based and perpetual licensing but have aggressively introduced and offered a 3 month time based license that enable companies to adopt our tools on a project basis. This should be an attractive alternative for FPGA design houses who tend to work with proprietary tool sets.
Q. Since its a very big commitment to obtain your tools, what do you recommend a potential customer do to try before buying? Are there webinars, seminars, online learning or white papers? What about pre-sales technical support or trials under NDA? Can you tell us about any pre-sales methods for pre-engaging Blue Pearl? A. Actually, the level of commitment to obtain our software, is less than you might think. There is almost no learning curve, which means it is easy to bring designers up to speed on how to use each tool and if one designer leaves, his/her replacement can quickly step in and pick them up without difficulty. Blue Pearl Software tools are priced affordably and integrate with every major design flow. They can be evaluated within a couple of weeks or less. We have demonstrated all of our tools at DAC, ICCAD, and GSA events. We offer Timing Closure seminars on a regular basis to introduce customers to our technology and capabilities. In addition, our website has product descriptions, datasheets, white papers, and customer testimonials. For customers interested in purchasing our tools, we offer a free, fully supported two-week evaluation period. We also offer extended evaluations and/or project-based licensing for a minimal cost. Customers get a return on their investment in as little as one design. Q. Thank you for this interview.
BYTE PARADIGM: TESTING & DEBUGGING FPGA-BASED SYSTEMS

1 October 2008: Testing & Debugging FPGA-based Systems INTERVIEWEE. Frederic Leens Sales & Marketing Manager TEL. +32 67 34 28 94 EMAIL. Frederic.Leens@byteparadigm.com COMPANY. Byte Paradigm WEB. http://www.byteparadigm.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Byte Paradigm. A. I am founder and Sales & Marketing Manager of Byte Paradigm. Prior to creating the company, I worked during 6 years for many companies in Benelux and France, as ASIC, SoC, FPGA and digital board engineer for industries ranging from medical imaging to media and avionics. I hold a MSEE from the Mons Institute of Technology (FPMS, Belgium) and a Masters degree in Management. Today, I am in charge for sales and marketing at Byte Paradigm. While not purely technical any longer, my job involves a great deal of technology-related tasks like studying customer requirements, detecting trends and defining new products.
Q. Many of our readers may not be familiar with Byte Paradigm. Can you give us a very brief summary of the company, its products, and the value proposition that you bring to the FPGA community? A. Byte Paradigm was founded in 2005 by Olivier Rasmont, Didier Martiny and myself. We have about the same background, a common vision and one purpose: provide PC-based instruments to increase the productivity of embedded electronics engineers during design, test and debug. To understand the idea beneath Byte Paradigm, lets compare FPGA and ASIC design. FPGA and ASIC or even SoC design have HDL coding (VHDL, Verilog, SystemC) and RTL / gate-level simulation in common. The complexity level in terms of gates is about the same. As you know, both for ASIC and FPGA, debug and test has become one of the most time- (and money-) consuming tasks in the design process. What is unique with FPGA is that you can very quickly program a real FPGA and that you can instantly change its functionality at no cost. This is a real advantage for debug and test mainly because a real system always executes faster than a simulated system. However, going from the design environment on PC to the real environment on a test board is not so straightforward. A test lab is often a separate environment, outside your familiar PC; real systems lack visibility and you often end up doubling your design time, because you need to design a second test system.-to test your system. This is where Byte Paradigms value proposition is: we want to help the engineer unleash the power and flexibility of FPGA during debug and test, by allowing him/her to go early on a realworld or prototype system. For this, he/she needs tools that offer a real flexibility for a wide variety of tasks all about stimulation and observation and a real continuity between the design environment and the test and debug environment. Our current range of products features pattern generators, SPI and IC exercisers and analyzers, and simple logic analyzers. They can all be controlled from PC and are programmable with common languages such as C; they are simply plugged into a USB interface and are very
compact, so any designer can put it next to his/her PC. In brief, they help the design talk with their FPGA in the real world.
Q. Test and debug, while critical, doesnt exactly bring up happy thoughts among many FPGA designers. Tell us a little more specifically about your products and how they hopefully make the test and debug cycles easier, not for everyone but for FPGA designers in particular. A. Debug is hard because the FPGA-based systems are getting more and more complex. An FPGAbased system is often the work of several engineers. It is composed of custom firmware, thirdparty IP and many components taken off-the-shelf (memories, ADCs, DACs, processors). To tackle this complexity, a piece by piece approach is often used: each functional piece of the design is validated separately. This gives the engineer a good insight about how each piece works in the real world. This may allow him/her to avoid pitfalls during integration. For doing this, an FPGA designer basically needs something to send stimuli to an FPGA and something to observe the results of the stimulation. And he/she wants to do this easily, without having to design another board to do it. That is what our current and future PC-based instruments help the FPGA designer do: generate stimuli from a PC and observe the FPGA from a PC. If each piece of a design is validated and FPGA-proven, then it becomes easier to debug and test a fully assembled system. Piece-by-piece real world validation can also bring confidence in third party designs and IP, not to talk about validation.
Q. Are your products limited to certain FPGA vendors (Xilinx, Altera, etc.) and/or certain product families within them? A. No, they are not limited: our current products interface FPGA through its digital I/Os, LVCMOS standard. However, we are getting some new and more advanced products ready that may have some feature specifically developed for one given FPGA vendor in the future.
Q. Most of the FPGA vendors provide their own development tools - tell us how your products complement these tools provided by Xilinx, Altera, Lattice, and others. A. Most of these tools make use of the JTAG port for observing what is going on inside FPGA. Our instruments access FPGA through its functional ports. In most cases, the two approaches are really complementary. Moreover, we think that debug and test is both about observing AND stimulating. This is also what we hear from our customers this is why, well keep on focusing on both collecting data from FPGA and generating stimuli to FPGA in the future. Q. Many readers of this guide will not be designing FPGAs per se but rather working with a board vendor to create a semi-custom FPGA-based board. Are your products of value to these sorts of individuals as well? A. Sure. Our products act at I/O level. A simple example of non-FPGA use on board would be the stimulation of a DAC or interacting with a board through its IC bus, for instance. Actually, we initially thought of Byte Paradigm as a solution provider for FPGA debug and test. Our products revealed quite useful for board and ASIC / SoC designers as well and are notably
used today by fabless semiconductor companies for post-manufacturing prototype functional validation and qualification.
Q. FPGA designs of all types often involve intellectual property (IP) as well as software from multiple vendors as well as from scratch by the designer. Do your products help in any way during the integration (and hence test/debug) of either the software or IP? A. Yes, and here is a concrete example for this. We recently offered support to a customer working in the digital video industry. They had to integrate a third-party IP together with a piece of firmware that they designed themselves. It did not work and they were stuck not knowing which part of the design had a problem. Actually, some item of the IP specification was not well understood matter of how data had to be exchanged between with the IP. The customer successfully communicated with the IP implemented in an FPGA with our pattern generator; the IP did what it had to do but, playing with the sequence of stimuli sent to the IP, they realized their own design did the things a little differently. It did not match the simulations. They tweaked their design a little and quickly succeeded to let the 2 pieces play together. They confessed the couple FPGA plus PC-instrument really provided the flexibility they needed to check this problem quickly and explore many stimulus variations. This all is actually a piece-by-piece validation approach. It greatly helps speeding-up the full system integration. Its just like you secured partial designs before assembling them.
Q. Many of the most troublesome test problems involve protocols. Tell us how your products can help with protocol test, even for some of the standard protocols that are well established. A. Actually, there may be 2 problems with protocols and FPGA, even well established: The first problem occurs when you design a given protocol master or slave port in your FPGA. This is a new design, and you want to test the port to check if it is compliant to the protocol say, IC or SPI. Using one of our protocol exercisers / analyzers or our pattern generators may help you test and debug your design. There are also specific problem using a protocol, when a popular protocol knows many variants. This is the case for SPI, for example, which has known many variations. Testing and debugging an almost compliant port would need the appropriate environment. We strongly believe that PC-based instruments can offer this flexibility. There is another case, where you also have a port using a given standard or custom protocol running in the FPGA and there is nothing wrong with it. However, this functional port can be a very handy access point to stimulate and observe the rest of the design. This is what I call debugging through a protocol. Similarly, our protocol masters and pattern generators can help do this. Q. Would you like to tell us more about your future products? A. Well, we are getting several new products ready. Some have already been announced, like the followers of the GP-22050 in the GP Series USB devices. From mid-2009, well be launching a new platform for pattern generation. This is an exciting full new development we have been busy with for months. I cant tell you much about it, but for sure, it is going to offer more performance and features. Target market is high-end FPGA debug and test. Q. Thank you for this interview.
GATEROCKET: DEVICE NATIVE FPGA VERIFICATION & DEBUG

20 October 2008: Device Native FPGA Verification & Debug INTERVIEWEE. DAVE ORECCHIO, PRESIDENT AND CEO TEL. 781-908-0082 EMAIL. http://www.gaterocket.com/eg3/ COMPANY. GATEROCKET, INC. WEB. http://www.gaterocket.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at GateRocket. A. I have been involved in the semiconductor business for 24 years. Initially starting in the test market and moving to the electronic design automation space. I guess that chips are in my blood. I enjoy the fast pace and the continual change since it creates opportunities for creative entrepreneurs. As CEO I am responsible for the leadership of the company, making sure we are focusing in the right areas and ensuring we are paying attention to our customer needs. So long as you are solving a problem for the market and you take the right steps delivering an effective solution, you can build a great company. That is what we are trying to do at GateRocket.
Q. GateRocket has made a name for itself by device native FPGA verification and debug. Can you tell us in just a few short sentences what is meant by device native and what is unique about your RocketDrive and RocketVision? A. Device Native is the way we describe how our product is different from other products in the market. In addition, our product is focused on Field Programmable Gate Arrays (FPGAs) therefore; Device Native is referring to how we help people verify their designs on these devices. Our solution enables an engineer to see the behavior of their FPGA design running in the actual FPGA chip (the native device) while working in their simulation environment. We have recently blogged about the concept of Device Native verification on our RocketBlog. The benefit is there is no translation, no guesswork. You see what you are going to see in the lab while in your simulation environment. This is very powerful indeed.
Q. There are of course two to five major FPGA vendors, depending on how you count, and many product varieties at each vendor. How do you support all these devices? Do you support only Xilinx and Altera? Lattice, for example, is not an option? What about specific Xilinx or Altera families - do you support them all? A. We have been focused on the large players in the market. According to recent market statistics, Altera and Xilinx own 87% of the FPGA marketplace. We have decided to focus on these two vendors and offer solutions for their most recent FPGA offerings. We are focused on solutions for the largest and most advanced chips. Additionally, we plan to offer RocketDrives for each of their new families of devices as they become available to the general market. For Altera we currently ship a Stratix 2 RocketDrive. I would rather not prematurely announce future products; however the philosophy I described above will apply for their future devices. We recently announced availability of Xilinx Virtex-5 RocketDrives. Of course, we previously announced availability of the Virtex-4 RocketDrive as well. We have not made a decision to support other vendors devices since we just have not seen the demand for it to date.
Q. Another big issue is tools. How does your product interface with the tools provided by Xilinx and/or Altera? A. We have developed our product to automatically and seamlessly integrate with their tools because that is what our customers own. A key feature of our product is to integrate into our customers existing environment. In this way we do not disrupt their development methodology or tools, we complement or supplement it by adding significant value in verification and debug. Our founder, Chris Schalick worked as an ASIC designer and later as an FPGA designer. He recalls the frequent times when an EDA vendor would present a new methodology or tool but in order to gain the benefit you needed to change out your existing method or tools. His vision for creating a product that seamlessly fits into existing environments and adds value is realized in the GateRocket product. It is one of the key principals and values we abide by.
Q. What about third party tools like those from Mentor Graphics? How does your product work with those independent tool chains? A. We see the great work that Mentor Graphics is doing as critically important to the FPGA development process. In fact each of the major simulation vendors Cadence, Mentor Graphics and Synopsys (alphabetical ordered) is a partner with GateRocket in delivering Device Native verification. It is similar to the question above where the customer has their simulation environment intact. In most cases they do not want to make a change but they have a burning need to find bugs in their FPGA design more quickly or accelerate the overall verification process. We have taken significant steps to ensure that our product works well with the simulation vendor products and supports the new verification methodologies they are promoting. We test our products with the simulators and FPGA vendor tools to ensure our product works well with theirs and delivers our key value points of faster verification and debug for FPGAs.
Q. Many FPGA designers, if not all, take third party intellectual property (IP) as well as their own in-house IP and integrate that into their design, with many headaches about integration and verification. Does GateRocket help with the integration and debug/verification of IP from many sources? How so? A. You have hit on a key issue that is facing the FPGA community. This problem is not restricted to FPGA designers; IP has been a long-standing problem for the ASIC market as well. When you purchase any significant IP block, in most cases the documentation alone can be 100 pages or more. This complexity makes it very difficult for an engineer to understand all of the nuances of the IP. Whats more, the simulation models the engineer receives generally do not behave identically as the IP in-silicon because they are behavioral models or not as accurate as the actual IP on the chip. In addition, the testing of the IP in many cases is not complete enough to validate all of the configuration options or corner cases. In the end, the designer has difficulty controlling the IP and verifying in a software simulator if it is going to do the right thing in the FPGA. GateRocket enables the engineer to see the behavior of the IP in-silicon while being stimulated with all of the tests they have created in their simulation environment and compare the differences. Since the design goes through the full FPGA synthesis and place and route process they can determine immediately if the IP is operating as desired on the chip. Once complete, the designer has verified that the IP works in-silicon while leveraging their simulation and FPGA vendor tools enhanced by the GateRocket products, cutting weeks out of the system debug process.
Q. How does a prospective customer engage with GateRocket? In particular, tell us about pre-sales engagement opportunities - like webinars, NDA agreements /
demos, and other ways that an engineering team can test GateRocket before having to commit to a full financial engagement. A. The best way to engage GateRocket is to contact us by reviewing our events page on our web site and registering for a webinar or participating in one of the live trade events. In addition, we offer private demonstrations as well. Each customer has a different requirement for engaging in these types of products. As a start-up we custom tailor our approach to the needs of the customer. In all cases we work to making it as easy as possible to do business with us.
Q. What questions should an FPGA designer or verification engineer ask themselves to determine if they could benefit from a RocketDrive A. Do they find themselves in the lab with an FPGA that does not work? How long does it take to find each bug in the lab? Are they constraining their use of IP that could otherwise make their company more competitive because of the risk of getting the IP to work? Do they have long simulation times? Are their designs large and complex? There are more but it is best if they are concerned with their FPGA debug productivity to contact GateRocket. Q. Thank you for this interview.
IMPULSE: C TO FPGA PROGRAMMING SOLUTIONS

1 October 2008: C to FPGA Programming Solutions INTERVIEWEE. RALPH BODENNER, DIRECTOR OF PRODUCT DEVELOPMENT TEL. (425) 605-9543 EMAIL. RALPH.BODENNER@IMPULSEC.COM COMPANY. IMPULSE ACCELERATED TECHNOLOGIES, INC. WEB. http://www.ImpulseC.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Impulse. A. Ive been leading the product development team at Impulse for the past five years, and through three major releases. I have a number of roles at Impulse, but my primary responsibility is prioritizing and managing new releases, as well as working with our partners to extend the CoDeveloper product to new FPGA-based platforms. Our company is geographically distributed, with developers in Washington, Colorado and Vermont. Im personally located in the Boulder area.
Q. One of the great yet somewhat unfulfilled promises of FPGA is to take software problems and accelerate them by migrating them to hardware. How does Impulse help developers put into practice this FPGA potentiality? A. We believe that FPGA acceleration has moved well beyond potential and has been proven to be both practical and cost-effective. There are significant commercial and defense deployments already in image processing for example in robotics, medical imaging and UAVs as well as an increasing number of successes in high performance computing domains such as life sciences and financial feed handling. What is really changing now, though, is the robustness and availability of tools and platforms. Modern tools and libraries make it practical for software developers to target FPGAs. These tools dont make FPGA programming trivial, but they do make it far more productive and practical than lower-level methods based on hardware description languages. Its also important that software programmers have access to a wide range of FPGA-based platforms and systems appropriate for specific application domains. This is why ongoing partnerships with platform vendors are so important to us, and to our customers.
Q. More specifically, you mentioned in our talks beforehand, that Impulse has some new ideas to share on the frequent problem of migrating microprocessor code that is largely serial to the parallel programming environment of FPGAs. How so? A. As an organization that produces both design tools as well as providing design services, we have developed a pretty good understanding of what software programmers need to know when retargeting their existing software applications to FPGA-based platforms. Although many software algorithms can be ported at the subroutine level to an FPGA, for the highest performance and best hardware utilization some level of algorithm refactoring will usually be required. The most important insight the aha moment if you will comes when a software programmer begins to think in terms of data moving serially through a parallel, pipelined system. In an FPGA you have the possibility of pipelining at the process-level, at the level of loops, and at the level of individual, multi-cycle operators as well. A C-to-hardware compiler can help to automatically detect and generate such pipelines, but it cant do everything. A software programmer can therefore get much better results by thinking of ways to increase pipelining and
parallelism at a system level, and provide guidance to the automated compiler tools. Once a programmer understands these concepts, designing a highly efficient algorithm for an FPGA turns out to be not so different than designing a processor-based application involving multiple threads or processes. Its just a subtle change in the programming model. The Impulse C compiler features and associated API functions make such applications relatively easy to describe, and easy to debug as well using standard C tools.
Q. This brings up the whole transition to multicore and parallel processing. Experts say that the software is the current stumbling block. So is it fair to put Impulse on the cutting edge of helping us transition to multicore, at least in terms of FPGAbased multicore? A. Software tools have certainly been a barrier to the increased use of parallel processing and massively multicore systems. In an FPGA-based platform, the opportunities and challenges of multicore processing become more extreme than in perhaps any other platform technology. Consider, for example, a large FPGA-accelerated high performance computing (HPC) platform. In such a platform, the application programmer may have access to multiple commodity processors, each of which is closely coupled to one or more large-capacity FPGA devices. And each FPGA device in turn many include an embedded cluster of hard and soft processor cores, and embedded or adjacent blocks of shared memory. These FPGA-embedded cores may or may not be running some embedded operating system, such as Linux, that provides scheduling for multiple threads or processes, which themselves are communicating with customized FPGA hardware accelerators. Is anyone creating such a hybrid-processing platform today? Absolutely, in fact you can buy such a system from SGI or Cray already, or you can assemble it yourself using off-the-shelf components. Does Impulse C make the programming of such a platform easy? Not really. But we can make it practical for software programmers to do the job, or least 90% of the job, without the detailed hardware-level knowledge that would otherwise be required.
Q. Many software developers know little about hardware, yet want to take advantage of FPGAs. How little hardware knowledge might be required of a developer, who is fluent in C yet works in an FPGA design team? A. We have introduced FPGA programming to many users who have never experienced programming at the hardware level, have never used VHDL or Verilog, and who had no prior knowledge with digital design. How much knowledge such a person needs depends in large part on what kind of FPGA-based platform they are targeting, and their requirements for nonstandard I/O. For someone who is targeting a well-supported HPC platform (a platform for which we offer a complete platform support package), a minimum understanding of the I/O functions that we provide, along with a reference example, will normally be enough to get them started. For someone creating a custom hardware/software system involving direct input of data from a network interface, an A-to-D converter, a camera or some other input, then more hardware knowledge is clearly going to be needed to create bridging interfaces. Although we promote higher-level methods of design, we recommend that anyone wanting to get the most out of an FPGA should spend a day or two learning the fundamentals of HDL-based programming, perhaps by stepping through a few HDL tutorials provided by the FPGA vendors. This helps not because we want our users to be dropping into HDL, but so they can think more intuitively about FPGA parallelism, and so they can have a better understanding of the messages and reports that are generated by FPGA synthesis and place-and-route tools. HDL fundamentals are always a part of our Impulse C user training programs, for exactly those reasons.
Q. What applications are particularly helped by your approach? Are they largely compute-intensive like image or DSP? A. Image processing is by far the biggest application market we are serving today. We think this is true for a number of reasons. Image processing algorithms are extraordinarily computeintensive, with a high degree of parallelizing possible. Image processing algorithms are also inherently pipelined, making them ideal for the flexible fabric of an FPGA and for the Impulse C programming model. And perhaps just as important, image-processing algorithms are diverse, complex and fast changing. While many DSP applications can be built up quickly using DSP filter libraries (and using toolkits based on MATLAB and Simulink), image-processing applications often require hand-optimized, highly customized code that is unique to a particular application. Other domains share these same characteristics, including many scientific algorithms; data compression and encryption, financial feed handling and real-time analytics. We also believe there are significant opportunities in areas such as computational fluid dynamics, particle simulations and bioinformatics.
Q. What is the best way to get started for someone who is not familiar with Impulse? Do you offer free tutorials, webinars, or demos? Can you point us to some of the web URLs where an interested developer could learn more before committing to a purchase? A. The best way to get started with Impulse C is to obtain a low-cost FPGA platform for which we have ready-to-run examples and tutorials. These examples and tutorials guide you through the process of creating and partitioning an application, understanding and using FPGA parallelism, and generating hardware. The tutorials also walk you through the FPGA synthesis and placeand-route process, which is an aspect of FPGAs that most software programmers have never seen. Our goal in these examples is to demystify the FPGA development process. Not trivialize it FPGA design is not as simple as programming for your PC but at least make it an environment in which a software programmer can be productive. Even if a software programmer doesnt yet have access to an FPGA device, our evaluation software and training materials (including the Prentice Hall title Practical FPGA Programming in C authored by David Pellerin and Scott Thibault) can help speed the learning process and lead to better-informed decisions regarding FPGA platform selection. The evaluation version of Impulse CoDeveloper can be obtained on request from http://www.ImpulseC.com/eval. I should also mention that we hold weekly live webinars in which we cover FPGA programming methods and provide demonstrations of the entire software-to-hardware tool flow. Information about these webinars can be found at http://www.ImpulseC.com/webinar. Q. Thank you for this interview.
MATHWORKS: MATLAB AND SIMULINK FOR FPGA DEVELOPMENT

24 October 2008: MATLAB and Simulink for FPGA Development INTERVIEWEE. KEN KARNOFSKY MARKETING DIRECTOR OF SIGNAL PROCESSING AND COMMUNICATIONS TEL. 508-647-7000 EMAIL. sales@mathworks.com COMPANY. THE MATHWORKS WEB. http://www.mathworks.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at the MathWorks. A. As the marketing director of signal processing and communications for The MathWorks, my role is managing a team that is responsible for product management and marketing for a range of products, including algorithm development, design, and simulation as well as implementation and verification workflows for FPGA and ASIC hardware and DSP software. I also work closely with MathWorks partners, and participate on the strategy committee of the Design Automation Conference. Before joining The MathWorks, I have been involved in research, development, and marketing of advanced signal processing and data analysis technologies, which have helped me understand customer challenges and anticipate industry trends.
Q. Obviously our FPGA guide concerns FPGAs and FPGA-based designs. Yet MathWorks is not always the first company that pops into mind when it comes to FPGAs, so please explain the product groupings that you offer that are most appropriate to the FPGA community. A. Were well known in the embedded systems design community and weve been supporting FPGA design workflows since 2000, when we collaborated with Xilinx on their introduction of their System Generator product. In 2003, we announced co-simulation support for Mentor Graphics ModelSim. Today, we offer many more products that connect MATLAB and Simulink to FPGA design workflow as well as strong partnerships with both Xilinx and Altera. On the verification side, our EDA Simulator Link products allow engineers to co-simulate their Verilog and VHDL code running on Mentor Graphics ModelSim, Cadence Incisive, or Synopsys Discovery with MATLAB and Simulink. On the design implementation side, we offer Filter Design HDL Coder and Simulink HDL Coder. These products generate synthesizable Verilog and VHDL code to enable rapid implementation of MATLAB and Simulink based algorithms on to FPGAs. In addition to the implementation code, the HDL coder products generate test-benches, simulation scripts, and synthesis scripts for invoking downstream FPGA design tools. Both of the code-generation products also take advantage of the co-simulation capability offered by the EDA Simulator Links. Simulink HDL Coder also makes use of these co-simulation blocks to enable black-box IP integration of hand-written HDL code with the automatically generated HDL code.
Q. Where is the unique value that MathWorks brings? What sorts of applications or design challenges do you feel are most likely to benefit from bringing MathWorks tools into the design process? A. Our FPGA design and verification tools are bridging the system design to FPGA implementation gap. These tools are enabling rapid prototyping of complex Signal Processing, Communications, and Image Processing algorithms onto FPGAs. For example, many companies that create algorithmic IP for applications such as signal processing typically design those algorithms in MATLAB or Simulink. When implemented in silicon, these algorithms may constitute 50% or higher amount of the total gate count. The complexity of these algorithms is forcing engineers to spend more time at the system design stage with less time available for chip design and verification. At the same time, since many design engineers are working with draft standards, they constantly have to react to changing specifications. Our workflow and products are ideal in this kind of rapidly changing design and implementation environment.
Q. What is the philosophy behind model based design? Is there a philosophical mind shift required to use MathWorks products for FPGAs? Does it require engineers to rethink? Or are there transitions between doing things more by hand and doing them by model? A. The philosophy of Model-Based Design is a simple one. We call it Model-Based Design because we put the model at the center of the workflow. In Model-Based Design, the model includes the device or algorithm that is being designed, the environment it will operate in, the input stimulus, and the output measurement metrics, scopes, and instrumentation. The model becomes an executable specification that unambiguously describes system behavior. Through simulation, you can validate that the modeled behavior meets system requirements. For example, consider that you are designing a wireless communication system using ModelBased Design. In addition to the digital receiver and transmitter sections, your Simulink model would include the RF and analog models alongside the channel impairments you are expecting. So, even though you are only implementing the digital section in the FPGA, you are able to simulate the digital sections with the analog, RF, and channel impairments to ensure that your algorithm is robust enough to deal with the real world environments. Algorithm component models can be developed in Simulink, MATLAB, or C code and integrated into the system-level Simulink model. Since we provide libraries of many of these system level models, digital design engineers dont have to piece-meal their own models of what an analog, RF, or channel model component would look like. When simulating in Simulink, for example, they can easily view the numerical as well as visual results via the different scopes we provide. So, now going back to the top, once you have modeled your algorithm to your satisfaction, we provide tools to translate that model into a fixed-point model, which is necessary for efficient hardware or software implementation. In the manual workflow, this can be a time-consuming effort. If you use too few bits, you could end up with overflow conditions. If you use too many bits, you could be wasting silicon and burning excess power. From this fixed-point model, you are then ready to automatically generate C or HDL code. Using our targets and links products, you can then connect directly to downstream tools offered by our partners in the Embedded System design community or EDA industry. This is particularly important in a world where FPGAs are often used for embedded co-processing along with DSPs and microprocessors. Model-Based Design emphasizes system level design and uses design automation technologies to accelerate the implementation of the system you are trying to create. For FPGA designers, Model-Based Design is not new. It is a take on the top-down design workflow. As you know,
because of large design sizes, chip design engineers adopted bottom-up design workflow, which allowed engineers to build and simulate one block at a time and then stitch the core together later. There are too many issues with bottom-up design workflow to list here. But, everyone knows the advantages of top-down design. Since Model-Based Design allows high level of design abstraction, engineers can do block-level IP creation using a checker-boarding approach in a Simulink model. Since the Simulink model is the test-bench as well as the IP creation work-bench, it becomes the central part of any design team. Engineers in Bangalore and San Jose will swap in their HDL IP into the same Simulink model and ensure that it works correctly.
Q. On the language side, how extensive is the support for VHDL and Verilog? Are MATLAB and Simulink new ways to create better VHDL and Verilog? How so? What are the design trade offs? A. MATLAB and Simulink are definitely the right place to start for system level design of signal processing, communications, control, and other complex applications. This level of abstraction works really well for rapid evaluation of your algorithm since you can evaluate many architectures without committing yourself to hundreds or thousands of lines of code. In a nutshell, you benefit several ways: 1) Dedicate more time to evaluate your algorithm and architecture to achieve the right balance of area/speed/power trade-offs 2) Automatically generate implementation code (C or HDL) to quickly prototype your design on actual hardware 3) Use the Simulink or MATLAB model as a test harness to validate your implementation in the context of the entire system Our HDL code generation products generate IEEE 1364-2001 compliant Verilog and IEEE 1076 compliant VHDL code. On design tradeoffs, we are often asked about efficiency compared to manually coded designs. On this topic, you have to answer these questions: When comparing to automatically generated code, which iteration of the hand-written code are you comparing to? How long did it take to arrive at that final optimal iteration? As you know, the first iteration of the hand-written code is typically coded just to achieve functionality and an iterative process with synthesis tools is then used to refine the hardware implementation to achieve the area/power/speed trade-off. From experience we know that design specifications almost always change in the middle of a project. If youre operating at the Verilog or VHDL code level, you may have a significant amount of work to do to make the necessary changes. On the other hand, if youre operating at a system level, you can iterate faster, verify that they work properly, and even accommodate changes in the target hardware architecture. In hardware design, there is no silver bullet. So, we provide multiple architectures for many of our blocks. For example, engineers can choose to implement our product of elements block as a serial, cascade, and parallel design implementation. They can choose to unroll loops. They can specify design latency to help the design synthesis process. Our customers are telling us that the quality, readability, and efficiency of our code is similar to what they would do by hand. Q. On the design tools front, there are of course many free tools from Xilinx and Altera. How do the MathWorks products interface with the free tools? What additional value do they bring to the free tools? A. Its important to note that we have a constructive working relationship with both Xilinx and Altera, and that their DSP tools are based on Simulink. On our web-site we offer a workflow
paper, for example, that shows how you can use Simulink HDL Coder with Xilinx System Generator in the same design. That said, our HDL code generation products offer some key advantages. First consider the workflow. The added value of our products, as you said, is that the customer uses native Simulink blocks for design, simulation and code generation. The vendor products provide implementations that work well on their devices, but they require you to re-design the Simulink model using their proprietary Blockset. As design engineers we know that these design translations can be very time consuming and error-prone. Once you make this translation, you commit yourself to working at this lower level of abstraction (hardware components). So, design iterations become more difficult. Second, the HDL code we generate is highly readable and portable. The design can be targeted easily to ASICs or FPGAs and HDL synthesis tools from FPGA and EDA vendors, the code is very similar to what you would write by hand. Our customers tell us that code readability is important to them when they need to do system level debug and coordinate the effort of multiple engineers working on a design. While the Simulink blocks are typically used for datapath designs, we also offer the ability to include finite state machine logic using our Stateflow product, as well as custom-authored IP using Embedded MATLAB functions in the Simulink models.
Q. Similarly, Mentor Graphics and others offer third party tools for FPGAs. What is the relationship of your products to those of Mentor Graphics and others? Are they competitive, complementary, both? A. The RTL-level EDA simulation and synthesis tools are complementary. In the area of system level design, we believe that Model-Based Design offers the key advantage of high-level design space exploration that other products in the EDA space dont offer. For example: Simulink is a multi-domain modeling and simulation environment. For electronics engineers, this means that they can do analog, mixed-signal, RF, channel modeling, and digital design in one integrated environment. The simulation, evaluation, and visualization of results take place within Simulink using the many scopes and meters we provide. The established EDA workflow, on the other hand, is very fragmented. One has to do digital design in one tool-set and the analog/mixed-signal design using another tool-set. Visualization and evaluation of the results is then cobbled together via scripts or custom made tools. In the area of chip-design, we offer complementary workflow with our EDA partners. For example, our EDA Simulator Links connect MATLAB and Simulink to the HDL simulators including Mentor Graphics ModelSim and Questa, Cadence Incisive, and Synopsys Discovery.
Q. Finally, tell us a little bit about pricing packages and about where to get more information. Are there webinars, seminars, and other learning venues? Are there demos or evaluation versions of the tools? A. The EDA Simulator Links and Filter Design HDL Coder are priced at US$2000 for perpetual individual license. Simulink HDL Coder is priced at US$15,000 for perpetual individual license. More information, including detailed product descriptions, access to demos and webinars as well as support and training resources are available at: EDA Simulator Link MQ 2.5 for Mentor Graphics ModelSim: http://www.mathworks.com/products/modelsim/index.html EDA Simulator Link DS 2.0 for Synopsys Discovery: http://www.mathworks.com/products/linkds/index.html
EDA Simulator Link DS 2.0 for Synopsys Discovery: http://www.mathworks.com/products/linkds/description1.html Filter Design HDL Coder: http://www.mathworks.com/products/filterhdl/index.html
We also offer access to other prerecorded webinars such as:

o Rapid FPGA Implementations with Model-Based Design
o HDL Functional Verification with MATLAB and Simulink Additionally, evaluation versions of these products can be made available by contacting sales@mathworks.com.
MENTOR GRAPHICS: VENDOR INDEPENDENCE FOR FPGA DESIGNS

24 October 2008: Vendor Independence for FGPA Designs INTERVIEWEE. DANIEL PLATZKER, PRODUCT LINE DIRECTOR TEL. 408.451.5871 EMAIL. Daniel_Platzker@Mentor.com COMPANY. MENTOR GRAPHICS WEB. http://www.mentor.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Mentor Graphics. A. I started my career as a hardware engineer developing hardware for physical modeling at Daisy Systems. I then moved on to technical and management positions with responsibility over EDA tools for programmable devices and for Daisys proprietary hardware behavioral language. I joined Mentor Graphics in 2005. In the years between Daisy and joining Mentor Graphics, I was in networking, enterprise software, defense and eHealthcare companies. I was also the CEO of Tegrity, an e-Learning company that I founded in the mid-nineties. I held management and executive positions in marketing, engineering, sales and operations for the Israeli Department of Defense, Daisy, Tegrity, Castelle and BackWeb. In addition, I hold patents in image processing applications and won the Israeli Prime Minister Award for product innovation. I am a graduate of the Technion's School of Electrical Engineering, Israel, and hold a master's degree in engineering management from Santa Clara University, CA.
Q. We have only a short space for this interview, but would you please give us a highlevel overview to Mentor Graphics tool solutions that specifically address the needs of FPGA-based designs? What is Mentors design philosophy, and what are the available tools? A. The prevailing trend of increasing complexity of todays platform FPGA designs while shrinking time-to-market requirements have driven a variety of challenges in design creation, verification, and implementationand ultimately the need for more ASIC and SoC-like solutions. FPGA designers are turning to higher levels of abstraction, using more efficient design and test languages such as SystemVerilog, relying on internal IP re-use and external IP, and moving to more advanced verification tools and methodologies. For implementation, users are demanding synthesis that meets quality-of-results (QoR) requirements and leading-edge board tools for efficient PCB layout. We believe that it is critical for FPGA designers to retain the flexibility to retarget their designs to devices from different FGPA vendors. FPGA vendors always leapfrog each other in offering the biggest, fastest, or most power-efficient devices on the market. Hence, designers are looking for methodologies that dont lock them into one FPGA vendor. Since you asked about Mentor tools in the FPGA space, I believe that we are the clear EDA leader because we are the only company with the complete flow: Design Creation, Verification, Synthesis and PCB tools. The list of Mentor products is too long to mention here, but Ill mention just a few: Catapult and Vista tools allow for high levels of abstraction, HDL Designer allows for efficient design creation, re-use and documentation, and the Precision product family is used for FPGA synthesis. Precision is gaining prominence as a leading FPGA synthesis tool and, when used with other Mentor tools, it allows for a complete ESL-to-FPGA
gate flow. Our Modelsim and Questa products are the leading verification tools for FPGA designers, FormalPro is our equivalence checking tool, and of course we have a wide range of PCB tools including I/O Designer. We also continue to add more tools to our product portfolio. Lastly, as part of our on-going commitment to mil-aero companies, we are engaged in helping project teams meet DO-254 requirements by providing a complete and consistent tool flow, as well as methodologies, to assure the safety of FPGA devices in airborne systems.
Q. Now, of course, one of the most confusing and important choices for an FPGA design is the choice of tools. Each FPGA vendor has free or at least low cost tools, yet a few vendors like Mentor Graphics also sell tools into the space. When do you feel vendor-based free tools are most appropriate and when do the paid tools like those from Mentor make the most sense? A. We believe that free vendor tools are not the best choice for companies that are using or planning to use FPGA devices from different vendors. Keep in mind that when one FPGA vendor meets your needs today, another vendor might introduce a new device that is a better choice for your future projects. New FPGA vendors, like Achronix, are coming up with innovative devices that are only supported by commercial EDA providers like Mentor. Commercial EDA tools are vendor neutral and have an advanced feature-set to provide high quality of results, advanced debug, incremental flows, physical synthesis technologies, and rich mixed-language support. When a complete flow from an EDA company is used, the support and integration are often better because of the single point of support and problem ownership. We do not believe that using free vendor tools saves the customers money because the cost of these tools is often significantly less then the cost of vendor-dependence. When I was a hardware engineer, and this is still the case today with many customers, I was instructed to do whatever I could to minimize vendor-dependence, so the purchasing manager could use price leverage against vendors, and engineers would always be able to objectively select the best silicon for their projects. Users often call us when they get stuck and their project is delayed and at risk of missing the market window. This does not mean that vendor tools should never be used. In fact, choosing a vendor neutral synthesis product as the primary tool means the vendor tool may be kept on reserve. Because synthesis is based on heuristics, no tool will produce the best results for every single design. Lastly, the vendor neutral FPGA synthesis market is over $80 million, per Gary Smith EDA. I consider this another proof that there is a need for vendor neutrality.
Q. From your experience with customers, do you see a lot of design reuse across designs? In what ways does buying into the Mentor tool chain help with design reuse? In what ways do you think using the FPGA vendor tools might not be helpful with design reuse? A. Almost every customer we speak to makes use of internal and external design reuse the design community is truly going green. The majority of reuse comes from internally created HDL designs or design blocks, and most often they are being reused by engineers unfamiliar with the original design. Main points to enable good design reuse are ensuring: (1) all the design files/references are provided, (2) the quality of the code to be reused is good, and (3) the engineer can quickly understand the design intent of the reused blocks so that he/she can incorporate them into the new design. Mentors HDL Designer product fulfills these steps in an automated way to accelerate design reuse. First, it checks the design integrity to make sure the design blocks to be reused are complete and the coding is legal. Secondly, it assesses the quality of the coding because if the Copyright 2008 eg3.com No Reproduction or Further Dissemination Allowed
quality is not high enough, it could be more efficient to code from scratch rather than re-use. That decision should be made early in the design process, before investing too much time. The final step, once the integrity is sound and the quality is high, is to hasten the understanding of the design blocks functionality via generating visualizations of the HDL code. Its the a picture is worth a thousand words concept. It is very difficult and time-consuming to read HDL code and sift through many files in order to understand the full functionality of the code. Viewing FSMs for control logic, block diagrams, or spreadsheets for connectivity, and flow charts for sequential logic is more efficient that scrolling through text files. The visualization also aids in documentation. IP that is provided by FPGA vendors cannot easily be retargeted to FPGA devices from other vendors. Hence, if your next project fits better in an FPGA from another vendor you will have to spend time retargeting the IP, making design reuse more challenging. If the IP has standard interfaces, this task may not be as difficult. If the IP is a CPU, on the other hand, this task can be painful.
Q. Lets look at intellectual property or IP. Is the story the same here in that the free FPGA IP has lock-in issues vs. the IP available from companies like Mentor Graphics? Or are there additional positives to using Mentor Graphics tools vs. FPGA vendor IP? What about IP designed by the customer himself? A. Free IP provided by FPGA vendors is most certainly part of the vendor lock-in strategy. When users go through the time and effort to integrate a vendors free PCI core or processor into their design, they are less likely to want to start from scratch with another deviceeven if it has a superior offering. Hence, adoption of free FPGA IP can become a major obstacle to a truly vendor independent methodology. This is why we recommend turning to device-independent IP companies whose IP can be targeted to any of the major FPGA vendors. IP designed by the customer, however, is an entirely different matter. Internal IP is under the users control and usually coded in standard HDL. This typically can be re-targeted to a different FPGA device using a vendor-independent commercial tool.
Q. Again, because we have so little space here, help our readers out by pointing out some of the ways that they can learn about Mentor before having to buy. What sorts of available demos, online learning, webinars, etc., does the company offer to FPGA designers? A. We provide a broad selection of online resources available at http://www.mentor.com/ including demonstrations for Catapult C high-level synthesis, Precision Synthesis, HDL Designer and other tools. Each product page will have a link to the products respective online demo. In fact, Precision Synthesis has recently released a series of webcastseach of which includes a brief presentation and product demonstration that highlights a specific capability or design methodology, such as advanced synthesis optimizations, incremental design flows, embedded FPGA resource management, and SystemVerilog for design. These on-demand webcasts are available at http://www.mentor.com/products/fpga_pld/events/synthesis_webcast_series.cfm.
NATIONAL INSTRUMENTS: DEVELOP AND DEPLOY FPGAS EASILY

1 October 2008: Develop and Deploy FPGAs Easily INTERVIEWEE. TEL. EMAIL. COMPANY. RICK KUHLMAN - PRODUCT MANAGER, LABVIEW FPGA (512) 683-6806 rick.kuhlman@ni.com NATIONAL INSTRUMENTS
WEB. http://www.ni.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at National Instruments (NI). A. My name is Rick Kuhlman and I am the product manager for NI LabVIEW FPGA. I earned a bachelors and masters degree in electrical engineering from the University of Tennessee as well as an MBA. After interning with National Instruments in 2001, I joined the NI Engineering Leadership Program as a full-time applications engineer. Currently, as a product manager I am responsible for LabVIEW FPGA technical and business objectives and work closely with NI R&D and NI customers to determine key product features, develop product strategy, and drive inbound and outbound initiatives surrounding LabVIEW FPGA.
Q. Philosophically, your CEO, Dr. James Truchard, has communicated his excitement about FPGAs and how NI can help developers deploy FPGA-based computing quickly and easily. Why is Dr. T so excited about FPGAs? A. Dr. Ts excitement stems from his belief in the high-level message of the company. Dr. T is reinventing how scientists and engineers create test, industrial, and embedded systems coined graphical system design. He sees field-programmable gate array (FPGA) technology as a key solution for improving system performance, cost, and reliability, not to mention making impossible objectives feasible. Unfortunately, programming FPGAs has historically been difficult and relegated only to digital design engineers. Dr. Ts vision is to expand beyond the traditional bounds of this valuable technology in two directions: (1) Deliver current digital design engineers a shorter time to market, more intuitive tools, and rapid prototyping capabilities. (2) Enable the domain expert engineer or scientist, who would never have been able to use the technology otherwise, to program FPGAs.
Q. Tell us specifically about LabVIEW FPGA 8.6. For those new to NI, what is LabVIEW , and what features does it have specifically to make FPGA-based designs easier for developers? A. LabVIEW in general is a graphical dataflow programming language where, instead of text, users specify the execution of their program with icons and wires. It is much like creating an engineering diagram where icons represent functions; wires carry data; and structures, such as looping and cases, are special regions of the code. Using this high-level approach, programmers can avoid difficult details like memory allocation and syntax, focusing rather on their algorithm and core competency. At the same time, LabVIEW still allows programmers to dig down to low levels and optimize with things like in-place memory allocations, inline C-nodes, and execution trace debugging.
NI has extended this LabVIEW paradigm of programming from desktop and real-time systems to the FPGA. Perhaps the most unique characteristic of LabVIEW and its usage with FPGAs is the ability of LabVIEW to easily represent parallelism, which is a key differentiation between programming for processor-based systems and FPGAs. When a user creates two parallel paths of data in LabVIEW FPGA, they physically become parallel processes in the hardware. LabVIEW FPGA also has many built-in functions that make it easy to get up and running quickly including DMA data streaming, on-board memory communication, signal processing, control, digital communication buses, and more. Couple LabVIEW FPGA with NI off-the-shelf plug-in boards or FPGA-enabled embedded systems and users have drag-and-drop I/O and signal conditioning enabling extremely quick times to first prototype.
Q. One of the features new in 8.6 relates to Intellectual Property or IP. Tell us about how LabVIEW 8.6 works with IP, and especially about how it hopes to make it easy to import external IP and manipulate IP for the design. A. IP in LabVIEW FPGA can come from a variety of sources. First, it can come directly from the LabVIEW palettes. The IP blocks available in LabVIEW FPGA out of the box includes basic math, signal processing, control, data transfer, storage, I/O interfaces, and features to help users write their own IP. Second, users will find valuable IP from our IP generators like the NI filter design toolkits, which can generate code for specific digital filters including Butterworth, Elliptical, IIR, FIR, multirate, and even adaptive filters. Finally, LabVIEW FPGA has ways to integrate any external IP written in other hardware description languages (HDLs). Using the new LabVIEW 8.6 feature called Component-Level IP (CLIP), users can acquire IP from any source, define interfaces between LabVIEW FPGA and the port map of the IP, and smoothly use the external IP in the LabVIEW FPGA context. This opens the doors to IP vendors, HDL-savvy, and open-source code blocks to be used in LabVIEW FPGA and subsequently on NI FPGA-based hardware platforms.
Q. A few years back, NI introduced CompactRIO. Many FPGA developers develop for FPGAs from Xilinx, Altera, and the like; others buy FPGA-based boards from vendors like Pentek or Vmetro. What is CompactRIO? What market segment does CompactRIO target? How is it different from other FPGA solutions? A. NI CompactRIO is a high-level platform for developing real-time control and acquisition applications. CompactRIO is composed of a real-time PowerPC processor coupled with a reconfigurable Xilinx FPGA that is directly connected to a wide range of modular I/O modules. Both the real-time processor and FPGA are programmed directly with LabVIEW . Engineers and scientists deploy CompactRIO in a wide range of circumstances ranging from the desktop and lab benches to field deployed embedded machines. Because of the tight integration of hardware and software components achieved between CompactRIO and LabVIEW , domain experts who normally would not have the technical expertise to develop a complicated embedded system can take advantage of the determinism and reliability associated with a real-time computing platform and the customization, flexibility, and speed of the FPGA. Using LabVIEW as the graphical system design tool for the entire application empowers developers to shorten time to market and focus on their end application features and implementation, rather than on drivers, boot loaders, thread schedulers, and the other common woes of traditional embedded designers.
Q. At this years NI Week your company announced, Single-board RIO. Help us place this in the company strategy vis-a-vis CompactRIO and LabVIEW .
A. NI Single-Board RIO delivers a smaller form factor, a single-board option for custom enclosures, and is the next step in lowering the cost of deploying the reconfigurable I/O (RIO) architecture in high-volume applications. NI Single-Board RIO reuses the CompactRIO architecture of realtime processor + reconfigurable FPGA + I/O, but cost optimizes the system by removing the metal enclosure integrating all three primary components on a single printed circuit board (PCB). NI Single-Board RIO is targeted at customers who see the flexibility, ease-of-use, and time-to-market benefits of CompactRIO, but need to cost optimize for a high-volume deployment or need to build the RIO architecture into a smaller custom enclosure. Because NI Single-Board RIO shares the same architecture as CompactRIO, designers can prototype a system using the modular CompactRIO platform while they define their I/O requirements and algorithms. When they are ready to deploy to higher volumes, they can reuse their LabVIEW code directly on NI Single-Board RIO in many cases with no code changes. For more information on using CompactRIO as a rapid prototyping platform, check out the links in the last section of the interview.
Q. Wow, on the FPGA front, NI certainly has a lot to talk about! Unfortunately, in the span of our short interview, we can really only touch upon highlights. Would you do our readership a favor and give us some Web URLs where they can go for more information about LabVIEW , CompactRIO, and Single-board RIO. They are always especially interested in online learning, tutorials, demos, webinars and the like. A. Overall LabVIEW FPGA home page http://www.ni.com/fpga Introduction to LabVIEW FPGA webcast http://zone.ni.com/wv/app/doc/p/id/wv-229 Information on Component-Level IP (CLIP) with video demos http://zone.ni.com/devzone/cda/tut/p/id/7444 List of available IP from in-product to user-submitted functions www.ni.com/ipnet CompactRIO home page http://www.ni.com/CompactRIO/ NI Single-Board RIO home page http://www.ni.com/singleboard/ NI Single-Board RIO white paper - http://zone.ni.com/devzone/cda/tut/p/id/6265
Q. What is the future of FPGA-enabled devices from National Instruments? A. We will continue to develop FPGA devices along at least two vectors. First, we will continue to create FPGA-based embedded systems like the CompactRIO platform. In this regard, we want to create more powerful devices for higher performance and create smaller more embeddable targets for volume deployment. Second, we want to create more FPGA-enabled plug-in boards. Aside from extending the popular R Series FPGA-based data acquisition boards, we have also recently released the new NI FlexRIO platform. NI FlexRIO is a plug-in FPGA board with direct connection to FPGA pins on the frontend and bus interfaces, memory interfaces, and surrounding electronics on the backend. With NI FlexRIO, we are investing in an architecture that will enable NI as well as NI partners to use standard interfaces to create all types of acquisition, generation, signal conditioning, control, communication, or other myriad types of FPGA-based plug-in boards by simply creating the respective terminal block for the standard NI FlexRIO board. Additionally, any new technology will still use the LabVIEW FPGA platform along with the hooks to integrate any IP as the method of programming these devices. Q. Thank you for this interview.
SYNPLICITY BUSINESS GROUP: TOOLS FOR FPGA INDEPENDENCE

25 October 2008: Tools for FPGA Independence INTERVIEWEE. JEFF GARRISON, DIRECTOR OF MARKETING, FPGA IMPLEMENTATION TEL. +1 408.215.6000 EMAIL. jeff.garrison@synopsys.com COMPANY. SYNOPSYS SYNPLICITY BUSINESS GROUP WEB. http://www.synplicity.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Synplicity. A. I am the director of product marketing for the FPGA implementation products at Synopsys, Inc. In this role, my responsibilities include product strategy, definition, and launches for Synopsyss FPGA solutions. Prior to the acquisition of Synplicity Inc. by Synopsys, I was the director of product marketing at Synplicity; prior to that, I was a marketing manager at Cadence Design Systems.
Q. Many of our readers, both customers and others alike, will be curious about the acquisition of Synplicity by Synopsys. What impact does this have on engineer / users of the products, if any? What new values might be created for developers of FPGA-based products? A. When Synopsys acquired Synplicity, a new business group called the Synplicity Business Group (SBG) was created. Synplicitys CEO Gary Meyers leads this new business group within Synopsys. Synplicitys senior management and over 90 percent of engineering, marketing and sales personnel were also retained; therefore, its business as usual for users of SBG products. All of the existing products continue to be developed and well supported. And with the additi0n of Synopsys large technology base, we are working towards integrating several products specifically for FPGA designers. Our customers can look forward to us providing an expanded solution for FPGA design.
Q. The major FPGA vendors like Altera and Xilinx provide free tools for their FPGAs, whereas other vendors like Mentor or Synopsys/Synplicity provide tool chains for purchase. What advantages do you see for the developer in going the route of the paid FPGA tools? A. There are several advantages to using paid FPGA tools, with the top two being 1) Quality of Results and 2) technology independence. For high performance FPGA applications, such as those used in communications, timing performance is a key advantage. Customers find great value in being able to run their design faster than they could achieve with other tools. For high volume applications, such as HDTVs, a synthesis tool that can fit a design into the next smaller device size can save customers significant part cost. The resulting performance increase and/or area reduction can easily pay for the relatively small cost of the paid tools. Technology independence is also extremely valuable because it allows customers to develop a single RTL source and design constraints, then target them to any FPGA device in order to see what the best choice for their particular project is. In addition, they only have to learn how to use one tool. Productivity features, such as runtime, debug and HDL code analysis, also add value beyond that provided by free FPGA vendor tools.
Q. How is Synplicity differentiated from Mentor Graphics, another EDA vendor with a strong focus on FPGAs? Can you provide a brief competitive position for users who might be considering both? In what areas are they competitive? In what complementary? A. Synopsys Synplify product line is the clear market leader in FPGA synthesis among EDA providers, with over 75 percent of the market share. As with FPGA vendor tools, a top concern is the quality of results. Customers that have compared synthesis alternatives frequently tell us the Synplify product line produces the best results on average among FPGA synthesis tools. Because synthesis tools have a direct impact on the customers final end product in terms of performance and part cost, choosing the tool that produces the best results is typically a primary concern. Synopsys also offers a unique RTL debug tool called Identify, which can be purchased as a standalone product or it also comes standard with the Synplify Premier product. Identify allows designers to debug a live, operating FPGA by viewing real signal values embedded directly in the RTL code, with which they are most familiar. The majority of other debug tools operate on synthesized gates using signal names, which designers are often not familiar with causing guesswork with the debug task. Technical support is also a strong differentiator for Synopsys SBG products. Synplicity, and now Synopsys SBG, have been recognized as the leader in customer satisfaction for FPGA design tools based on 3rd party surveys. Mentor Graphics HDL Designer & ModelSim products can be used to complement the Synplify synthesis products. HDL Designer is a product that helps manage design projects and feature integration with Synplify Pro. The ModelSim product is used by many Synplify users for RTL & gate-level simulation of FPGAs.
Q. At the April, 2008, Embedded Systems Conference, Synplicity announced your Ready IP program. Intellectual Property acquisition from third parties, integration, and of course reuse are both one of the major benefits of FPGAs and a source of design trouble at the same time. Can you explain this program and how it hopes to help designers with IP? A. The ReadyIP program was designed to provide FPGA designers with a way to easily identify and evaluate 3rd party IP for use in their FPGAs. We created this partner program along with ARM, Tensilica, Gaisler Research & CAST. Each of these IP vendors provides IP that can be accessed on-line through the Synplify Pro product for evaluation via synthesis. The IP is protected with encryption for these evaluations. Once the customer views the synthesis report and decides that the IP is appropriate for their design, they work directly with the IP provider to purchase the IP and implement it into their FPGA. ReadyIP uses a new tool called System Designer, which is a standard feature of Synplify Pro and Synplify Premier. This tool is used to assemble and configure ReadyIP (IP-XACT format) components and busses. The output is top level RTL code that is then passed to Synplify Pro for synthesis into an FPGA. We think this try before you buy approach to 3rd party IP use will help designers accelerate design schedules that use common IP such as processors, USB, PCI, SATA and the like.
Q. DSP is another area in which FPGAs are used more and more. What sort of DSPspecific solutions are offered by Synplicity? How are these unique? A. DSP is quite common in todays FPGAs as evidenced by all of the top FPGA vendors incorporation of special DSP blocks into the architecture of their devices. One concern is that DSP algorithm designers do not typically write RTL code and run synthesis tools for implementation in hardware. DSP designers usually use higher-level languages, like M or blocklevel tools such as Simulink from The MathWorks, to design and validate their algorithms and
then hand them off to an RTL coder for implementation. These customers need a way to bridge the gap between algorithm design and an efficient implementation into hardware like an FPGA or ASIC. Synopsys Synplify DSP product addresses this issue by allowing designers to construct and validate their DSP algorithms in Simulink using common DSP IP such as FIR filters, FFTs, Viterbi decoders and so on. Using this Simulink model as input, Synplify DSP then performs system level optimizations such as re-timing and folding, and finally produces synthesizable RTL code optimized for the target FPGA or ASIC device. No other tool has the ability to perform such system level optimizations with consideration for the target hardware architecture (FPGA or ASIC). The ability to quickly retarget from one FPGA to another using the same Simulink model as input provides technology independence and high designer productivity.
Q. How much do the FPGA products from Synplicity cost? Can you share with us the business models of engagement by which a customer can commit to a Synplicity design flow? A. Prices vary by configuration, but perpetual licenses start at $10,800. Depending on configuration, time-based licenses of 1, 2 & 3 years are also available.
Q. What sorts of learning opportunities are provided by Synplicity for customers to try out your products before making a formal commitment? Since our audience is international, we are particularly interested in Web-based learning opportunities like webinars or demos. A. SBG has always made full-featured evaluation software available to prospective customers at no charge. The Synplify Pro and Synplify Premier software can be downloaded from Synopsys at http://www.synplicity.com/downloads/download1.html, and a temporary evaluation license can be requested. This gives interested customers a chance to try out the software on their particular design and see how it works for them. Self-paced on-line training is also available for free to customers, as well as in-classroom training for a fee.
TARAY: NEW TECHNOLOGIES FOR FPGA BOARD DESIGN

24 October 2008: FPGA Board Design INTERVIEWEE. JOE GIANELLI VICE PRESIDENT MARKETING & BUSINESS DEVELOPMENT TEL. 408-705-2773 EMAIL. joe@tarayinc.com COMPANY. TARAY WEB. http://www.tarayinc.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Taray? A. Im a sales and marketing professional serving the EDA market for the past 20+ years at companies like Cadence, EPIC Design, Synopsys and Synplicity. Im responsible for the marketing and sales at Taray Inc. Since most of our sales will come from indirect channels, Ill be managing our channel partners too.
Q. It seems that a very special focus of Tarays is the challenges presented by FPGA / board integration. Can you share with us what design challenges you address? A. FPGA pin assignments affect more than just the FPGA. They also have an impact potentially a bigger one on the routability of the PCB. From this perspective, one of the biggest challenges is visualizing the PCB topology so that component placement can be used as a constraint during the pin assignment process. Using 7Circuits PCB-like view of the design, the quality of the pin assignments at a board level is readily apparent. But 7Circuits doesnt just display this information to the user as an afterthought; it actually uses that data to automatically create board-optimized assignments across multiple FPGAs and components. Two other constraints must also be taken into account during the pin assignment process: the electrical rules of the FPGA and the logical relationships of the signals. 7Circuits synthesis engine considers all three constraints concurrently (PCB topology, FPGA electrical rules, and signal relationships) to automatically create FPGA and board-optimized assignments.
Q. Would you tell us the key product features of your flagship product, 7Circuits? A. 1) Tight integration with EDA tools and FPGA vendor tools, 2) Automated pin assignments (what we refer to as I/O synthesis), and 3) an ability to raise the level of abstraction in order to improve design productivity. 7Circuits can automatically generate symbols and schematics for use in the PCB design flow and it can communicate with the FPGA vendors tools. As mentioned above, it also synthesizes pin assignments based on three constraints. The third feature enables designers to focus at an interface level instead of a pin level. That is, 7Circuits allows the engineer to specify connectivity at a device level as opposed to classic methods that require him to define connectivity at a pin level. This ability to raise the level of abstraction is similar to writing software in C++ instead of machine language. The productivity gains offered by this kind of approach can be significant.
Q. How does your product integrate with the existing FPGA design tools like those from Xilinx or Altera? Does it have any relationship with any standard PCB layout tools?
A. 7Circuits can read and write ucf and qsf files for communication with tools from Xilinx and Altera. This bi-directional communication is critical in getting a pin assignment that satisfies both the FPGA and the PCB design goals. From a PCB perspective, 7Circuits creates Cadence DE-CIS (Orcad), Cadence DE-HDL, and Mentor DxDesigner symbols and schematics in formats native to those applications. In other words we do not use EDIF or some sort of interface; 7Circuits integrates natively with those tools. 7Circuits can also re-use existing symbols. This is vital in processes that require engineers to use symbols from a librarian-sanctioned corporate library.
Q. Mentor Graphics, in particular, seems to offer tools that focus not just on FPGA design but on board integration. How does your tool compete with, or complement, the features of the Mentor tool flow? A. 7Circuits is integrated with Mentors DxDesigner schematic capture package. As with Mentors FPGA/PCB tools, the link between the schematic and the PCB is not affected there is nothing 7Circuits does or does not do that affects that link. So 7Circuits can be used to initiate an FPGAbased system design that will eventually be targeted at DxDesigner and ultimately one of their PCB tools. What separates 7Circuits from Mentors product (I/O Designer) is that 7Circuits creates an optimal set of pin assignments from the outset. I/O Designer takes a clean it up later approach, requiring the team to create a PCB layout first (which implies creating a set of schematics that at a minimum represent FPGA connectivity), then asks the user to manually reassign pins based on knowledge gleaned from the PCB component placement. 7Circuits gets around all this through the use of a PCB-like canvas, using placement information at the beginning of the design cycle as a constraint in initiating the pin assignment process.
Q. What is your typical customer like? What sorts of target design projects or applications are best served by 7Circuits? A. We do not have a typical customer; 7Circuits has been used to create designs with as few as one or two FPGAs to huge systems containing almost fifty FPGAs. These customers range from startups to global, Fortune 50 corporations. 7Circuits is not vertically oriented any company creating products containing FPGAs can benefit from 7Circuits functionality.
Q. How much does the product cost? What is a typical engagement like? Would you share with us the structure of a typical engagement from the beginning to end? A. Our 7Circuits product starts at $10k and is priced higher for more complex designs. Optional FPGA libraries are also available from Taray starting at $1.5k. We engage system design teams similar to other EDA vendors, providing an evaluation license based on a mutually agreed evaluation process. Taray works closely with the customer from the outset to establish the evaluation plan and criteria for success. During this process some customers choose to procure the on-site training or design services from Taray to help kick off their use of 7Circuits in the initial project.
Q.
Some of the common questions from your customers might be of interest. For example, what problem are you solving?
A. Despite the growing complexity of FPGAs and their ever-increasing pin counts, system designers, FPGA designers and PCB layout designers are still manually assigning the programmable pins on FPGAs used on PCB designs. This task has become daunting and is
becoming more error prone. Tarays mission is to bring automation to this sorely needed place in the systems designs flow.
Q. So, what exactly is automated? A. Tarays 7Ciruits product uses patented I/O synthesis technology that considers three different dimensions to the problem as it optimizes the best pin assignments for all FPGAs associated with the PCB design. The first is the logical integrity of the system design. This includes maintaining the correct protocol interconnections between the FPGAs and other devices such as memory, DSP, processor, or another ASIC. The second is the physical interconnects that 7Circuits models in a rats nest. In this case, the 7Circuits technology is minimizing interconnect crossover for the PCB router. The third is the electrical design rules for the I/Os within the FPGAs. 7Circuits has its own built-in design rule engine, for each FPGA device family, to ensure pin assignments are DRC correct when assigned.
Q. What does the ROI look like for your product? A. What we see in typical FPGA based PCB design is that approximately 10% of the overall design effort is spent on assigning and re-assigning the pins for the FPGAs. Since this affects the systems designer, the PCB layout designer, and the FPGA designer, 10% of a 6-month project represents about 4 person months of resources. The 7Circuits product has been shown to reduce this from a 4-person month job to just 2 weeks, saving the project 3.5 months of effort. In most cases, this labor savings alone pays for the 7Circuits product in less than 6 months. Due to the error prone manual process thats in use today, we also see mistakes made on assigning the correct reference voltages or external terminations around FPGAs. Things like this are often not found until the board is fabricated and thus unusable. This wastes weeks of time and PCB manufacturing costs. Using 7Circuits maintains these connections correctly eliminating this costly error prone step.
Interviews with FPGA Board Vendors

One of the hassles in selecting an FPGA board is going from vendor to vendor asking different questions and trying to compare notes. In addition, it is the FPGA vendor community that really has the most in-depth experience in FPGA board design and deployment. Thus, in this section we provide email interviews with major FPGA board vendors on various important topics. In each case, keep in mind that the vendor is putting his or her best foot forward. These are informative but polemical pieces explaining one or more sides of an issue. In some cases we have more than one interview per topic, which allows comparison of responses. In all cases, remember to check with the vendors that interest you directly as the technical details of your project as well as their board offering are subject to change. BITTWARE: HIGH-PERFORMANCE FPGA-BASED SOLUTIONS COMMAGILITY: FPGA-BASED ADVANCEDMC BOARDS LYRTECH: MULTICHANNEL DEVELOPMENT BOARDS, FPGAS MEN MICRO: USER I/O
IN FPGA-BASED BASED ON
FPGAS, TOOLS, AND BOARDS: VENDOR INTERVIEWS: BOARDS
BOARDS
IF NOT
PENTEK: DSPS, FPGAS, IP, XILINX - MADE "EASIER" "EASY"
TEKMICROSYSTEMS: HIGH PERFORMANCE FPGA COMPUTING
BITTWARE: HIGH PERFORMANCE FPGA-BASED SOLUTIONS

20 October 2008: High-Performance FPGA-based Solutions INTERVIEWEE. JEFF MILROD PRESIDENT & CEO TEL. 603.226.0404 EMAIL. Jeff_milrod@bittware.com COMPANY. BITTWARE WEB. http://www.bittware.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Bittware. A. I started out as a sensor physicist, but early on figured out that we could sense more than we could process. So I started working on processing the signals, found it exhilarating, and never looked back. I believe that my low-level appreciation of the underlying requirements have given me unique perspective on signal processing. Recognizing a need for standard signal processing engines, I started a company named Ixthos in the early 1990s. Interestingly, we competed with BittWare. After Ixthos was acquired, Jim Bittman, BittWares founder who wanted to get back to his engineering roots, asked me to take over the company. Loving the innovative spirit I found there, I joined as President and CEO, and look forward to celebrating my 10th anniversary this coming January.
Q. Bittware has long been a leader in high performance DSP boards and subsequently in Altera-based boards. What is your product strategy? Briefly, can outline your product offerings? A. We always focus on providing general purpose, high-performance signal processing building blocks. We consciously shy away from trying to create complete solutions targeted at specific applications, knowing full well that this stuff is extremely complicated and that we cant possibly understand any given application as well as a customer who is focused on it. Fortunately for us, virtually all signal processing applications require high-performance, low-latency, deterministic processing coupled with fast memories, and a variety of I/O for everything from sensor interfacing, to multi-processor communications, to host interface, command and control. Therefore, our strategy is to identify the common core architectural components that span a variety of applications and implement them as modular building blocks that enable our customers to create their specific signal processing solution for their specific application. To this end, our products offerings are centered around board-level signal processing engines featuring DSPs, Altera FPGAs, or a hybrid of both, on standard COTS board formats such as CompactPCI, PMC, VME/VXS, VPX, and AdvancedMC. Of course, these engines are supported by a wide range of memory and I/O support, and are available for commercial or rugged environments. In addition, we offer a complete set of software tools for development, algorithmic implementation, and run-time control, as well as a growing portfolio of IP frameworks and blocks for FPGAs.
Q. In what situations do you recommend customers use DSPs and in what situations do you recommend they use FPGAs or a hybrid solution, speaking broadly? How do you leverage your expertise to help customers make these design choices?
A. DSPs and FPGAs are quite different beasts, with very different strengths, weaknesses, and development requirements. At the risk of oversimplification, it is generally understood that FPGAs are better for high data rates, parallelism, processing densities, and I/O flexibility, while DSP have advantages in code reuse, ease-of-development, and floating point. DSPs used to be known for using less power for a given application, but thats not always true anymore. Put another way, FPGAs tend to be better at solving straight forward, well defined, high-speed problems while DSPs are probably better for implementing complicated algorithms that may evolve, involve decision making, or can benefit from the use of floating-point. Most real-world embedded signal processing applications have components that exhibit both of these natures. Therefore, rather than competing these technologies against one another, it is often better to constructively embrace these differences by leveraging the strengths of both technologies while mitigating their respective weaknesses in what we call a hybrid architecture, featuring both DSPs and FPGAs. Of course, creating an effective hybrid solution is more complicated than simply putting down an FPGA next to a DSP. Weve had to wrestle with major issues including I/O interfacing, interprocessor communication, memory configuration, host interface, and control, along with creating an FPGA framework and unifying software that makes it all accessible to the user. Often, customers already have a strong preference for one approach or another. When they dont, we spend time educating them on the technology options, and educating ourselves on their application. We then take some time to discuss system design tradeoffs, and a specific signal processing technology will frequently emerge as a clear winner. If that doesnt happen, the final decision is usually made based on the customers development expertise and experience. When the technologies are roughly equivalent, and theyve got a bunch of bright FPGA developers and no one whos coded a DSP, or visa-versa, the decision is pretty easy.
Q. Using FPGAs is not always easy, and manufacturers like Altera provide their own tools. What tools does Bittware provide for your customers so that they can customize the board application? What features are unique to your own software offerings? A. Making FPGA more easy to use has dominated our development efforts for a while now, and I feel weve really made some great strides recently. The almost unlimited flexibility of FPGAs is a double-edged sword. On the one side, its enticing for all the possibilities and promises that high speed, high-density logic holds; on the other side, its an array of gates and undefined I/O that has no inherent functionality. Thus, the user must build every mundane and minute piece of functionality to implement any solution. Any other processing device already has I/O interfaces, internal data buses, address generators, DMA engines, resource arbitration, etc in addition to the processing resources. Any one of those pre-defined functions can be a limitation to the user, but at least they are done. Therefore, we believe that our key added value to FPGA users is our ATLANTiS FrameWork. This integrated system framework allows the Altera FPGAs to be abstracted to act like a systemon-chip with peripheral support, which facilitates a microprocessor/software-like approach to FPGA development. Specifically, A FRAMEWORK provides fully validated physical interfaces to board I/O and memory, data moving engines, resource arbitrators, and a wide range of other low-level modules, along with standard dataflow interconnect and control fabrics that allow the ATLANTiS modules to be easily connected, coordinated, and controlled. Using ATLANTiS FrameWork, customers dont have to start with a blank sea of gates, and spend precious time and money re-inventing wheels, users only have to develop their unique IP and added value. Furthermore, ATLANTiS FrameWork is implemented using Alteras Avalon buses and structures so that it all plays very nicely with Alteras Quartus tools. We even provide all the verification and simulation environments. Better yet, the ATLANTiS modules themselves are
not static, and can be tailored by the user so that they dont limit the imagination of the developer. We still have a ways to go towards fulfilling our complete vision of more function modules and processing blocks all tightly integrated with GUI development tools, but as I said earlier, I think weve made great strides recently and that ATLANTIS FRAMEWORK is a truly valuable tool which can greatly simplify the implementation of complex signal processing solutions on FPGAs.
Q. I noticed from your website that Bittware has supported form factors like AdvancedMC, VPX, VME, and even PC/104. What is the importance of these form factors to your customers? Are there any special challenges here vis--vis FPGAs? Any ways you can help customers choose among them? A. For the first time in many years, there has been a major upheaval in the COTS/open standard form factor world. Until recently, all of them used parallel busses, and there was basically just VME and the various incarnations of PCI such as CompactPCI, PMC, and PC/104+. As youve noticed, weve supported them all. For a long time these formats were tweaked, patched, and upgraded, but in general they have retained their basic integrity and backward compatibility. Many standard formats, notably VME/VXS, PMC/XMC, and CompactPCI, then added-on highspeed serial options as sort of a toe in the water. Keeping with the water theme, this opened a floodgate that could not be closed parallel buses are now underwater and drowning, and the COTS/open standard world is now dominated by high-speed serial and switched fabrics. Obviously, this is a bit of an oversimplification and some concessions are still being made to legacy support, but its clear to me that these new formats for switched fabrics are a very positive step forward for an industry that has renewed an aging set of system building standards. Given this new landscape carved out by the raging waters, with the exception of a few isolated legacy upgrades, BittWare is no longer developing for VME, CompactPCI, PMC, or PC/104. All of our new products are focused on leveraging high-speed serial and switched fabrics as the primary interconnect. These interconnects greatly reduce size and bandwidth constraints, thereby opening up a great deal of options for the system designer. The clear winners of the new high-speed serial formats are AdvancedMC, also known as AMC, and VPX. AdvancedMC was developed by and for the communications market for use on AdcancedTCA blades, but has grown far beyond that with the emergence of MicroTCA boxes and backplanes. VPX, also known as VITA46/48 came out of the VME community, but really has nothing in common with VME except for mechanicals and an optional extension that facilitates legacy support. From a board architecture perspective, these formats are remarkably similar some common power and control plane interfaces, and a bunch of high-speed serial ports that are often called fat pipes. We feel that FPGAs are a natural fit for these new formats since they enable our products to be extremely adaptable, which allows us to take a single common architecture and focus on adding value to it rather than having to continuously re-architect it for different formats. Regarding choosing between AMC and VPX, AMCs much larger product availability has made it very attractive for most customers, especially the commercial space, while VPX is a better fit for those applications that have special requirements such as ruggedization, extended temperatures, and very long life-cycles.
Q. Another area that has been very challenging for customers is the transition to new high performance switch fabrics. In what ways can Bittware (and FPGAs) help customers transition to and choose between technologies like PCI Express, RapidIO, 10GE, etc.?
A. Youre absolutely correct that this is a very challenging and daunting issue for most of our customers. None of the big three high-speed serial switched fabric protocols - PCIexp, SerialRapidIO, and Ethernet - have emerged as a dominant technology for building embedded computing systems nor do I think any of them will, since they represent three very different approaches. Each of them is good for some things, and bad for others. Further complicating the issue is that most chips, boards, and systems only support one of the three. Our conviction is that system designers shouldnt have to choose; they should be able to easily use the right protocol in the right place. Leveraging the inherent flexibility of Alteras FPGAs, our boards not only support all of these switched fabrics, we can do it simultaneously and even bridge between them. So go ahead and use that great SBC that uses PCIexp, and those network processors that only talk GigE, and take advantage of SerialRapidIO to communicate between signal processors we can do it all. Of course, the implementation details are not trivial either at the FPGA or the system backplane, but the results can be liberating for the system designer, and this flexibility is one of the reason customers use our products.
Q. What challenges and opportunities do you see for FPGA-based boards going into 2009? What do you find exciting these days? A. I think your previous questions addressed the top 3 challenges: easing development complexity, COTS form factor chaos, and confusion surrounding switch fabrics. As Ive previously discussed, we are addressing the first challenge with our ATLANTiS FrameWork, and see the adaptability of FPGAs as a distinct advantage in combating the challenges of this chaos and confusion. Additional challenges include maintaining signal integrity at higher and higher speeds, managing power supplies, and thermal/cooling - all while supporting harsh environments and extended temperatures. While I should caution that Im pretty geeky, and therefore easily excited by this stuff, I have to say that I havent been quite this excited about our markets and products for a very long time. The new switched fabrics and system formats, which support them, are fueling a new cycle of innovation for system design. System designers are able to be more creative, and I think well see some great new ideas and applications emerging soon. Im also excited that Alteras new Stratix IV FPGAs have achieved such large densities and high performance with such moderate power consumption; I believe these FPGAs have crossed some critical mass threshold that will make it possible to more easily implement complete solutions using FPGAs. Finally, Im excited that BittWares new ATLANTiS FrameWork will significantly reduce the development time for FPGA development in embedded systems. I believe that the combination of Alteras new FPGAs with BittWares ATLANTiS FrameWork will lead to a much greater acceptance of FPGAs in the COTS world. Hopefully, we can shift the landscape for signal processing just as effectively as high-speed serial interconnects did for standard bus formats. Q. Thank you for this interview.
COMMAGILITY: FPGA-BASED ADVANCEDMC BOARDS

25 October 2008: FPGA-Based AdvancedMC Boards INTERVIEWEE. EDWARD YOUNG MANAGING DIRECTOR TEL. +44 1509 228866 EMAIL. edward.young@commagility.com COMPANY. COMMAGILITY WEB. http://www.commagility.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at CommAgility. A. Im managing director of CommAgility, and one of four co-founders of the company. We had all worked together previously at Blue Wave Systems and Motorola Computer Group, and between us have more than 50 years experience in the embedded signal processing industry. We started CommAgility in 2006, and Im responsible for leading the team and our sales and marketing activities although Im originally an engineer by trade and still do some VHDL work when I can find the time!
Q. What sorts of products does CommAgility provide? Would you please give us a very brief summary of the product offerings? A. CommAgility develops and manufactures signal processing Advanced Mezzanine Card (AMC) modules for a range of applications, primarily wireless baseband but also high end industrial, military and physics applications. They generally combine flexible high-speed high-bandwidth I/O such as copper or optical wireless/comms interfaces with CPRI, OBSAI, Serial RapidIO (SRIO) and Ethernet protocols. Processing comes from a mix of the latest Xilinx FPGAs and Texas Instruments DSPs according to the application space. Customers around the world use CommAgility products to develop high performance applications, and recent designs include test equipment, trial systems and base stations for a wide range of wireless standards especially WiMAX and LTE.
Q. You mentioned earlier that you were very excited as a company about FPGAbased boards for wireless baseband applications. What do you see unique in this application area for FPGA-based boards? What sorts of special design challenges and opportunities do you hope to help companies address? A. Wireless baseband applications have tough requirements for processing performance and I/O bandwidth. Over the last few years, FPGA vendors, such as Altera and Xilinx, have substantially improved their chips and development tools for signal processing. The number one benefit offered by FPGAs is their efficiency in concurrent applications by using multiple parallel processing blocks. Coupled with their flexibility to allow the embedded systems designer to tailor the device to match their applications demands as closely as possible, FPGAs can achieve the highest possible throughput with low cost per channel. Taking for example the processing of WiMAX Orthogonal Frequency Division Multiple Access (OFDMA) channels, a pure DSP solution cannot match an FPGA in the bandwidth and number of channels it can process. Consequently the DSP solution may have an Copyright 2008 eg3.com No Reproduction or Further Dissemination Allowed
unacceptable cost and power per channel. The FPGAs flexibility has traditionally come with an additional cost in power due to the increased gate count and silicon area of non-optimized solutions in comparison to hardwired architectures. However, 65-nm and 40-nm technologies and the use of equivalent ASIC devices for volume manufacture mean that FPGAs can be low power in the lab, and power-reduced further in volume. DSPs still retain many advantages, including reduced development time for new and complex algorithms, and flexibility to run many different algorithms. We have found that the best solution for wireless baseband customers is often a heterogeneous system incorporating DSPs and an FPGA. For example, our AMC-3C87F board includes three Texas Instruments TCI6487 multi-core DSPs running at 1GHz and a Xilinx Virtex-5 SX95T FPGA. Using this for example as a WiMAX PHY, the FPGA is used to add flexibility to the front end radio interface, plus as a DSP co-processor for algorithms such as turbo-coding which is based heavily on bit manipulation and less suitable for the DSP. This kind of system does pose design challenges to achieve a suitable high-performance, low latency I/O infrastructure. In wireless baseband, when supporting multiple-input multiple-output (MIMO) systems with channels encoded using spread-spectrum techniques such as CDMA, data from all radio antennas has to be available to all baseband-processing blocks. To achieve good performance, the key is an efficient lowlatency interconnect such as Serial RapidIO (SRIO).
Q. CommAgility seems to have hitched itself very closely to the PICMG AdvanceMC standard. What are your views about standards like AdvancedTCA, AdvancedMC, and MicroTCA? How do these help applications in which FPGAs play a significant role? A. One of the reasons for forming CommAgility was the recent emergence of the AdvancedTCA and MicroTCA standards, with AdvancedMC as our natural product choice as the sweet spot covering both of these standards. Were certainly excited about these standards, and see them making a significant contribution to the development of scalable, high-performance signal processing applications. MicroTCA in particular is still very young and appears to be into first deployments and entering a phase of rapid growth, which we are right in the middle of, and we expect significant growth for CommAgility in the next few years as MicroTCA matures and our customers move from development into volume. The key benefit to customers in using these standards is the ability to take advantage of a tried and tested infrastructure, available from a range of suppliers, with the up to date management, power and I/O bandwidth capabilities to cover many high-end application needs. This massively reduces system development and integration effort compared to a proprietary solution.
Q. What sort of vertical applications do your products go into? When one hears AdvancedMC, one immediately thinks of telecommunications. Is that your primary vertical? A. Wireless telecoms are certainly our main vertical market, and this is where the DSP/FPGA combination is widely used. But for our more FPGA focused products, weve had additional interest from a wide variety of application areas, including semiconductor processing equipment, high-energy physics, wireline telecoms, and military software Copyright 2008 eg3.com No Reproduction or Further Dissemination Allowed
defined radio and radar. This demonstrates the flexibility and performance of FPGAs in todays high-end applications.
Q. As a small company, how do you stand out from your competition? Do you provide any design services or special value adds for customers? A. We have two key areas where we believe we stand out from our competition: - Speed of response. With our highly experienced and focused development team, we can implement new designs very quickly and efficiently, and already consider ourselves the technology leaders in the market areas, which we serve. - Flexibility. In contrast to larger companies in this space, we are set up to be agile and react to our customers' specific needs, and can respond quickly to support the particular requirements of their OEM project. We primarily work with OEM customers who we also support closely in order to ensure success of their product.
Q. Where will we see CommAgility going in the future? A. On the one hand we will continue to provide a broad range of high performance AMC signal processing platforms, and are already working on plans to support the next generation TI DSPs and Xilinx FPGAs when they are available. In addition to this we will be looking for and pursuing opportunities to take our products into more vertical-market focused solutions, working with partners where appropriate. This enables us to work with customers who dont have the expertise to develop all their own software and FPGA code. The first of these will be in wireless baseband watch out for more details soon! Q. Thank you for this interview.
LYRTECH: MULTICHANNEL ACQUISITION BASED ON FPGAS

25 October 2008: Multichannel development boards, based on FPGAs INTERVIEWEE. MARTIN TURGEON PRODUCT MANAGER TEL. 418-877-4644 EXT. 2311 E-MAIL. martin.turgeon@lyrtech.com COMPANY. LYRTECH WEB. www.lyrtech.com
Q. First of all, tell us a little bit about yourself and your responsibilities at Lyrtech. A. I joined the Lyrtech research and development team in 1998. At that time, it was a very small engineering group whose goal was to build Lyrtechs product portfolio. Later, I held the position of project manager in charge of new product generations for multichannel acquisition based on FPGA technology. Between 2002 and 2005, I worked more closely with the sales and marketing department, which was slowly growing at the time, as a field application and sales engineer. In 2005, I filled the role of product manager of Lyrtechs portfolio. As product manager, my responsibilities include preparing business cases for introducing new products on the market, defining products in terms of processing, features, performances, cost, and positioning compared to competition, elaborating value propositions and competitive analyses, planning product launches, elaborating sales and marketing material, determining features and strategies for future products, and many more.
Q. Would you outline for us, briefly, Lyrtechs products and solutions and the special connections to FPGA technology? A. Lyrtech offers a wide range of FPGA-only and hybrid FPGADSP development boards. The main features of our development boards are that they are surprisingly scalable when it comes to processing power and the variety of add-on I/O modules that can be coupled to the boards. Another key note of our products is the high-level software abstraction made possible by our model-based design kit, which offers users the possibility of targeting all the features of the boards and design FPGA applications within the Simulink environment. Going back on scalability, Lyrtechs own RapidCHANNEL (an 8-Gbps, full-duplex interface) allows interfacing boards with other boards, establishing a very-high-data throughput link and allowing users to virtually scale up FPGA resources necessary for their applications. Our add-on modulessuch as high-speed, multichannel ADC/DAC; video I/O; audio I/O; highspeed, digital interface; additional memory; and analog RF (GSM, Wi-Fi, WiMAX, others) modulesallow users to design complete systems matching their applications and represent the systems in the user-friendly Simulink environment. Lyrtechs products are primarily aimed at wireless, MIMO, software-defined radio, audio, medical imaging, vision, accelerated computing, and DAQ systems.
Q. FPGAs are used more and more for DSP applications. What special expertise does Lyrtech have with respect to FPGAs for DSP? A. Lyrtechs expertise spans, among other things, technology used in interfacing FPGA hardware and software to external components such as DSPs, GPPs, Ethernet, fiber, LVDS, RocketIO, Serial RapidIO, MGTs, and other very-high-speed interfaces. This expertise is poured into every advanced development platform we make and, in most cases, becomes simple-to-use Simulink
blocksets. Weve also developed a wide variety of digital signal processing application FPGA cores, as Lyrtech also offers engineering services to those customers interested in FPGADSP technology. Through the years, weve also gained a vast amount of expertise in developing our own FPGA GSM PHY interfaces, four-port SDRAM model-based video framework, and DSPFPGA-based femto base transceiver station/femtocell reference design, to name just a few.
Q. How are your products integrated to development tools provided by the FPGA vendors like Xilinx and independent vendors like The MathWorks? A. This is where Lyrtech truly shines when compared to its competition. Most (but more likely all) of our competitors have at some time claimed a complete System Generator for DSP (Xilinx) and Simulink (The MathWorks) integration. Yet, the tools are only integrated through what we call a semi-automatic approach. The semi-automatic approach aims to design digital signal processing applications within the Simulink/System Generator for DSP environment, and then map the application netlists from an empty ISE Foundation (Xilinx) project supplied by the vendor. Our approach is much more thorough. Users can completely design, simulate, compile, test, and troubleshoot their FPGA applications in the same Simulink model. Lyrtech supplies all the necessary external FPGA interfaces mapped into blocksets on top of a wide range of troubleshooting tools such as a recording and playback blockset and free-running or sharedmemory co-simulation. The ability to use all the tools under simulation allows users to design complete simulated applications before generating a single line of code, applications where I/Os are simulated along with DSP algorithms, not simply by themselves.
Q. Are there particular vertical industries in which you have had a lot of success? Which ones? Why are your products particularly suited to these sorts of applications? A. Lyrtechs main success lies with its FPGA development boards in the telecommunications (BTS prototyping, MIMO), scientific (beamforming, astronomy, OTHR), military (Software defined radio, security) and medical (PET, gamma ray) industries. Most of this success in these markets came about because we can provide complete functional systems that fit our customers requirements, simply by combining our existing platforms and add-on modules turning them into turnkey systems. These systems come with high-level model-based design software (within Simulink). The ability to offer such complete softwarehardware integration from RF to baseband to wireless applications, the ability to offer the necessary large number of high-speed A/D channels on one FPGA board to MIMO applications, the ability to offer the essential tools to easily transfer Simulink concepts into real-time prototyping hardware solutions to scientific applications, and the ability to offer low-cost-per-channel solutions to medical applications are all reasons for Lyrtechs success.
Q. For this 2nd edition of our FPGA Guide, we have a special focus on design services. Would you share with us what sorts of design services you offer and how these work? A. Lyrtechs been developing products with digital signal processing technologies for the past twenty-five years. Since our beginnings, weve managed to put together an engineering team consisting now of about 50 highly skilled engineers, programmers, and technicians. This team of experts exists for one purposecover all the elements necessary in designing a complete product, end to end. Thus, our engineering team can assist customers in a multitude of areas such as analog and digital hardware design (audio, video, communications, and RF), electrical and mechanical CAD, FPGA and DSP programming, embedded and high-level software design, as well as product assembly and manufacturing.
Customers usually retain Lyrtech design services to develop complete turnkey products, but Lyrtech also offers its designs services piecemeal, for those of its customers who only need specific expertise to round off their own in an attempt to accelerate development cycles.
MEN MICRO: USER I/O IN FPGA-BASED BOARDS

25 October 2008: User I/O in FPGA-based Boards INTERVIEWEE. STEPHEN CUNHA VICE PRESIDENT, MEN MICRO TEL. 215-542-9575 EMAIL. Stephen.Cunha@menmicro.com COMPANY. MEN MICRO, INC.
WEB. http://www.menmicro.com/ Q. First of all, tell us a little bit about yourself and your responsibilities at MEN Micro. A. As vice president, Im responsible for oversight of MEN Micro Inc.s US operations throughout North America. Prior to joining MEN Micro, I worked in sales and business development for Motorola's embedded computer business for twelve years. While there, I received multiple awards at Motorola and was twice awarded Motorola's Pinnacle Award for Achievement. I also hold a Bachelor of Science in Electrical Engineering from the University of Virginia. Our corporate headquarters are in Nuremberg, Germany, which also houses our primary engineering department and our onsite production facility, enabling us to keep close tabs on quality control. Companywide, we have approximately 200 employees, of which more than 100 are engineers dedicated to product and technology development. The company was founded in 1982.
Q. MEN Micro has quite a broad product range, but please tell us specifically about your product or service offerings that relate to FPGAs. A. MEN Micro employs FPGA technology in a variety of our products, since it gives us so much flexibility in configuring both our customized and standard products. Weve incorporated FPGA technology into many of our 6U CPCI SBCs, blade servers and PMCs as well as into several 3U CPCI products, ESM (Computer-On-Modules) and their related starter kits. Most recently, we have developed two specific technologies around FPGA: The USM concept for mezzanine modules: Our Universal Sub Module (USM) concept implements a boards desired functionality through one or more IP cores in an FPGA. The USM simply plugs into the respective base mezzanine (PMC, conduction cooled PMC, XMC or MModule), allowing functionality to be changed at any time through the implementation of different IP cores. The corresponding line drivers are located on the USM, while its Nios soft core processor is implemented on an Altera Cyclone II FPGA to provide local intelligence where needed. I/O signals are routed through a front-end SCSI connector. Product development is limited to the USM module and the FPGA content, significantly speeding time to market. The USM concept protects against component obsolescence, too, since the mezzanine lifecycle no longer depends upon commercially available components. IP cores can be imported into a newer FPGA and tailored to current needs. ESMexpress: Currently in the process of ANSI-VITA standardization (ANSI-VITA 59, RSE Rugged System-On-Module Express), ESMexpress brings the cost and time savings of computeron-modules (COMs) technology to rugged, harsh and mission-critical environments. It combines the COMs modeldeveloping complete computers on a mezzanine board, limiting development of individual functionality to the carrier board (the carrier board also carries the
FPGA e.g. a Cyclone III - which is connected to the ESMexpress module through PCI Express)with advanced cooling technologies, the latest serial buses and rugged components to ensure safe, reliable operation in harsh and mobile environments. The advanced design of ESMexpress enables power dissipation of up to 35 Watts while providing 100% EMC protection by mounting the populated PCB to a frame and completely enclosing the module in an aluminum housing. A mechanically-robust connector specified for MIL and railway applications supports differential signals with up to 8 GHz, features a stacking height of 5 mm with a minimum tolerance of +/-0.3 mm, is equipped with fixed contacts for power supply and is specified for an operating temperature of -55C to +125C. Its a pretty heavy-duty spec, but one that we felt could really benefit designers who needed costeffective, future-proof technologies for rugged applications. The current COMs model isnt cut out to stand up in true harsh environments.
Q. What areas do you and your customers find FPGAs particularly helpful? Can you share with us some application examples or success stories that involve FPGAs and involve MEN Micro technology? A. Because of their flexibility and high operating temperature, FPGA components are widely used in many industries that require long-term availability as well as in many harsh and rugged applications. Well focus on our two latest concepts: USM and ESMexpress. When we initially developed the USM concept in early 2007, we launched development packages for M-Modules (M199) and PMCs (P599), and within one year, offered the XMC (P699) and conduction-cooled PMC (P598) versions. Going into 2009, we already have four new standard products based on the USM concept: 1. 4x CAN bus (P506) 2. 4x RS422/485 (P507) 3. 2x Fast Ethernet (P511) 4. Reflective Memory (P512) The USM concept has broadened the application areas for FPGAs even further, since the different IP cores allow users to change the functionality of the cards without any hardware modifications to the main module, easily transforming specialized I/O requirements into a series of standard products. Specifically, we are seeing USM products used in a variety of test, measurement, graphics, simulation and control automation applications. ESMexpress takes a bit of a different approach. It still provides the flexibility and versatility of FPGA technology, but it is specifically designed for rugged and mobile environments. The DC1 display computer is a great example of ESMexpress in action. The first ruggedized panel PC of its kind, the maintenance-free DC1 is a fanless, intelligent display computer that dissipates up to 20 Watts, using the ESMexpress design elements combined with the new Intel Atom processor. The flexible, compact and modular design of the DC1 enables variations in display resolution and size, processor type, I/O configuration and power supply, so users can tailor the system to specific applications. For example, although the DC1 comes standard with a 15 display, optional sizes from 12 to 19 with a wide-range PSU from 9 V to 36 V or, optionally, 18 V to 75 V and 36 V to 154 V are available. Since these display computers are typically used in mass transit applications, such as trains and busses, they are also tamper-proof to deter vandalism. Copyright 2008 eg3.com No Reproduction or Further Dissemination Allowed
An integrated Ethernet switch transfers signals from computer to computer, eliminating expensive cabling installation. Remote upload of new display data is possible via optional wireless functions such as WIFI, WIMAX, GSM/GPRS and UMTS implemented via a MiniPCI Express card slot in combination with an external it can be affixed on any mounting device. As an option, the DC1 can also control a remote display with the same or different content via DVID.
Q. I/O is a technology area that seems to evolve rapidly, and in some applications areas (such as military, regulated, or safety critical industries) too fast. What sorts of I/O issues do you see FPGAs helping with? What about product longevity? A. Not only does FPGA enable embedded computing products to be upgraded more cost-effectively, but also it allows incredible flexibility in the I/O of a system. This flexibility has a two-fold benefit to protecting an investment in an embedded system. First, since the technological obsolescence is contained within the replaceable FPGA component, a designer can easily replace IP cores as technology advances. And, as I/O requirements change, the system can be quickly adapted as well. Both of these factors will significantly extend the life of systems and their related components. In fact, MEN Micro offers a guaranteed minimum availability of 10 years on most of its products that incorporate FPGA technology.
Q. You mentioned in your pre-interview that MEN Micro offers an Ethernet core, and that this has brought some new value to FPGA-based applications. Can you tell us about your Ethernet core? What sorts of applications have you deployed it in? A. This new Ethernet core, one of almost 40 standard IP cores that MEN Micro offers, enables communication between an external physical Ethernet chip and a host application. Some applications that have really benefited from this new Ethernet core include standard net interfaces for embedded CPUs, intelligent Ethernet switches and real-time Ethernet applications like AFDX (in avionics) as well as distributed I/O for industrial applications. Ethernet functionality implemented as an IP core offer the biggest advantage for rugged (high temperature) and long-term availability requirements, typically found in transportation and avionics applications. We also do a lot of individual core development for our customers, based on application requirements, available logic elements, required pin count, etc. Our FPGA development services include integration of standard MEN Micro or third party IP cores, development of new cores, and integration of customer specific cores.
Q. That brings us to the topic of intellectual property or IP. What sorts of IP does MEN Micro offer with respect to FPGA-based design? Would you tell us a little about how offering IP can help speed the time-to-market for your customers who want FPGA-boards? A. Simply put, IP cores reduce time to market and costs, two of the biggest issues our customers face. As I noted above, we offer almost 40 standard cores that we can easily incorporate into our products to eliminate time consuming, expensive board redesigns. And cost-savings are exponential for applications that require only small to medium volumes of products. We are actually seeing many of these applications, partly due to the fact that this type
of technology has lowered the entry barrier for many companies that see the benefits and future availability of FPGA technology. The FPGA behaves just like a standard PCI or PCI Express component. The functions are loaded by software when the system is booted, and therefore are available in less than one second. In terms of system performance, this is critical, since the IP cores encompass so much of the actual system functionality.
Q. And what about design services? Doesnt offering IP propel MEN Micro into design service issues? Would you share with us your design services model? What is a typical engagement? How does it work? How would an interested party get started figuring out if MEN Micro offers appropriate design services? A. Over our 26-year history, MEN Micro has aimed to develop technologies and products that could be used as open architecture for the industry. The company has pioneered several industry advancements recognized as ANSI-VITA standards including the M-Module mezzanine standard, developed in 1988 and the PC-MIP mezzanine standard, developed in 1992. And as I noted earlier, our ESMexpress technology is currently in the process of ANSI-VITA standardization (ANSI-VITA 59). We did offer the USM concept for VITA consideration in early 2007, but it has yet to be accepted for review. However, we still provide the specification (MEN Micro doc. # 20US00-00) on our web site for any company that wishes to incorporate the design concept into its products: www.menmicro.com/download/default.asp?prod_dl=20US00-00&lang=1. We strongly believe in sharing technologies to both move our industry forward as whole as well as to make embedded computing more efficient, and therefore more cost-effective, for systems designers. We do as much custom work as we do standard product development, including IP core design. One of our many examples is a red light and speed control system where we did the complete JPEG compression algorithm in FPGA. As a result, the system was packaged in a much smaller housing than could previously be accommodated and we replaced an expensive frame grabber card with a lower end CPU card that offered performance more in line with the systems requirements, resulting in less power consumption. This enabled us to meet the requested 40C to +85C temperature range. The best way to figure out if we offer the right services is to provide us with the specifics of your application. Q. Thank you for this interview.
PENTEK: DSPS, FPGAS, IP, XILINX - MADE EASIER IF NOT EASY

1 October 2008: DSPs, FPGAs, IP, Xilinx - Made Easier if not Easy INTERVIEWEE. TEL. EMAIL. COMPANY. RODGER HOSKING, V.P. 201-818-5900 rodger@pentek.com PENTEK, INC.
WEB. http://www.pentek.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Pentek. A. After working as design engineers for a test instrument manufacturer, when the company scaled back operations in 1986, four of us founded Pentek. We adapted the digital signal processing, frequency synthesis and data acquisition technology from the instruments we had designed into open-standard board level products. At Pentek, my duties involve new product definition, development of presentations that explain our technology to our customers and sales engineers, conducting customer seminars, webcasts and training, authoring technical papers and making presentations at industry shows and events.
Q. When engineers talk about FPGAs, the first names that probably pop into their head are Xilinx and Altera. Pentek, in contrast, has built quite a successful business based on FPGA- and DSP-based boards. Would you give us just a nutshell summary of what Pentek does? A. Pentek delivered the first commercial DSP board based on a Texas Instruments processor in 1987, and the first commercial software radio board, based on the Graychip digital down converter (DDC), in 1991. As FPGAs acquired DSP capabilities with hardware multipliers, Pentek was among the first to offer FPGA design kits for our boards so our customers could easily add their own IP algorithms. Pushing the envelope of FPGA resources, in 2003 Pentek series of extremely high-performance FPGA cores for FFT, DDC, and pulse compression algorithms and now offer a wide range of DDCs as factory-installed IP cores on Pentek products. Our latest products take full advantage of gigabit serial interfaces, following open industry standards including XMC and VXS. These interfaces eliminate data bottlenecks that otherwise would restrict data transfers required in high-performance embedded systems.
Q. Pentek is a Xilinx partner, and one of the things you mentioned in the preinterview was how Pentek can help engineers sort through the Xilinx FPGA families and find ones that are best matches for their design needs. How would you recommend an engineer go out figuring out the best Xilinx FPGA for his design application? A. Development tools for the very latest devices often need to stabilize, so look at the release history you dont want to be the very first user. If youre considering a new generation FPGA device just released, compare features with the previous generation devices to see if the new features in the latest generation really offer a tangible benefit in your application. If not, stick with the previous generation for better pricing, availability, and tool support.
The sub-family approach Xilinx has taken in Virtex-4 and Virtex-5 generation devices, allow you to choose devices based on the type of resources you need most logic, DSP, serial interfaces, and embedded computing. With common footprints (pin definition) across sub-families, you can design one board that can accommodate different resource requirements.
Q. Xilinx comes out with new FPGAs quite frequently. Are there new ones that you find particularly exciting? New capabilities that make possible new or better applications? A. Since we are most interested in the DSP capabilities, the new DSP48E engine in the Virtex-5 devices with its 25 x 18 multiplier and 48-bit accumulator improves the dynamic range and accuracy of DSP algorithms, which is extremely important for software radio and radar applications. The Virtex-5 also extends the gigabit serial interfaces in the T suffix devices with clock speeds now at 6.25 GHz to support the rapidly growing use of serial standards for moving data within embedded computing systems.
Q. The design process can be just as important as the actual technical specifications of the design itself. How would you recommend a designer go about an FPGAbased application? Should he talk first to Xilinx, and then to companies like Pentek? Or vice-versa? Should he spec out his requirements first and then approach vendors in the FPGA space? Or should he engage when he is still at the early design phase? In terms of your own projects, at what stage do you recommend a customer engage with Pentek, and how do you recommend structuring the design process? A. We talk to many customers who are just beginning their design study, and this often proves to be extremely helpful. We can explain to the customer why we have chosen a particular device for each of our FPGA-based products and what some of the tradeoffs are. We can show exactly what algorithms, IP and features we were able to incorporate in specific FPGA devices for each product to give him a sense of what might be possible in his design. In some cases, one of our standard products might satisfy his application, or we might be able to modify a standard product by adding a few critical features. This invariably saves time, money and risk in his project.
Q. FPGAs often strike fear and dread in the hearts of the uninitiated. Tell us about Penteks GateFlow - what is it? How is does it make working with FPGAs easier? A. Each of our FPGA-based products are offered as a standard module with a wealth of FPGA resources, A/Ds, D/As, DDCs, DUCs, memory, timing and clocking systems, and bus interfaces. They are all connected, tested and supported with software drivers. Because a large percentage of the FPGA resources are unused, all of these products are supported with our GateFlow FPGA Design Kit to help our customers add their own FPGA code the existing FPGA infrastructure. We provide a complete Xilinx ISE project folder that the customer installs on his ISE workstation. It includes VHDL source code for all of our functional modules, pin definition files, and everything else our designers developed for the standard product. The customer can keep all of the supplied VHDL modules and build his own algorithms around them, or he can modify, delete or replace those modules, as required. This extreme flexibility lets the customer start with a fully functional FPGA design on an actual hardware board with
working interfaces and software support, which he does not have to design, debug, characterize and document. The GateFlow concept was pioneered by Pentek and has now been adopted by many vendors.
Q. One of the most interesting features about GateFlow is how it works with intellectual property or IP. There seems to be IP from vendors like Xilinx, IP created by vendors like Pentek, and then IP created by the customer himself more unique to his application. Does GateFlow help Pentek customers integrate these types of IP? What does GateFlow bring to the IP Party? A. GateFlow includes all of the arms and legs of the FPGA design, tailored for the unique collection of data converters, DDCs, memory and interfaces of the specific hardware module. This part of the design is often the most difficult to develop because it depends heavily on the particular characteristics of each peripheral device. IP cores are usually algorithm engines with input, output and control ports that need to be connected to data and control structures of the actual hardware environment. GateFlow sets the stage for these IP connections, often saving the designer months of working out interfaces issues.
Q. For customers that are new to IP, is it common (or even possible) for them to get boards from Pentek that are nearly there in terms of the IP on board? For a customer doing, say, a software radio application, can he come to Pentek and get a board that is 95% ready? A. Yes, in some cases we need to add a special time-stamp function, or a triggering mode, or a unique data format to meet the special requirements a customer may have. Since our engineers designed the product and are extremely familiar with all of the FPGA structures, they can often make the change much more efficiently and far less expensively than the customer.
TEKMICROSYSTEMS: HIGH PERFORMANCE FPGA COMPUTING

24 October 2008: High Performance FPGA Computing INTERVIEWEE. ANDREW REDDIG, PRESIDENT & CTO TEL. 978-244-9200 X315 EMAIL. ANDYR@TEKMICRO.COM COMPANY. TEKMICROSYSTEMS, INCORPORATED WEB. http://www.tekmicro.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Tekmicro. A. I was one of the founders of Tekmicro back in 1981. Since then, I have been both the President and Chief Technology Officer for the company. In the early days, I spent a lot of my time on engineering development, and now I spend most of my time on technology and product planning.
Q. Would you tell us a little bit about Tekmicros focus? What sorts of applications does the company focus on? What kinds of FPGA-based products are offered? Specifically, tell us about your QuiXilica Digitizers family. A. From a market perspective, our focus is on the defense and intelligence markets, serving the needs of prime contractors who use our products to build leading edge systems for their Government customers. Our product focus is the combination of high speed streaming sensor I/O (analog, fiber and digital) with front-end FPGA processing for both laboratory and deployed environments. Our current products are all based on Xilinxs latest FPGA technology, Virtex 5, along with DDR3 memory and the highest fidelity A/D and D/A components from e2v, Euvis, Linear Tech, Analog Devices and Texas Instruments.
Q. What is a typical customer engagement like for Tekmicro? You seem to target high performance data-intensive applications, especially in the military. Is your business 100% military? 80%? 60%? What specific verticals are you most successful in? A. Our typical customer is a prime contractor / integrator for the defense or intelligence community, building a high performance signal acquisition and processing system for either research purposes or for deployment. Deployment might be in a laboratory type environment (i.e. a ground station or a benign ship borne or airborne environment) or in a more rugged environment (i.e a ground vehicle or a UAV). A typical customer engagement is highly collaborative, in that our products are almost always tailored to the application through hardware, firmware, software, or a combination of all three. Sometimes, we do some tailoring for the customer and sometimes all of the tailoring is done by the customer. Our business is 90% military, and our specific verticals are all over the map, including radar, sonar, ISR, imaging, SIGINT, COMINT pretty much any application that needs high speed streaming I/O and data-intensive FPGA-based processing. Q. Recently you made news with your announcement of the QuiXilica V5, and its production based on the Xilinx Virtex-5 family of FPGAs. What unique benefits do you get from Virtex-5? What new applications does this make possible? A. Virtex-5 offers some significant advantages over Virtex-II Pro and Virtex-4, some of which are obvious and some are more subtle. The obvious advantages are speed, power and gate density,
which are part of the natural progression of semiconductor technology. Since our customers are all performance-driven, all of these factors are naturally important to them. The more subtle change, particularly from Virtex-4, is the capability to pick and choose from the various devices (LXT, SXT and FXT) within the Virtex-5 family within a common board design. Xilinx has made those device types pin compatible for a given socket size, which is necessary for board vendors like Tekmicro because it allows us to create one product design that works for a range of applications. In the Virtex-4 family, a designer had to choose between logic-optimized (LX), signal processing optimized (SX) and high-speed serial connectivity (FX). Because our products are highly focused on interconnect, the ability to combine both SX-type DSP and highspeed RocketIO ports is critical. Because Virtex-5 has high-speed connectivity in all of the device types, it is a better choice for board level products that get tailored for multiple applications. Virtex-5 also has advantages in I/O cell technology that helped enable a shift to DDR3 memory, which was one of our key design decisions both for density and for power efficiency. All of our products now use a common DDR3 memory design with 6.4 GB/s of memory bandwidth (64 bit data path, 400 MHz DDR), which is necessary to match the memory bandwidth to the A/D and D/A speeds that are becoming available. The end result is that applications can fit more processing into the same Size / Weight / Power envelope, which typically allows applications that stare at more signals at once, or have increased resolution and therefore dynamic range, or both.
Q. Much has been made, and disputed, about the militarys movement to COTS. What is Tekmicros position on COTS, and how do you see the industry movement to FPGAs intersect with the pressures to do COTS for the military? A. Well, we may be in a select group since our company was actually doing defense work when the Perry memo came out defining Commercial Off The Shelf, or COTS, products. In some ways, I think that gives us a particularly well-informed perspective on what COTS really means. At the time COTS was defined, the common practice was for each and every piece of military electronics to be developed to a set of specifications created by the DoD that was specific to that application. So, if the Air Force needed a piece of general purpose computing equipment, it would write a spec and hire a company to design and build something for that purpose. If another program, even another program in the Air Force for the same platform, needed a similar item, it very well might create its own spec and develop a completely different piece of equipment. For each development effort, the DoD used MIL specs to tightly control not only the end result but also every step of the design process from start to finish. The point of COTS was to replace the DoD-driven development model with a commercial-driven development model. The end items still need to meet stringent *performance* specs, including environmental specs, but the *design* activity and the oversight of the development process moves from a DoD-centric process to a commercial process, ideally one that serves both DoD and commercial customers. Some of the first examples of COTS items were things like ruggedized MicroVAX minicomputers, which obviously incorporate underlying technology that was used by both DoD and commercial customers. One misunderstood aspect of COTS was the idea of using off-the-shelf commercial items that were not intended for DoD use and deploy them. This was never the point the focus of the Perry COTS initiative was to drive the development process in a commercial way instead of a DoD-centric way, reduce the overhead of all the specs and oversight, and ideally end up with one product that is used on multiple programs and reduce the cost and schedule impact of custom development. What Tekmicro has seen is a need for what we call COTS-on-demand, where we tailor our offthe-shelf products in minor ways to create exactly what the end user needs for their application. The development model is entirely commercial, so it meets the requirements of a COTS items,
and the products are modular items that get deployed to multiple applications and customers, which reduces overall development cost and schedule. FPGAs drive COTS in the sense that FPGA-based products are inherently more multi-purpose than ASIC-based products. For example, our JazzFiber V5 PMC/XMC product is an FPGAbased Serial FPDP I/O module that can also be used for other protocols, or can be purchased as a QuiXilica PMC and tailored by the customer. A Fibre Channel I/O module looks very similar (fiber in, PCI or PCIe out, bridge in the middle), but because the bridge is an ASIC and not an FPGA it can only support one type of interface. So, both are COTS products, but the FPGA-based product supports a wider range of interfaces and applications within the confines of one product.
Q. Another interesting transition is the transition to 10 Gbit Ethernet. What factors do you see encouraging military engineers to make the transition? What are the pros and cons of using 10GE rather than more traditional fabrics? A. We see 10 Gbit Ethernet as a very interesting technology, particularly as a fabric alternative for embedded systems such as VXS. In fact, we are sponsoring and leading the VXS working group, VITA 41.8, to standardize the use of 10 Gbit Ethernet in VXS. 10 Gbit Ethernet has two huge advantages over other fabrics. One is that it completely solves the out of the box problem, making it very straightforward to integrate sensors and processors outside the VXS chassis with the processors and I/O inside the chassis. While in theory this is possible with other fabrics, the ecosystem just isnt there to accomplish this easily. The second is interoperability, both at a hardware level and at a software and protocol level. Hardware interoperability is well defined for all fabrics, but integration between user applications, streaming I/O nodes, and FPGA processors is really accomplished at the software level. Basic software interoperability between network devices is both well understood and very straightforward, and newer protocols such as RDMA allow network-enabled I/O and FPGA devices to achieve wirespeed throughput over a 10 Gbit Ethernet fabric. A side effect of high level interoperability is the ability to prototype a solution using traditional rack-and-stack resources and then to repackage the solution into a higher density solution using VXS for deployment. Using common network architecture such as 10 Gbit Ethernet makes this very easy to do. And, of course, using 10 Gbit Ethernet as a native fabric meshes directly with the current focus on network-centric warfare, with all of the resources in a system (streaming I/O, FPGAs, GPPs) available as network-addressable devices. Q. Are there other areas in which you see commercial technologies penetrating military applications? Any particular FPGA-centric developments that you think are interesting? A. Intels initiatives to reduce total system power are interesting, in that they potentially enable Intel family processors in more power-constrained embedded applications. As FPGAs do more of the repetitive front end processing, we are seeing more and more applications shift from a sea of PowerPCs architecture to FPGAs with one or two back end Intel processors, typically running Linux. Some of the efforts underway to better integrate Intel processors and FPGAs, either through direct connection or through enabling network interfaces on FPGAs, will be interesting when they get farther along. Ultimately, companies like Tekmicro serve a market that will always be much smaller than the larger commercial space, so our value proposition is not to drive commercial technology but to leverage the trends that are driven by the larger commercial space. This is why technologies such as 10 Gbit Ethernet are interesting, not because they have inherent performance advantages
but because the ecosystem (silicon, IP, software, modules) is both larger and more cost effective than the more niche-oriented technologies will ever achieve.
Interviews with FPGA IP & Misc. Vendors

One of the hassles in selecting FPGA Tools or IP is going from vendor to vendor asking different questions and trying to compare notes. In addition, it is the vendor community that really has the most in-depth experience in FPGA tools. Thus, in this section we provide email interviews with major FPGA IP vendors as well as vendors on various miscellaneous topics such as market research. In each case, keep in mind that the vendor is putting his or her best foot forward. These are informative but polemical pieces explaining one or more sides of an issue. In some cases we have more than one interview per topic, which allows comparison of responses. In all cases, remember to check with the vendors that interest you directly as the technical details of your project as well as their tool or IP offerings are subject to change. BDTI: FPGAS FOR DSP, AN ANALYTIC APPROACH EUREKA TECHNOLOGY: PROVIDING CUSTOMIZED IP DESIGN
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FPGAS, TOOLS, AND BOARDS: VENDOR INTERVIEWS: IP & MISC.
FPGA
FPGA SUMMIT: GET YOUR HANDS-ON FPGA EXPERIENCE AT THE SUMMIT PLDA: INTELLECTUAL PROPERTY (IP)
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FPGAS
BDTI: FPGAS FOR DSP, AN ANALYTIC APPROACH

10 October 2008: FPGAs for DSP, An Analytic Approach INTERVIEWEE. TEL. EMAIL. COMPANY. JEREMY GIDDINGS 510-451-1800 giddings@BDTI.com BDTI
WEB. http://www.bdti.com/
Q. First of all, tell us a little bit about yourself and BDTIs publications and services. A. BDTI isand always has beena consulting company focused on helping its customers build and use signal processing technology. Signal processing is a fundamental technology that makes nearly all electronic systems today possible. This technology is an enabler of energy-efficient refrigerators and washing machines (through motor control), the equipment that supports our communications systems (including everything from central office switches and mobile wireless basestations to cellphones), and so forth. BDTI serves primarily two classes of customers: the creators of technologythe companies that produce the processing devices and solutions that power these electronic systems; and, the users of technologythe companies that build the equipment that comprise the systems. BDTI is perhaps best known for its benchmarks and published reports. However, this really is a very small part of our overall business. The benchmarks are a means for creators of technology to objectively evaluate their work and for the users of technology to reliably assess their suppliers products. Our work has been disseminated through published reports, but much less so in the past few years as the place of print is taken by on-linelike eg3.com.
Q. BDTI is known as an expert first and foremost in DSP technology. What are the most important connections you see between DSP / Signal Processing and FPGAs? What fact-finding advice would you give someone looking at FPGAs that also has DSP issues in his design? A. First, lets make a distinction between digital signal processing and digital signal processors. Digital signal processing is a key element of nearly all electronic systems today, and a wide variety of processing solutions are used to provide digital signal processing capabilities, includingnot surprisinglydigital signal processors. But, CPUs, ASICs, microprocessors (increasingly), and FPGAs are also used as processing engines for digital signal processing applications. In fact, FPGAs are an extremely powerful platform for digital signal processing. Someone who is seeking good cost-performance in a design may well consider the use of an FPGA.
Q. Can you give us a brief summary of your report, FPGAs for DSP? What readership does it target? What does it overview? How much does it cost, and what are its publication dates? A. FPGAs for DSP is in its second edition. BDTI set out to test the conventional wisdom that FPGAs are prohibitively expensive for digital signal processing applications. As you know, FPGAs have been used as a prototyping platform for designs that migrate into ASICs for volume production. However, BDTI discovered that, when the workload is taken into account, an FPGA can be an inexpensive platform for digital signal processing applications. Take a telecom
application for example. Traditionally, equipment racks were filled with boards stuffed with DSP processors, each processing a small number of channels. A single FPGA is capable of processing orders of magnitude more channels. The second edition of the report, published in 2007, provides qualitative and quantitative analysis. Qualitatively, it describes technologies for digital signal processing applications: the structure of an FPGA; the range of technologies available for digital signal processing, including DSP processors, general-purpose processors, ASICs, application-specific processors, and FPGAs; the FPGA design flow; and, the Altera Stratix II and Xilinx Virtex 4 families of FPGAs. Quantitatively, it describes the benchmarking of FPGAs and DSP processors on BDTIs Communications Benchmark (OFDM). The report is approximately 100 pages and sells for $2,495.
Q. Both Altera and Xilinx have special micro websites that focus on DSP, clearly indicative that they see DSP as a potentially big area for FPGAs. Could you help out our readership by identifying a few potential gotchas or points of comparison as they try to compare and contrast the FPGA technology for DSP of Altera and Xilinx? A. Both Altera and Xilinx have done an excellent job in the past few years in developing tools and IP for implementing digital signal processing applications. Since implementation of systems on FPGAs is primarily a matter of hardware design, systems designers would do well to consider the design ecosystem provided by a vendor and how it fits their particular needs. By this we mean the IP blocks available, the efficiency of systems design tools, and the technical support offered by the vendor and third-party network.
Q. Many FPGA users are purchasing not simply FPGAs but FPGA-based boards, IP for FPGAs, even FPGA design tools as well as, of course, the free design tools from vendors like Xilinx. Does BDTI have any offerings that are relevant for boards, software, and/or IP? A. Although BDTI is not an FPGA design house per se, we have considerable expertise in programmable, instruction-set processors. This includes the soft processors that are offered by FPGA vendors these days. BDTI can also help a company that is considering migrating an application from a programmable instruction-set architecture to an FPGA, to evaluate its options.
Q. BDTI is known for your benchmarks. Can you explain, briefly, what benchmarks you offer that are relevant for FPGAs? A. Fundamentally, benchmarks serve as a proxy for the workload of a real-world application. In an ideal world, a systems designer would implement his or her application on every candidate processing platform. Of course, this is prohibitively time-consuming and costly. What processing platform vendors, like FPGA vendors, want to do then, is to demonstrate the performance of their products on workloads that are relevant to those of their customers. BDTI designed its BDTI Communications Benchmark (OFDM) to serve as a proxy for the types of workloads found in todays broadband communications applications where DSP processors and FPGAs compete for sockets. BDTIs 2007 report included detailed benchmark results for high-end TI and Freescale DSP processors as well as FPGAs. Recently, vendors of massively parallel multicore processors, such as picoChip and Tilera, have published results on this benchmark.
The BDTI Communications Benchmark (OFDM) is what we call an application component benchmark. That is, it implements a critical, core component of the functionality of an application. BDTI also offers other application component benchmarks, such as the BDTI Video Encoder and Decoder Benchmarks.
Q. Beyond the reports that you publish and sell, tell us a little bit about BDTIs consulting services. Who would engage with you on a consulting basis? What value proposition does your consulting services bring to someone evaluating FPGAs for DSP? A. BDTIs mission is to serve the embedded processing industry as an independent technology analyst and provider of world-class, specialized engineering services. As an analyst, BDTI focuses on benchmarking and performance analysis. In its engineering services practice, BDTIs emphasis is on design consulting and software optimization. BDTIs value for a company that is evaluating the use of an FPGA for a digital signal processing application is in independent analysis. For example, our report, FPGAs for DSP, is a valuable asset for a company that is weighing the use of FPGAs to implement a system that has heretofore used DSP or general-purpose processors. But even a company that is a heavy user of FPGAs can find value in BDTI services. In a recent engagement, BDTI was asked to evaluate and compare the strengths and weaknesses of a number of design methodologies for a large defense contractor. The company wanted an independent assessment of the range of options available for implementing real-time embedded processing systems. BDTIs task was to recommend best practices for the design of systems that meet the demands of real-time processing, and to identify suitable tools and implementation technologies. BDTI evaluated the requirements of the applications and made several important recommendations, including ones for impacting the use of FPGAs in the customers designs. By implementing the recommendations, the customer will gain greater efficiency in its design process. FPGAs are a valuable technology for implementing digital signal processing systems. BDTI can help companies grappling with the decision as to when and how to use an FPGA for its application, resulting in savings in time and cost, with lowered risk.
EUREKA TECHNOLOGY: PROVIDING CUSTOMIZED IP FOR FPGA DESIGN

1 October 2008: Providing Customized IP for FPGA Design INTERVIEWEE. TEL. EMAIL. COMPANY. SIMON LAU, PRESIDENT 650 960 3800 info@eurekatech.com EUREKA TECHNOLOGY
WEB. http://www.eurekatech.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Eureka Technology. A. I started Eureka Technology in 1996. I see that customer satisfaction and product quality are my biggest responsibilities. My formal training in engineering and my previous work experience in logic design allow me to see from my customers perspectives, understand the technical issues and help provide solutions.
Q. Eureka Technology, as we understand, is a provider of Intellectual Property (IP) for both the ASIC and FPGA markets. Tell us in a nutshell what types of IP you provide, and your business model for selling this to customers. A. Eureka Technology focuses in system connectivity digital IP cores. Most of our IPs are used to connect the CPU to the outside world. For example, we have system memory controllers that support many versions of SDR and DDR SDRAM, Mobile SDRAM and NAND Flash; peripheral controllers such as PCI, PCIE, Security Digital (SD and SDIO), MMC and CompactFlash. Last but not least are the CPU bus interface such as AXI, AHB, PowerPC and bridges between all different buses.
Q. One of the big questions that surrounds the FPGA ecosystem is why an engineer should buy IP or tools when he can (allegedly) get them for free from the FPGA vendors like Xilinx or Altera. Help us help our audience by positioning the IP that you sell against the IP that is offered by the big FPGA vendors at no or low cost. A. Regardless of who the IP core provider is, our customers (IP users) need to build products that standout from their competition instead of similar me-too products. In some cases they may design around an existing IP core by using features that happen to be available from an existing IP. But if the goal is a truly outstanding product, we recognize that no two customers requirements are identical and Eureka is specialized in providing IP cores that are rich in features and flexible enough to be configured in many different ways to meet customer needs without compromising performances.
Q. Customization of IP to particular design needs is a huge issue. How do you work with customers who may (or may not) be FPGA / IP experts to help them tailor their IP to their specific design needs? Is this a service / tech support relationship? Do they pay for this? A. We achieve this goal by listening to our customers and understanding their needs first. Doing this requires a lot of design expertise, both in communication with our customers to understand the requirement and in implementation of each IP core. Each of our IP core is designed from the
ground up with features and flexibility in mind. We use sound design architecture with module design and careful planning. Eureka also provides free design software in our web site to allow customer to customize the memory controller and system controller IP cores. Instead of paying for a fully customized design, customer actually saves money by using a well-designed IP core.
Q. Another big issue with IP is IP integration as well as verification. Obviously your customers end up taking your IP as well as their own, and sometimes the IP of other third parties. Do you provide any assistance in the integration and/or verification procedures? If so, how? A. Integration can be a daunting task if not planned carefully or with no proper support. The philosophy behind our support is that customers should be able to drop-in the IP core into the design and be able to use it immediately. This will not be possible by using an IP core that comes out from a cookie cutter. For our customers, smooth integration is a natural result of our approach of listening to them first. Because we already understand our customers needs long before we deliver the IP core, we can anticipate all potential issues and come up with solution before problem happens. Our communication channel to customer is open from the pre-sales process all the way to project completion. Customer can just pick up the phone and talk to our engineers directly. Q. How is your IP differentiated from vendors like PLDA? A. We see each of our IP core products as not just a stand-alone peripheral or memory controller. Instead they are important elements of the customers overall design. Not only do we focus on the specific functions and features that the core provides, we focus even more intensely on how the IP core will be integrated with the result of the customers design.
Q. If you could for a moment, put yourself in your customers shoes. There are so many claims about IP made on the Web and at trade shows, yet IP is one of those things that you really dont know what youve purchased until after you have actually purchased it. How would you suggest customers evaluate IP such as yours BEFORE the sale? Should they insist on NDA trials? Pre-sales meetings or customer service? References? What would you recommend? A. Most customers know very well about the basic kicking the tires steps such as reviewing the document, evaluating the simulation models or netlist and checking references. These are important steps. However, more importantly, customer should really ask themselves Is the IP vendor trying to promote their products or trying to listen to what I need? and Will I be able to get the IP that fits into my design seamlessly or do I need to design my system around the vendors solution? After all, the purpose of purchasing IP is to save time and money without compromising on results.
FPGA SUMMIT: GET YOUR HANDS-ON FPGA EXPERIENCE AT THE SUMMIT

4 November 2008: Get Your Hands-on FPGA Experience at the Summit INTERVIEWEE. LANCE A. LEVENTHAL PROGRAM CHAIRPERSON TEL. 858-756-3327 EMAIL. lance@fpgasummit.com COMPANY. FPGA SUMMIT WEB. http://www.fpgasummit.com/
Q. First of all, tell us a little bit about yourself and how you came to be involved with the inaugural FPGA Summit. A. Ive been involved in embedded system design for well over 30 years and have long been interested in FPGAs. Recent advances have led to them being far more than just logic replacement devices, so I thought it was time to have an engineering event dedicated to them. We have put together events in the hardware design area for many years, and this seemed to be a good topic for us now.
Q. What is the elevator pitch for the FPGA Summit? Tell us a little bit about it. What will one learn there? Who should attend? Where and when is it? A. FPGAs today provide new tradeoffs between hardware and software. Todays large devices with millions of gates, on-board processors, and high-speed interfaces allow designers to achieve hardware speeds without the costs and complexities of custom design. FPGAs can essentially replace processors in applications such as signal processing, providing acceleration without any new algorithms. Meanwhile, theyre even more useful than ever as logic replacement devices, saving space, power, and cost in a variety of applications with devices available for less than a dollar apiece. The FPGA Summit (http://www.fpgasummit.com/) will be at the San Jose Wyndham Hotel in the heart of Silicon Valley (between the 101 and 880) on December 9-11, 2008. It is aimed at hardware design engineers, embedded systems engineers, engineering managers, and communications engineers. It is also for instrumentation and control specialists who may lack such digital background. Attendees will get the latest information on how to use FPGAs in communications, networking, instrumentation, automotive, consumer, military, defense, aerospace, and control applications, including discussions of how to get applications up and running, implement reconfigurable and high-performance computing, get applications done on time, and perform verification. Well even discuss the great mystery of project time and cost estimation, as well as provide the latest market research and customer experiences. Panel sessions will review the latest developments, provide an opportunity to ask questions in small groups, and cover the key things one needs to know today. Hands-on sessions will cover embedded design with LabVIEW, memory interfacing, and on-board processor usage. And we will have the magic words in Silicon Valley free parking!
Q. Keynotes are always great events at these sorts of things. Who are the keynote speakers going to be? Any quick bullets on what they will discuss? A. Keynote speakers will be:
Simon Bloch, VP/General Manager, Design and Synthesis Division, Mentor Graphics on high-level design of FPGAs. Hell describe new ways to handle multimillion gate devices. Andrew Dauman, VP Engineering, Synplicity Business Group, Synopsys, on increasing productivity for FPGA design groups. Misha Burich, Sr VP R&D, Altera on achieving higher performance and lower power consumption with FPGAs
Q. FPGAs reach many broad vertical markets, from medical to military. Is there any special vertical focus to the Summit? Are there specific tracks relating to specific applications? A. We will have specific sessions on communications and networking applications, DSP applications, military/defense/aerospace applications, and low-power applications. Well also have expert tables on specific vertical areas as part of our special evening Beer, Pizza, and Chat with the Experts session (yes, featuring free beer and pizza).
Q. eg3.coms FPGA Guide has a strong focus not just on FPGAs but on FPGA tools and boards. What aspects of the FPGA summit will touch on tools and/or boards as they relate to FPGA designs? A. Our hands-on sessions will cover the latest boards from National Instruments and Xilinx. Well also have special sessions on getting applications up and running and on getting them done on-time and on-budget. Well have a session on EDA tools and coverage of board-level approaches to defense, instrumentation, and control applications.
Q. Is there an exhibitor showcase or exhibition? If so, what sorts of exhibitors will be there? What days and times will have exhibits? A. There will be a small exhibit area focused on tools, devices, and accessories. Our sponsors are Mentor Graphics and Synopsys. Other exhibitors include Achronix, Agility, Aldec, Bittware, DefineView, GateRocket, ProDesign, and Taray. Exhibits will be on Wednesday, December 10, from noon to 2 pm and 5 to 7 pm, and on Thursday, December 11, from noon to 2 pm.
Q. Finally, how much does it cost? What is the range of attendance options? A. Basic cost is $995 for admission to hands-on sessions, tutorials, and all other events through December 4, and $1,495 on-site. Discounts are available for exhibitor customers, group members, and college faculty members and students. Exhibit-only registration (for keynotes and many other sessions) is available for free through December 4. One-day registrations are available for hands-0n sessions and tutorials for $495. Q. Thank you for this interview.
PLDA: INTELLECTUAL PROPERTY (IP) FOR FPGAS

1 October 2008: Intellectual Property (IP) for FPGAs INTERVIEWEE. STEPHANE HAURADOU CTO TEL. +33 442 393 600 EMAIL. sales@plda.com COMPANY. PLDA WEB. http://www.plda.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at PLDA. A. I am a co-founder and the CTO of PLDA and have been with PLDA since its inception in 1996. I wear a lot of hats at PLDA, but primarily, my team focuses on identifying the needs of the market for high-speed bus interfaces and spinning that knowledge into world-class products. We also take a great deal of pride in knowing the technology very, very well. This is a huge advantage that we get from our specialization. For example, we were first to market with a full-speed PCIe Gen II product for Xilinx and Altera and we recently announced a key design-win with JVC for our AHB-PCIe bridge. I really dont think that we could achieve those types of milestones without our pinpoint focus on our market space and its technology.
Q. PLDA focuses on IP for both ASICs and FPGAs. Tell us a little bit about the type of IP that you specialize in, and your business model for delivering IP to customers. Please also clarify how you charge for your IP. A. PLDAs success is based on doing one thing very wellintellectual property cores (and related boards) for ASICs, Structured-ASICs, and FPGAs for high-speed busses, such as PCI Express, PCI-X, PCI, PXI Express, AHB-PCIe and AXI-PCIe. We believe busses are especially important because they are necessary in virtually every design and can be a make it or break it factor in an end product. If your interface bus is not functioning optimally, the entire design becomes less efficient. In the world of PCIe, this can be especially challenging because PCIe enables some advanced bus management features that require a real understanding of its integration. PLDA designs IP for both ASICs and FPGAs and the platforms have a huge amount of commonality. Our business model allows a customer to prototype using FPGA boards and migrate to FPGAs or ASICs and know that their bus will perform as expected. We can deliver fully functioning FPGA prototyping boards to customers to help them fine-tune their designs in real-life hardware. RTL level IP is included in the board package, enabling customers to integrate it into their end design. This is a huge time savings and it minimizes risks for the client since they have almost no integration to worry about up front they can begin their testing and know what they are getting immediately. I believe we are unique in that the IP that comes with the board is free. A PLDA board customer gets a full featured IP core that can be used for an unlimited time period and with unlimited access to our technical support.
Q. One of the most confusing aspects of the FPGA ecosystem is that the major FPGA vendors like Xilinx and Altera often provide free development tools and free IP, yet other vendors like PLDA sell IP. Management might often then pressure
engineers to just look at the free (or low cost) stuff. Help us differentiate between your IP offerings and those of, say, Xilinx in the PCI space. A. Companies like Xilinx and Altera are key partners for PLDA. While they do provide basic IP building blocks for free, we have found that customers often require more flexibility or specific customization of their bus IP and this is not what free IP is designed to do. At PLDA, we dont even try to compete with free IP. We see ourselves as adding value to a design by enabling easy integration of interfaces such as PCIe, while delivering a higher level of customization and technical support that just isnt feasible for free IP. Often, our IP sits on the same devices as free IP, but adds incremental functionality and flexibility. When an engineering manager really looks at what they need to accomplish with their thirdparty IP, they quickly realize that it is often more cost-effective to buy IP from an established vendor such as PLDA because it will be thoroughly tested, easier to integrate and more open to customization. It is a bit of an oxymoron - to get to the desired end result, free IP can actually cost more than paid IP because it requires so much engineering time and talent to integrate.
Q. Another big hassle in the IP market is that there are quite a few vendors that sell IP, but they dont necessarily integrate it into real FPGAs on real boards. So the IP is often left out there in cyberspace, and the poor engineer is left with significant integration and verification challenges. Tell us about how PLDA delivers boards with IP and how this strategy hopefully helps customers. A. Because PLDA has an established history of commercially manufacturing our IP into volume production FPGA-based end products, we are able to deliver a true silicon-proven experience. Our established partner relationships with key FPGA vendors such as Xilinx and Altera, help ensure that our products are compatible and easy to integrate by our customers using the industrys most current tools. Additionally, our IP and prototyping boards can be used by a customer to immediately simulate an end-product scenario for testing purposes, with no costly integration time up front. When the customer knows that the IP is going to function as planned with their design, then they can begin the final integration. And PLDA can help in that process as well PLDA is the Gartner-rated Number 1 supplier of PCI IP Cores and has provided ASIC and FPGA IP for literally thousands of designs. This uniquely enables us to assist our customers as needed.
Q. PLDA specializes pretty heavily in PCI IP, so do you provide any assistance to customers who are integrating this IP with soft cores or other sorts of IP, whether third party or their own? Since a complete design is more than just PCI IP, how do you recommend customers coordinate with all vendors to get to a real solution quickly and efficiently? A. The best decision a customer can make when it comes to IP is to verify their sources and ensure the vendors dont just provide IP, but also stand ready support the entire design. Established IP providers, including PLDA, all have standard documented application and design support for their IP that includes device and RTL integration, tool integration, application verification, physical implementation and verification, and test development. At PLDA, our support engineers are also often the same people that helped create the IP itself. Our high degree of specialization on PCIe and related interfaces ensure our engineers know the designs inside and out and are 100% committed to helping our customers achieve first-timeright silicon. And because PLDA uses solely in-house designers, we are able to effectively support the IP in-house. Some IP companies rely on cheaper, contract labor to create blocks. While there is a cost advantage for IP vendors to using contract labor, when it comes time to
integrate those blocks, the customer and even the IP vendor often has no ability to troubleshoot the design issues. Our experienced team of IP specialists can also customize our IP cores and development boards to fit specific requirements. Customization work may include adding optional features defined in the relevant specification but not supported by the core; modifying or extending the functionality of existing features inside the core or even modifying a development board to add, change, or expand its capabilities, often involving partial re-layout and re-manufacturing of the board. The modified IP is thoroughly verified using proprietary and 3rd-party verification IP and test benches as well as tested in hardware using our broad line of FPGA-based prototyping boards and backed up by state-of-the-art test equipment.
Q. Recently, you released a series of FPGA-based interface boards designed to streamline interface integration in specialized, embedded systems such as industrial automation, military apps and other small volume, high margin systems. Can you tell us a little about these new boards? A. Earlier this year, we realized that while many traditional FPGA customers were using our prototyping boards just for prototyping, there was a segment of the embedded system community that used the boards in their end-systems. When we looked more closely at this, we realized that these systems were designed for applications such as industrial control, automation, military, and scientific equipment that require a high degree of functionality and customization in their interface designs, but are produced in fairly small volume. That made inhouse custom interface design expensive and our boards were being seen as an attractive alternative. Our interface board products provide proven, off-the-shelf solutions, in various FPGA sizes and with multiple options and interfaces, including PCI, PCI-X, PCI Express, Gigabit Ethernet, USB, SFP, DDR SDRAM, DDR2 SDRAM, Flash & many more. With additional features like just-in-time product availability and quantity discounts on as few as 5 units, we are finding that our FPGA Board Solutions can significantly reduce lead time and cost-to-market when compared to custom design options for this specialized part of the market.
Interviews with FPGA Service Vendors

One of the hassles in selecting an FPGA board is going from vendor to vendor asking different questions and trying to compare notes. In addition, it is the FPGA vendor community that really has the most in-depth experience in FPGA board design and deployment. Thus, in this section we provide email interviews with major FPGA service providers on various important topics. In each case, keep in mind that the vendor is putting his or her best foot forward. These are informative but polemical pieces explaining one or more sides of an issue. In some cases we have more than one interview per topic, which allows comparison of responses. In all cases, remember to check with the vendors that interest you directly as the technical details of your project as well as their service offerings are subject to change. FIDUS: FPGA DESIGN SERVICES TATA ELXSI: FPGA DESIGN SERVICES WIPRO: FPGA DESIGN SERVICES
FPGAS, TOOLS, AND BOARDS: VENDOR INTERVIEWS: SERVICES
FIDUS: FPGA DESIGN SERVICES

25 October 2008: FPGA Design Services INTERVIEWEE. TEL. EMAIL. COMPANY. DESSISLAV VOLKOV 1 613 828 0063 info@fidus.com FIDUS SYSTEMS
WEB. http://www.fidus.com/
Q. First of all, tell us a little bit about yourself and your responsibilities at Fidus. A. I am a FPGA technical lead at Fidus Systems. Some of my responsibilities include being involved during the project pre-sales and scoping phases, leading teams on large projects, FPGA-related design work as well as lab validation. In parallel to these responsibilities I am involved with the Companys process and related tools development and deployment.
Q. This year, we are striving to focus more on design services for FPGA designs. Can you tell us, in a nutshell, what sorts of design services you offer, and if there are any specific hooks into FPGA design needs. A. Fidus offers a broad variety of electronic product development services. For example, System design and schematic capture, PCB Layout design, Signal Integrity, FPGA design, Firmware and Software design as well as Mechanical design. The FPGA designs we do are an integral part of the whole system functionality and they range from video processing, medical applications, telecomm, defense and aerospace and other fields. During the design phase of these projects we recommend FPGA functionality as well select the device that will fit the requirements. Specific to the FPGA design, we do a complete FPGA development starting from FPGA and verification documentation, going through to design implementation and verification and finally, lab debugging and validation as well customer integration and support. We can also perform any of theses steps as separate and independent tasks. For example, the design verification sometimes needs to be performed by a separate team. The FPGA has to under go extensive regression or with an already written and partially tested FPGA, there may be some problems and we bring our expertise to find these problems and fix them.
Q. What sorts of FPGA-based products has Fidus helped with in the past? What are your FPGA credentials so-to-speak? A. Almost in any system we develop - there is an FPGA requirement. We have worked with Xilinx, Altera and Lattice FPGAs. We have designed and worked with DDR2 SDR interfaces, 700MHz DDR parallel LVDS interface, PCI, hard core PowerPC, 6.5Gbps GTX interfaces, and many others. More recent projects include; an AIS system for naval communications using PowerPC and software defined radio inside the FPGA, chip testers with high speed DDR2 SDRAM interfaces, communication system with close to 200 GTX interfaces working at 6.5Gbps.
Q. Our target reader is someone who is considering FPGAs for FPGA deployment, not FPGAs for ASIC prototyping. Do you have any success stories of projects that you have worked on that were specifically FPGAs for actual deployment? A. Most of our projects are FPGA deployment projects.
Q. Many design teams begin their designs by selecting Altera or Xilinx. Is Fidus familiar with both? Are you neutral among Altera, Xilinx, Lattice, Actel, etc.? A. Fidus is a Xilinx Xpert Partner and is in the process of becoming an Altera ACAP member. We are neutral not only to the vendors but to the HDL language as well. Our choice of vendors is based on the best technology and price fit to meet our clients requirements.
Q. Many designs are not outsourced 100%, but rather many critical elements remain in house whereas others are outsourced to outside vendors and/or consultants. Tell us about how Fidus can work with design teams and coordinate the division of labor between internal and external tasks. A. During project scoping phase, Fidus works with its client to divide the design tasks as required and clearly summarize both parties deliverables. For example, some of our projects have integrated client provided modules or third-party cores into our final design. Conversely, we have provided modules to our clients for them to integrate into their final design
Q. Are there certain vertical markets or applications where you have the most experience? For example, military? Medical? Consumer electronics? A. Fidus has extensive experience in Communications, Military, Aerospace, Medical and Semiconductor industries.
Q. What is the engagement model like? Many design services companies bill on time +materials, but your website emphasizes fixed price billing. Tell us a little a bit about how you cost out the bids for projects. A. Fidus projects can be either T&M or Fixed Price. Our preferred model is Fixed Price when the project is well defined because it helps our clients plan their budgets.
Q. Obviously trust is critical to a service relationship. How would you recommend a potential customer get to know you before having to make a big commitment? A. Many of our clients have started with small projects, moving to larger more complex projects and grown to have Fidus as their key design partner
Q. Why should clients work with Fidus? A. Fidus was founded on the principals of high integrity; strong engineering experience and we have earned a reputation for delivering high quality designs. In an independent client survey, 97% of our clients said they would recommend us to others, a phenomenal endorsement of our culture of high quality on- time delivery. Q. Thank you for this interview.
TATA ELXSI: FPGA DESIGN SERVICES

25 October 2008: FPGA Design Services INTERVIEWEE. K.GANESH RAO, PROJECT MANAGER SEMICON&SYSTEMS TEL. +91 80 22979123 EMAIL. kgrao@tataelxsi.co.in COMPANY. TATA ELXSI WEB. http://www.tataelxsi.com/
Q. First of all, tell us a little bit about yourself and your position at Tata Elxsi. A. My name is Ganesh Rao. I hold an M.Tech degree from NITK, Suratkal. At present, I am a Project Manager Semicon& Systems. My areas of interest are FPGA and Board designs systems. I have been associated with Tata Elxsi for more than a decade now.
Q. Design services can mean so many different things to so many different people from placing people at an engineering site to doing a complete design from concept to production. Can you tell us a little bit about Tata Elxsis design service offerings? A. Tata Elxsi offers services across life cycle of an ASIC design offering paper to wafer solution. Semiconductor & System design services involve SoC design, FPGA, Verification & validation, Analog and Mixed signal chip design and Hardware board design. Moving well beyond simple labor cost arbitrage, Tata Elxsi is working with customers in offering integrated product development for hardware and software, rather than point services. Our Semiconductor / board design practice involves design right from system specification, hardware/software partitioning, to design/layout/testing and manufacturing support for production rollout. Being one of the frontline design services company, we understand our customers specific requirements. Our various engagement models coupled with IP licensing have helped us to enable and accelerate our customers time to market. Engagement models could be conventional T&M, Fixed cost contract, Off-shore/Near-shore development centers or hybrid models customized for the customer.
Q. Our guide targets engineers and OEM managers that are specifically interested in FPGA and FPGA-based product design. What specifics can you give us about Tata Elxsis FPGA expertise? A. FPGA Design has been an integral part of Semicon & Systems division of Tata Elxsi, from inception. In a nutshell, our expertises on FPGA design can be classified as: - FPGA design and synthesis for custom specifications - Hardware Acceleration engines for software implementations of protocols - Glue logic development and synthesis in FPGAs for system designs
- Rapid prototyping of ASIC/SoC in FPGAs - Translation services - FPGA FPGA - FPGA ASIC - ASIC FPGA As far as FPGA-based product designs are concerned, work-in-progress covers a wide range of products, including communication and multimedia products in the CE space, high-end equipment such as automotive electronics and telecom infrastructure products technologies like 3G, WiMAX, LTE etc Q. What does a typical engagement look like? What is a typical project? A typical dollar size to the project? A typical time frame? A. We collaborate with our customers at various levels and stages. The engagement could be RFP based services with business models like T&M, Fixed or Hybrid models or strategic partnerships with Off-shore competency centers which is a seamless extension of customers engineering center. Most of our engagements fall in the latter category. We also extend on-site support through resource augmentation. We work on areas like VLSI, Telecom, Embedded Software, Networking, Multimedia, Storage, Automotive, Visual and High performance computing. We also have probably Indias biggest Industrial design center for concept creation and mechanical engineering designs. Most projects can be categorized under these heads. Also, because of end-to-end product design expertise, many of the projects are for complete product development. As a case in point, we are engaged with Worlds leading Industrial Automation Company for whom the complete DTV product is being designed and developed by Tata Elxsi. A network processor being developed for the purpose is also being designed by Tata Elxsi. Delivering quality and value to our customers is the foremost in any engagement. That doesnt mean order value is any less important however, its not the ultimate decider. The time frame of a project is very subjective. Sticking my neck out, I would say for a FPGA based product design it would be anywhere between 12 to 18 months but it all depends on the application of the product.
Q. Is Tata Elxsi a partner with Xilinx, Altera, or other FPGA providers? What sorts of partnerships are you involved with that support FPGA-based designs? A. We have entered into strategic alliances with leading technology companies across the globe in order to give further depth to our offerings to our customers. Working with us gives our customers the opportunity to make use of these alliances and partnerships to receive better services, making use of the best technology and our own expertise. Tata Elxsi is a proud to be part of Xilinx Alliance Program. As a part of Xilinx Alliance program, Tata Elxsi has developed several solutions that digital display designers can use to accelerate the development of complex image enhancement algorithms in high-quality flat-panel displays. The reference designs are proven on a Spartan3 based validation platform developed specifically to address key technical challenges faced by LCD and PDP television panel and video board designers. Tata Elxsi is also an Altera Certified Design Center. We have expertise in designing complex solutions on Altera platforms and many of our engineers are Altera-certified design engineers.
Being the earliest ARM approved design center and Tensilicas first authorized Processor design center, we bring in the highest level of technical design competency to our customers.
Q. Does Tata Elxsi offer special expertise in specific vertical markets like military or telecommunications? What verticals do you think have the most applicability to FPGA-based designs, and how can Tata Elxsi help with designs for these verticals? A. All along, niche focus has been our differentiator. Telecommunications and Consumer electronics are the verticals where we bring in value with our several man-years of experience. For Consumer electronics, we have built an Image processing SOC on Xtensa processors for one of the worlds leading consumer electronics giants. As part of our IP initiative, Wave 1 compliant PHY solution for WiMAX application is developed by us. The solution flexible to be adopted for macro, micro and pico base stations is implemented and tested on Xilinx Virtex 4 FPGA. Video Conferencing gateways, 3G communication platforms, H.264, AVC Intra are some of the other notable FPGA-based designs developed by Tata Elxsi. Communications, Industrial and Consumer electronics are the verticals, which I think, have the most applicability to FPGA based designs. As the FPGA moves towards 65nm process technology, power consumption becomes the main consideration. Also, increased complexity has made the design software a critical part of FPGA.
By virtue of our vast experience and for the fact that we operate out of India helps us to deliver low cost solutions to not just these markets but also our customers.
Q. How does an engineering manager know who he is going to deal with? Does he meet with specific engineers at Tata Elxsi? Is there a stable team assigned to a particular project? A. We understand that by entrusting a mission critical project, the least that our customer could expect from us is transparency. Based on the type of projects, almost always the brief profiles of the personnel identified by Tata Elxsi for the purpose would be shared with our customers. The identified key technologists would be available for discussion with the customer at any given point of time. The meetings could happen over conference calls, video conferencing or meeting in person. Right from the time the RFP is received from a customer, a team of key technologists would be identified. This team would be responsible for interacting with the prospect, understanding the nature and scope of work and to propose the best possible solution. The same team would be working on the project upon signing of the contract. In that sense, our customer could be rest assured that there wont be upheavals as regard to communication channels with Tata Elxsi. Q. Its very hard to begin a new design service relationship. What ways can you suggest a potential client educate himself about Tata Elxsi before having to make a substantial financial commitment? Are there site visits? Webinars? Online learning? A. Tata Elxsi is a part of TATA group, the biggest and oldest Indian conglomerate. As a part of TATA group, its been our legacy to build business by building trust.
Our regularly updated website http://www.tataelxsi.com/ gives out a lot of information and news about who we are and what we do. Even the latest audited financial results are available on the website. At Tata Elxsi, seeing is believing. So, site visits are very common. Apart from site visits, RFI response and online learning, a dedicated account manager would make sure that all customer queries are satisfactorily answered. Q. Thank you for this interview.
WIPRO: FPGA DESIGN SERVICES

25 October 2008: FPGA Design Services INTERVIEWEE. RAJAGOPALAN KOTHANDARAMAN, ARCHITECT VLSI/SYSTEM DESIGN TEL. +91-80-28520408 EXTN 4107 EMAIL. VLSI@WIPRO.COM COMPANY. WIPRO TECHNOLOGIES WEB. http://www.wipro.com/vlsi
Q. First of all, tell us a little bit about yourself and your position at Wipro. A. I am working in Wipro for the past 12+ years in the FPGA design and ASIC front-end design. I hold 3 US patents. I consult for multiple FPGA and ASIC/SoC development projects in Wipro, mainly in the architecture and design stages.
Q. Design services can mean so many different things to so many different people from placing people at an engineering site to doing a complete design from concept to production. Can you tell us a little bit about Wipros design service offerings? A. Wipro is a one-stop shop for all the design service needs of a customer. Wipro has strong expertise in ASIC/ASSP/SoC development, FPGA design, board design, mechanical design, system and software design. We have proven customer success in full chip design, turnkey SoC design from Architecture definition to physical design, Custom digital block development, Physical design and post GDS II services, Verification and Validation services, Analog and Mixed Signal design and consultation, SoC IP integration. Specifically in the FPGA based system design, Wipro offers its design services in the following areas: A. New product development Architecture Development FPGA Design, Implementation and Timing Closure FPGA to ASIC migration Custom FPGA prototyping/emulation board development FPGA prototyping for proof of concept of emerging technologies
B. FPGA Prototyping and Validation
C. Hard Copy Migration D. Retargeting services (FPGA-to-FPGA, FPGA-to-ASIC, ASIC-to-FPGA) E. Enhancement & Sustenance Services
Q. Our guide targets engineers and OEM managers that are specifically interested in FPGA and FPGA-based product design. What specifics can you give us about Wipros FPGA expertise?
A. Wipro has been doing FPGA design services work for past 2 decades and has strong expertise in doing high performance high-density FPGA designs. Wipro has its own FPGA design methodology called EagleWision, which helps to ensure zero defects in the designs with robust guidelines, checklist and automated in-house tools.
Our Expertise include: Expertise in designing with Xilinx / Altera / Actel / Lattice Devices Strong Domain knowledge in vertical domains such as telecommunication, networking, wireless, avionics, automotive, industrial automation, medical, high-end computing and other embedded systems. High Performance High Complex Design Complexity up to 6 million system gates. System Performance of 200 MHz in Virtex-II FPGA Optimum design using Spartan devices for low cost solution Design with embedded processors such as Nios/PowerPC/8051 Expertise in designs involving High speed memory interfaces such as DDR2/DDR3/QDR, high speed serial interface standards like SRIO, PCIe, PON design Worked with FPGA designs having high logic utilization and IO utilization (timing closure of 125-200 MHz system frequency with as much as 98% logic utilization, 100% pin utilization) IP Integration In addition, ASIC Prototyping in FPGA (multi FPGA partitioning)
Q. What does a typical engagement look like? What is a typical project? A typical dollar size to the project? A typical time frame? A. Wipro is a one-stop shop for all the design service needs of a customer. Wipro has strong expertise in ASIC/ASSP/SoC development, FPGA design, board design, mechanical design, system and software design . In the FPGA design space, most of the designs are mainly done as part of a large board/system development engagements. In addition, most customers have established a dedicated offshore development center (ODC) in Wipro, with dedicated pool of resources to complement customers engineering teams. through which we do FPGA designs. Depending on the complexity of the FPGA design, the development cost is determined and it could range from $100K to $1M with a typical time frame of 2 months to 8 months. To give you an example, Wipro was involved in the development of Ethernet over Passive Optical Network (EPON) system solution involving both ONT and OLT side development. The ONT system consists of 1 high density FPGA from Xilinx and OLT system consists of designing 2 high density FPGAs, one for OLT EPON stack and another for Ethernet switch function. Since the customer was time pressed to demonstrate his solution to prospective end-customers, we had to develop the systems including FPGA designs in 22 weeks with embedded software and management software. The demo went successfully right on 22nd week, resulting in our customer winning sockets for an integrated ASSP chip solution. Q. Is Wipro a partner with Xilinx, Altera, or other FPGA providers? What sorts of partnerships are you involved with that support FPGA-based designs?
A. We have strong partnerships with Xilinx, Altera and Actel that ensure tier 1 technical support, access to factory for resolving critical problems, advanced training and certification, sharing roadmap and joint business promotion. We are part of Xilinx Alliance Program. We are the largest design service company in Alteras Certified Design Center (CDC) program with more than 165 Altera certified engineers. We have forged an alliance with Actel mainly for Avionics designs.
Q. Does Wipro offer special expertise in specific vertical markets like military or telecommunications? What verticals do you think have the most applicability to FPGA-based designs, and how can Wipro help with designs for these verticals? A. Most high performance high density FPGAs find use in telecommunication and networking systems. Wipro has a strong domain expertise in this space, working with almost all the top-ten telecom/datacom system vendors for more than 2 decades. In addition, Wipros delivery teams are vertically aligned having greater domain expertise in the areas of medical, storage, avionics, industrial automation and embedded systems. Specific to avionic designs, our hardware/FPGA development processes are fine-tuned for DO-254 design assurance levels.
Q. How does an engineering manager know who he is going to deal with? Does he meet with specific engineers at Wipro? Is there a stable team assigned to a particular project? A. Our customers come to Wipro with a confidence of assured project delivery with highest quality standards with greater cost control. He gives the concept specification of his product and works jointly with Wipro team to define the architecture. Our customers trust Wipro with the project and Wipro manager is given a free hand to form the project team based on the expertise needed to successfully deliver the product. Wipro manager and project lead communicate with customer regularly (weekly/fortnightly) through telecons/videocons / detailed weekly status reports. There may be joint milestone reviews. Additionally there will be quarterly management business reviews.
Q. Its very hard to begin a new design service relationship. What ways can you suggest a potential client educate himself about Wipro before having to make a substantial financial commitment? Are there site visits? Webinars? Online learning? A. Anyone interested can visit our website http://www.wipro.com/vlsi or write to us directly at vlsi@wipro.com for a service specific e- brochure. You can also mail us for any specific queries and our Business managers or Sales/Marketing has presence in that Geo will get in touch. Q. Thank you for this interview.
Appendix A: Top Internet FPGA Resources

The Internet is a confusing, if useful, source of FPGA information. Fortunately, eg3.com organizes the "best sites" on the Web for FPGA. This list is updated weekly on eg3.com, but we reproduce an abbreviated version here (sites rated 4 or higher). For the complete, up-to-date list go to http://www.eg3.com/fpga.htm.
APPENDIX A: TOP INTERNET FPGA RESOURCES
eletter
FPGA and Structured Asic Journal eLetter The industry's leading publication dedicated to FPGAs, Programmable Logic and Structured ASICs publishes weekly staff written and contributed feature articles as well as press releases, news stories and webcasts. Our editorial calendar gives you the information you need to keep your company in the spotlight by weighing in on current topics and gives us a heads up on your important annoucements. Web. http://www.fpgajournal.com/ Score. 5
conference FPGA Summit The FPGA Summit focuses on the use of FPGAs (field-programmable gate arrays). FPGAs are semiconductor devices containing logic elements and interconnects. Programming an FPGA typically involves selecting logic element functions and making or breaking connections among the elements to implement a specific design. That is, programming the FPGA involves selecting active connections much like building something by connecting pieces from a... Web. http://www.fpgasummit.com/ Score. 5 overview FPGA-Guide.com This page offers to you the first (and i think biggest) vendor-independent FPGA-selectorguide for all known FPGA and CPLD-families of the last years. The devices are preselected by gate-complexity and year of introduction. At the first glance you can see max. usable gates, flipflops, speed, RAM, clock-nets, 5V-tolerance, I/Os and many more. Web. http://www.fpga-guide.com/ Score. 5 portal Programmable Logic DesignLine Where can you find real solutionsto tough programable logic design challenges? The Programmable Logic DesignLine is the place. This site provides the practical how-to information needed to program, develop, and implement field programmable gate arrays (FPGAs) and programmable logic devices (PLDs) in wireless, networking, industrial, automotive, and other design applications Web. http://www.pldesignline.com/ Score. 5 Aldec Tutorials - SystemC, VHDL, Verilog SystemC-Primer 1.1. HDL / VHDL Tutorials. Evita-VHDL interactive primer. ATP-Verilog 4.6 - Advanced Testing Package Tool. ATP-VHDL 4.6. Advanced Testing Package Tool, designed to test an engineer's competency with the VHDL langauge. Riviera 2007.06 Powerful, high performance ASIC and High Density FPGA verification environment. Active-HDL 7.2sp2 - Completely integrated FPGA design entry and verification environment for VHDL, Verilog,... Web. http://www.aldec.com/downloads/ Score. 4 eval kit Altera Development Kits: PLD's, FPGA's, PCI, DSP, Ethernet and More Altera and its partners offer a wide range of development kits (shown in Table 1) to support system-on-a-programmable-chip (SOPC) design development. Altera emphasizes complete, high-value kits to simplify design and reduce time-to-market. This page is your
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gateway to various evaluation kits - ranging in price from several thousand, to a few hundred dollars. A great way to get started with Programmable Logic. Web. http://www.altera.com/products/devkits/kit-dev_platforms.jsp Score. 4 resource Altera Partner and Eval Kit List Altera's worldwide partners offer development platforms that speed system design and allow application software development to begin earlier in the design flow. Hardware designers can use the platforms to verify intellectual property (IP) functionality quickly and effectively. Table 1 lists development platforms from Altera partners. Web. http://www.altera.com/products/devkits/kit-dev_platforms_partner.jsp Score. 4 demo Altium Demo Center - Altium Designer EDA Demo Altium Designer provides electronic designers and engineers with a single,unified application that incorporates all the technologies and capabilities necessary for complete electronic product development. Altium Designer integrates board- and FPGA-level system design, embedded software development, and PCB layout, editing and manufacturing within a single design environment. Altium's DEMOcenter now gives you the opportunity to walk... Web. http://www.altium.com/Evaluate/DEMOcenter/ Score. 4 ASIC Prototyping with FPGAs Recently, there is a growing use of FPGAs to prototype ASICs as part of an ASIC verification methodology. With development costs for ASICs approaching $20M, avoiding a respin by prototyping with FPGAs is attractive alternative. This paper explorers the key issues designers should consider when developing and ASIC prototyping methodology. Web. http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_33693.cfm Score. 4
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seminar Avnet / Xilinx Speedway Design Workshops Avnet's SpeedWay workshops offer in-depth technical training providing you with practical 'how-to' tutorials and labs on the latest Xilinx technology. Each workshop will challenge you with a hands-on experience using the newest Xilinx tools and development boards. Xilinx Speedway Design Workshops: General Design Courses: Introduction to VHDL for FPGAs Fundamentals of FPGA Design Improving Design Performance A Practical Guide... Web. http://em.avnet.com/evs/home/0,4582,CID%253D33398%2526CCD%253DUSA%2526 SID%253D32214%2526DID%253DDF2%2526LID%253D32233%2526BID%253DDF2% 2526CTP%253DEVS,00.html?SUL=xilinxspeedway Score. 4 project BYU JHDL, Open Source FPGA CAD Tools JHDL is a set of FPGA CAD tools developed at Brigham Young University's Configurable Computing Laboratory that allows the user to design the structure and layout of a circuit, debug the circuit in simulation, netlist and interface for bit-stream synthesis, and so forth. It is an exploratory attempt to identify the key features and functionality of good FPGA tools.
Web. http://www.jhdl.org/ Score. 4 vendor DeviceNative.com Welcome to DeviceNative.com, a discussion about the verification of large Field Programmable Gate Arrays (FPGAs) with the team at GateRocket, Inc. In this blog, we share ideas and observations about FPGA verification and appreciate your comments on the same. If you have followed the market as we have over the past several years, FPGAs have become every bit as advanced as ASIC technologies, but dont suffer from the long, costly and error... Web. http://www.devicenative.com/ Score. 4 DSP-FPGA.com DSP-FPGA.com (formely DSP Engineering magazine) is the engineer's resource for embedded digital signal processing. Our editorial content and product databases focus on DSP and FPGA hardware and software development solutions and their related technologies serving the following industries: Telecommunications, Personal communications, Audio, Video imaging, Automotive systems, Motor and motion control, Broadband, Digital... Web. http://www.dsp-fpga.com/ Score. 4
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overview FGPA FAQ (newsgroup Archives) This site is a public repository for Frequently Asked Questions (FAQs) for designers of systems using FPGAs. The contributors to this site are typically also participants in the comp.arch.fpga news group. Last updated 7/1/05 - however newsgroup archives are upto-date, and thus useful. Web. http://www.fpga-faq.com/ Score. 4 overview Field-programmable gate array A field programmable gate array is a semiconductor device containing programmable logic components and programmable interconnects. The programmable logic components can be programmed to duplicate the functionality of basic logic gates such as AND, OR, XOR, NOT or more complex combinational functions such as decoders or simple math functions. In most FPGAs, these programmable logic components (or logic blocks, in FPGA parlance) also include... Web. http://en.wikipedia.org/wiki/FPGA Score. 4 hot list FPGA and other programmable logic ICs FPGA is an integrated circuit that contains many (64 to over 10,000) identical logic cells that can be viewed as standard components. Each logic cell can independently take on any one of a limited set of personalities. The individual cells are interconnected by a matrix of wires and programmable switches. Web. http://links.epanorama.net/links/fpga.html Score. 4
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FPGA Central FPGA Central is created to provide a central place for FPGA Vendors & Users to share experiences and information about FPGA Design, Development, Verification, Validation, Process, Tools & Products. Web. http://www.fpgacentral.com/ Score. 4 organization FPGA High Performance Computing Alliance (FHPCA) The FPGA High Performance Computing Alliance (FHPCA) is developing highperformance computing solutions using Field Programmable Gate Arrays(FPGAs) to deliver new levels of performance into the technical computing market. Hardware and software developed by the FHPCA have been used to build a large-scale demonstrator supercomputer called Maxwell. This is complemented by a campaign to raise industrial awareness and interest and to stimulate... Web. http://www.fhpca.org/ Score. 4 paper FPGA Resource Management Producing optimal implementations for designs targeted to today's advanced FPGAs is increasingly dominated by the ability of the user to take advantage of dedicated resources such as block RAMs, multipliers and DSP blocks. What is needed is a way to give expert control to every user, providing early visibility into mapping choices and the ability to easily investigate alternate implementations. While synthesis tools do a good job of properly... Web. http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_32284.cfm Score. 4 paper FPGA vs. DSP Design Reliability and Maintenance Digital signal processing (DSP) underpins modern wireless and wireline communications, medical diagnostic equipment, military systems, audio and video equipment, and countless other products, becoming increasingly common in consumers' lives. Due to advances in semiconductor technology, ever more complex DSP algorithms, protocols, and applications are now feasible, which, in turn, increase the complexity of the systems and products.... Web. http://www.altera.com/literature/wp/wp-01023.pdf Score. 4 overview FPGA's vs. ASIC's - What are the Trade Off's (Registration Required) Designs that were done in ASICs in the past are done by FPGAs today, faster and for less cost. Complex FPGA design is driving new design approaches. ASIC designs are specialized, offer power and flexibility, and accommodate large designs where FPGA falls short. With so much at stake, where should your company's focus lie? Or is it more of a middle area - a place where structured ASIC can fill the gap? Web. http://www.iec.org/online/iforums/mentor_graphics/choose.asp Score. 4 portal FPGAWorld.com FPGAworld is a news and information site for engineers with a special interest in FPGA design. The site will have a strong focus on FPGA design but will also cover related issues like IP, SOC, ASIC prototyping etc. Also promoting an FPGA World conference in September, 2004.
Web. http://www.fpgaworld.com/ Score. 4 paper Incremental FPGA Synthesis As FPGA devices have grown larger and more complex, the design process has become more challenging. Designers must now contend with a large number of complex embedded blocks in a single FPGA. This increase in functionality has led to long runtimes and difficulties in achieving timing closure. As a result, designers have turned to incremental design to alleviate this problem; however, the currently available solution requires designers to... Web. http://www.mentor.com/products/fpga_pld/techpubs/mentorpaper_32628.cfm Score. 4 ispLEVER Starter Software ispLEVER Starter is intended for evaluation & student use. ispLEVER Starter uses the same interface and design flow as the other ispLEVER configurations, and can be used to take an FPGA, CPLD, ispGDX, or SPLD design from concept to device programming.The ispLEVER Starter software is a modular system. The optional downloadable modules include LatticeEC and ispXPGA design tools, synthesis tools from Mentor Graphics and Synplicity, and on-line help. Web. http://www.latticesemi.com/products/devtools/software/ispLEVERstarter/index.cfm Score. 4
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personal page John's VHDL FPGA Page 1. VHDL - References and Tutorials: 2. FPGA Board Vendors: 3. FPGA Prototyping Boards I Use: 3.1 B3-Spartan2+ Board 3.2 Notes on modifying the B3-SRAM module 3.3 B5-X300-Spartan2e Board 3.4 ICST525-01 PLL Clock divider 3.5 Spartan 3 Starter Board 3.6 Spartan 3E Starter Board 3.7 XESS XSA-3S1000 3.8 Memec Design / Avnet V4FX12LC 4. FPGA Design Tools: 4.1 Xilinx Web Pack ISE: 4.2 Altera Quartus: 5. FPGA Projects for the B3... Web. http://members.optushome.com.au/jekent/FPGA.htm Score. 4 webinar Secure FPGA Configuration Over Ethernet Digital consumer and industrial systems inevitably require updates. Systems designed to use reconfigurable logic like FPGA's, or with rewritable non-volatile memory have the potential for upgrades. Many of these systems have some form of network connection and can use the available communications connection to perform system upgrades. But how can updates to these kinds of systems be done securely? This webcast covers an FPGA based embedded... Web. http://www.latticesemi.com/corporate/webcasts/securefpgaconfigurationov.cfm Score. 4 blog Svenand's Blog / FPGAs from Scratch have been designing ASICs for more than 15 years. A few years ago I started to realize that there is another player in town and that is the FPGA circuit. With increasing NRE costs and with the long turn-around times, ASIC designs have become high-risk projects. At the same time FPGAs are getting bigger and faster and many companies have therefore decided to only use FPGAs. I also realized that I have to learn how to design using FPGAs, if I...
Web. http://svenand.blogdrive.com/ Score. 4 tutorial Xilinx Education Home - FPGA, DSP, SOC and More As a leader in the FPGA space, Xilinx offers a number of courses on how to learn and use its technology. Admittedly, they are by Xilinx, for Xilinx - designed to promote Xilinx technologies. Courses are arranged worldwide, and are on a paid basis only. FPGA Design DSP Design High-Speed Serial Design Embedded Systems Development PCI Design. Also some online training. Web. http://www.xilinx.com/support/education-home.htm Score. 4
Appendix B: New FPGA-Related Products

Vendors release product-after-product into the competitive FPGA market. Fortunately, eg3.com tracks all news releases and new product announcements. Here is an excerpted list from the last six months. For the most recent products, go to http://www.eg3.com/fpga.htm. Be sure to sign up for e-clips, our news alert service as well.
APPENDIX B: NEW FPGA-RELATED PRODUCTS
APPENDIX B: NEW FPGA PRODUCTS
new product BittWare Announces Reconfigurable FPGA AMC Module Featuring SFP/SFP+ .... BittWare, the leading supplier of FPGA-computing and hybrid (FPGA+DSP) digital signal processing COTS solutions, announced today at the AdvancedTCA Summit their newest AdvancedMC module - the SF/GX-AMC (SF/GXAM). The SF/GXAM features four small form-factor pluggable-plus (SFP/SFP+) transceivers enabling support of virtually any serial communication standard, including Fibre Channel, Gigabit Ethernet, SONET, CPRI, and OBSAI. The four SFP/SFP+... Web. http://www.bittware.com/media/press/pr.cfm?id=42 Score. 5 Date. 10/22/2008 0:00 new product New Cypress Interactive Video Demonstrates How to Use a PSoC Programmable System...... Cypress Semiconductor Corp. (NYSE: CY) and the Avnet Electronics Marketing Americas business region of Avnet, Inc. (NYSE:AVT), announce the launch of a new online design demonstration - 'PSoC the Mixed Signal FPGA Companion Chip.' The video shows designers how to use a Cypress PSoC Programmable System-on-Chip in cost-effective companion chip applications with a Xilinx FPGA. The 30-minute video is available on demand and free of charge at... Web. http://app.cypress.com/portal/server.pt?space=CommunityPage&control=SetCommunit y&CommunityID=208&PageID=218&DirectoryID=1205219 Score. 4 Date. 10/20/2008 0:00 new product Lattice Accelerates PCI Express System Design With New Low Cost Latticeecp2m .... Lattice Semiconductor (NASDAQ: LSCC) today announced the availability of a new low cost PCI Express development kit for its LatticeECP2M family of low cost 90nm FPGAs. Based on a new PCI Express x1/x4 evaluation board, the kit accelerates development of PCI Express designs using the LatticeECP2M family. The kit has been developed from the ground up to accelerate the evaluation of Lattice PCI Express technology, demonstrate a range of... Web. http://www.latticesemi.com/corporate/newscenter/productnews/2008/r081006acceler atespciexpr.cfm Score. 4 Date. 10/15/2008 0:00 new product Altium adds LatticeXP2 and Altera Stratix III processor support to Altium Designer Altium, the worlds leading developer of unified electronics design solutions, has extended its FPGA support to include the Altera Stratix III and LatticeXP2 families of programmable devices. Electronics designers now have new opportunities to harness the power of FPGAs and explore new design concepts in real time, without having to make final decisions on device choice too early in the design process. The Altera Stratix III and LatticeXP2 progr Web. http://www.altium.com/files/corp/media/pdfs/20080929AltiumFPGASupportAlteraLat tice.pdf Score. 4 Date. 10/7/2008 0:00
new product Precision Synthesis Support for New Xilinx Virtex-5 TXT Field Programmable Gate Arrays Mentor Graphics Corporation (NASDAQ: MENT) today announced that its suite of advanced synthesis products support Virtex-5 TXT field programmable gate arrays (FPGAs), the newest platform from Xilinx optimized for ultra high-bandwidth applications. The Mentor Graphics Precision RTL and Precision RTL Plus products offer immediate availability of state-of-the-art synthesis support for designs targeting the Virtex-5 TXT FPGA platform. Xilin... Web. http://www.mentor.com/company/news/mentorgraphicsprecisionsynthesisxilinxvirtex5 txtfpga Score. 4 Date. 10/3/2008 0:00 new product VPX momentum continues with a 3U VITA 46 FPGA Processing Engine VMETRO, a leader in embedded computing solutions based on standards such as VXS, VPX, XMC and FMC that utilize multi-gigabit serial interconnects, today announced the industrys first 3U VPX FPGA processing engine with support for the new FPGA Mezzanine Card (FMC/VITA 57) standard. The FPE320 incorporates the largest available Xilinx Virtex-5 FPGAs and an onboard FMC mezzanine site. This combination of high-performance FPGA processing and... Web. http://www.vmetro.com/article4716-3759.html Score. 5 Date. 10/2/2008 0:00 new product Virtex-5 TXT Platform Delivers First Single FPGA Solution for Building 40G and 100G ... Xilinx(R), Inc. (Nasdaq: XLNX) announced today the world's first single-FPGA solution for telecommunications equipment manufacturers developing the next generation in Ethernet bridging and switching solutions. Aimed at spurring innovation and growth in the 40- and 100-Gigabit Ethernet (GE) market, Xilinx has added the Virtex(R)-5 TXT platform to its industry-leading, high-performance family of 65-nanometer (nm) field programmable gate... Web. http://press.xilinx.com/phoenix.zhtml?c=212763&p=irolnewsArticle&ID=1199762&highlight= Score. 4 Date. 10/2/2008 0:00 new product VMETRO combines the power of fiber optics with Xilinx Virtex-5 FPGAs in an XMC module VMETRO, a leader in embedded computing solutions based on standards such as VXS, VPX, XMC and FMC that utilize multi-gigabit serial interconnects, today announced a new generation user programmable FPGA XMC/PMC module with fiber-optic transceivers. The XMC-FPGA05F, a follow-on to the very successful PMC-FPGA03F, incorporates the Xilinx Virtex-5 FPGA with four front panel fiber-optic transceivers in air- or conduction-cooled versions. The... Web. http://www.vmetro.com/article4720-3759.html Score. 4 Date. 10/2/2008 0:00 new product VPX (VITA 46) product line expands with 6U VPX Buffer Memory Board
VMETRO, a leader in embedded computing solutions based on standards such as VXS, VPX, XMC and FMC that utilize multi-gigabit serial interconnects, today announced the availability of the industrys largest capacity 6U VPX buffer memory board. The MFC700 is a 6U VPX-REDI (VITA 48) buffer memory node with support for up to 16GB of memory on the baseboard, dual XMC mezzanine sites and support for Serial RapidIO (sRIO) fabric. Designed for... Web. http://www.vmetro.com/article4715-3759.html Score. 4 Date. 10/2/2008 0:00 new product Gaterocket Ships Advanced Fpga Verification Solution For Virtex-5 Fpgas GateRocket Inc. today announced availability of its RocketDrive for Virtex-5 FPGAs from Xilinx. The RocketDrive cuts verification and in-system debug time for advanced single or multi-FPGA based projects while adding significant value through seamless integration to a design team's existing design verification environment, without a change in design flow or verification methodology. 'Xilinx Virtex-5 devices are the... Web. http://www.gaterocket.com/company/news-events/news/bid/5694/GateRocketShips-Virtex-5-RocketDrive Score. 5 Date. 10/1/2008 0:00 new product CommAgility announces cost-effective FPGA-based signal processing AdvancedMC module CommAgility announced today the AMC-V5F, a single width, mid-size Advanced Mezzanine Card which includes a Xilinx Virtex-5 FPGA. The new module is ideal for the latest wireless baseband applications, and is also suitable for any high-performance processing application, particularly where optical interfacing or SRIO support is required. Dual SFP sockets for optical interfaces to the FPGA are provided on the front panel. These are... Web. http://commagility.com/news/pr_v5f.php Score. 4 Date. 9/26/2008 0:00 new product Impulse C Integrates with BlueCat Embedded Linux for Prototyping for Xilinx FPGAs LynuxWorks Inc., a world leader in the embedded software market, and Impulse Accelerated Technologies, a world leader in software-to-FPGA tools, today announced technical collaboration, libraries and reference examples combining the Impulse C-toFPGA tools with LynuxWorks' BlueCat embedded Linux operating system. This combination enables software developers to write C algorithms and easily refactor them for parallel processing on FPGA, a... Web. http://www.lynuxworks.com/corporate/press/2008/impulse.php Score. 4 Date. 9/22/2008 0:00 new product Altera Devices Offer Full Support of XAUI Protocol With 10-Gigabit Ethernet Addressing the demands of broadband networking and telecommunication applications, Altera Corporation (NASDAQ: ALTR) today announced the availability of a 10-gigabit Ethernet (10GbE) reference design targeting designers using the XAUI communications protocol. Line cards and system controllers used within network routers, enterprise and metro Ethernet switches, and storage switches can leverage Alteras Arria and Stratix series of FPGAs to... Web. http://www.altera.com/corporate/news_room/releases/products/nr-xaui.html
Score. 4 Date. 9/19/2008 0:00 new product Lattice Delivers Industry's Fastest Rldram I/ii Memory Controller Support Lattice has announced industry-leading FPGA-based support for the Reduced Latency Dynamic Random Access Memory (RLDRAM) I/II memory devices. The LatticeSC and LatticeSCM FPGA families (collectively, the LatticeSC/M families) now support RLDRAM I/II rates up to 800Mbps. The high-speed RLDRAM I and RLDRAM II memory controller IP (intellectual property) is implemented in Lattices unique, low power MACO (Masked Array for Cost... Web. http://www.latticesemi.com/corporate/newscenter/productnews/2008/r080915delivers industrysf.cfm Score. 4 Date. 9/18/2008 0:00 new product Upgraded analog performance of 1.5GSPS ADC XMC module Released VMETRO, a leader in embedded computing solutions based on standards such as VXS, VPX, XMC and FMC that utilize multi-gigabit serial interconnects, today announced an improved analog performance high-speed analog input XMC module with the latest generation Xilinx Virtex-5 FPGA. The AD1520 is a dual channel 1.5GSPS ADC XMC/PMC module. The analog input of the AD1520 utilizes a National Semiconductor ADC08D1520 8-bit converter that is directly... Web. http://www.vmetro.com/article4711-3759.html Score. 4 Date. 9/18/2008 0:00 new product National Semiconductor Introduces Industrys First Comprehensive 3G-SDI Development Kits for FPGA National Semiconductor Corp. (NYSE:NSM) today introduced the industrys first triplerate (3G/HD/SD) serial digital interface (SDI) and video clocking daughter card development kits that maximize system performance and simplify the design of new broadcast video equipment. The two daughter cards are compatible with development kits from Altera and Xilinx and include synthesizable field-programmable gate array (FPGA) source code and the entire... Web. http://www.national.com/news/item/0,1735,1355,00.html Score. 4 Date. 9/12/2008 0:00 new product National Semiconductors New Video Timing Reference Design Enhances Jitter Performance of Xilinx National Semiconductor Corp. (NYSE:NSM) today introduced a new video clock reference design, now available as a module for the Xilinx ML571 serial digital video development board. Nationals module improves the jitter performance of the ML571 boards SerDes-optimized Virtex-5 LXT field-programmable gate arrays (FPGAs) and enables popular FPGA-based video solutions to easily meet the stringent Society of Motion Picture and Television... Web. http://www.national.com/news/item/0,1735,1354,00.html Score. 4 Date. 9/12/2008 0:00 new product
Sun and Xilinx Ignite CMT Development Market with Introduction of OpenSPARC Evaluation Platform Sun Microsystems, Inc. (NASDAQ: JAVA) and Xilinx, Inc. (NASDAQ: XLNX) unveiled a feature-rich, high-performance programmable OpenSPARC evaluation platform. The platform provides academic researchers and hardware developers with a flexible OpenSPARC-based platform to create, customize and deploy next-generation applications for a broad set of end markets including supercomputers, industrial, scientific and medical (ISM), aerospace & defense,... Web. http://www.sun.com/aboutsun/pr/2008-09/sunflash.20080908.1.xml Score. 5 Date. 9/11/2008 0:00 new product Atmel Launches $399 Starter Kit for ARM7-based Customizable Microcontrollers Atmel has announced its AT91CAP7A-STK Starter Kit for the evaluation of its ARM7based CAP family of customizable microcontrollers. CAP7 customizable MCUs allow designers to migrate ARM7-plus-FPGA designs to a low-NRE, single-chip solution with approximately 30% lower unit costs, with eight times better performance, 98% less static power consumption, and 70% less active power consumption. The $399 CAP7 Starter Kit includes a printed... Web. http://www.atmel.com/dyn/corporate/view_detail.asp?ref=&FileName=AT91CAP7ASTKdevkit_9_2.html&SEC_NAME=Product Score. 5 Date. 9/4/2008 0:00 new product Express Logic and Avnet Develop RTOS Support for Xilinx PowerPC 440 Processor on Virtex-5 FPGA Express Logic, Inc., the worldwide leader in royalty-free real-time operating systems (RTOS), and Avnet Electronics Marketing, an operating group of Avnet, Inc. (NYSE:AVT), today announced ThreadX RTOS now supports the PowerPC 440 processor embedded in Xilinx Virtex-5 FPGAs. The IBM PowerPC 440 core is a hard 32bit RISC CPU processor immersed directly into the Xilinx Virtex FPGA fabric to implement high-performance embedded applications.... Web. http://www.rtos.com/news/detail/?prid=148 Score. 4 Date. 8/19/2008 0:00 new product Xilinx Extends Spartan-3A FPGA Family, Enables Lower Total System Costs for High-Volume... Xilinx(R), Inc. (Nasdaq: XLNX) today announced the production availability of small form-factor packages for its Extended Spartan(R)-3A family of FPGAs, delivering breakthrough price points and enabling the reduction of total system costs for building cost-sensitive applications targeting consumer, wired and wireless communications, networking, industrial and many other markets. In addition to the new package options, the Extended Spartan-3A... Web. http://press.xilinx.com/phoenix.zhtml?c=212763&p=irolnewsArticle&ID=1188019&highlight= Score. 4 Date. 8/19/2008 0:00 new product Xilinx Introduces New Development Kit for Building High-Performance Embedded Processing Systems ...
Xilinx, Inc. (Nasdaq: XLNX), the world's leading provider of programmable system solutions, today announced the immediate availability of a powerful new development kit for building embedded processing systems based on PowerPC(R) 440 and MicroBlaze(TM) processors. Built around the Virtex(R)-5 FXT FPGA system integration platform, the new development kit enables both hardware and software designers to quickly architect, develop and debug a... Web. http://press.xilinx.com/phoenix.zhtml?c=212763&p=irolnewsArticle&ID=1185894&highlight= Score. 4 Date. 8/19/2008 0:00 new product NI LabVIEW 8.6 - Parallel Programming to Take Advantage of Multicore, FPGA and Wireless National Instruments has announced LabVIEW 8.6, the latest version of the graphical system design software platform for control, test and embedded system development. Building on the inherent parallel nature of graphical programming, LabVIEW 8.6 delivers new tools to help engineers and scientists take advantage of the benefits of multicore processors, field-programmable gate arrays (FPGAs) and wireless communication. Web. http://digital.ni.com/worldwide/bwcontent.nsf/web/all/128EA52109E87A3D86257487 0074DD7F Score. 5 Date. 8/7/2008 0:00 new product Innovative Integrations New X5-GSPS PCI Express XMC Module with National ADC08D1500... Innovative Integration announces the X5-GSPS, an XMC I/O module featuring the National Semiconductor 1.5 GSPS ADC08D1500 dual-channel, 8-bit A/Ds connected to a Virtex5 FPGA computing core, DRAM and SRAM memory plus an eight lane PCI Express host interface. A Xilinx Virtex5 SX95T with 512 MB DDR2 DRAM and 4MB QDR-II memory provide a very high performance DSP core for demanding applications such as emerging wireless standards. The close... Web. http://www.innovative-dsp.com/ftp/Marketing/Press_Releases/X5GSPSPress.pdf Score. 4 Date. 8/7/2008 0:00 new product National Instruments Introduces NI Single-Board RIO Platform for Embedded System Deployment National Instruments has announced new NI Single-Board RIO devices that offer engineers and scientists a low-cost, integrated hardware option for deploying embedded control and data acquisition applications. The eight new sbRIO-96xx devices combine an embedded real-time processor, reconfigurable field-programmable gate array (FPGA) and analog and digital I/O on a single printed circuit board (PCB), making them ideal for applications that... Web. http://digital.ni.com/worldwide/bwcontent.nsf/web/all/7C6F62C3A187099C86257489 0078ED60 Score. 4 Date. 8/7/2008 0:00 new product Nallatech Launches Rugged VXS and XMC Sensor Processing Solutions
Nallatech, the domain expert in high-performance FPGA computing solutions, today announced the availability of new Xilinx Virtex-5 based rugged embedded computing products for sensor processing applications. The new products being announced today are the VXS-610 dual FPGA and PowerPC multiprocessor and the XMC-210 FPGA and dual-channel 3 GSPS A/D XMC mezzanine. These products are the first in a new family of products that Nallatech is... Web. http://www.nallatech.com/?node_id=1.5.11.1.1&id=163 Score. 4 Date. 7/9/2008 0:00 new product Actel Expands Processor Ecosystem for Low-Power FPGAs Enabling embedded designers to easily add microcontroller functionality to its low-power field-programmable gate arrays (FPGAs), Actel Corporation (NASDAQ: ACTL) has broadened its support for industry-standard processors. Complementing its existing Libero Integrated Design Environment and CoreConsole IP Deployment Platform, Actel has added new software drivers and real-time operating system (RTOS) support. In combination with a complete set... Web. http://www.actel.com/company/press/2008/6/23/ Score. 5 Date. 6/27/2008 0:00 new product New Cypress PSoC Programmer 3.0 Offers Easy-to-Use, Customizable Interface And Faster Programming Cypress Semiconductor (NYSE: CY) today introduced new programming software for the PSoC programmable system-on-chip family. The new PSoC Programmer 3.0 now offers a customizable user interface, allowing designers to select the features they wish to use and hide those that they don't. Cypress has also streamlined the interface to enable an easier, more intuitive user experience. PSoC Programmer can be used as an integrated programmer with... Web. http://app.cypress.com/portal/server.pt?space=CommunityPage&control=SetCommunit y&CommunityID=208&PageID=218&DirectoryID=1156132 Score. 4 Date. 6/27/2008 0:00 new product New publishing and version control features from Altium put real control of design data back Altium, the leading developer of unified electronics design solutions, has added new project management and design data publishing capabilities to its unified electronic design solution that significantly help electronics designers manage the complexity of todays multi-faceted design projects. Altiums unified solution, Altium Designer, is based on a single data model that lets designers synchronize data across all the electronics... Web. http://www.altium.com/files/corp/media/pdfs/20080618AltiumDesignerDataManagem ent.pdf Score. 4 Date. 6/27/2008 0:00 new product First Rugged XMC Mezzanine Card To Offer Choice Of Three Xilinx Virtex-5 FPGAs GE Fanuc Intelligent Platforms today announced the XMCV5 mezzanine card with Xilinx Virtex-5 FPGA technology, responding to the growing importance of FPGA technology to military and aerospace customers. The XMCV5 is designed for a wide
spectrum of digital signal processing (DSP) applications in ground mobile, airborne fixedand rotary wing and naval applications including radar, sonar, signals intelligence (SIGINT), and image processing. Web. http://www.gefanucembedded.com/news-events/2403 Score. 5 Date. 6/26/2008 0:00 new product Zuken Ramps Up Support of FPGA Technology with Free Altera Cyclone III FPGA ... Zuken continues to bolster support for the integration of FPGA technology onboard by making a simulation kit available for Alteras low-cost Cyclone III FPGA family of products. This new design kit is free to download for users of Zukens CR-5000 advanced modular and robust electronics systems and PCB design suite. Board designers can save time and increase quality by simulating signal integrity of FPGAs during both the circuit design and Web. http://www.zuken.com/news/2008/0806-altera-cyclone.aspx Score. 4 Date. 6/19/2008 0:00 new product ARM7-based MCU with FPGA Interface to Multi-layer AHB Atmel Corporation has announced the AT91CAP7E, the industry's first ARM7-based MCU with a direct FPGA interface. The AT91CAP7E is a standard microcontroller with an FPGA interface that makes the FPGA look and work like it is on the internal bus of the MCU. It provides customers with a two-chip, no-NRE, FPGA-plus ARM7 solution and offers an engineering-free migration path to a lower cost, and a lower power customizable MCU. The CAP7E... Web. http://www.atmel.com/dyn/corporate/view_detail.asp?ref=&FileName=ARM7FPGA_A HB_6_18.html&SEC_NAME= Score. 5 Date. 6/18/2008 0:00 new product Altera SOPC Builder Tool Extends System-Level Design Lead With Third Embedded Soft Processor Giving system-level designers the broadest selection of soft processor cores for FPGAs, Altera Corporation (NASDAQ: ALTR) today announced Freescale will be delivering a 32bit V1 ColdFire soft core for the SOPC Builder tool. To quickly and easily create systemlevel designs using Altera Cyclone III FPGAs, designers can now choose a Freescale, ARM or Altera soft processor core, along with a library of 50 other intellectual property (IP)... Web. http://www.altera.com/corporate/news_room/releases/products/nrsopc_builder.html Score. 4 Date. 6/12/2008 0:00 new product Aldec Releases Riviera-PRO 2008.06 HDL Simulator. Including New Assertions Waveform Viewer... Aldec, Inc., announced the release of Riviera-PRO 2008.06, a behavioral, structural and mixed HDL language simulator for multi-million gate ASIC and FPGA designs. RivieraPRO 2008.06 includes Verilog simulation performance enhancements, increased SystemVerilog support, seamless SystemC/C/C++ and HDL co-debugging in common environment and new support for SVA and PSL assertions in the Waveform Viewer. Riviera-PRO supports System Level...
Web. http://www.aldec.com/Company/News.aspx?newsid=e2ae110b-a93d-4bc6-b279122f7f00115f Score. 5 Date. 6/11/2008 0:00 new product EVE Unleashes DW-FPGA for FPGA Synthesis EVE, the leader in hardware/software co-verification, today announced availability of DW-FPGA, a DesignWare foundation library for use with field programmable gate array (FPGA) synthesis software. DW-FPGA offers register transfer level (RTL) source code for the most commonly used DesignWare Foundation Library intellectual property (IP) components from Synopsys Inc. DW-FPGA supports XST from Xilinx, Quartus from Altera, Synplicitys... Web. http://eve-team.com/company/news/080527.php Score. 4 Date. 6/4/2008 0:00 new product Mentor Graphics Supports Alteras Stratix IV FPGA Device Family for 40 Nanometer Design Applications Mentor Graphics Corporation (NASDAQ: MENT) today announced that its Precision Synthesis family of products and its leading ANSI C++ high-level synthesis product, Catapult C Synthesis, support Altera Corporations 40 nanometer (nm) Stratix IV field programmable gate arrays (FPGAs). The Stratix IV FPGAs meet the diverse needs of high-end applications in a large number of markets. Customers leveraging the Precision Synthesis technology in... Web. http://www.mentor.com/company/news/alterastratixivfpga40nanometer.cfm Score. 4 Date. 5/30/2008 0:00 new product DSP/FPGA Co-Processing Demonstrates 20X Acceleration using Software-toHardware Design Flow Impulse Accelerated Technologies Inc. and 3L Limited today announced a technology partnership allowing DSP application developers to create accelerated algorithms for high-performance embedded systems, using software development methods for both DSP and FPGA devices. To demonstrating this capability, 3L engineers created an accelerated signal correlation application using the 3L Diamond and Impulse CoDeveloper tools, and targeting a Web. http://www.impulsec.com/PR_Impulse_3L.pdf Score. 4 Date. 5/29/2008 0:00 new product Altera Announces Industrys First 40-nm FPGAs and HardCopy ASICs Enabling designers to achieve new levels of integration and innovation, Altera Corporation (NASDAQ: ALTR) today announced the industrys first 40-nm FPGAs and HardCopy ASICs. The Stratix IV FPGAs and HardCopy IV ASICs, both with transceivers options, provide unprecedented densities, performance and low-power leadership. The Stratix IV family has up to 680K logic elements (LEs), 2X bigger than Alteras Stratix III family, currently the... Web. http://www.altera.com/corporate/news_room/releases/products/nr-stratix-ivhardcopy-iv.html Score. 4 Date. 5/22/2008 0:00 new product
Alteras Quartus II Software Version 8.0 Delivers Unprecedented ... Continuing its leadership position in design software performance and productivity, Altera Corporation (NASDAQ: ALTR) today announced its Quartus II software version 8.0, supporting the companys 40-nm Stratix IV FPGAs and HardCopy ASICs. This version of the Quartus II software delivers, on average, a full two-speed grade advantage and 3X faster compile times for high-end FPGAs when compared to the nearest competitors latest offering.... Web. http://www.altera.com/corporate/news_room/releases/products/nrquartusiiv8.html Score. 4 Date. 5/22/2008 0:00 new product XTech Introduces FMC Mounting System XTech, a leading manufacturer of mechanical solutions for circuit boards and embedded systems, today announced that it has launched its FMC (FPGA Mezzanine Card) mounting system. XTech's FMC system includes the new FMC bezel, gasket, and mating AMC faceplate solution in full-size or mid-size form factors, custom configured to specific application requirements. 'We found that, in the world Web. http://www.xtech-outside.com/news/articles/fmc041808.html Score. 4 Date. 5/16/2008 0:00 new product Actel Introduces IGLOO-Based Portable Control Solutions Further expanding its offerings for the portable market based on the industry's lowest power field-programmable gate array (FPGA), Actel Corporation has announced two plug-in daughter cards developed to manage human machine interface (HMI) and miniature motor control functionality. The new HMI Daughter Card and the Motor Control Daughter Card are offered as plug-ins to Actel's popular IGLOO Icicle Kit. Combined with the company's previously... Web. http://www.actel.com/company/press/2008/5/12/ Score. 5 Date. 5/12/2008 0:00 new product Green Hills Software Announces Support for Xilinx Virtex-5 FXT FPGAs Green Hills Software, Inc., the technology leader in device software optimization (DSO) and real-time operating systems (RTOS), has announced the availability of its software development solution targeting the Xilinx Virtex-5 FXT FPGAs with embedded PowerPC 440 processor blocks. Components of the Green Hills Software solution include the INTEGRITY real-time operating system, optimizing C/C++ compilers for Power Architecture, MULTI... Web. http://www.ghs.com/news/20080512_xilinx_virtex.html Score. 4 Date. 5/12/2008 0:00 new product New Release Of Lattice Fpga Design Tools Extends Performance And Productivity Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of its ispLEVER 7.1 FPGA design tool suite. The new tool release delivers a number of new functional and performance-enhancing features, including the industry's first dedicated FPGA Simultaneous Switching Output (SSO) Analyzer. The SSO Analyzer enables FPGA designers to actively analyze and optimize I/O pin placement and output switching...
Web. http://www.latticesemi.com/corporate/newscenter/productnews/2008/r080505newrel easeoffpgade.cfm?jsessionid=ba30fb633312w$E5$A4$ Score. 4 Date. 5/12/2008 0:00
Appendix C: FPGA Vendors

Vendors who actually make FPGAs are, of course, the center of the FPGA marketplace. This Appendix identifies the primary FPGA vendors with links to their websites for more information. Note: Rating information is a very rough indication of company size, frequency of news updates, and relevance to practical embedded systems designers.
APPENDIX C: FPGA VENDORS
APPENDIX C: FPGA VENDORS
Achronix Semiconductor Achronix delivers the worlds fastest Field Programmable Gate Arrays (FPGAs), enabling new, innovative, and high-performance designs. Leveraging picoPIPE acceleration technology, Achronix offers two principle product lines: a commercial line of FPGA devices named Speedster , operating at speeds near 1.5 GHz, and a specialized line of products operating near 350 MHz for high radiation and extreme temperature environments. With familiar... Web. http://www.achronix.com/ Score. 3 Actel Corporation As the leader in single-chip FPGAs, Actel Corporation offers Flash- and antifuse-based solutions that are live at power-up, low power, and highly secure. Actel also provides IP cores, including CoreMP7, its soft ARM7 core; design suites; programming tools; and design services. [Cores: 8051, ARM, CORTEX-M1, SPARC] Web. http://www.actel.com/ Score. 5 Altera Altera is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. As a leading supplier of FPGAs, CPLDs, structured ASICs and embedded processors, Altera combines programmable logic technology with design software, IP, and design services to offer designers high-value programmable solutions. Central to Altera's embedded solutions is the Nios II processor, a user-configurable, general-purpose RISC embedded processor, and... Web. http://www.altera.com/ Score. 4 Lattice Semiconductor Corporation Lattice Semiconductor Corporation provides the industry's broadest range of Programmable Logic Devices (PLD), including Field Programmable Gate Arrays (FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products. Web. http://www.latticesemi.com/ Score. 4 Xilinx Supplier of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support. [FPGA, PLD, Programmable Logic] Web. http://www.xilinx.com/ Score. 5
Appendix D: FPGA Tool Vendors

FPGA design is not easy, and so there are many companies that provide design tools to ease your design. This Appendix identifies the primary FPGA tools vendors with links to their websites for more information. Note: Rating information is a very rough indication of company size, frequency of news updates, and relevance to practical embedded systems designers.
APPENDIX D: FPGA TOOL VENDORS
Agility Design Solutions Inc. Agility speeds the development of signal processing algorithms offering complete solutions for algorithm acceleration, prototyping and implementation in both software and hardware. The solutions include Agilitys unique software technologies for MATLAB to C and C to FPGA synthesis and a rich portfolio of synthesizable algorithmic functions and FPGA hardware platforms. Agility completes the solutions with services delivered by a team of... Web. http://www.agilityds.com/ Score. 3 Aldec Inc. Industry-leader in electronic design and offers a patented technology suite including: design entry, HDL simulators, hardware-assisted verification, design rule checking, cosimulation, co-verification, IP Cores, DO-254 compliance tool sets and engineering specialty solutions. Aldec tools handle: Verilog, SystemVerilog, VHDL, SystemC, Assertions, ultra-fast debugging, code coverage and linting. [FPGA, ASIC, CPLD] Web. http://www.aldec.com/ Score. 5 Altium Altium is the industrys leading developer of unified electronic product development solutions that enable all electronic engineers, and their organizations, take maximum advantage of emerging design technologies to bring smarter products to market faster. Founded in 1985, Altium is headquartered in Sydney, Australia with sales offices in the United States, Europe, Japan, China, and resellers in all other major markets. [FPGA, PCB] Web. http://www.altium.com/ Score. 5
Blue Pearl Software, Inc. Innovative, high performance tools that generate accurate timing exception constraints automatically, before synthesis, validate existing timing exceptions and find functional problems in RTL code. Cobalt Timing Constraint Generation enables faster timing closure for complex chips. [ASIC, FPGA, EDA, RTL, Verilog, Timing, Linting] Web. http://www.bluepearlsoftware.com/ Score. 3 Byte Paradigm Provides PC-based instruments to test and debug electronic and embedded systems. Byte Paradigm focuses at providing hardware tools that enhance the engineer's productivity for system design, prototype functional validation and characterization and in-the-field support. Byte Paradigm products range features pattern generators, logic/state analyzers, protocol exercisers and analyzers, with a common target: offer flexible... [FPGA] Web. http://www.byteparadigm.com/ Score. 3 Concept Engineering Concept Engineering was, founded in 1990 to develop and market innovative schematic generation and viewing technology for use with logic synthesis, verification, test automation and physical design tools. The company's customers are primarily original equipment EDA tool manufacturers (OEMs), in-house CAD tool developers, semiconductor companies, IC/ASIC designers and FPGA designers. Concept Engineering's products deliver the fastest, highest... Web. http://www.concept.de/ Score. 3
CriticalBlue CriticalBlue delivers Cascade, an embedded system design tool that synthesizes optimized programmable coprocessors to accelerate embedded software within FPGAs, structured ASICs and platform SoCs. Cascade analyzes executable software code to identify functions to be offloaded from the main processor onto a coprocessor. Web. http://www.criticalblue.com/ Score. 3 Dynalith Systems Co., Ltd. Dynalith Systems provides innovative verification solutions that include functional & behavioral level verification, cost-effective HW accelerator, and virtual prototyping: iNTUITION for prototyping and acceleration, iPROVE for acceleration and virtual prototyping, and iTUTOR and iNCITE for education/training. WIth these solutions, design in FPGA can be run along with HDL simulator, high-level language (C/C++, SystemC, Matlab, Simulink)... Web. http://www.dynalith.com/ Score. 3 EVE (Emulation and Verification Engineering) EVE offers ZeBu, a high-performance verification platform for ASIC, FPGA, IP, and Embedded Systems. Designed around a pioneering hardware-assisted architecture to debug hardware and validate software of SoC designs of 1 to 100 millions ASIC gates, ZeBu supports interactive read/write internal access to the design without compiling internal probes, co-verification with a HDL/C/C++ test benches at signal and transaction level up to 12MHz. . . Web. http://www.eve-team.com/ Score. 3 GateRocket, Inc. GateRocket offers the industrys first Device Native verification solution for Field Programmable Gate Arrays (FPGAs). This product can cut in half the time it takes to develop the electronic products that enrich our lives every day. As FPGAs become larger and ever more complex, electronic design engineers face a crisis in their inability to adequately verify and test these advanced designs. GateRocket provides a new, Device Native... Web. http://www.gaterocket.com/ Score. 3 Impulse Accelerated Technologies, Inc. Impulse leads the market in C-to-FPGA tools and development services. Compatible with standard C environments, Impulse C allows software developers to rapidly move C applications to FPGA coprocessors, including partitioning, optimization, and FPGA hardware generation. Interconnections between FPGA coprocessors and host processors are generated automatically for individual FPGAs, FPGA/uP coprocessing and clusters. Web. http://www.impulsec.com/ Score. 3 Mentor Graphics Corporation Mentor Graphics is a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. [FPGA, ASIC, Embedded, RTOS, PCB]
Web. http://www.mentor.com Score. 5 Mirabilis Design VisualSim enables quick performance analysis, power evaluation and architecture exploration for the design of electronics and real-time software. VisualSim is used for designing Large Complex Systems, ICs, Processors, FPGA, Real-Time Software and Network Systems. VisualSim is a graphical modeling and simulation environment. Models of the proposed system are constructed by engineers in VisualSim using parameterized modeling library and... Web. http://www.mirabilisdesign.com/ Score. 3 National Instruments National Instruments builds on industry-standard technology to create real-time, embedded solutions. NI customers can deterministically acquire data and then analyze and present their results across their enterprise or across the Internet using the networked measurement capabilities of NI LabVIEW, a leading graphical programming environment for measurement and automation applications. [data acquisition, test and measurement, FPGA] Web. http://www.ni.com/ Score. 5 Orange Tree Technologies Ltd Orange Tree Technologies are leaders in hardware and software products and design services for the high performance embedded computing markets. We are specialists in high speed digital design including the use of programmable logic (FPGAs and CPLDs) for digital signal processing. [VHDL, Verilog, Xilinx, PCI, PMC and USB] Web. http://www.orangetreetech.com/ Score. 3 Samplify Systems Samplify's high-speed FPGA-based compression dramatically improves system performance, reduces design complexity, and lowers system cost. Samplify's portfolio of patented algorithms compress and decompress signals in real time with lossless, fixedrate, and fixed-quality options. Samplify breaks data transfer and storage bottlenecks across a wide-range of embedded applications including COTS, military, medical imaging, homeland security,... Web. http://www.samplify.com/ Score. 3 Synfora Synfora, Inc. is the premier provider of algorithmic synthesis tools used to design complex systems-on-chips (SoCs) and FPGAs. Synfora's technology helps to reduce design costs, dramatically speed chip development, and reduce time-to-market. Synfora serves customers worldwide in the audio, video, imaging, wireless, and security segments of the integrated circuit (IC) design market. The company's investors are ATA Ventures, Foundation... Web. http://www.synfora.com/ Score. 3 Synplicity, Inc. Innovative synthesis, verification, and physical implementation software solutions for designers of programmable logic, ASICs, Structured / Platform ASICs, and SoCs. The industry's most widely used FPGA synthesis solution, Synplify Pro uses a true timing-
driven approach to synthesis. All products support industry-standard design languages (VHDL and Verilog) and run on most popular computing platforms. Web. http://www.synplicity.com/ Score. 4 Taray Inc. Taray is an innovative provider of cutting edge EDA tools and design services to the FPGA design community. Since its inception in 2002, Taray has focused on solving FPGA and board design problems critical to the success of its customers. Its flagship Memory Interface Generator tool for FPGAs has been successfully integrated in the Xilinx [PCB Design] Web. http://www.tarayinc.com/ Score. 3 Tektronix, Inc. Tektronix, Inc. is a test, measurement and monitoring company providing measurement solutions to the telecommunications, computer and semiconductor industries worldwide. Tektronix enables its customers to design, build, deploy and manage next-generation global communications networks and Internet technologies. [oscilloscopes, probes, logic analyzers, mobile protocol analyzers, spectrum analyzers. FPGA test and debug] Web. http://www.tektronix.com/ Score. 4 Temento Systems S.A. Temento Systems S.A.is an innovative provider of Test, Debug and Verify Solutions for FPGA, System On Chip (SoC), Boards and Hardware Platforms. Temento Systems products are used by different functional teams (Development, Industrialization, Manufacturing, Maintenance) and in major companies from various industrial sectors worldwide : Semi-conductor, Telecommunications, Consumer Electronics, Computer, Automotive, Aerospace. Web. http://www.temento.com/ Score. 3 The Mathworks Developer of technical computing and Model-Based Design software for engineers and scientists in industry, government, and education. With an extensive product set based on MATLAB and Simulink, The MathWorks provides software and services to solve challenging problems and accelerate innovation in automotive, aerospace, communications, financial services, biotechnology, electronics, instrumentation, process, and other ... [FPGA, EDA] Web. http://www.mathworks.com/ Score. 5 Trango Virtual Processors Designed for security and real-time performance, TRANGO's secure virtualization solution enables silicon vendors and OEMs to securely and simultaneously run multiple operating systems and applications on both single and multi core platforms. This allows them to: Integrate a rich OS like Windows CE or Linux into existing products Isolate proprietary code and drivers from GPL licensed code Secure and certify critical components... Web. http://www.trango-vp.com/ Score. 3
Appendix E: FPGA Board Vendors

FPGAs are frequently employed directly in boards. Sometimes these are deployable boards, and other times they are used for ASIC prototyping. This Appendix identifies FPGA board vendors with links to their websites for more information. Note: Rating information is a very rough indication of company size, frequency of news updates, and relevance to practical embedded systems designers. You can also search the eg3.com online database which has complete, up-to-date company listings at http://www.eg3.com/411.
APPENDIX E: FPGA BOARD VENDORS
Acromag, Inc. Acromag provides measurement and control solutions. Embedded I/O boards include VME, PCI, CompactPCI, Industry Pack, and PMC I/O modules. Process instruments include signal conditioners, transmitters, isolators, and alarms. Our fieldbus solutions support Ethernet, Profibus, Modbus, HART, and LonWorks I/O networks. Web. http://www.acromag.com/ Score. 5 ACT/Technico ACT/Technico is a leading supplier of integrated real-time and embedded systems using CompactPCI, VMEbus, mezzanine form factora and other platforms. We support several RTOS, Linux and Windows. ACT/Technico is also a manufacturer and reseller of realtime and embedded hardware and software such as PMC modules, CompactPCI Adapters and Mass Storage modules. [FPGA, I/O Solutions, rugged] Web. http://www.acttechnico.com/ Score. 3 BittWare, Inc. For almost two decades, BittWare has been the leading designer and manufacturer of ruggedizable and commercial, hybrid (FPGA+DSP) and FPGA-computing, digital signal processing board-level solutions. Based on Alteras line of high-density FPGAs, Analog Devices' line of floating-point DSPs, and TI's DSPs, BittWare's products provide innovative COTS and application-specific solutions for high-performance, real-time signal processing and I/O... Web. http://www.bittware.com/ Score. 4 CommAgillity CommAgility is a designer and manufacturer of DSP and FPGA based cards for OEMs in the telecomms market. The founders have all earned their pedigree at Loughborough Sound Images/ Blue Wave Systems/ Motorola and have vast experience in this field. Our products are based on a combination of the latest industry standards and technologies, including: AdvancedMC for MicroTCA and ATCA Texas Instruments DSP and Xilinx FPGA technology... Web. http://www.commagility.com/ Score. 3 Digilent Inc. Design Resources for Digital Engineers Digilent products are used in hundreds of academic and industrial settings worldwide. All of our products come with a rock-solid guarantee, and our support materials and fast response customer service can help anyone get up and going. Tour our catalog to see our full range of products. Programmable Logic [FPGA, Embedded Control] Web. http://www.digilentinc.com/ Score. 3 FPGA Systems, Inc. FPGA Systems, Inc. offers programmable logic embedded modules featuring the latest FPGA and CPLD devices from Altera and Xilinx. Our modules enable engineers to quickly adopt to the growing market of programmable logic. We do not obsolete our modules so you can be confident of your design-in choice. We offer both low cost and high performance modules. Custom designs are also available. Web. http://www.fpgasystems.com/ Score. 3
Gidel
GiDEL provides powerful development tools and universal FPGA platforms for systems, ASIC prototyping and algorithm development. GiDEL's high productivity software tools complement high-performance PCI boards and stand-alone boards that offer outstanding cost/performance advantages. GiDEL PROC FPGA boards are used as critical part of vision, imaging, DSP, pattern matching machines and systems. Hardware: Meeting your cost performance... Web. http://www.gidel.com/ Score. 3
Hunt Engineering Powerful signal processing solutions from Hunt Engineering using FPGA and DSP. Modular systems for PCI/cPCI/USB based and embedded use, high performance and designed for real-time. Systems are programmable and reconfigurable, using common APIs for compatibility and complete flexibility, IP & examples included. Configure your custom system using modules with Xilinx Virtex FPGA with I/O & SDRAM options and TMS320C6000 DSP in any combination. Web. http://www.hunt-dsp.com/ Score. 3 Innovative Integration Innovative Integration provides state-of-the-art, applied, data acquisition and digital signal processing solutions to a wide spectrum of industries. Products cover the full spectrum of real-time systems: PC-based real-time data acquisition, DSP-based signal processing and hardware-assisted (FPGA) signal processing. Custom designs are offered to OEM seeking an optimum price/performance balance. Platforms supported: PCI, CPCI, PXI [C++] Web. http://www.innovative-dsp.com/ Score. 5 Lyrtech Inc. Since its foundation in 1983, Lyrtech has become a benchmark in digital signal processing, using an innovative approach combining DSP and FPGA on the same development boards. These boards are used in audio , education, medicine, MIMO and smart antenna, optics, research, software-defined radio, telecommunications, video, wireless communications, and defense and aerospace. Web. http://www.lyrtech.com/ Score. 3 MEN Micro, Inc. Products CompactPCI/Express VMEbus System-On-Modules Busless & Stand-Alone PC/104 I/O Boards Systems & Components PMC, XMC, PCMIP M-Module Mezzanines Product Catalogs Technologies Intel Processors PowerPC Processors Fieldbus Networks Analog & Binary I/O User I/O in FPGA Rugged Electronics Web. http://www.menmicro.com/ Score. 4 Mercury Computer Systems, Inc. Mercury provides COTS embedded computing boards/systems for data-intensive applications in defense/military, telecom, semiconductor, EDA, and homeland security. Proponent of open industry hardware/software standards - AdvancedTCA (ATCA), APIs, CompactPCI, Linux, MicroTCA, Middleware, RapidIO, VME, VPX, VPX-REDI, VXS, and 10GE - that enable innovation and interoperability, and promote ease of application development, portability and scalability. Web. http://www.mc.com/
Score. 3 Nallatech Nallatech is a technology leader in FPGA technology and high performance reconfigurable computers. Building on the worldwide success of its award-winning modular standard, DIME, Nallatech's product line allow users to harness the full capability of advanced FPGAs for DSP, Real-Time Imaging, Scientific Computing, Simulation and Modelling, and Aerospace and Defence applications. Web. http://www.nallatech.com/ Score. 3 National Instruments National Instruments builds on industry-standard technology to create real-time, embedded solutions. NI customers can deterministically acquire data and then analyze and present their results across their enterprise or across the Internet using the networked measurement capabilities of NI LabVIEW, a leading graphical programming environment for measurement and automation applications. [data acquisition, test and measurement, FPGA] Web. http://www.ni.com/ Score. 5 Orange Tree Technologies Ltd Orange Tree Technologies are leaders in hardware and software products and design services for the high performance embedded computing markets. We are specialists in high speed digital design including the use of programmable logic (FPGAs and CPLDs) for digital signal processing. [VHDL, Verilog, Xilinx, PCI, PMC and USB] Web. http://www.orangetreetech.com/ Score. 3 Pentek Powerful VME, PMC, XMC, PCI and cPCI boards and development system platforms for data acquisition, software radio and DSP featuring the C6000 DSP, G4 PowerPC and Xilinx FPGAs. Data acquisition line is extensive and includes A/D's, D/A's, digital receivers and upconverters, digital I/O and more. Pentek equips products with highspeed interfaces including Serial Rapid IO, VXS and FPDP and offers strong software development tools. . . Web. http://www.pentek.com/ Score. 5 Pico Computing, Inc. Pico Computing designs and manufactures deployable development FPGA solutions in small form factor (Compact Flash, CardBus, ExpressCard). Products are based on the Virtex-4 series of FPGA's and can be used as an embedded device or stand alone. Applications: Cryptography, Embedded Processor, DSP, Software-Defined Radio (SDR), size and weight constrained environments, Encryption/Decryption. Pico also provides consulting engineering services. Web. http://www.picocomputing.com/ Score. 3 Red Rapids Red Rapids supplies products and services to the high performance signal processing and data communication markets. The company specializes in wireless applications with product offerings in FPGAs, RF converters, digital transceivers, signal recorders, and software defined radio components for embedded, desktop and notebook computers. These products are available in VME, CPCI, PCI, PMC, and CardBus formats.
Web. http://www.redrapids.com/ Score. 3 Signalogic, Inc. Signalogic designs, develops, manufactures, and markets OEM and off-the-shelf embedded systems for voice, video, wireless, control system, audio/acoustic, automation, and data acquisition applications. Products include hardware (board level), software, logic, and real-time algorithms. Many of the company's products involve in some way DSP and FPGA software and hardware, for example Texas Instruments VoIP, video, and wireless chipsets and... Web. http://www.signalogic.com/ Score. 3 Sundance Digital Signal Processing Inc. Sundance leads the world in the design and manufacture of mixed COTS digital signal processing and FPGA architectures. Sundance modular and customisable COTS hardware and software systems are easy to reconfigure to suit all high-speed I/O and signal processing applications, enabling the rapid prototyping and development of embedded systems. Designers and manufacturers of wireless infrastructures, satellite communications, industrial... Web. http://www.sundance.com/ Score. 4 Technologic Systems Technologic Systems produces rugged PC/104 Single Board Computers, based on ARM and x86 processors, and PC104 Peripheral Boards. Our products enable a wide range of embedded applications, including real-time,2 Wi-Fi, CAN bus, GSM & CDMA modems, and DAQ. Our Linux FPGA embedded platform enables hardware/software codesign and custom core development. We support the open-source vision with full documentation, and our software solution... Web. http://www.embeddedarm.com/ Score. 4 TEK Microsystems, Inc. TEK Microsystems, Inc. designs, manufactures and markets a wide range of advanced high-performance FPGA based sensor I/O processing products for embedded real-time computing systems. The comprehensive product line includes advanced ADC/DAC interfaces, complete data acquisition and data recording/storage systems, digital I/O XMC/PMC modules as well as advanced signal processing systems. These products are used in real-time systems... Web. http://www.tekmicro.com/ Score. 4 Trenz Electronic Trenz Electronic develops, manufactures and supplies embedded products for industrial applications. FPGA-Boards [shop] ARM CPU Modules [shop] M2M (machine-tomachine), GSM / GPS [shop] Serial Communication [shop] Digital IO (level shift) [shop] Web. http://www.trenz-electronic.de/ Score. 3 VMETRO, Inc. VMETRO provides COTS board- and system-level embedded computer products from development to deployment for applications in Aerospace & Defense, Industrial, Communications, Medical, Enterprise Computing and Network Storage. Embedded Computing products include high-performance Signal & FPGA Processing,
Analog/Digital/Fiber-Optic IO, and Buffer Memory. Other products include Data Recorders, Protocol Analyzers and Network Storage devices. Web. http://www.vmetro.com/ Score. 5 WDL Systems WDL Systems distributes a full line of Single Board Computers, PC/104 and PC/104-Plus CPU Boards, PC/104 Add-on Boards, PC/104 Peripherals, PC/104 FPGA Products, PC/104 Enclosures, PC/104 CPU Modules, Flash Solutions, Power Solutions, Embedded Modems, Embedded PCs (including the eBox), Embedded Software, Alphanumeric Displays, Frame Grabbers, and more. WDL Systems distributes the latest technology to provide customers with... Web. http://www.wdlsystems.com/ Score. 3
Appendix F: FPGA / DSP Vendors

One of the most common application areas for FPGAs is DSP. This Appendix identifies vendors that concentrate in FPGAs in the DSP area with links to their websites for more information. Note: Rating information is a very rough indication of company size, frequency of news updates, and relevance to practical embedded systems designers.
APPENDIX F: FPGA / DSP VENDORS
Berkeley Design Technology, Inc. (BDTI) Independent technology analysis firm that serves the embedded processing industry with performance-oriented benchmarks, consulting, and engineering services for chips, software, and algorithms. BDTI also provides its customers with world-class, specialized engineering services in design consulting and software optimization. [DSP, FPGA] Web. http://www.BDTI.com/ Score. 5 BittWare, Inc. For almost two decades, BittWare has been the leading designer and manufacturer of ruggedizable and commercial, hybrid (FPGA+DSP) and FPGA-computing, digital signal processing board-level solutions. Based on Alteras line of high-density FPGAs, Analog Devices' line of floating-point DSPs, and TI's DSPs, BittWare's products provide innovative COTS and application-specific solutions for high-performance, real-time signal processing and I/O... Web. http://www.bittware.com/ Score. 4 CommAgillity CommAgility is a designer and manufacturer of DSP and FPGA based cards for OEMs in the telecomms market. The founders have all earned their pedigree at Loughborough Sound Images/ Blue Wave Systems/ Motorola and have vast experience in this field. Our products are based on a combination of the latest industry standards and technologies, including: AdvancedMC for MicroTCA and ATCA Texas Instruments DSP and Xilinx FPGA technology... Web. http://www.commagility.com/ Score. 3 Hunt Engineering Powerful signal processing solutions from Hunt Engineering using FPGA and DSP. Modular systems for PCI/cPCI/USB based and embedded use, high performance and designed for real-time. Systems are programmable and reconfigurable, using common APIs for compatibility and complete flexibility, IP & examples included. Configure your custom system using modules with Xilinx Virtex FPGA with I/O & SDRAM options and TMS320C6000 DSP in any combination. Web. http://www.hunt-dsp.com/ Score. 3 Innovative Integration Innovative Integration provides state-of-the-art, applied, data acquisition and digital signal processing solutions to a wide spectrum of industries. Products cover the full spectrum of real-time systems: PC-based real-time data acquisition, DSP-based signal processing and hardware-assisted (FPGA) signal processing. Custom designs are offered to OEM seeking an optimum price/performance balance. Platforms supported: PCI, CPCI, PXI [C++] Web. http://www.innovative-dsp.com/ Score. 5 Lyrtech Inc. Since its foundation in 1983, Lyrtech has become a benchmark in digital signal processing, using an innovative approach combining DSP and FPGA on the same development boards. These boards are used in audio , education, medicine, MIMO and smart antenna, optics, research, software-defined radio, telecommunications, video, wireless communications, and defense and aerospace. Web. http://www.lyrtech.com/ Score. 3
Pentek Powerful VME, PMC, XMC, PCI and cPCI boards and development system platforms for data acquisition, software radio and DSP featuring the C6000 DSP, G4 PowerPC and Xilinx FPGAs. Data acquisition line is extensive and includes A/D's, D/A's, digital receivers and upconverters, digital I/O and more. Pentek equips products with highspeed interfaces including Serial Rapid IO, VXS and FPDP and offers strong software development tools. . . Web. http://www.pentek.com/ Score. 5 RF Engines Ltd (RFEL) RF Engines Limited (RFEL) is an innovative electronics design and IP (Intellectual Property) company specialising in the development of high performance digital signal processing (DSP) techniques and the development of new products for the high-growth markets of wireless communications, government services and defence. High performance signal processing building blocks for FPGA design. Including FFTs, Polyphase DFTs,... Web. http://www.rfel.com/ Score. 3 Signalogic, Inc. Signalogic designs, develops, manufactures, and markets OEM and off-the-shelf embedded systems for voice, video, wireless, control system, audio/acoustic, automation, and data acquisition applications. Products include hardware (board level), software, logic, and real-time algorithms. Many of the company's products involve in some way DSP and FPGA software and hardware, for example Texas Instruments VoIP, video, and wireless chipsets and... Web. http://www.signalogic.com/ Score. 3 Sundance Digital Signal Processing Inc. Sundance leads the world in the design and manufacture of mixed COTS digital signal processing and FPGA architectures. Sundance modular and customisable COTS hardware and software systems are easy to reconfigure to suit all high-speed I/O and signal processing applications, enabling the rapid prototyping and development of embedded systems. Designers and manufacturers of wireless infrastructures, satellite communications, industrial... Web. http://www.sundance.com/ Score. 4 4DSP 4DSP offers high-availability, scalable systems for intensive Digital Signal Processing applications such as digital recorders and software defined radio development platforms. Aimed towards more efficient processing and easier control, our wide range of DSP software libraries and our new IP cores for FPGA power our systems and deliver unmatched performances. The innovative solutions we deliver to our customers are one of the keys to their... Web. http://www.4dsp.com/ Score. 3
Appendix G: FPGA Misc. Vendors

Some companies research the FPGA marketplace, while others provide unusual products or services. This Appendix identifies miscellaneous vendors of importance to FPGAs with links to their websites for more information. Note: Rating information is a very rough indication of company size, frequency of news updates, and relevance to practical embedded systems designers.
APPENDIX G: FPGA MISC. VENDORS
APPENDIX G: FPGA MISC.
Berkeley Design Technology, Inc. (BDTI) Independent technology analysis firm that serves the embedded processing industry with performance-oriented benchmarks, consulting, and engineering services for chips, software, and algorithms. BDTI also provides its customers with world-class, specialized engineering services in design consulting and software optimization. [DSP, FPGA] Web. http://www.BDTI.com/ Score. 5 Emulation Technology ET offers a range of products including BGA socket systems, QFN/MLF test sockets, MICTOR test accessories, spring-probe test clips, programming adapters, prototyping adapters, ASIC and FPGA development systems, wireless products, high speed board to board interconnects as well as soldering iron systems and other lab and rework accessories. Web. http://www.emulation.com/ Score. 3 Intellitech Corporation Using a unique business model, Intellitech Corporation develops and licenses advanced Intellectual Property (IP) for efficient configuration, debug and test of electronic products including SoC (System-on-a-Chip), ICs, PCBs and Systems. The proprietary IP provides a scalable configuration, debug, and test infrastructure that enables customers to build high quality self-testable and in-the-field re-configurable products. [JTAG, FPGA] Web. http://www.intellitech.com/ Score. 3 Logic Product Development Service and Embedded Product Solutions (EPS) provider capable of propelling your ideas to successful, market-defining products. Products include development kits; productready single-board computers, based on 32-bit RISC processors; and board support packages for Windows CE and Linux. Also offer FPGA/DSP and PCB design and layout. [ARM, ColdFire, PowerQICC, SuperH, x86, xScale, COM Express, System-on-module, Computer-on-module] Web. http://www.logicpd.com/ Score. 4 Microtronix Microtronix, experts in Datacom, embedded Linux and FPGA design, provides quality products and innovative design solutions to world-class companies. For either off the shelf products or fully customized design solutions, Microtronix works with our customers to supply the best design fit for each application. All of our solutions are fully supported with a first class level of technical support by a dedicated team of knowledgeable specialists. Web. http://www.microtronix.com/ Score. 3 Technically-Speaking Inc. Welcome to Technically-Speaking Inc., the premier training organization for VHDL Verilog, Xilinx and related EDA tools. Training provider for VHDL, Verilog, and FPGA design language learning. Technically Speaking offers multimedia HDL courses, course development and on-site delivery of training for digital designers. [FPGA Training] Web. http://www.technically-speaking.com/ Score. 3
ENDORS
APPENDIX G: FPGA MISC.
Tekmos Specializing in obsolescence solutions. If your semiconductor is being end-of-lifed by the original manufacturer, or will be soon, then Tekmos can be of assistance. Our complete product line is: 8051 Microcontrollers - Tekmos has developed an 8051 core that can be used to replace many variations of the 8051 microcontroller. Some of the 8051s that we support are the NXP S87C751/S83C751, [FPGA, ASIC] Web. http://www.tekmos.com/ Score. 3
ENDORS
Appendix H IP for FPGAs

Intellectual Property or IP is one of the most attractive features of FPGAs. Most developers create their own, but also use IP from the major FPGA vendors as well as open source and third party IP. Here are major third party IP companies offering IP into the FPGA space - but be sure to check each FPGA vendor as well Note: Rating information is a very rough indication of company size, frequency of news updates, and relevance to practical embedded systems designers.
APPENDIX G: IP FOR FPGAS
APPENDIX H: IP
Cambridge Consultants Cambridge Consultants is a leading technology and innovation company, renowned for its ability to solve technical problems and provide creative, practical solutions to business issues. They offer an extensive library of analogue, digital, mixed-signal and wireless IP cores together with embedded software development tools, protocol stacks and design platforms for ASIC and FPGA. Our IP cores are portable and flexible, and can be... [Bluetooth] Web. http://www.cambridgeconsultants.com/ Score. 3 CAST, Inc. CAST develops and supports over 100 different popular and standards-based IP cores, including 8051s, H.264, PCI Express, AES, and even complete platforms for ARM-based SoCs (see menu to the left). With fifteen years of experience and hundreds of successful customers, we know how to deliver IP that works. Our complete, high-quality cores are ready for implementation in custom or structured ASICs or in FPGAs, and our worldwide team with a... Web. http://www.cast-inc.com/ Score. 4 Eureka Technology Inc. Eureka Technology is a leading intellectual property (IP) provider for ASIC and FPGA and SoC designs. The company offers a wide range of fully synthesizable, silicon-proven system core logic functions and peripheral functions to support different bus standards and CPU interfaces, including PCI, PCI-X, PCI Express, Cardbus, PowerPC, ARM, MIPS, ARC, SH2/3/4, SDRAM, DDR/DDR2 SDRAM, NAND Flash, Flash/SRAM/EEPROM, SD memory, SDIO, CompactFlash... Web. http://www.eurekatech.com/ Score. 3 Evatronix S.A. Evatronix develops electronic virtual components (IP cores) along with complementary software and supporting development environments. and offers electronic design services. The company is also a leading value added reseller of CAD & EDA systems in Poland. Evatronix IP cores are available worldwide through the sales channels of its strategic distribution partner CAST, Inc. (New Jersey, USA). In the EU countries (excluding UK) and in... Web. http://www.evatronix.pl/ Score. 3 PLDA The World's largest PCI IP core vendor (Gartner, 2005), PLDA designs and sells a wide range of FPGA and ASIC interfacing solutions for the PCI and derivative markets (PCI Express, PCI-X, CompactPCI, and PC104/PC104+). We provide complete solutions to a global market, including IP cores, hardware, software, consulting services, and comprehensive technical support provided directly by the IP designers. Profitable since its inception in... Web. http://www.plda.com/ Score. 4 RF Engines Ltd (RFEL) RF Engines Limited (RFEL) is an innovative electronics design and IP (Intellectual Property) company specialising in the development of high performance digital signal processing (DSP) techniques and the development of new products for the high-growth markets of wireless communications, government services and defence. High
FOR
FPGAS
APPENDIX H: IP
performance signal processing building blocks for FPGA design. Including FFTs, Polyphase DFTs,... Web. http://www.rfel.com/ Score. 3
FOR
FPGAS
Appendix I: FPGA Design Services

Design Services companies are new to the FPGA Insiders Guide. Many engineers and project managers, however, are looking for ways to outsource all or part of their FPGA design. Here are major design companies offering FPGA expertise. Be sure to check http://www.eg3.com/connect for a complete listing. Note: Rating information is a very rough indication of company size, frequency of news updates, and relevance to practical embedded systems designers.
APPENDIX I: FPGA DESIGN SERVICES
Anidea Engineering, Inc. Anidea Engineering, Inc., is a full-service embedded hardware and software design consulting firm. We create micro controller, microprocessor and FPGA-based product platforms for a wide range of industries. Our areas of expertise include 'Proof-of-Concept' engineering and product development for both new products and reengineering designs. We also leverage our alliances to get the job done. Anideas approach to each project involves... Web. http://www.anidea-engineering.com/ Score. 4 Attodyne As an Actel Solution Partner, Attodyne licenses IP cores relating to the processing, transmission, distribution, and display of video data. Attodynes design experience and capabilities span from ultra-low noise analog circuits to 4 Gbps fiber optic communications; however, video-related FPGA work is its primary focus. In addition to licensing IP cores, Attodyne also offers reference designs, prototypes, design consultation, and product... Web. http://www.attodyne.com/ Score. 5 Bils Technology Bils Technology is a company specializing in design services consulting. Areas of expertise include embedded processors, circuit-card design, FPGA/digital logic design, firmware development, and windows application programming. Completed successful customer designs incorporating MC68360, MC68302, MPC860 processors and controllers. Provide turn-key prototype and small production of custom circuit designs. Perform in-house board layout and... Web. http://www.bilstech.com/ Score. 4 Dynazign A North Carolina corporation, to provide circuit design, product packaging and board layout services for the medical and telecommunications markets. Since then Dynazign has expanded its offerings to include ASIC and FPGA, electronic system design, firmware, software, and production management services. In addition to new product development and technology migration, Dynazign also specializes in quick-turn and 'rescue' projects. While our... Web. http://www.dynazign.com/ Score. 4 Innovative Logic Innovative Logic is a technology services company delivering the most cost-effective and reliable design services in ASIC, FPGA, Embedded Systems. Innovative Logic has a world class team of engineers who have successfully executed different projects using the latest tools and the technologies. Innovative Logic's InnoASIC revolutionary business model provides low cost, low risk solutions that help our customers to reduce time to market... Web. http://www.inno-logic.com/ Score. 4 Ishnatek Ishnatek offers FPGA Design and hardware prototyping services including Design and Verification Services for embedded solutions. The company offers IP's such as 8031, RTC, Timers, Enhanced PWM, UART/SIO/IrDA, I2C, LED Driver and Key scan, Parallel Port, ECP/EPP etc, which can be building blocks for your embedded controller solutions. Web. http://www.ishnatek.com/ Score. 4
Logic Product Development Service and Embedded Product Solutions (EPS) provider capable of propelling your ideas to successful, market-defining products. Products include development kits; productready single-board computers, based on 32-bit RISC processors; and board support packages for Windows CE and Linux. Also offer FPGA/DSP and PCB design and layout. [ARM, ColdFire, PowerQICC, SuperH, x86, xScale, COM Express, System-on-module, Computer-on-module] Web. http://www.logicpd.com/ Score. 4 Octera Corporation Octera Corporation is a Design Services company located in San Diego, California with staff in Massachusetts, Calgary, Minnesota, Phoenix and Orange County. We work with customers across the US and Canada and as far afield as Japan and China. Octera offers predominantly FPGA, ASIC and structured ASIC design, with supporting PCB design services as required. We partner very closely with specific semiconductor vendors as we find that such a... Web. http://www.octera.com/ Score. 4 Plextek Plextek is a Cambridge based electronics design house, specialising in product and systems design for communications, automotive, aerospace, defence and medical applications. Specific skills include RF, microwave, radar, software, DSP, FPGA, MMIC, optoelectronics. Web. http://www.plextek.com/ Score. 4 SoC Solutions SoC Solutions provides solutions for Microprocessor based FPGAs, ASICs, ASSP, and Structured ASICs. We offer solutions for ARM, Tensilica, ARC, 8051 and other Microprocessor based SOCs. Our soft core HDL designs include PiP-AMBA Preintegrated IP Platforms, AMBA Peripherals, AMBA Bus Cores and the software drivers to go with them. CAST, a leading supplier of Reusable IP, sells our Cores, Software and Development System products. Thank... Web. http://www.socsolutions.com/ Score. 4 Sysacom R&D plus inc. Sysacom develops custom electronic circuits and systems and related components. Sysacom's business is about developing electronic circuit schematic, printed circuit board (PCB) layout, field programmable gate array (FPGA) development, digital signal processing (DSP) system development, embedded software and Internet connectivity machine to machine (M2M). We work with you on electronic circuit design, PCB design, FPGA design, software... Web. http://www.sysacom.ca/ Score. 4 Tata Elxsi Tata Elxsi is the embedded product design arm of the Tata Group, one of Indias biggest conglomerates. Since its incorporation in 1989, Tata Elxsi has built strong competencies across the product design lifecycle in verticals such as automotive, storage, consumer electronics, media, scientific instrumentation, semiconductors, and networking &
communication. Tata Elxsis 2500 plus strong and multi-faceted team provides VLSI, FPGA, ASIC... Web. http://www.tataelxsi.com/ Score. 4 VXL eTech VXL eTech provide end-to-end services for product design, development and low/medium volume manufacturing in the embedded space. VXL eTech is a single source for both hardware and software engineering expertise. The scope of services include electronics printed board design (digital and analog designs), developing the firmware (DSP, CPLD, FPGA PROGRAMMING), user interface software development, design and develop the mechanical/plastic... Web. http://www.vxletech.com/ Score. 4 Wipro Technologies Wipro is an Information Technology Solutions Provider. Be it IT Services that empower the enterprise, Product Design Services to realize your R&D vision or Business Process Outsourcing for end-to-end remote processing services, Wipro offers a full service portfolio to match all your outsourcing needs. [FPGA, ASIC, ARM] Web. http://www.wipro.com/ Score. 5 Xelic Xelic is a leading provider of state-of-the-art Electronic Engineering Solutions and Network IP targeted for ASIC and FPGA designs. Xelic offers services in the areas of ASIC/FPGA design, circuit board design, and microprocessor firmware. In addition, we provide standards based cores to allow our customers the ability to focus on their proprietary Intellectual Property (IP) development. Web. http://www.xelic.com/ Score. 4

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Contents

FPGAS, TOOLS, AND BOARDS: CONTENTS DECEMBER 1, 2008

BOARDS: TABLE OF CONTENTS

COPYRIGHT, DISCLAIMER, LICENSE AGREEMENT

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The FPGA Ecosystem

FPGAS, BOARDS, AND TOOLS: THE FPGA ECOSYSTEM

BOARDS: THE FPGA ECOSYSTEM

WHO THIS GUIDE IS FOR

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INTERNET TOUR & OVERVIEW: WHY FPGAS?

BOARDS: THE FPGA ECOSYSTEM

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BOARDS: THE FPGA ECOSYSTEM

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BOARDS: THE FPGA ECOSYSTEM

FPGA LEARNING SITES ON THE INTERNET

BEST FPGA PORTALS AND WEBSITES

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BOARDS: THE FPGA ECOSYSTEM

BASIC OVERVIEWS AND ONLINE TUTORIALS

NEW & RECOMMENDED BOOKS

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BOARDS: THE FPGA ECOSYSTEM

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BOARDS: THE FPGA ECOSYSTEM

FPGA VENDOR EDUCATION SITES: HIDDEN GEMS

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BOARDS: THE FPGA ECOSYSTEM

DISTRIBUTORS: ANOTHER HIDDEN GEM

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FPGA TOOL VENDORS: A THIRD SOURCE OF FPGA EDUCATION

BOARDS: THE FPGA ECOSYSTEM

THE FPGA ECOSYSTEM

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BOARDS: THE FPGA ECOSYSTEM

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BOARDS: THE FPGA ECOSYSTEM

Tools from FPGA Vendors ___________________________________________________________

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BOARDS: THE FPGA ECOSYSTEM

FPGA TOOLS: THIRD PARTY OFFERINGS

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BOARDS: THE FPGA ECOSYSTEM

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BOARDS: THE FPGA ECOSYSTEM

FPGA INTELLECTUAL PROPERTY (IP)

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BOARDS: THE FPGA ECOSYSTEM

IP from FPGA Vendors ___________________________________________________________

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BOARDS: THE FPGA ECOSYSTEM

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BOARDS: THE FPGA ECOSYSTEM

FPGA DEVELOPMENT OR EVALUATION BOARDS

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BOARDS: THE FPGA ECOSYSTEM

FPGA BOARDS FOR ASIC PROTOTYPING

FPGA DEPLOYMENT BOARDS

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BOARDS: THE FPGA ECOSYSTEM

FPGA DEPLOYMENT BOARDS: DSP

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