Indirect Control for Cascaded H-bridge Rectifers

with Unequal Loads

A. Marzoughi and . Iman-Eini
School of Electrical and Computer Engineering
University of Tehran
Tehran, Iran
a.marzoughi@ut.ac.ir , imaneini@ut.ac.ir
HbSIrdcI - In this
p
a
p
er, an indirect control strategy for
multilevel cascaded H-bridge rectifers is introduced. The
indirect control does not need any current sensors, hence the
system reliability increases. Using this method, controllable
p
ower factor with nearly sinusoidal ac current could be achieved.
All dc link voltages are regulated to a constant reference voltage,
even if they consume various amounts of
p
ower. In the
p
ro
p
osed
strategy, the multicarrier
p
hase-shifed sinusoidal
p
ulsewidth
modulation (MPS-SPWM) technique is used in order to eliminate
low order harmonics, while the maximum switching frequency is
limited to 500Hz. Additionally, no extra ac flters are needed at
the ac side since the total harmonic distortion is below 5%. To
verify the validity and effectiveness of the
p
ro
p
osed control
strategy, several simulations are carried out on a 7-level cascaded
H-bridge rectifer in PSCAD/EMTDC environment.
Xwords: Ualt/level cascaded H-br/dge; Zct/ve rectger;
Ind/rectcontrol ; UPS-SPhUmodalat/on
I. INTRODUCTION
The large progress in power semiconductor technology and
power electronics has considerably infuenced power
converter design and led to the emergence of new breed of
converters, termed as multilevel converters. Using the
multilevel converters, it is possible to work at voltages
beyond the rating of individual power devices. Moreover,
these type of converters can connect directly to medium
voltage levels and operate at high powers with the common
power switches.
The use of such multilevel converters provides lower stress
on semiconductors, omission or at least reduced size of
flters, improved power factor with better ac side waveforms,
lower common mode voltages and as a consequence,
reduction of costs. Multilevel topologies are categorized as
neutral point clamped (NPC), fying capacitor (FC) and
cascaded H-brodge (CHB) converters [1-3).
Among these three types of converters, the CHB structure
is more interesting because of its extreme modularity, simple
layout, and minimum number of required components for a
specifc number of voltage levels. While the major drawback
of the cascaded H-bridge converter is related to its
requirement for isolated dc sources when operating as an
inverter, this makes it more attractive when it is used as a
rectifer, because the rectifer can provide multiple separated
dc sources[4].
In [5], an indirect controller for cascaded rectifer has been
introduced. This kind of control does not need any current
sensor, hence the system cost reduces and reliability increases.
The proposed method, however, uses a high fequency
switching and has a pretty slow dynamic. In addition it needs
extra flters to eliminate input current harmonics.
A modular strategy to control the CHB rectifers has been
proposed in [4]. Since this method is totally modular, it is
suitable to the CHB topology. This method needs current
sensor and employes variable switching fequncy. In [6], a
predictive current controller has been introduced for CHB
rectifer. This method uses low switching fequency and has a
good dynamic response, while the current waveform has an
excellent quality. But it still needs a curent sensor for each
phase.
In [7], the steady state power balance in cells of a single
phase two-cell CHB rectifer has been studied and the limits
for the maximum and minimum input active powers for a
stable operation have been estimated.
Energy based control methods have been investigated in
[8,9]. Although these methods have a good performance, their
implementations are not straightforward due to the system
complexity and necessary online calculations.
Another direct strategy to control CHB rectifers has been
introduced in [10]. This method has a good switching patter
and uses redundancy based modulation to equalize the dc link
voltages. This method also can control the reactice power fow
to the rectifer.
Briefy, multiple attemps have been made to control CHB
based active rectifer using direct control methods, however,
low effort has been devoted to exploit the use of indirect
control in CHB rectifers.
In this paper, the indrect control method is developed for a
multilevel CHB rectifer. The input power factor is controlled
and the input current is programmed to be sinusoidal, while
the dc bus voltages are kept balanced. In addition a low
IEEE Catalog Number: CFP121IJ-ART
ISBN: 978-1-4673-0113-8
V2
switching fequency is used for the rectifer and the total
current distortion is kept below 5%, which satisfes the IEEE-
519 standard[ 11]. Also, the MPS-SPWM is used to improve
the system dynamic in transient conditions.
II. CASCADED H-BRIDGE TOPOLOGY
A three phase 7-level CHB rectifer has been depicted in
Fig. 1. As can be seen, it consists of a series connection of
identical H-bridge cells which guarantees the extreme
modularity of CHB topology.
Each H-bridge consists of four power switches (with anti
parallel diodes) and a dc bus capacitor. Each capacitor feeds
its own load and loads may be passive or active. In Fig. 1, dc
loads are modeled by resistors and for simplicity, cells of
phases b and c are shown as black boxes.
In a CHB converter, each cell can be controlled to produce
a three level output. It means that if the dc link voltage equals
Vde, three voltage levels +Vde, 0 and -Vdecan be produced at
the ac side of the cell. Hence, using three H-bridge cells, a
seven level waveform including +3Vde, +2Vde, +Vde, 0 , -Vde,
-2V de, and -3V de levels can be synthesized at the ac terminal
of the rectifer.
The ac sides of H-bridge cells are conected in series in
order to synthesize the ac terminal voltage. In Fig. I, the ac
terminal voltage of the rectifer, Va ,can be written as follows:
r

V
an = L I
1)
I=1
f
C
D
D
C
O
f
f
C
D
D
C
O
f
f
C
D
D
C
O
f
f
Figure I. The CHB multilevel rectifer structure.
Where N is the number of H-bridge cells in series
connection and V
hi
is the ac terminal voltage of the i
t
H
bridge cell.
An inductor has been placed between the grid and the
rectifer to shape the input current [12]. The inductance value
has a noticable infuence on the total harmonic distortion of
the input curent. The larger the inductance, the lower the
THO. But there are some practical restrictions about the
implementation of a high value inductance in medium voltage
and high power applications. So a compromise has to be
performed between the inductance value and the THO.
III. CONTROL STRATEGY
. Indirect Controller
In active rectifer, the aim of the control is to balance the
voltages across dc links, keeping the ac side current sinusoidal
and in-phase with the grid voltage[I]. In this paper, to reach
the above mentioned goals, indirect controller has been
employed.
Indirect controller for rectifers frst introduced in [13], and
referes to a controller that does not contain current sensor.
According to [1], in indirect control, a command voltage is
generated which should be synthesized on the ac terminal
voltage by the CHB converter.(see Fig. 2). The difference
between input phase voltage and ac terminal voltage (Van) lies
on the input inductor and leads the input current to be
sinusoidal and in-phase with the input voltage. The schematic
diagram of the controller is shown in Fig. 3. In this fgure, the
voltage of all dc links is sensed and summed together. Then,
the total dc link voltage is compared to the desired reference
value Vref and the error is entered to a PI controller. The
output of PI controller determines the amplitude of input
current (i.e., l)or the active power which should be delivered
to H-bridge cells. Then, noting to Fig. 5, the appropriate ac
terminal voltage can be derived through the following
equations:
d
iAC
VAC =
R
iAC
+ L
T
+ Vxmod 2)
Assuming the input voltage is sinusoidal and the input
current to be sinusoidal as well, the following equation is
derived:
Vxmod
=
[ XJ sin(c) + (v -Rl-L:
)
cos c] sin wt
A
(
A dl
) -[Xslcos(c)+ RI+L
dt
-V sinc]coswt (3)
Where V ___ is the ac side voltage which should be
synthesized by the CHB rectifer, R and Xs represent
respectively the line side resistance and reactance, Vdenotes
IEEE Catalog Number: CFPI211J-ART
ISBN: 978-1-4673-0113-8
V
the peak input phase voltage, and q is the phase difference
between grid voltage and phase current.
Equation (3) can be written as (4) for unity power factor
operation of the rectifer. In this case, Los q
_
1and sin q
_
0, so
(_ d
I
)
Vxmod
_
V - h - Lg
dt
sin ct - A_ Los,g) .
. Modulctioncnd |oltcgcclcncing5ccncrio
,1)
Afer the desired ac terminal voltage is generated, it should
be synthesized by the H-bridge cells according to their load
values. For this purose, a PI controller is employed on each
H-bridge to produce a power demand signal for the
corresponding cell, as shown in Fig. 4.
Each PI controller generates its own output signal fom the
difference between the cell reference voltage and the
corresponding dc bus voltage. Then the coefcients to share
the V y__ between the cells are generated according to the
following equations,
controli
j
_

controlsum
,)
Where represents the share of the i
th
cell in synthesizing
the ac terminal voltage. Note that the references for different
cells can be different but their sum has to be constant and
equal to Vref Finally, the modulating reference voltage for
each cell is obtained fom (6).
,)
Afer obtaining the modulating reference voltage for each
cell, one can use different modulation methods to generate it
across the ac terminal. Among these methods, the multicarrier
phase-shifed sinusoidal pulse width modulation (MPS
SPWM) is selected due to its lower THO, lower propagated
EMI, almost equal power loss of different cells and an
effective output switching fequency of N times the carrier
fequency (N is the number of series H-bridge cells) while the
individual switches have fequencies equal to the carrier
fequency.
Rectfer
__
Ysvoo
AL-UL
.

Figure 2. Indirect Method Concept Diagram
`
j|Il0
'
V
|?)
VXHDU

Figure 3. Schematic diagram of the controller

Beside these benefts, MPS-SPWM not only increases the
system dynamic response at start and transients, but also
eliminates low order harmonics. In this method, the harmonics
are positioned as sidebands around (m-1K where m is the
number of the converter levels and fc is the carrier signals
fequency. So, as the number of the levels or the carrier
signals fequency increases, the gap between the fndamental
and the frst signifcant harmonic gets wider [14].
IV. SIMULATION RESULTS
Simulations have been carried out in PSCAO/EMTOC on a
7-level CHB rectifer as shown in Fig. 1 to verif the control
scheme performance. The rectifer is designed for connection
to a 3.3 kV ac system without any bulky low fequency
transformer. The system parameters are given in Table I. In
this design, the switching devices will be 1700-V IGBTs and
their switching fequency will be limited to 500Hz. Note that
as mentioned before, there are some practical limits for the
line side inductance magnitude. Taking the transformer and
the line inductances into account, a 6mH inductance seems to
be feasible.
The frst simulation investigates the general behavior of the
rectifer under balanced load and nominal conditions. It is
worth noting that m all simulations the reactive power is set to
zero, so the current is in phase with the grid voltage and
Ny__ is calculated through (4). The grid voltage and current
are shown in Fig. 5. It is observed that the input current is
almost sinusoidal and has a THO amount lower than 5%. The
steady state current spectra is shown in Fig. 6. Moreover, the
synthesized ac voltage at the ac side of the rectifer and the dc
bus voltage of frst cell (in phase-a) are shown in Fig. 7 and 8,
respectively.
TALE!. ClkCLl1FARAL1LkSLSL
_
l_kSlLLA1l_N.
Paramctcr
Number of H-bridges
Grid Voltage
Cell nominal load
DC bus voltage
Input inductance
Line resistance
DC bus capacitor
Switching fequency
Line fequency
5_mboI VaIuc
N 3
l 3.3kV
P 40 kW
l1- 1000 V
L 6 mH
R 0.1 (
C 2.2 mF
1
500 Hz
J
50 Hz
IEEE Catalog Number: CFPI211J-ART
ISBN: 978-1-4673-0113-8
V+
The second simulation investigates the behavior of system
under grid side voltage sag. In this simulation, a 30% voltage
drop which lasts for 10 cycles is generated at t=OAs. the
corresponding system results are shown in Fig. 9 and 10.
.
C

Control
Figure 4. Schematic diagram of the controller
.Z . .D
J|H s)
. .Z
Figure 5. Steady state voltage and current waveform
Fundamental (50Hz) = 559, THD= 4.37%
.1111 |.
o 1000
` II
2000 3000
Frquency (Hz)
I
4000
Figure 6. Steady state current spectra
cc: c cz cz: c:
!me (s)
.ZZ
5000
c:
Figure 7. Synthesized ac side terminal voltage (Van) of the rectifer

....--- ----- -----------

.
______________,______________ 1____________ _
,
,

.
.
_

_
__ __ _
!me (s;
Figure 8. dc link voltage of cell #1 in phase-a (the rest cells have a similar
waveform)
In the next simulation, the behavior of CHB rectifer under
a 50% load step is studied. In this investigation the load of all
cells is reduced to 50% in a stepwise manner at t=OAs and
then is restored to initial condition at t=0.8s. The
corresponding dc link voltage and load curent for an arbitrary
cell are shown in Fig. 11.
In the last simulation, the behavior of control system under
unbalance load condition is investigated. In this study, unequal
loads are connected to the dc links and the corresponding
waveforms are shown in Fig. 13. The load values in each
phase are 100%, 80% and 60% of the nominal load in the frst
cell, second cell and the third cell, respectively.
:ccc
zccc
. . . , ,
-r -- -- "----- --r--- -- ,-- -- --

c :ccc

.
= Q
<

:ccc
.:

zccc
iccc
ci ci: c: c:: c: c:: ca ca:
Ime(s}
Figure 9. Investigation of converter behavior under 30% voltage sag
zec

,cc
___________ '' x ___________ ____________ ___ .______ _
_

@ .
.
.,.
.
,,
. , , ,
:cc
-----------------------------_ -----------,-----------------------
, . , ,

zcc
- - - - - - - - - - , . , , ,. -
. . . .
, . , . .


.: .: .: .r ./ ., .s
!me (s)
Figure 10. Dc link voltage of an arbitrary cell under a 30% voltage sag
IEEE Catalog Number: CFPI211J-ART
ISBN: 978-1-4673-0113-8
VJ
`
!
!,,ee
Q --------------- -------- --------------- --------------.- -------

,
J_
g_

g_
C
__
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, I , , I , ,
, , . , , , .
, I , , I , ,
I , I I
, I , , I , ,
, I , I .
, . . , , .
, I , , I I ,
, , . , , , .
, I , I , ,
I , I ,
.A . . . . . !.
Ime(s)
|4
--------! --------- ---------!--------
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, ,
, " ,
....... ........,........,........,....... ......... . -,. -
I " "
------- ----- --_ ._------_ . ._------ .
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I " "
, ,
, " "
, ,
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. .. . . .. .. . - ... . . . . . -. . ..
, " .
, ,
,
, ,
, ,
......... ................
7
_

jg jJ j_ j

j

j
7.7
!me (s;
,|)
Figure I I. Investigation of de link voltage and load current of an arbitrary cell
under a 50% load variation in all cells. (a) Dc link voltage (b) Load current

7
"

_@ ------,------| --------------------------------- -------, ------, -----

. . .
. .
. . . .
. . . .
. . . . . . .
. . . .
.
, , . . ,
. . . .
. . . . .
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Y
_

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7
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_
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_
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J_

j_
!me (s;
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, I I . I ,
_ ------, ------|------ -------|--------------|-------|-------, ------| -----
, . . . . .
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Y_
_
j

7
_
7
_
j __
__ j g _

g_j J
_
J___
!me (s;
(b)
Figure 12. Dc bus voltages of phase-a at unbalanced loads condition.
(a) 100% load, (b) 80% load, (c) 60% load
7
_
__
_ . . . . . ,.. . . . . ,-. . . . . . .-. -...-. -..|-.. --..|. . . . . . . . . . . . -. .. . ....--
, , I , ,
, , . , ,
, , I I , I
, , . , ,
, , I , ,
, , . , ,
, , I , ,
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, , , I , ,
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, , , . , ,
Y
_
_ _
_
_
g
_
7
__ _ _ ___ g_ g _ _ J
_ J_

__
!me (sj
|
Figure 12. (Continued) Dc bus voltages of phase-a at unbalanced loads
condition. (c) 60% load

........
__ , = _
, , .
J
_

.
fil

g_
. , , , , ,
_
__
. , , , . ,
,,.,r,. ................ .
, I , , , ,
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7
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, , . , .
, , , ,
, I , , ,
, , , , ,
Y
__ _ __ g
_ __ _ ]___ g _ g_ ]J
_
J _

__
!me (sj
Figure 13. Dc bus currents of phase-a at unbalaced loads condition.
(a) 100% load, (b) 80% load, (c) 60% load
V. CONCLUSIONS
In this paper, an indirect control strategy for cascaded H
bridge rectifers was introduced. Although the controller does
not use any current sensor, it is able to program the input
current to be sinusoidal and in phase with the input voltage,
even the attached loads to dc links are not equal. The
presented control strategy can be applied to CHB rectifer with
any number of cells. Multicarier sinusoidal PWM technique
helped the system dynamic to be fast at the startup and
transient times. Morever, the switching fequency maintained
at a low constant value. But at this kind of controller, the line
side resistance and reactance magnitudes should be updated
accurately in (3) and (4), to guarantee the system well
perforrmance.
IEEE Catalog Number: CFPI21lJ-ART
ISBN: 978-1-4673-0113-8
V
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IEEE Catalog Number: CFP121lJ-ART
ISBN: 978-1-4673-0113-8
V