8086 Instruction set

Abbreviations used R8= AL/BL/CL/DL/ AH/BH/CH/DH R16=AX/BX/CX/DX/ SI/DI/BP/SP SR=CS/DS/ES/SS d16=16-bit data a8=8-bit I/O port address M8=contents of byte memory M16=contents of word memory

R=R8/R16 AR=SI/DI/BX/BP d8=8-bit data

M=M8/M16

Conventions used: R MOV M PUSH/POP R16 for PUSH R16 and for MOV R, M and MOV POP M, R R16

ROR R/M, 1/CL

for ROR R,1 ROR M,1

ROR R,CL ROR M, CL

8086 Instruction set types Instructions are normally discussed under: Data Transfer instructions Ex. MOV BX, CX Arithmetic instructions Ex. ADD BX, CX Logical group of instructions Ex. AND BX, CX Stack group Ex. PUSH DX I/O group Ex. IN AL, 30H Branch group Ex. JNC LOCN String instructions Ex. MOVS Interrupt instructions Ex. INT 21H Data Transfer group, Arithmetic group, Logical group, Stack group, and I/O group of instructions explained first. They occupy several chapters in books.

Here, I explain them under: 2-operand instructions Ex. ADD BX, CX 1-operand instructions Ex. PUSH SI 0-operand instructions: Ex. DAA Branch group, String instructions, and Interrupt instructions are explained later. 2-Operand instructions 2-Operand instructions involving R and R/M MOV/XCHG ADD/ADC/SUB/SBB AND/OR/XOR/TEST/CMP Data transfer Arithmetic Logical

R R/M

11 instructions x 210= 11264 opcodes MOV instruction already discussed- see Instruction template In data transfer instructions flags are not affected. Exchange Instruction Before 1234H After ABCDH 1234H

XCHG DX, [BX]

DX

BX 1000H DS:1000H ABCDH DS:1002H

Add instruction Unlike in 8085, result of add/subtract can be in any register or memory location Before 1234H 1000H 2000H After

ADD [BX], DX In 3234H, 34H has three 1s. So P flag =0

DX BX DS:1000H DS:1002H

3234H

ADC DH ,[SI] Add with Carry 81H 1000 0001B(Two 1s)

DH Carry flag SI DS:2000H DS:2001H

Before 30H 1 2000H 50H 60H

After 81H 0

New flag values: Ac=0, S=1, Z=0, V=1, P=1

SUB DH, CL Subtract (without borrow)

Before DH 30H CL 25H

After 0BH

0BH = 0000 1011B(Three 1s) New flag values: Ac=1, S=0, Z=0, V=0, P=0, Cy=0

SBB DH, CL Subtract (with borrow)

Before DH 20H Cy flag 1 CL 25H

After FAH 1

FAH =1111 1010(Six 1s) 2s complement of FAH=0000 0110 = +06 So, FAH = -06 New flag values: Ac=1, S=1, Z=0, V=0, P=1, Cy=1

Discussion about Overflow (V) flag V 23H (+ve) + 46H (+ve) = 69H (+ve) V= 0, Cy = 0 Correct answer 43H (+ve) + 54H (+ve) = 97H (-ve) V = 1, Cy = 0 Wrong answer

Overflow used with signed numbers only Carry flag used with unsigned numbers only 83H (-ve) + 94H (-ve) = 17H (+ve) V= 1, Cy = 1 Wrong answer F2H (-ve) + F3H (-ve) = E5H (-ve) V = 0, Cy = 1 Correct answer

94H (-ve) - 83H (-ve) = 11H (+ve) V= 0, Cy = 0 Correct answer

F6H (-ve) - 43H (+ve) = B3H (-ve) V = 0, Cy = 0 Correct answer

94H (-ve) - 23H (+ve) = 71H (+ve) V= 1, Cy = 0 Wrong answer AND instruction

66H (+ve) - 83H (-ve) = E3H (-ve) V = 1, Cy = 1 Wrong answer

Before AND BH, CL BH 56H Subtract (with borrow) AND 1 0FH=0000 1111B CL 0FH 06H=0000 0110B Use: Selectively reset to 0 some bits of the destination Bits that are ANDed with 0s are reset to 0 Bits that are ANDed with 1s are not changed OR instruction Before OR BH, CL BH 56H 56H=0101 0110B OR 0FH=0000 1111B CL 0FH 5FH=0101 1111B Use: Selectively set to 1 some bits of the destination Bits that are ORed with 1s are set to 1 Bits that are ORed with 0s are not changed Ex-OR instruction Before XOR BH, CL BH 56H 56H=0101 0110B XOR 0FH=0000 1111B CL 0FH 59H=0101 1001B Use: Selectively complement some bits of the destination. Bits that are XORed with 1s are complemented Bits that are XORed with 0s are not changed TEST instruction TEST BH, CL 56H=0101 0110B 0FH=0000 1111B 06H=0000 0110B Only flages are affected BH AND CL Temp 0FH 45H Before 56H

After 06H 1

After 5FH

After 59H

After 56H 0FH 06H

TEST basically performs AND operation. Result of AND is not stored in destination. It is stored in Temp register. Temp is not accessible to programmer. There is no instruction like MOV Temp, 67H

Compare Instruction CMP BH, CL 56H=0101 0110B 0FH=0000 1111B Only flags are affected Before BH 56H CL 0FH After 56H

Temp 45H 47H CMP basically performs Subtract operation. Result of CMP is not stored in destination. It is stored in Temp register. Temp is not accessible to programmer.

2-Operand Instructions involving immediate data MOV ADD/ADC/SUB/SBB AND/OR/XOR/TEST/CMP 8 byte registers + 8 word registers+ 24 byte memory + 24 word memory = 64 opcodes 10 instructions x 64 = 640 opcodes

R/M, d8/d16

Move Immediate data to a Register/ Memory location Before 1234H After ABCDH

MOV DX, ABCDH

DX

MOV BH, 12H

BH

Before 56H

After 12H

Add Immediate data to a Register/ Memory location Before 1000H After

ADD [BX], 12H

BX

DS:1000H DS:1001H

20H

32H

ADD [BX], 1234H

Before BX 1000H

After

DS:1000H 2000H DS:1002H

3234H

Add with Carry Immediate data to a Register/ Memory location Before 30H 1 After 63H 0

ADC DH, 32H DH Add with Carry Carry flag 63H= 0110 0011 It has four 1s New flag values: Ac=0, S=0, Z=0, V=0, P=1 Subtract Immediate data from a Register/ Memory location Before 30H

SUB DH, 40H Subtract (without borrow)

DH

After F0H

F0H=1111 0000 B(Four 1s) New flag values: Ac=0, S=1, Z=0, V=0, P=1, Cy=1 Subtract with borrow Immediate data from a Register/ Memory location Before 20H 1 After 06H 1

SBB DH, 25H DH Subtract (with borrow) Cy flag 06H= 0000 0110B(Two 1s) New flag values: Ac=1, S=0, Z=0, V=0, P=1, Cy=1 AND Immediate data with a Register/ Memory location Before 56H

AND BH, 0FH 56H = 0101 0110B

BH AND

After 06H

0FH = 0000 1111B Cy flag 1 06H = 0000 0110B(Two 1s) Use: Selectively reset to 0 some bits of the destination Bits that are ANDed with 0s are reset to 0 Bits that are ANDed with 1s are not changed

OR Immediate data with a Register/ Memory location Before 56H After 5FH

OR BH, 0FH 56H = 0101 0110B

BH OR

0FH = 0000 1111B CL 0FH 5FH = 0101 1111B Use: Selectively set to 1 some bits of the destination Bits that are ORed with 1s are set to 1 Bits that are ORed with 0s are not changed

Ex-OR Immediate data with a Register/ Memory location Before XOR BH, 0FH BH 56H 56H = 0101 0110B XOR 0FH = 0000 1111B CL 0FH 59H = 0101 1001B Use: Selectively complement some bits of the destn. Bits that are XORed with 1s are complemented Bits that are XORed with 0s are not changed After 59H

Test Immediate data with a Register/ Memory location Before 56H After 56H

TEST BH, 0FH 56H=0101 0110B

BH AND

0FH=0000 1111B Temp 45H 06H 06H=0000 0110B TEST basically performs AND operation. Result of AND is not stored in destination. It is stored in Temp register. Temp is not accessible to programmer. There is no instruction like MOV Temp, 67H. Only flags are affected. Compare Immediate data with a Register/ Memory location Before 56H 45H After 56H 47H

CMP BH, 0FH 56H=0101 0110B

BH AND Temp

CMP basically performs Subtract operation. Result of CMP is not stored in destination. It is stored in Temp register. Temp is not accessible to programmer. Only Flags are affected based result of subtraction. 2-Operand Instructions involving SR and R16/M16 MOV SR R16/M16 Before 1122H After 2233H

MOV DS, CX

DS

CX 2233H Note that there is no instruction to load an immediate data to a Segment register. No. of opcodes = 2 x 4 x (8+24) = 256

MOV DS, [BX]

DS BX DS:2000H

Before 1122H 2000H 2233H

After 2233H

2-Operand Instructions to perform Input operation IN AL/AX, a8/DX 4 opcodes Before AL 50H DX 2111H Input port no. 2111H 45H After 45H

IN AL, DX

IN AL, 30H

Before AL 50H Input port no. 30H 45H

After 45H

IN AX, DX

AX DX Input port no. 60H Input port no. 61H

Before 3050H 1177H 45H 40H

After 4045H

2-Operand Instructions to perform Output operation OUT a8/DX, AL/AX 4 opcodes Before 50H 40H After 50H

OUT 30H, AL

AL Out port no. 30H

OUT DX, AX

AX DX Out port no. 2177H Out port no. 2178H

Before 3050H 2177H 45H 40H Before 3050H 45H 40H

After

50H 30H After

OUT 60H, AX

AX Out port no. 60H Out port no. 61H

50H 30H

2-Operand Instructions to perform Shift/Rotate operation ROR /ROL /RCR /RCL /SHR /SHL /SAR 7 instructions x (16+48) x 2 = 896 opcodes SHR and SHL: for shifting left / right unsigned numbers SAR used Shifting right a signed number SHL is also called as SAL, as method for shift left of signed or unsigned number is the same R/M, 1/CL

ROR R/M, 1/CL

Used for division by power of 2

CL has no. of times rotation is to be done ROR BH, 1 R/M Cy

Rotate right without cy BH Cy

Before 0100 0010 1

After 0010 0001 0

RCR R/M, 1/CL CL has no. of times rotation is to be done RCR BH, 1 R/M Cy

Rotate right with cy BH Cy

Before 0100 0010 1

After 1010 0001 0

ROL R/M, 1/CL ROL BH, CL Cy

Used for multiplication by 2n R/M

Rotate left without cy BH CL Cy

Before 0010 0010 02H 1

After 1000 1000 0

RCL R/M, 1/CL RCL BH, CL Cy R/M

Rotate left with cy BH CL Cy

Before 0010 0010 02H 1

After 1000 0010 0

SHL R/M, 1/CL SHL BH, CL Cy

Used for multiplication by 2n R/M 0

Shift left without cy BH CL Cy

Before 0010 0010 02H 1

After 1000 1000 0

SHR R/M, 1/CL SHR BH, CL 0 Shift right BH CL Cy

Used for division by 2n of unsigned nos R/M Cy

Before 0100 0100 02H 1

After 0001 0001 0

SAR R/M, 1/CL SAR BH, CL

Used for division by 2n of signed nos R/M Cy

Shift right 1100 0000 = -40H 1111 0000 = -10H

BH CL Cy

Before 1100 0000 02H 1

After 1111 0000 0

2-Operand instruction to load an Effective address into an Address Register LEA AR, a16 4 x 24 = 96 opcodes Before 1000H 2000H 3000H After 2000H

LEA BX, [SI]

BX

LEA BX, [SI] functionally same as SI MOV BX,SI DS:2000H

2-Operand instruction to load DS and an Address Register from memory LDS AR, M32 4 x 24 = 96 opcodes After 7000H 6000H

Before LDS SI, 3000H DS 2000H Loads DS and SI using single instruction SI 1000H DS:3000H DS:3002H 6000H 7000H

2-Operand instruction to load ES and an Address Register from memory LES AR, M32 4 x 24 = 96 opcodes Before ES 2000H After 7000H 6000H

LES DI, 3000H

Loads ES and DI using single DI 1000H instruction 2000:3000H 6000H 2000:3002H 7000H