22nm 3-D Tri-Gate Transistor Technology

V.SURYA, 3rd year ECE Surya.sushu@gmail.com

ABSTRACT:A 22nm generation logic technology is described incorporating fully-depleted tri-gate transistors for the first time. These transistors feature a 3rd-generation high-k + metal-gate technology and a 5th generation of channel strain techniques resulting in the highest drive currents yet reported for NMOS and PMOS. The use of tri-gate transistors provides steep sub-threshold slopes (~70mV/dec) and very low DIBL (~50mV/V). Self-aligned contacts are implemented to eliminate restrictive contact to gate registration requirements. Interconnects feature 9 metal layers with ultra-low-k dielectrics throughout the interconnect stack. High density MIM capacitors using a hafnium based high-k dielectric are provided. The technology is in high volume manufacturing. Intels trigate transistor employs a novel 3D structure like a raised flat plateau with vertical sides ,which allows electronic signals to be sent along the top of the transistor and along both vertical side walls as well.

Index Terms: 3-D Tri-Gate Transistor, 22nm Technology.

I. INTRODUCTION:
Lets take a look back at the transistors history and key mile stones as intels 22nm innovation ushers in new semiconductor technology and ensures the continuation of moores law for the foreseeable future. Dec.16,1947: William Shockley,john bardeen and walter Brattain

successfully build the first transistor at Bell labs. 1950: William Shockley developed the bipolar junction transistor, the device most commonly reffered to as a transistor by todays standard. 0ct.18,1954 the first transistor radio, the Regency TR1, was put on the market and contained just four germanium transistors. In 1960s Jordan moore, an industry pioneer predicted that the number of transistors that could be manufactured will grow exponentially. these prediction is called moores law. moores altimate prediction is that transistor count a single chip doubles for every 18 months. Bob noyce founded Intel short for I.C. April 25,1961:the first patent is awarded to Robert noyce for an integrated circuit original transistor had been sufficient for use in radios and phones but newer electronics required something smaller the I.C. 1909:Intel develops the first successful pmos silicon gate transistor technology. These transistors continue to use a traditional silicon dioxide(Sio2)gate dielectric, but introduce new poly silicon gate electrodes.

 1971:intel launches its first microprocessor the 4004.The 4004 was 1/8 of an inch by 1/16 of an inch contained 2250 transistors and was manufactured with intels 10 micron PMOS technology on 2 inch wafers. 1985: the intels 386^TM microprocessor is released featuring 2,75,000 transistors more than 100 times as many of the original 4004.It was a 32 bit chip and was multitasking manufactured using 1.5 micron CMOS technology. Aug 13,2002:intel unveils several technolg breaks through in its forth coming 90nm process technology including higher performance , lower power transistors strained silicon,high speed copper inter connects and a new low k dielectric material.this will be the first process in the industry to implement strained silicon in production. Jan 29,2007:intel reveals break through transistor materials higher-k and metal gate that it will use to build the insulting wall and switching gate in the hundreds of millions of microscope 45nm transistors. May 4, 2011:intel announces that it is about to put a radically new transistor design into volume production that tri gate transistor will deliver an unprecendented combination of performance and energy efficiency in a wide range of computer from servers to desktops

and from devices.

laptops

to

handheld

II. 3-D Tri-Gate Transistor Structure:

Fig.2.1. 3-D Tri-Gate transistors form conducting channels on three sides of a vertical fin structure, providing fully depleted operation.

approach for extending the Tera Hertz transistor architecture Intel announced in December 2001. The tri-gate is built on an

ultra-thin layer of fully depleted silicon for reduced current leakage. This allows the transistor to turn on and off faster, while dramatically reducing power consumption. It also incorporates a raised source and drain structure for low resistance, which allows the transistor to be driven with less power. The design is also compatible with the future introduction of a high K gate dielectric for even lower leakage. Intel researchers have developed "tri-gate" transistor design. This is one of the major breakthroughs in the VLSI technology. The transistor is aimed at bringing down the transistor size in accordance with the Moores Law. The various problems transistors with very small size face have to be overcome. A reduction in power dissipation is another aim. This is to develop low power micro processors and flash memories. Tri-gate transistors show excellent DIBL, high sub threshold slope, high drive and much better short channel performance compared to CMOS bulk transistor. The drive current is almost increased by 30%. The thickness requirement of the Si layer is also relaxed by about 2-3 times that of a CMOS bulk transistor. Tri- gate transistors are expected to replace the nanometer transistors in the Intel microprocessors by 2010. 60 nm tri-gate transistors are already fabricated and 40 nm tri-gate transistors are under fabrication. Trigate transistor is going to play an important role in decreasing the power requirements of the future processors. It will also help to increase the battery life of the mobile devices.

The 3-D Tri-Gate transistors are a reinvention of the transistor. The traditional "flat" two-dimensional planar gate is replaced with an incredibly thin threedimensional silicon fin that rises up vertically from the silicon substrate. Control of current is accomplished by implementing a gate on each of the three sides of the fin two on each side and one across the top -rather than just one on top, as is the case with the 2-D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the "on" state (for performance), and as close to zero as possible when it is in the "off" state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance). Transistor Operation

Fig3.1:The fully depleted characteristics of Tri-Gate transistors provide a steeper subthreshold slope that reduces leakage current.

III.TRANSISTOR OPERATONS IN 22nm AND 32nm TECHNOLOGY:-

Tri-gate fully-depleted substrate transistors have a raised plateau-like gate structure with two vertical walls and a horizontal wall of gate electrode. This three-dimensional structure improves the drive current while

the depleted substrate reduces the leakage current when the transistor is in the off state. Reducing leakage current not only helps control heat at the circuit level but also translates to increased battery life in mobile devices. 32nm transistor operation

Gate transistors are off, they'll burn less power than a hypothetical planar 22nm process.

The third point is particularly exciting because it allows for better transistor performance as well as lower overall power. The benefits are staggering: x-axis Operating voltage-------------- y-axis transistor gate delay----------

IV.3D TRI-GATE TRANSISTOR OUTCOMES:

The gate now exerts far more control over the flow of current through the transistor. Silicon substrate voltage no longer impacts current when the transistor is off. larger inversion layer area, more current can flow when the transistor is on. Transistor density isn't negatively impacted. You can vary the number of fins to increase drive strength and performance.

The first two points in the list result in lower leakage current. When Intel's 22nm 3D Tri-

V. TRI-GATE TRANSISTOR BENEFITS:

Dramatic performance gain at low operating voltage, better than Bulk, PDSOI or FDSOI37% performance increase at low voltage>50% power reduction at constant performance Improved switching characteristics (On current vs. Off current) Higher drive current for a given transistor footprint Only 2-3% cost adder (vs. ~10% for FDSOI) 3-D Tri-Gate transistors are an important innovation needed to continue Moores Law

Next, what does 3D stand for here? Hint theres no double camera tricky business going on here. Its got to do with the structure of the transistor. The 3D Tri-Gate transistors form conducting channels on three sides of a vertical fin structure. This build results in less heat transmission, longer battery life in mobile devices, and because of a combo of the high-k gate insulators and strained silicon, improved performance. Tri-gate fully-depleted substrate transistors have a raised plateau-like gate structure with two vertical walls and a horizontal wall of gate electrode. This three-dimensional structure improves the drive current while the depleted substrate reduces the leakage current when the transistor is in the off state. Reducing leakage current not only helps control heat at the circuit level but also translates to increased battery life in mobile devices. You can expect some other bits that you may or may not be super excited about from an Android standpoint: native PCIe 3.0 and USB 3.0 controllers at the processor level as well as an integrated DirectX graphics core with support for the second-generation of QuickSync. QuickSync is Intels media encoding/decoding acceleration technology, in case you do not know. Today, Intel demonstrated the worlds first 22nm microprocessor, codenamed Ivy Bridge, working in a laptop, server and desktop computer. Ivy Bridge-based Intel Core family processors will be the first high-volume chips to use 3-D Tri-Gate transistors. Ivy Bridge is slated for high-volume production readiness by the end of this year. This silicon technology breakthrough will also aid in the delivery of more highly

VI. How Intels new 22nm 3D TriGate transistors will Blast Android (ARM Processor) into Outer Space:Its a trend described by Gordon moore, co-founder of intel, nothing that can be placed inexpensively on an integrated circuit doubles approximately every two years. whats that got to do with android? its quite simple-bigger processing power in the same size package. today Intel has announced its 22nm 3D tri-gate transistors, processing technology that they say will bring 50% power reduction at constant performance(that means better battery life)and 37% performance increase at low voltage-a better job for less

integrated Intel Atom processor-based products that scale the performance, functionality and software compatibility of Intel architecture while meeting the overall power, cost and size requirements for a range of market segment needs.

Intel demonstrates a 22nm microprocessor codenamed Ivy Bridge that will be the first highvolume chip to use 3-D Tri-Gate transistors.

REFERENCES: VII.COCLUSION:
The transition to 3-D Tri-Gate transistors sustains the pace of technology advancement, fueling Moores Intel announces a major technical breakthrough and historic innovation in microprocessors: the worlds first 3-D transistors, called TriGate, in a production technology Law for years to come. The performance capability should blow ARM devices out of the water. An unprecedented combination of performance improvement and power reduction to enable new innovations across a range of future 22nm-based devices from the smallest handhelds to powerful cloud-based servers.

www.intel.com/pressroom "Transistors go 3D as Intel re-invents

the microchip". Ars Technica. 5 May 2011. Retrieved 7 May 2011.

Murray, Matthew (4 May 2011). "Intel's New Tri-Gate Ivy Bridge Transistors: 9 Things You Need to Know". PC Magazine. Retrieved 7 May 2011. Intel to Present on 22-nm Tri-gate Technology at VLSI Symposium (ElectroIQ 2012) Miller, Michael J.. PC Magazine. http://forwardthinking.pcmag.com/pchardware/296972-intel-releases-ivybridge-first-processor-with-tri-gatetransistor.