IRF6645PbF IRF6645TRPbF

l l l l l l l l l l l

RoHS Compliant Lead-Free (Qualified up to 260C Reflow) Application Specific MOSFETs Ideal for High Performance Isolated Converter Primary Switch Socket Optimized for Synchronous Rectification Low Conduction Losses High Cdv/dt Immunity Low Profile (<0.7mm) Dual Sided Cooling Compatible Compatible with existing Surface Mount Techniques Halogen-Free

DirectFET Power MOSFET

Typical values (unless otherwise specified)

VDSS Qg
tot

VGS Qgd
4.8nC

RDS(on)
28m@ 10V

100V max 20V max

Vgs(th)
4.0V

14nC

SJ

DirectFET ISOMETRIC

Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SH SJ SP MZ MN

Description
The IRF6645PbF combines the latest HEXFET Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an Micro8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6645PbF is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom applications (36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high performance isolated DC-DC converters.

Absolute Maximum Ratings

Parameter
VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS IAR
80
Typical R DS (on) (m)

Max.
100 20 5.7 4.5 25 45 29 3.4
VGS, Gate-to-Source Voltage (V)

Units
V

Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS Pulsed Drain Current Avalanche Current

e e @ 10V f h
12 10 8 6 4 2 0 0 4 ID= 3.4A

Single Pulse Avalanche Energy

mJ A

70 60 50 40 30 20 4

ID = 3.4A

VDS = 80V VDS= 50V

TJ = 125C

TJ = 25C

6 8 10 12 14 VGS, Gate-to-Source Voltage (V)

16

12

16

QG Total Gate Charge (nC)

Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage

Fig 1. Typical On-Resistance vs. Gate Voltage

Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state.

TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 5.0mH, RG = 25, IAS = 3.4A.

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Electrical Characteristic @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Coss Coss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance

Min.
100 3.0 7.4

Typ.
0.12 28 -12 14 3.1 0.8 4.8 5.3 5.6 7.2 1.0 9.2 5.0 18 5.1 890 180 40 870 100

Max.
35 4.9 20 250 100 -100 20 7.2

Units
V V/C m V mV/C A nA S

Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 1mA VGS = 10V, ID = 5.7A i VDS = VGS, ID = 50A VDS = 100V, VGS = 0V VDS = 80V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 10V, ID = 3.4A VDS = 50V

nC

VGS = 10V ID = 3.4A See Fig. 15

nC

VDS = 16V, VGS = 0V VDD = 50V, VGS = 10V ID = 3.4A i

ns

RG=6.2 VGS = 0V

pF

VDS = 25V = 1.0MHz VGS = 0V, VDS = 1.0V, f=1.0MHz VGS = 0V, VDS = 80V, f=1.0MHz

Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) g 31 40 1.3 47 60 V ns nC Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge 45

Min.

Typ.

Max.
25

Units
A

Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 3.4A, VGS = 0V i TJ = 25C, IF = 3.4A, VDD = 50V di/dt = 100A/s c
G S D

Notes:

Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400s; duty cycle 2%.

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Absolute Maximum Ratings
PD @TA = 25C PD @TA = 70C PD @TC = 25C TP TJ TSTG

e Power Dissipation e Power Dissipation f

Power Dissipation Operating Junction and

Parameter

Max.
3.0 1.4 42 270 -40 to + 150

Units
W

Peak Soldering Temperature Storage Temperature Range

Thermal Resistance
RJA RJA RJA RJC RJ-PCB
100

el Junction-to-Ambient jl Junction-to-Ambient kl Junction-to-Case fl

Junction-to-Ambient

Parameter

Typ.
12.5 20 1.0

Max.
58 3.0

Units

C/W

Junction-to-PCB Mounted

D = 0.50
Thermal Response ( Z thJA )
10

0.20 0.10 0.05

0.02 0.01
J J 1 1

R1 R1 2

R2 R2

R3 R3 3

R4 R4 4

R5 R5 A C 5

Ri (C/W) i (sec)
0.6677
C

0.000066 0.000896 0.004386 0.686180

1.0463 1.5612 29.2822

0.1

Ci= iRi Ci= iRi

SINGLE PULSE ( THERMAL RESPONSE )

0.01 1E-006 1E-005 0.0001 0.001 0.01 0.1

25.4550 32 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = Pdm x Zthja + Ta

1 10 100

t1 , Rectangular Pulse Duration (sec)

Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient

Mounted on minimum footprint full size board with metalized Surface mounted on 1 in. square Cu board, steady state. TC measured with thermocouple incontact with top (Drain) of part. back and with small clip heatsink. Ris measured at TJ of approximately 90C. Used double sided cooling, mounting pad with large heatsink.
Notes:

Surface mounted on 1 in. square Cu board (still air).

Mounted to a PCB with small clip heatsink (still air)

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Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air) July 25, 2012

IRF6645/TRPbF
100
TOP VGS 15V 10V 8.0V 7.0V 6.0V

100
TOP VGS 15V 10V 8.0V 7.0V 6.0V

ID, Drain-to-Source Current (A)

BOTTOM

ID, Drain-to-Source Current (A)

BOTTOM

10

10 6.0V

6.0V

60s PULSE WIDTH

Tj = 25C 0.1 0.1 1 10 100 VDS , Drain-to-Source Voltage (V) 1 0.1 1

60s PULSE WIDTH

Tj = 150C 10 100

VDS , Drain-to-Source Voltage (V)

Fig 4. Typical Output Characteristics

100 VDS = 10V
ID, Drain-to-Source Current )

Fig 5. Typical Output Characteristics

2.0 ID = 5.7A
Typical RDS(on) (Normalized)

60s PULSE WIDTH 10

VGS = 10V

TJ = 150C TJ = 25C TJ = -40C

1.5

1.0

0.1 4.0 5.0 6.0 7.0 8.0

0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature (C)

VGS, Gate-to-Source Voltage (V)

Fig 6. Typical Transfer Characteristics

10000
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd

Fig 7. Normalized On-Resistance vs. Temperature

60 VGS = 7.0V VGS = 8.0V TA= 25C

C, Capacitance(pF)

(m

Coss = Cds + Cgd

50

VGS = 10V VGS = 15V

1000

Coss 100

DS(on) Typical R

Ciss

40

Crss

30

10 1 10 VDS , Drain-to-Source Voltage (V) 100

20 0 10 20 30 40 50

ID, Drain Current (A)

Fig 8. Typical Capacitance vs.Drain-to-Source Voltage 4 www.irf.com 2012 International Rectifier

Fig 9. Typical On-Resistance vs. Drain Current July 25, 2012

IRF6645/TRPbF
100.0
ID, Drain-to-Source Current (A)

1000

ISD , Reverse Drain Current (A)

10.0

TJ = 150C TJ = 25C TJ = -40C

OPERATION IN THIS AREA LIMITED BY R DS (on) 100

100sec 10

1.0

1msec 1 TA = 25C Tj = 150C Single Pulse 0.1 1.0

VGS = 0V 0.1 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VSD , Source-to-Drain Voltage (V)
0.1

10msec

10.0

100.0

1000.0

VDS , Drain-toSource Voltage (V)

Fig 10. Typical Source-Drain Diode Forward Voltage

6.0

Fig11. Maximum Safe Operating Area

6.0

5.0

VGS(th) Gate threshold Voltage (V)

5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0

ID , Drain Current (A)

4.0

3.0

ID = 1.0A ID = 1.0mA ID = 250A ID = 50A

2.0

1.0

0.0 25 50 75 100 125 150

-75

-50

-25

25

50

75

100

125

150

TJ , Ambient Temperature (C)

TJ , Temperature ( C )

Fig 12. Maximum Drain Current vs. Ambient Temperature

120

Fig 13. Typical Threshold Voltage vs. Junction Temperature

ID 1.5A 2.4A BOTTOM 3.4A
TOP

EAS, Single Pulse Avalanche Energy (mJ)

100

80

60

40

20

0 25 50 75 100 125 150

Starting TJ, Junction Temperature (C)

Fig 14. Maximum Avalanche Energy vs. Drain Current 5 www.irf.com 2012 International Rectifier July 25, 2012

IRF6645/TRPbF
Id Vds Vgs

L
0

DUT 1K
S

VCC

Vgs(th)

Qgs1 Qgs2

Qgd

Qgodr

Fig 15a. Gate Charge Test Circuit

Fig 15b. Gate Charge Waveform

V(BR)DSS
15V

tp
DRIVER

VDS

RG
VGS 20V

D.U.T
IAS tp

+ V - DD

0.01

I AS
Fig 16c. Unclamped Inductive Waveforms

Fig 16b. Unclamped Inductive Test Circuit

VDS VGS RG

RD

90%
D.U.T.
+

VDS

- VDD

10%

VGS
td(on) tr td(off) tf

10V
Pulse Width s Duty Factor

Fig 17a. Switching Time Test Circuit 6 www.irf.com 2012 International Rectifier

Fig 17b. Switching Time Waveforms July 25, 2012

IRF6645/TRPbF
D.U.T
Driver Gate Drive

P.W.

Period

D=

P.W. Period VGS=10V

Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer

D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt

RG
di/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test

VDD

VDD

+ -

Re-Applied Voltage

Body Diode

Forward Drop

Inductor Current Inductor Curent

Ripple 5% ISD

* VGS = 5V for Logic Level Devices Fig 18. Diode Reverse Recovery Test Circuit for N-Channel HEXFET Power MOSFETs

DirectFET Substrate and PCB Layout, SJ Outline (Small Size Can, J-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.

D G D G = GATE D = DRAIN S = SOURCE

S S

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DirectFET Outline Dimension, SJ Outline (Small Size Can, J-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.

DIMENSIONS IMPERIAL METRIC MAX MIN CODE MIN MAX 4.85 0.187 A 4.75 0.191 3.95 0.146 B 3.70 0.156 2.85 0.108 C 2.75 0.112 0.45 0.014 D 0.35 0.018 0.62 0.023 E 0.58 0.024 0.62 0.023 F 0.58 0.024 0.72 0.027 G 0.68 0.028 0.72 0.027 H 0.68 0.028 K 0.98 1.02 0.039 0.040 2.32 0.090 L 2.28 0.091 M 0.616 0.676 0.0235 0.0274 R 0.020 0.080 0.0008 0.0031 0.17 0.003 P 0.08 0.007

DirectFET Part Marking

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DirectFET Tape & Reel Dimension (Showing component orientation).

NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6645TRPBF). For 1000 parts on 7" reel, order IRF6645TR1PBF STANDARD OPTION METRIC CODE MIN MAX A 330.0 N.C B 20.2 N.C C 12.8 13.2 D 1.5 N.C E 100.0 N.C F N.C 18.4 G 12.4 14.4 H 11.9 15.4 REEL DIMENSIONS (QTY 4800) TR1 OPTION (QTY 1000) IMPERIAL METRIC IMPERIAL MIN MIN MAX MAX MIN MAX 12.992 6.9 N.C N.C 177.77 N.C 0.795 0.75 N.C 19.06 N.C N.C 0.504 0.53 0.50 0.520 13.5 12.8 0.059 0.059 N.C 1.5 N.C N.C 3.937 2.31 58.72 N.C N.C N.C N.C N.C 0.53 N.C 0.724 13.50 0.488 0.47 11.9 N.C 0.567 12.01 0.469 0.47 11.9 N.C 0.606 12.01

Loaded Tape Feed Direction

. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IRs Web site. Data and specifications subject to change without notice.

CODE A B C D E F G H

DIMENSIONS IMPERIAL METRIC MIN MAX MIN MAX 0.311 0.319 7.90 8.10 0.154 0.161 3.90 4.10 0.469 0.484 11.90 12.30 0.215 0.219 5.45 5.55 0.158 0.165 4.00 4.20 0.197 0.205 5.00 5.20 0.059 N.C 1.50 N.C 0.059 0.063 1.50 1.60

IR WORLD HEADQUARTERS: 101N Sepulveda., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.

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