A1.

State table can be created as like below:

Present State Input Next State Flip-Flops Inputs

A3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

A2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

A1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

A0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

K 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

A3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0

A2 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0

A1 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0

A0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0

D3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0

D2 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0

D1 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0

D0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0

And the state diagram is:

Here it can be seen that when D0 and K are equal, the next state of D0 will equal 0. When they are not equal, the next state equals 1. So, D0 = A0 xor K. And D1 equals 1 when A0K = 1 and A1 = 0, or vice versa so we develop the formula, D1 = A1 xor (A0K). We can see that D2 equals 1 when A1A0K = 1 and A2 = 0, or vice versa. Then we get D2 = A1A0K xor A2. For our final formula, we can see from the pattern what our D3 will probably equal. Looking at the state table, we see that it is correct. D3 = A2A1A0K xor A3. We can draw the circuit:

A2. Read-only memory (ROM) is a class of storage medium used in computers and other electronic devices. Data stored in ROM cannot be modified, or can be modified only slowly or with difficulty, so it is mainly used to distribute firmware (software that is very closely tied to specific hardware and unlikely to need frequent updates). The binary information must be specified by the designer and is then embedded in the unit to form the required interconnection pattern. A programmable read-only memory (PROM) or field programmable read-only memory (FPROM) or one-time programmable non-volatile memory (OTP NVM) is a form of digital memory where the setting of each bit is locked by a fuse or antifuse. Such PROMs are used to store programs permanently. The key difference from a strict ROM is that the programming is applied after the device is constructed. The availability of this technology allows companies to keep a supply of blank PROMs in stock, and program them at the last minute to avoid large volume commitment. An EPROM (rarely EROM), or erasable programmable read only memory, is a type of memory chip that retains its data when its power supply is switched off. In other words, it is non-volatile. It is an array of floating-gate transistors individually programmed by an electronic device that supplies higher voltages than those normally used in digital circuits. Once programmed, an EPROM can be erased by exposing it to strong ultraviolet light from a mercury-vapor light source. EPROMs are easily recognizable by the transparent fused quartz window in the top of the package, through which the silicon chip is visible, and which permits exposure to UV light during erasing. EEPROM stands for Electrically Erasable Programmable Read-Only Memory and is a type of non-volatile memory used in computers and other electronic devices to store small amounts of data that must be saved when power is removed, e.g., calibration tables or device configuration. In an EEPROM that is frequently reprogrammed while the computer is in use, the life of the EEPROM can be an important design consideration. It is for this reason

that EEPROMs were used for configuration information, rather than random access memory. EEPROM is usermodifiable read-only memory (ROM) that can be erased and reprogrammed (written to) repeatedly through the application of higher than normal electrical voltage generated externally or internally in the case of modern EEPROMs. Flash memory is a non-volatile computer storage chip that can be electrically erased and reprogrammed. It was developed from EEPROM (electrically erasable programmable read-only memory) and must be erased in fairly large blocks before these can be rewritten with new data. The high density NAND type must also be programmed and read in (smaller) blocks, or pages, while the NOR type allows a single machine word (byte) to be written and/or read independently. Although flash memory is technically a type of EEPROM, the term "EEPROM" is generally used to refer specifically to non-flash EEPROM which is erasable in small blocks, typically bytes. Because erase cycles are slow, the large block sizes used in flash memory erasing give it a significant speed advantage over old-style EEPROM when writing large amounts of data. Flash memory now costs far less than byte-programmable EEPROM and has become the dominant memory type wherever a significant amount of non-volatile, solid state storage is needed. A3) Truth table of the related circuit: A1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Inputs A0 B1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Add O1 O0 0 0 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 0 1 1 0 0 0 1 1 1 0 0 0 1 1 0 Subs. O1 O0 0 0 1 1 1 0 0 1 0 1 0 0 0 1 1 0 1 0 0 1 0 0 0 1 1 1 1 0 0 1 0 0 And O1 O0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 1 0 0 0 0 1 1 0 1 1 Comp. O1 O0 0 0 0 1 0 1 0 1 1 0 0 0 0 1 0 1 1 0 1 0 0 0 0 1 1 0 1 0 1 0 0 0

For addition and subtraction, two bit Full Adder and Subtractor is used so K-map is not created for addition and subtraction outputs. Also, there is no need to create K-map for AND operation. K-map for comparison operation:

O0 = A1B1 + A1A0B0 + A0B1B0

O1 = A1B1 + A0B1B0 + A1A0B0

The Arithmetic Logic Circuit is drawn below. 2 multiplexer is used for the outputs and choosing the operand. The operands for the ALU are: S1 0 0 1 1 S0 0 1 0 1 Operations And Subtraction Addition Comparison

Here; when S0 = 1, C0 is 1 and so subtraction can be performed by full adder/subtractor. And when S0 is 1, if S1 is 1, ALU performs comparison. Also when S0 is 1, if S1 is 0, subtraction can be performed.

A4. a) 1 Hamming Code Parity Bits 0 P1 2 1 P2 3 0 4 0 P4 Bit Number 5 6 7 8 1 1 1 1 P8 9 1 10 0 11 0 12 0

Here, check bits are: ( ) ( ) ( ) ( ) ( ) And

So, we can say that wrong bit index is 7.

For finding corrected data, wrong bit should be complemented. The original data is: 01101000 b) 1 Hamming Code Parity Bits 0 P1 2 1 P2 3 1 4 1 P4 Bit Number 5 6 7 8 0 1 0 1 P8 9 0 10 0 11 1 12 0

Here check bits are: ( ) ( ) ( ) ( ) ( ) And So, we can say that there is not any wrong bit. The original data is: 10100010 c) 1 Hamming Code Parity Bits 0 P1 2 1 P2 3 0 4 0 P4 Bit Number 5 6 7 8 0 0 0 0 P8 9 0 10 1 11 0 12 1

Here check bits are: ( ) ( ) ( ) ( ) ( ) And So, we can say that P4 (parity bit) is wrong. The original data is: 00000101 A5. 256/64 = 4, so we can generate 256x8 ROM by using four 64x8 ROM and a 2x4 Decoder. 64x8 ROM should has 6 address lines and 256x8 ROM has 8 address lines. Therefore, 2 address lines are used for 2x4 Decoder and 6 address lines are used for 64x8 ROM.

It is assumed that 64x8 ROMs outputs are three states.

A6. a) Instruction pointer register indicates where the computer is in its instruction sequence. Instruction pointer register or program counter holds either the memory address of the instruction being executed, or the address of the next instruction to be executed. b) First bus is Address Bus. Address bus is used to specify a physical address. When any device needs to read or write to a memory location, it specifies that the memory location on the Address Bus. And the second bus is Data Bus. It carries the data which will be written to memory. The data bus transfers data and address bus transfers information about where the data should go. c) so 17 address pins are necessary. Also, 128Kx16 memory should have 16 data pins. d) different types of instruction. bit is the largest program size. e) mov bx, 0100h => It is for setting 0100h to bx. mov bx, [0100h] => It is for setting the value which is addressed as 0100h to bx.