Mar.

2006

Journal of Electronic Science and Technology of China

Vol.4 No.1

Modeling and Analysis of Pulse Skip Modulation *

LUO Ping, ZHANG Bo, WANG Shun-ping, FENG Yong
School of Microelectronics and Solid-State Electronics, University of Electronic Science and Technology of China Chengdu 610054 China

Abstract The state space average model and the large signal models of Pulse Skip Modulation (PSM) mode are given in this paper. Farther more, based on these models and simulations of PSM converter circuits, the analysis of the characteristics of PSM converter is described in this paper, of which include efficiency, frequency spectrum analysis, output voltage ripple, response speed and interference rejection capability. Compared with PWM control mode, PSM converter has high efficiency, especially with light loads, quick response, good interference rejection and good EMC characteristic. Improved PSM slightly, it could be a kind of good independent regulating mode during the whole operating process for a DC-DC converter. Finally, some experimental results are also presented in this paper. Key words Pulse Skip Modulation (PSM); state space averaged model; large signal model; efficiency; Electro Magnetic Interference (EMI); output voltage ripple; improved PSM PWM is widely used in DC-DC converter for a long time due to its good regulating characteristics. But its efficiency is low when it has light load[1-2]. To obtain high efficiency of power converters, more and more switching control ICs introduce Pulse Skip Modulation (PSM) mode into PWM mode when they have light loads or working in sleeping status recently[3]. However, the mathematic model and deep analysis of PSM are seldom found except some application examples. This paper makes PSM mode as the whole time control mode of a switching converter and models it firstly, which includes its state space average model and large signal models. Secondly, it analyzes the characteristics and behaviors of PSM converter. Thirdly, some simulations and experiments are given to validate the models of PSM and show the characteristics of PSM converter. Also, an improved PSM mode is simple introduced at the end of this paper. Suppose the setting value of output voltage is Vref. If vo is lower than Vref, the PSM control signals would act on the power transistor Tr to make it operate on the normal on-off state. Otherwise, some control pulses would be shielded at its counterpart clock cycles and skipped in order to keep an off state during the whole cycles to decrease the output voltage and hold its value steady. The PSM control pulse is depicted in Fig.1(b). It is shown that PWM mode is based on Constant Frequency Variable Width (CFVW) control pulse, PFM on Variable Frequency Constant Width (VFCW) control pulse, whereas, PSM is based on Constant Frequency Constant Width (CFCW) control signal pulse[4-6]. Obviously, they are different kinds of control pulses. The power transistor of PSM regulator works with constant frequency and constant width pulse or skips the cycle in each period according to the load in order to keep the output voltage of converter steady. Assume Tr in the PSM converter operates n cycles as normal on-off switching state, while skips m cycles at off state. Assume a total large working period of power device is Ts, and Ts = (n + m)T .
Tr L iL vo vs Vp iC io R

State Space Average Model and Static Characteristics of PSM

Without losing universality, a buck switching converter shown in Fig.1(a) is used to analyze the principle and behaviors of PSM, where, vs and vo are the input and output instantaneous voltages respectively, Vp is the control signal for power transistor, iL, iC and io are the instantaneous currents of inductor, capacitor and load respectively.
Received 2005-12-19 * Supported by the National Natural Science Foundation of China (No.60436030)

Controller (a) Topology of buck converter

2
Vref vo Clock PSM PWM PFM

Journal of Electronic Science and Technology of China

Vol.4

dx(t ) = A1 x(t ) + (1 M ) D1 B1vs (t ) , dt y (t ) = C T x(t ) 1

for CCM

(2a)

(b) Control pulse signals for different modulation modes

Fig.1 Topology of buck converter and waveform of control pulse

Basing on state-space average analysis method, PSM converter is modeled and the state space equations of buck converter for Continuous Current Mode (CCM) and Discrete Current Mode (DCM) are obtained as: 1) During n cycles,
dx = A1 x + B1vs , 0 t < D1T for CCM and DCM dt y = CT x 1

dx(t ) dt = {(1 M )[( D1 + D2 ) A1 + D3 A3 ] + MA3 }x(t ) + (1 M ) D1 B1vs (t ), for DCM T y (t ) = C1 x(t ) (2b) where, D1 + D2 = 1 for CCM, D1 + D2 + D3 = 1 for DCM.
iL vo i L Io t t1 2 i =0A vo

D1T (1D1)T T nT mT Ts

(a) Waveform of iL and vo for CCM iL T iL vo Io vo

(1a)
dx = A2 x + B2 vs , dt y = CT x 2

D T t < T for CCM 1 D1T t < D2T for DCM

i =0A D1T D2T D3T nT Ts

mT t1

t2

(b) Waveform of iL and v o for DCM

(1b)
dx = A3 x + B3vs , dt y = CT x 3

Fig.2 The waveforms of iL and v o of buck converter

D2T t < T

only for DCM (1c)

2) During m cycles,
dx = A2 x + B2 vs , 0t < T dt y = CT x 2 dx = A3 x + B3 vs , dt y = CT x 3

Based on Eq.(2a) and (2b), Fig.2 gives the waveforms of the inductor current iL and output voltage vo of a buck converter, in which Fig.2(a) is for CCM and Fig.2(b) for DCM. A modulation factor is defined as following[6], M = 1 fa / f ,

0 M 1

(3) (4)

for CCM

Then the average output voltage is

Vo = (1 M ) DmVs

0t < T

for DCM

(1d)

1/ L i 0 where x = L , y = vo , A1 = A2 = , 1/ C 1/ RC vc 0 1/ L 0 B1 = A3 = , , B2 = B3 = 0 , 0 0 1/ RC 0 1 C1 = C2 = C3 = , D1 is the duty ratio of Tr. For 0 0 PSM converter, and D1 = Dm . Then, the state space average models of PSM converter for CCM and DCM modes are deduced to:

where f is the clock frequency, fa is the actual frequency of Tr, Vs is the average value of vs, Dm is the maximum duty ratio of PSM control signal. It can be deduced to the relationship of the modulation factor M to the load R from Fig.2 according to the relationship of iL and the average output load current Io.
M =1 M =1 2Vo L , for CCM ( D1Vs Vo )TR 2Vo2 L , for DCM Vs (Vs Vo ) D12TR (5)

From Eq.(5), it is shown that the larger the load resistance R is, the bigger the modulation factor M is. The Laplace transform equation of PSM signals

No.1

LUO Ping, et al: Modeling and Analysis of Pulse Skip Modulation

Eq.(6a) can be written as Eq.(6b),

h(t ) = {[u (t kT ) u (t D1T kT )
k n+m l = n +1

Vo =

Vo D2 2 m ( D1 + D2 )]2 ( D1 + D2 )n, T [2 8 LC n+m for DCM (8) Vo D2 2 T , for CCM 8LC

[ut klT ) u (t D1T klT ) ]

}
(6a) (6b)

The counterpart of Eq.(8) for PWM is written as: Vo =

k = 0,1,L
n+ m 1 1 1 H ( s ) = (1 e sD1T ) sT sTl s (1 e ) l = n +1 (1 e )

where the definitions of D1, n and m are the same as front. Meanwhile, the Laplace transform equation of PWM control pulse signals could be contrastively as: H (s) = 1 (1 e sD1T ) sT s (1 e ) (7)

However, D1 in Eqs.(6) and (7) are different. D1 Dm for PSM, while, D1 is alterable affected by different loads for PWM. According to Eq.(6), the frequency characteristic of PSM control signal is shown in Fig.3(a), in which we simply choose m = 1 , and T = 10 s , Dm = 2 / 3 . Due to its side frequency spectrum, the harmonic amplitude of PSM signal is smaller than that of PWM signal shown in Fig.3(b). This is useful for PSM converter to compress EMI[7-8].
1.0 |H(j)|/10-3V 0.5 0 0 PSM

f /106Hz

(a) Frequency characteristic of PSM control signal 1.5 |H(j)|/10-3V 1.0 0.5 0 0 PWM

Vo D2 2 T [2 ( D1 + D2 )]2 ( D1 + D2 ), for DCM 8LC (9) Comparing Eq.(8) and Eq.(9), it is shown that Vo of PSM converter is larger than that of PWM converter, either in CCM or DCM states. But, if the switching frequency increased, the output voltage ripple could be controlled within a very small range. It is known that the dissipation of power transistor, such as a power MOSFET, mainly includes two parts. One is dynamic switching dissipation Pswitch = Af [9], where A is the dissipation factor. The other part is static dissipation of power MOSFET when it is operating on on/off state. Because the dissipation at on state is much larger than that at off state, the other static power dissipation of the MOSFET can be [10] 2 expressed as Pon = Rds iRMS , where Rds is the on resistance of power MOSFET and iRMS is the RMS value of switching current. With the increasing of the load resistance R the output current and the switching current will increase. And the increment of the total dissipation of the power transistor is larger than that of the output power of the converter, which makes the efficiencies of converters decrease a little along with the increasing of the output power of the converter. Furthermore iRMS depends on the load current[11]. For DCM, neglecting the dissipations of other components except that of the power transistor in the circuit, the efficiency of the converter can be obtained as: Pout (10) = 4 D1 Af + Rds I o2 + Pout 3( D1 + D2 ) Vo = where Io is the average current of load.

2 f /106Hz

(b) Frequency characteristic of PWM control signal

Fig.3

Frequency characteristics for PSM and PWM

Large Signal Model and Transient Characteristics of PSM Converter

In steady state, the average output voltage ripple Vo of PSM converter can be expressed as:

Vo =

Vo 2 T ( D2 + m)(m + n), for CCM 8 LC

Although the method of state-space averaging is easy to analyze nonlinear converter, it is not suitable to describe the transient characteristics of the converter because of a little large analysis error. Usually, large signal model is adopted to deal with the transient

Journal of Electronic Science and Technology of China

Vol.4

analysis of switching converter[12-13]. Here we give the discrete model and phase portrait to analyze the transient characteristics of PSM converter. In one period, the discrete model of PSM converter is based on: 1) During n cycles,
x(tk +1 ) = e A2t2 e A1t1 x(tk ) + [e A2t2 e A1t1 e A2t2

A closed PSM converter system shown in Fig.5 is utilized to analyze the closed transient response characteristics of PSM converter. In Fig.5, the object is the linear part of the converter system, which can be described by Eq.(13): LC d 2 vo L dvo + + vo = uD dt 2 R d t (13)

tk + t1 tk

e A1 (t1 ) B1d +

tk + t2 tk + t1

e A2 (t2 ) B2 d ]Vs (11a)

The PSM controller is nonlinear described as V , u= s 0, Let Vs (t ) = Vs 1(t ), e>0 e0

2) During m cycles, x(tk +1 ) = e A2t3 x(tk ) + e A2t3

tk + t3

tk

e A2 ( t3 ) B2 dVs

(11b)

According to Cayley-Hamilton Theorem, the discrete iterative equation of PSM converter can be written as: 1) During n cycles:
x(tk +1 ) = e
A2 t2

dvo (0) d 2 vo (0) = 0, =0 . dt dt 2 Based on e(t ) = Vref vo (t ) , the equation function of e(t) is: 1) When e > 0 , d 2 e(t ) L de(t ) + + e(t ) Vref = uD, LC R dt dt 2 for kT t < kT + D1T 2 LC d e(t ) + L de(t ) + e(t ) V = 0, ref R dt dt 2 for kT + D1T t < (k + 1)T 2) When e 0 , LC d 2 e(t ) L de(t ) + + e(t ) Vref = 0, dt 2 R dt for kT + D1T t < (k + 1)T
0.1 0 0.1 2 0 e(t) /V 2 4 2 0 e(t) /V (b) PWM, R=50 0.1 0 0.1 2 0 e(t) /V (c) PSM, R=10 2 4 2 0 e(t) /V (d) PWM, R=10 2 4 2 4

A1t1

x(tk ) + e

A2 t2

(e

A1t1

I)A BV

1 1 1 s

(12a)

2) During m cycles:
x(tk +1 ) = e
A2 t3

(14a)

x(tk )

(12b)

The boundary conditions of the discrete model of PSM converter in CCM are x2 (t1 ) = Vref and t1 + t2 + t3 = T . Fig.4. gives the response waveforms of loop PSM and PWM converter with different loads, where T = 1 s , L = 500 H , C = 1 F , Vs = 12 V, Vref = 5 V , D = D1 = 2 / 3 , and D2 = 0.28 . From Fig.4, it is shown that the response speed of PSM converter is quicker than that of PWM converter. Although the output ripple of PSM converter is larger than that of PWM converter, especially with large load resistances, it can be reduced by increasing the clock frequency.
8 6 vo / V 4 2 1 0 PSM vo / V PWM 0.5 1.0 t /10 s
4

(14b)

0.1 0 0.1

8 6 4 2 1 0

PWM PSM 0.5 1.0 t /10 s

4

(a) PSM, R=50 1.5 0.1 0 0.1

1.5

(a) R=10

(b) R=50

Fig.4 Open loop response waveforms of PSM and PWM converters with different loads
Vref e 0V Vs 0V PSM e u D s2LC+sL/R+1 Object Vo(s)

Fig.5

Diagram of closed PSM converter system

Fig.6 Phase portraits of PSM and PWM converters with different loads

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LUO Ping, et al: Modeling and Analysis of Pulse Skip Modulation 6 5 4 3 2 1 0 0 100 200 t/ms 300 400

According to Eqs.(14a) and (14b), with the same simulating condition as above, the phase portraits of PSM and PWM converters with different loads are given in Fig.6, which shows the response speed of PSM converter is quicker than that of PWM converter. Fig.6(a) and Fig.6(b) indicate that PSM regulator depresses the abrupt voltage quite quicker than PWM regulator, Fig.6(c) and Fig.6(d) show that PSM converter needs less periods to reach the steady point, whereas, the output ripple of PSM is little larger with light loads.

Vgs/ V

(c) R=300

Fig.8 Experimental waveforms of Vgs in a flyback PSM converter with different loads

Simulation, Discussion

Experiment

and

Based on above models and analysis, some simulation and experiment results are given in this section. Fig.7 shows the simulation waveforms of V p and iL with different loads of a PSM buck converter. When the load is heavy, e.g. R = 15 , almost the switching device works on every cycle. If the load becomes lighter, e.g. R = 50 , some cycles will be skipped; while, more cycles would be skipped if the load is more light, such as, R = 80 . This simulation explicates that the lighter the load is, the more cycles will be skipped. This is consistent with Eq.(5).
VP

Fig.9 gives the frequency spectra for the three different control signals. They are similar to Fig.3. Obviously, the harmonic peaks of PSM control pulse are emerged at the points which integral times of basic frequency. This results that the frequency spectrum of PSM pulse is more regulated than that of PFM pulse. On the other hand, its harmonic peaks are smaller than that of PWM pulse. So it can be said that PSM has good EMI characteristic. Fig.10 gives the response of different converter at R = 10 with interference, which added at 1.0 s and 2.0 s. And the amplitudes of the interference signal are +100 V and 20 V respectively. From Fig.9, it is shown the good rejection of that of PWM converter, especially to up-rush interference signal.
2.0 Vp / V

1.0

iL

R=15

R=50

R=80

0 0 0.5 1.0 f / MHz 1.5

Fig.7 Simulation waveforms of Vp and iL with different loads

A flyback DC-DC converter prototype with Vs = 220 V, Vref = 5 V is built and experimented using PSM mode. The frequency of the clock oscillating is 132 kHz and the maximum duty ratio is 67%. Fig.8 depicts the experimental waveform of the Vgs in a flyback PSM converter with different loads. It verified the relationship of the skipped cycle number with the loads.
7 6 5 4 3 2 1 0 0 100 200 t/ms 300 400 6 5 4 3 2 1 0

(a) Frequency characteristic of PSM control signal 4.0 Vp / V

2.0

0 0 0.5 1.0 f / MHz 1.5

(b) Frequency characteristic of PWM control signal 2.0 Vp / V

Vgs / V

Vgs/ V

1.0

0 0 0 100 200 t/ms 300 400 0.5 1.0 f / MHz 1.5

(c) Frequency characteristic of PFM control signal

(a) R=7.5

(b)R=35

Fig.9 Frequency characteristics of PSM, PWM and PFM

Journal of Electronic Science and Technology of China

700 600 500 400 300 200 100 0 100 600 500 400 300 200 100 0 100 200

Vol.4

t / s104

Vds / V

0 4

Fig.10 Response of PSM and PWM converters with interference

12 16 t / s

20 24

Vds / V

PSM vo / V

PWM

0 4

12 16 t / s

20 24

(a) The Vds at R=7.5 700 600 500 400 300 200 100 0 100 0 4 8 12 16 t / s 20 24 7 6 5 4 3 2 1 0 1 0

(b) The Vds at R=35

Although PSM mode has many advantages, its shortcomings block it widely used in DC/DC converter, which, the actual switching frequency of switching device in a PSM converter is easy to enter the audible noise range and the output ripple seems a little large. In order to avoid these shortcomings, an improved PSM mode is also proposed in this paper. According to above analysis, it is shown that the lighter the load is, the more cycles it will be skipped. So that the larger the output ripple is and the easier the real frequency of the switching device enters into audible noise range[14]. Hence, an improved PSM is proposed here. A current sense is introduced to test the status of loads. We divide the loads into three stages, normal, slight light, and light, according to the inductance current or the load average current. When current sensor detects that the load is a normal load, the duty ratio of the PSM control pulse keeps Dmax, while, k1Dmax and k2Dmax could be the new duty ratios of PSM control pulse when load becomes slight light and light. Here, 1>k1>k2>0. So a usual PSM controller adds a duty ratio selector with a load status judge forms an improved PSM controller. Fig.11 presents the experiment results of the drain-source voltage of a switching MOSFET in the same flyback converter described above which adopts the improved PSM control mode this time. Figs.11(a), (b), (c) show the drain-source voltages of power MOS with different loads. It is depicted that the duty ratio of the control pulse is reduced in Fig.11(b) when the loads become light. If the load is much lighter, some cycles would be skipped, which is shown in Fig.11(c). But the skipped cycle number couldnt be too many due to the duty ratio decrease so that it can be avoided the real frequency of the switching device enter into audible noise range. It also can be seen that the output voltage ripple is small in Fig.11(d) when load is light.

Vds / V

Vo / V

10

20 30 40 50 60 t/ms

(c) The Vds at R=300

(d) The Vo of the converter

Fig.11 Experiment results of a flyback converter adopting improved PSM

Conclusion

In this paper, some mathematics models and characteristics analysis of PSM are presented. The calculation and the simulation show that the PSM mode has high efficiency, especially with light loads, quick response speed and good EMI characteristic and good interference rejection. To avoid large output voltage ripple and incident that the real frequency of switching device entering audible noise range, an improved PSM mode is also proposed, which properly adjusts the duty ratio when the load becomes light. This makes PSM mode be an independent regulate mode for a DC/DC converter during its whole operating time, not just an assistant mode.
References
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LUO Ping, et al: Modeling and Analysis of Pulse Skip Modulation

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Brief Introduction to Author(s)

LUO Ping ( ) was born in Xinjiang Province, China, in 1968. She received the B.S. and M.S. degrees in automation control from Chongqing University in 1990 and 1993 respectively. She received the Ph.D. degree in circuit and system from University of Electronic Science and Technology of China (UESTC) in 2004. Now, she is an associate professor in UESTC. Her main research interests include smart power IC, power electronics technology and automation system design. ZHANG Bo ( ) was born in Sichuan Province, China, in 1964. He received the B.S. degree in microelectronics from University of Beijing Industry in 1984 and received the M.S. degree in microelectronics from UESTC in 1987. Now, he is a professor with UESTC. His main research interests include new kinds of power devices and smart power IC.