B9 BSS Architecture Service Guideline Draft Version Doc Cai Nay Di

Alcatel File Reference Date Edition Page
B9BSSarchitectureserviceguidelinedraIt version.doc 15/02/06 DraItt 1

Site
Velizy
Mobile Radio Division
Originator(s)
P. Chootapa
E. Salomon
B9: BSS Architecture Service Guideline

Domain : Network Architecture
Product : GSM B9
Division : Methods
Rubric : GSM/GPRS/EDGE
Type : Guide lines
Distribution codes Internal:
Pre-distribution:
PCS Stuttgart PCS Velizy PCS Timisora
M. Hahn E. Salomon E. Marza
H. Ho

Abstract: The aim oI this document is to describe BSS architecture conIiguration rules &
dimensioning processes in Alcatel release B9. It is recommended to be the guideline Ior RNE
& TPM people who involve in BSS architecture aspect.

Key words: BTS, BSC, TC, MFS/GPU, Abis, AterMUX, A, and Gb; B9 release

Appraisal and approval authorities
PCS France Eric Deblancs PCS/RACC Eric Salomon
DD-MM-YY: Signature: DD-MM-YY: Signature:
PCS Germany Matthias Hahn
DD-MM-YY: Signature: DD-MM-YY: Signature:

All Alcatel system details given in this document are for your comfort only. The
system information may not reflect the latest status of the equipment used in your
project. Please consult in addition to this document the latest product descriptions!

Table of contents

1 INTRODUCTION..................................................................................... 10
2 OVERVIEW OF BSS ARCHITECTURE SERVICES ........................ 11
2.1 WHAT IS THE BSS ARCHITECTURE ? .......................................................................... 11
2.2 BSS ARCHITECTURE SERVICES................................................................................... 14
2.3 BSS ARCHITETURE IMPACT IN B9 ........................................................................... 21
3 DETAILED BSS ARCHITECTURE PROCESS .................................. 26
3.1 BTS ............................................................................................................................ 26
3.1.1 BTS Configurations.......................................................................................... 26
3.1.1.1 Cell ConIiguration....................................................................................... 28
3.1.1.2 SDCCH ConIiguration................................................................................. 29
3.1.2 Determination of BTS configuration................................................................ 31
3.1.3 Cell dimensioning............................................................................................. 31
3.1.3.1.1 SDCCH Dimensioning............................................................................................................... 32
3.1.3.1.2 TCH/PDCH Dimensioning ........................................................................................................ 33
3.2 ABIS INTERFACE ......................................................................................................... 38
3.2.1 Abis Configuration........................................................................................... 38
3.2.1.1 Abis Network Topology............................................................................... 38
3.2.1.2 Abis Channels .............................................................................................. 40
3.2.1.3 Abis Link Capacity....................................................................................... 42
3.2.1.4 Signaling Sub-Multiplexing Schemes.......................................................... 43
3.2.1.4.1 No Multiplexing......................................................................................................................... 43
3.2.1.4.2 16K Static Multiplexing............................................................................................................. 43
3.2.1.4.3 64K Statistical Multiplexing...................................................................................................... 44
3.2.1.4.4 16K Statistical Multiplexing...................................................................................................... 46
3.2.1.5 Secondary Abis Link................................................................................... 47
3.2.2 Abis Dimensioning ........................................................................................... 48
3.3 BSC............................................................................................................................ 53
3.3.1 G2 BSC Configuration ..................................................................................... 53
3.3.1.1 BSC Capacity............................................................................................... 54
3.3.1.2 Abis TSU...................................................................................................... 55
3.3.1.3 Ater TSU...................................................................................................... 57

3.3.2 BSC Evolution Configuration........................................................................... 58
3.3.2.1 BSC Capacity............................................................................................... 59
3.3.2.2 Delta BSC Evolution versus G2 BSC.......................................................... 59
3.3.3 BSC Dimensioning ........................................................................................... 60
3.3.3.1 Design BSC area .......................................................................................... 61
3.3.3.2 Parenting Abis TSU ports oI the BSC.......................................................... 63
3.3.4 LA Dimensioning.............................................................................................. 64
3.3.5 RA Dimensioning.............................................................................................. 68
3.4 ATERMUX AND A INTERFACES.................................................................................. 70
3.4.1 AterMUX configuration.................................................................................... 71
3.4.1.1 AterMUX CS and A.................................................................................... 72
3.4.1.2 AterMUX PS................................................................................................ 74
3.4.1.3 AterMUX CS/PS.......................................................................................... 75
3.4.2 AterMUX Dimensioning................................................................................... 77
3.4.2.1 AterMUX CS and A..................................................................................... 77
3.4.2.2 AterMUX PS................................................................................................ 83
3.4.2.3 AterMUX CS/PS.......................................................................................... 83
3.5 TC............................................................................................................................... 84
3.5.1 G2 TC Configuration ....................................................................................... 84
3.5.2 G2.5 TC Configuration .................................................................................... 85
3.5.3 TC Dimensioning.............................................................................................. 86
3.6 MFS............................................................................................................................ 87
3.6.1 The 1
st
MFS generation (A9135 MFS) ............................................................. 87
3.6.1.1 GPRS Processing Unit (GPU)...................................................................... 88
3.6.1.2 Multiple GPU per BSS................................................................................. 88
3.6.1.3 Capacity........................................................................................................ 89
3.6.2 MFS Evolution (A9130 MFS)........................................................................... 89
3.6.2.1 Capacity........................................................................................................ 90
3.6.2.2 Delta MFS Evolution versus the 1
st
MFS generation................................... 90
3.6.3 GPU Dimensioning .......................................................................................... 91
3.7 GB INTERFACE ............................................................................................................ 92
3.7.1 Gb Configuration ............................................................................................. 92
3.7.2 Gb Dimensioning.............................................................................................. 93

INDEX OF FIGURES
Figure 1: BSS Architecture ...................................................................................................... 11
Figure 2: TRX conIiguration on Um interIace......................................................................... 12
Figure 3: Abis conIiguration .................................................................................................... 12
Figure 4: AterMUX conIiguration Dedicated AterMUX Ior CS traIIic ............................... 13
Figure 5: A interIace conIiguration.......................................................................................... 13
Figure 6: BSS Architecture Services........................................................................................ 14
Figure 7: Network Architecture Setup and Evolution process................................................. 15
Figure 8: BSC/LAC/RAC (re) design - example .................................................................... 16
Figure 9: Abis TSU port (re) design......................................................................................... 18
Figure 10: Network architecture assessment process............................................................... 19
Figure 11: EGCH link in B8 vs M-EGCH link in B9.............................................................. 21
Figure 12: Wasted Abis nibbles case in B8............................................................................. 23
Figure 13: Enhance transmission resource management ......................................................... 23
Figure 14: AterMUX TS reserved by GPU Ater TS margin.................................................... 24
Figure 15: Better transmission resource usage with DL retransmission in the BTS................ 25
Figure 16: BTS generation/type supported in B9.................................................................. 26
Figure 17: Determination oI BTS conIiguration...................................................................... 31
Figure 18: SDCCH dimensioning assessment ......................................................................... 33
Figure 19: TCH/PDCH dimensioning method......................................................................... 34
Figure 20: TCH/PDCH dimensioning assessment ................................................................... 37
Figure 21: Abis Chain (Multi-drop) Topology ........................................................................ 38

Figure 22: Abis Star Topology................................................................................................. 39
Figure 23: Abis Ring (Closed loop) Topology......................................................................... 39
Figure 24: Secondary Abis Topology ...................................................................................... 40
Figure 25: TRX - Abis mapping .............................................................................................. 41
Figure 26: Example oI Abis TS usage Ior 1 BTS/4 TRX No Multiplexing.......................... 43
Figure 27: Example oI Abis TS usage Ior 1 BTS/4 TRX 16K Static Multiplexing ............. 44
Figure 28: 64K Statistical Multiplexing MCB 64/1 mapping............................................... 45
Figure 31: Example oI Abis TS usage Ior 1 BTS/4 TRX 64K Statistical Multiplexing....... 46
Figure 33: Example oI Abis TS usage Ior 1 BTS/4 TRX 16K Statistical Multiplexing....... 47
Figure 34: Abis TS conIiguration on primary and secondary links ......................................... 48
Figure 35: BTS conIiguration example oI Abis dimensioning without concerning
counter measurement ......................................................................................................... 50
Figure 36: G2 BSC (A9120 BSC) Architecture....................................................................... 53
Figure 37: G2 BSC Cabinet layout .......................................................................................... 54
Figure 38: Abis TSU G2 BSC............................................................................................... 55
Figure 39: Ater TSU G2 BSC............................................................................................... 57
Figure 40: BSC Evolution (A9130 BSC) HW Architecture .................................................... 58
Figure 41: BSC dimensioning process..................................................................................... 60
Figure 42: BTS position & conIiguration design BSC area step 1 ....................................... 61
Figure 43: Transmission planning & BSC position design BSC area step 2........................ 62

Figure 44: BSC area deIinition design BSC area step 3 ....................................................... 62
Figure 45: Transmission load checking ................................................................................... 63
Figure 46: BTS / Abis parenting on BSC done by AMT.NET........................................... 64
Figure 47: LA dimensioning assessment ................................................................................. 67
Figure 48: Subdivision oI a LA in GPRS routing areas (RA).................................................. 68
Figure 49: AterMUX and A relationship ................................................................................. 70
Figure 50: AterMUX interIace structure.................................................................................. 71
Figure 51: AterMUX CS interIace conIiguration G2 BSC................................................... 72
Figure 52: Channel mapping between AterMUX CS and A.................................................... 73
Figure 53: AterMUX PS interIace conIiguration - GPU.......................................................... 74
Figure 54: Sharing AterMUX links.......................................................................................... 75
Figure 55: AterMUX CS/PS Timeslot conIiguration............................................................... 76
Figure 56: AterMUX CS dimensioning process ...................................................................... 77
Figure 57: Calculation oI CS traIIic at BSC level.................................................................... 78
Figure 58: DiIIerence between Exact busy hour, RNO busy hour and Peak traIIic ................ 78
Figure 59: SS7 dimensioning process ...................................................................................... 81
Figure 60: Calculation oI SDCCH traIIic at BSC level ........................................................... 82
Figure 61: TC dimensioning process ....................................................................................... 86
Figure 62: The 1
st
MFS generation (A9135 MFS) Architecture.............................................. 87
Figure 63: Multiple GPU per BSS ........................................................................................... 88
Figure 64: Gb interIace connections ........................................................................................ 92

INDEX OF TABLES
Table 1: BSC-MFS/GPU-TC (re) design................................................................................. 17
Table 2: GCH consumption B8 vs. B9.................................................................................. 22
Table 3: CongiIuration G1 BTS MKII with DRFU.............................................................. 26
Table 4: ConIiguration G2 BTS............................................................................................ 26
Table 5: ConIiguration Evolium BTS................................................................................... 27
Table 6: ConIiguration Evolium Evolution........................................................................... 27
Table 7: BTS HW Capability in B9 ......................................................................................... 28
Table 8: Cell Types .................................................................................................................. 28
Table 9: Frequency Hopping supported in B9 ......................................................................... 29
Table 10: Recommended SDCCH conIiguration Ior a standard cell only FR TRXs........... 30
Table 11: Counter list - SDCCH dimensioning ....................................................................... 32
Table 12: Counter list - TCH dimensioning............................................................................. 33
Table 13: Counter list - PDCH dimensioning.......................................................................... 34
Table 14: RLC data block size Ior each (M) CS...................................................................... 36
Table 15: Abis Channel Types ................................................................................................. 42
Table 16: Number oI TS available in one Abis link ................................................................ 42
Table 17: G2 BSC Capacity..................................................................................................... 54
Table 18: TSL/TCU Mapping.................................................................................................. 56
Table 19: BSC Evolution Capacity.......................................................................................... 59
Table 20: Counter list LA dimensioning............................................................................... 64
Table 21: Counter list RA dimensioning............................................................................... 68

Table 22: Max number oI AterMUX CS interIaces G2 BSC ............................................... 72
Table 24: Max number oI A interIaces G2 BSC................................................................... 73
Table 26: Max number oI AterMUX PS G2 BSC ................................................................. 74
Table 28: Ratio oI Mixing CS and PS TraIIic in Atermux ...................................................... 75
Table 30: Counter list AterMUX CS Dimensioning............................................................. 77
Table 31: Counter list SS7 dimensioning.............................................................................. 81
Table 32: G2 TC/ G2.5 TC capabilities ................................................................................... 84
Table 33: G2 TC conIiguration ................................................................................................ 84
Table 34: G2.5 TC conIiguration ............................................................................................. 85
Table 35: G2.5 TC capacity ..................................................................................................... 85
Table 37: The 1
st
MFS generation (A9135 MFS) Capacity..................................................... 89
Table 38: The MFS Evolution (A9130 MFS) Capacity........................................................... 90

History:

Edition Date Originator Comments
DraIt 15-Feb-06 Pancharat Chootapa
Eric Salomon

Edition changes:

References:

[1]
3BK 17422 5000 PGZZA Ed.20P01 B9 BSS ConIiguration Rules release B9 Irom
MR3
[2]
3BK 10204 0608 DTZZA Enhanced Transmission Resource
Management Release B9
[3] 3BK 17025 0062 DSZZA
Introduction oI DRFU on G1 MK II BTS
Principle oI Method
[4] 3BK 17025 0061 DSZZA
Introduction oI DRFU on G2 BTS Principle
oI Method
[5] 3BK 11210 0157 DSZZA
G3 BTS Architecture and Principles
[6] 3BK 11210 0328 DSZZA
BTS G4 Architecture and Principles
[7]
3DC 21083 0001 TQZZA
EVOLIUM A9100 Base Station Product
description
[8] 3BK 10204 0511 DTZZA SFD: Dynamic SDCCH allocation
[9] 3DF 01903 2810 PGZZA 01
BSS B8 Dimensioning Rules
ConIiguration Description
[10] 3DC 20003 0025 UZZZA
Dimensioning Rules Ior CS and PS traIIic
with BSS SoItware Release B9
[11] 3DC 21150 0323 TQZZA
GSM/GPRS/EDGE Radio Network Design
Process Ior ALCATEL BSS Release B9
[12] 3DC 21016 0005 TQZZA A9135 MFS Product Description

1 INTRODUCTION
The aim oI this document is to describe BSS architecture conIiguration rules &
dimensioning processes in Alcatel release B9.
It is recommended to be the guideline Ior RNE (Radio Network Engineer) & TPM
(Techinical Project Manager) people who involve in BSS architecture aspect.

This document is organised as below:

Part I: Overview of BSS Architecture Service
The purpose oI this part is to give the reader the overview oI the architecture
service Ior the BSS network which consists oI: -
- The global picture oI BSS network architecture together with the short
deIinition Ior each network elements and interIaces
- Describing overall processes Ior each BSS archiecture service
- The short presentation about B8/B9 impacts to BSS architecture. The main
impacts are linked to several new Ieatures in release B9.

Part II: Detailed BSS Architecture Processes
This part describes in the details oI the main network conIiguration rules in
release B9 and the dimensioning processes, which are related to counter analysis.
It covers the Iollowing BSS network elements and interIaces:
- BTS
- BSC
- MFS/GPU
- TC
- Abis interIace
- AterMUX interIace
- A interIace
- Gb interIace

2 Overview of BSS Architecture Services
This section gives an overview oI the BSS architecture. It describes brieIly all the
components in the BSS together with their key Iunctions and the global BSS architecture
processes.

2.1 What is the BSS Architecture ?

Figure 1: BSS Architecture

BSS stands Ior Base Station Subsystem.
The main role oI the BSS is to provide and support both bi-directional signaling and CS
traIIic channels (respectively PS traIIic channels) between the Mobile Station and Network
SubSystem or NSS (respectively GPRS SubSystem or GSS).
As presented in the Figure 1, the BSS consists oI several network elements and interIaces.

BSS Network Elements
BTS (Base Transceiver Station): providing radio links between the Mobile
Stations and the BSC.
BSC (Base Station Controller): controlling several BTSs.
TC (TransCoder): providing speech conversion between the 16 kbits/s
channel (Irom/to BSC side) and the 64 kbits/s channel (Irom/to the MSC
1
).
MFS (Multi-BSS Fast packet Server): To be able to support PS traIIic, a
MFS is introduced in the BSS in order to manage data packets.
----------------------------------------------------------------------------------------------------------------
1
MSC (Mobile Switching Center) is a main network element of the NSS having connection to the BSS.
BTS
BTS
BTS
BSC
MFS
TC
NSS
(CS traffic)
GSS
(PS traffic)
Um Abis
AterMUX CS
Gb
A
BSS (CS+PS traffic)
AterMUX PS
AterMUX CS/PS

BSS Interfaces

Um (air or radio) interface: connecting between MS and BTS
It consists oI a group oI TRXs and the group size is based on the BTS traIIic.

Figure 2: TRX conIiguration on Um interIace

Each TS oI a TRX can provide a channel with various throughputs i.e. FR, EFR,
HR and AMR available Ior CS traIIic while GPRS CS 1-4 and EDGE MCS 1-9
available Ior PS traIIic.
As a radio TS is dynamically allocated to serve either CS or PS traIIic, the TS is
called as TCH while it supports CS traIIic; otherwise called as PDCH while it
supports PS traIIic.

Abis interface: connecting between BTS and BSC
It is usually a 2 Mbps link (64kbps * 32 TSs). Max. 2 links are possible Ior 1 BTS.

Figure 3: Abis conIiguration

Each TS contains 4 16kbps-channels or nibbles.
Based on the corresponding radio TS; at one moment, a given nibble can be called
either as TCH iI its corresponding radio TS is TCH; or as GCH iI its corresponding
radio TS is PDCH.
Other Abis TSs can carry signaling (RSL and OML), or extra TS.

AterMUX interface: providing connections between:
- BSC and TC
- BSC and MFS
- MFS and TC (in case oI AterMUX transporting mixed TraIIic CS & PS)

TS0 TS1 TS2 TS3 TS4 TS5 TS6 TS7
TRX
Abis
CH# 1 CH# 2 CH# 3 CH# +
TS 0
TS 1
:
:
TS 26
TS 27
TS 28
TCH / GCH TCH / GCH TCH / GCH TCH / GCH
TS 29
TCH / GCH TCH / GCH TCH / GCH TCH / GCH
TS 30
TS 31
TS : 6+ Kbits/sec
Channel or Nibble : 16 Kbits/sec
TS 0 Transparency
OML
RSL
Extra TS
Extra TS
:
:
Free
Mapping to 1 TRX
oI Um InterIace

In general, the AterMUX is also a 2 Mbps link (64kbps * 32 TSs). However,
diIIerently Irom Abis, every nibbles on AterMUX are already deIined to be TCH or
GCH or signaling channels.

Figure 4: AterMUX conIiguration Dedicated AterMUX Ior CS traIIic

A interface: connecting between TC and MSC
It is supported by 2 Mbps PCM links (64kpbs * 32 TSs).
One 64 kbps channel on A is corresponding to one 16 kbps channel on AterMUX
TC is responsible for this channel speed conversion.

Figure 5: A interIace conIiguration
The A trunk can carry up to 31 traIIic channels identiIied by a CIC (CIC: Circuit
IdentiIication Code)

Gb interface: connecting between MFS and SGSN
2

It is supported by 2 Mbps PCM links (64kpbs * 32 TSs), which can be based on
Frame Relay Network.

-----------------------------------------------------------------------------------------------------------------
2
SGSN (Serving GPRS Support Node) is a main network element of the GSS having connection to the BSS.
A Interface
TS 0
TS 1
TS 2
TS 3
:
:
:
:
TS 30
TS 31
TS : 6+ Kbits/sec
CC 1
CC 2
CC 3
:
:
:
:
CC 30
Frame Synchronization
CC 31
AterMUX CS
CH# 1 CH# 2 CH# 3 CH# +
TS 0
TS 1 TCH TCH TCH TCH
:
:
TS 1+ Qmux TCH TCH TCH
TS 15
TS 16
:
:
TS 31
TS : 6+ Kbits/sec
Channel or Nibble : 16 Kbits/sec
AIarm octet
SS7
X25
:
:
:
:

2.2 BSS Architecture Services

Scope:
The BSS architecture services cover the main tasks to be perIormed Ior designing the BSS
network topology and Ior dimensioning the BSS network elements and interIaces.

Goal:
It is to deIine the BSS capacity and topology, which is appropriate and necessarv to be
able to support the real network traIIic or to Iit new requirements Ior network evolution.

Category:
According to diIIerent network states, the BSS architecture services can be classiIied into:
1) Network Architecture SETUP
This service is providing the BSS architecture design Ior a new network.

2) Network Architecture ASSESSMENT
For an existing network, it is important to perIorm this service to check periodically the
network perIormance Irom architecture point oI view.

3) Network Architecture EVOLUTION
The BSS architecture should be re-designed in case oI some network evolutions e.g.
network extension (to be adapted to a Iorecasted traIIic scenario) and new network
Ieature activation (GPRS CS 3-4 or EDGE, Ior instance).

Figure 6: BSS Architecture Services
Network Architecture
Evolution
Assessment
Setup
Initial
Steady
Developing
BSS Architecture Services
Network State

Process:
There are 2 diIIerent processes deIined, one Ior supporting the services network
architecture setup and evolution, and the other one Ior supporting the service network
architecture assessment.

I) Process Ior Network Architecture SETUP and EVOLUTION

It is considered the same process can be applied Ior these two BSS architecture services;
see the process diagram below.

Figure 7: Network Architecture Setup and Evolution process

START
(1) Gathering Data
(2) Design/Re-design
(2b) BSC/MFS (GPU)/TC ConIiguration
(2d) Parenting Abis TSU ports oI the BSC
(2a) BSC/LAC/RAC Areas
(2c) Number oI interIaces: Abis, AterMUX, A and Gb
(3) Operational Implementation, according to (2)
FINISH
NW Configuration Rules

Step (1) Gathering data
The Iirst step is to gather the architecture data Irom the network:
NE speciIications i.e. type oI BTS, BSC, MFS, TC.
NE locations.
Current BSS network topology (architecture) available in case oI network
evolution.
DeIined conIiguration e.g. TRX conIiguration (BCCH combined or non-
combined and number oI SDCCH).

Step (2) Design / Re-design
This step will be considered as design in case oI network setup but re-design in case oI
network evolution oI which current design already existed.
The architecture (re)-design should be perIormed Ior each BSS network elements and
interIaces, based on the data Irom Step 1 and also strictly respected to Aetwork
configuration rules for more details, please refer to [1].

(2a) BSC/LAC/RAC Areas
Since the data about TRX conIiguration and BTS location are known (Irom step 1),
the (re)-design will start with deIining the BSC/LAC/RAC area based on
geographical point of view.
The Iollowing is the example oI BSC/LAC/RAC (re) design.
Figure 8: BSC/LAC/RAC (re) design - example

Fore more details, please reIer to section 3.3.3.1 Ior BSC area design, section 3.3.4 Ior
LAC design and section 3.3.5 Ior RAC design.

(2b) BSC/MFS (GPU)/TC ConIiguration
BSC:
An appropriate tvpe and configuration has to be chosen Ior each BSCs in order to
provide the suIIicient capacity to support their resource usage (e.g. number oI TRX,
BTS, Abis, etc. is required Ior a BSC), which is related to the BSC area in the
previous (re)-design.

MFS (GPU) and TC:
According to the deIined BSC conIiguration and the CS traIIic (respectively PS
traIIic), we can continue to design the conIiguration oI TC (respectively MFS/GPU).

ThereIore, the outome oI (re)-design should provide the Iollowing inIormation.
BSC MFS/GPU TC
Type A9120 BSC, etc A9135 MFS, A9130
MFS, etc
G2 TC, A9125
Compact TC, etc
Configuration ConIig 1, 2, 3, 4,
5 or 6
- Nb oI GPU boards
dedicated to each
BSC
- Nb oI MFS racks
- Nb oI TC boards
dedicated to
each BSC
- Nb oI TC racks
Table 1: BSC-MFS/GPU-TC (re) design

Fore more details, please reIer to section 3.3 Ior BSC conIiguration, section 3.5 Ior TC
conIiguration, and section 3.6 Ior MFS conIiguration.

(2c) Number oI interIaces; Abis, AterMUX, A and Gb

AIter the conIiguration oI all BSS network elements is deIined, it comes to the step to
design interfaces connecting them.

In general, we have to design the number oI needed interIace links.

However, additional characteristic has to be designed Ior some interIaces:
- Abis: Type oI signalling sub-multiplexing schemes, BTS in multidrop and
number oI extra Abis TS (in case oI supporting GPRS CS3-4 and EDGE).
- AterMUX: Type oI TraIIic i.e. CS, PS or Mixed CS/PS.
- Gb: Number oI 64 kbits/s TSs conIigured in a link
Fore more details, please reIer to section 3.2 Ior Abis, section 3.4 Ior AterMUX & A,
and section 3.7 Ior Gb.

(2d) Parenting Abis TSU ports oI the BSC
The Iinal (re)-design is to assign the dedicated Abis TSU port (at BSC side) Ior each
Abis link (Irom BTS side).

To perIorm parenting Abis TSU, please reIer the Abis TSU conIiguration rules in
section 3.3.1.2.

However, PCS/RACC has developed the archiecture management tool, so called
AM1.AE1, which assists the radio network engineer to design eIIiciently the
parenting Abis TSU in the convenient way.
For more details, please reIer to websitehttp://pcs.tm.alcatel.ro/Amt)

Below is an example oI parenting Abis TSU, which is done by AMT.NET tool.

Figure 9: Abis TSU port (re) design

Step (3) Operational Implementation
According to the results Irom all architecture (re)-designs in step 2, the operational
implementation should include the Iollowing activities:
The extension oI Network elements i.e. new conIiguration and/or new
resources.
BTS Cutover, either intra BSC (change the connected Abis TSU port within
the same BSC) or inter BSC (diIIerent BSC).
Parameter modiIication.

II) Process Ior Network Architecture ASSESSMENT

The aim oI the process is
- To analyze traIIic Ilows in the network at diIIerent levels (NE & InterIaces).
- To assess the actual Ilows versus the installed BSS architecture capacity: over
dimensioning implies over investment, under dimensioning implies bottlenecks,
congestion and unbalanced investments.

The process diagram Ior network assessment is presented below.

Figure 10: Network architecture assessment process

Step (1) Gathering data
The Iirst step is to gather 2 diIIerent kinds oI data Irom the network:
Traffic data: relevant counters or indicators retrived Irom OMC-R or
NPA/RNO machines.
BSS network topology data: the existing number, location and
configuration oI each BSS network elements and interIaces.
FINISH
START
(1) Gathering Data
NW Configuration Rules
Recommendation/Threshold
(2) Applying Dimensioning Methods
Counters/Indicators vs. ConIiguration analysis
Ior each Network Elements and InterIaces
(3) Assessment
- IdentiIy bottle necks
- IdentiIy need oI new resources / new conIiguration

Step (2) Applying dimensioning methods
It is the process to analyse the traIIic counters (or indicators) by applying the deIined
dimensioning methods and the Aetwork configuration rules. The traIIic analysis
should be done individually at diIIerent level oI NE and interIaces.
BSS network elements:
CELL dimensioning (Ior more details, please reIer to section 3.1.2)
BSC dimensioning (Ior more details, please reIer to section 3.3.3)
TC dimensioning (Ior more details, please reIer to section 3.5.3)
MFS/GPU dimensioning (Ior more details, please reIer to section 3.6.3)

BSS interIaces:
Abis dimensioning (Ior more details, please reIer to section 3.2.2)
AterMUX dimensioning (Ior more details, please reIer to section 3.4.2)
A dimensioning (Ior more details, please reIer to section 3.4.2.1)
Gb dimensioning (Ior more details, please reIer to section 3.7.2)

Step (3) Assessment
This is the last process to assess the installed capacity versus used capacity (reIer to
the traIIic analysis results Irom step 2), based on the recommendation and given
threshold at all levels oI the BSS.

The assessment can identiIy the existing bottleneck that implies the lack oI resources
or unbalanced resource usage.

ThereIore, the proposed solutions should be implementing new resources and/or new
conIiguration and probably parameter modiIication.

2.3 BSS Architeture Impact in B9
In B9 release: there is high improvement in term oI architecture point oI view, especially
Ior the transmission resource (Abis & AterMUX) management, due to the beneIits Irom the
introduction oI some new Ieatures.

B9 Ieatures brought the architecture gains include:

M-EGCH Statistical Multiplexing
In order to carry PS-related data, a bi-directional link needs to be established between
the MFS and the BTS (through the BSC).

In B9 release, that link is called M-EGCH link (M` standing Ior 'Multiplexed) Ior
Evolium BTS. Contrary to B8 release where an EGCH link was deIined per radio TS, an
M-EGCH link is deIined per TRX.
Figure 11: EGCH link in B8 vs M-EGCH link in B9

As M-EGCH concept presented in Figure 11, the M-EGCH Statistical Multiplexing
Ieature allows the reduction oI the consumption oI GCH resources (especially on Ater) by
multiplexing the blocks oI all the PDCHs oI a TRX on a single transmission link (M-
EGCH link), instead oI using a single EGCH link per PDCH.

In Table 2, there is the summary showing the GCH usage gain in B9 - thanks to M-
EGCH compared to B8 Ior each coding scheme (except no gain Ior MCS8, because
MCS8 (corresponding to TRX class 4) in B8 does not support in UL whereas it is possible
in B9 and basically more GCH is used in UL). For instance, to support MCS 9, there are
40 GCHs per TRX needed in B8 but only 36 GCHs per TRX needed in B9.


Table 2: GCH consumption B8 vs. B9
M-EGCH Statistical Multiplexing is mandatorv Ieature (automatically enabled) in B9.
For more details, please reIer to |2|.

Dynamic Abis Allocation
This Ieature enables to dynamically allocate Abis nibbles among the diIIerent TREs
used Ior PS traIIic in a given BTS. Compared to B8, it allows a higher average Abis
bandwidth per PDCH, the BSC capacity in terms oI TREs is increased, and in some BTS
conIigurations it may avoid to deploy a second Abis link.

In B9 release, the concept oI pool oI Abis nibbles is introduced:
A pool oI Abis nibbles is a set oI basic and extra Abis nibbles, which can be
dynamically allocated among the M-EGCHs oI some TREs.
So, the pool oI Abis nibbles is at a higher level oI sharing than the M-EGCH (whose
sharing is at TRX level), however, the level oI sharing oI the pool oI Abis nibbles depends
on the type oI Abis resources:

- The basic Abis nibbles mapped to a PDCH currently available Ior PS traIIic or
mapped to a MPDCH can be shared at the cell (BTS sector) level. In case oI cell
split over 2 BTSs, the share can be done only Ior one oI the two BTS sectors oI the
cell. This means that only one oI the BTS sectors oI the cell will be PS capable (new
O&M constraint in B9 release).

- The ~bonus basic Abis nibbles currently used Ior BCCH or static SDCCH
channels can be shared at the BTS level. It means that they can be shared between
the diIIerent sectors oI the same BTS cabinet.

- The extra Abis nibbles can be shared at the BTS level. It means that they can be
shared between the diIIerent sectors oI the same BTS cabinet.

GCH per RTS GCH per TRX GCH per RTS GCH per TRX
CS
1 1 8 0
.
73 6
CS
2 1 8 1
.
00 8
CS
3 2 16 1
.
25 10
CS
+ 2 16 1
.
6+ 1+
MCS
1 1 8 0
.
89 8
MCS
2 1 8 1
.
00 8
MCS
3 2 16 1
.
33 11
MCS
+ 2 16 1
.
50 12
MCS
5 2 16 1
.
86 15
MCS
6 3 2+ 2
.
36 19
MCS
7 + 32 3
.
+9 28
MCS
8 + 32 +
.
1+ 3+
MCS
9 5 +0 +
.
+9 36
Coding
Schemes
BS (w/o stat mux) B9 (with M-EGCH stat Mux)

Figure 12: Wasted Abis nibbles case in B8
In Figure 12, there is a noticeable waste oI Abis resources in B8 release linked to static
Abis allocation but it can be improved in B9 with dynamic Abis allocation Ieature which
can manage to use basic Abis nibbles mapping to signalling channels i.e. BCCH and
SDCCH (so called bonus basic nibbles) and all extra Abis nibbles Ior PS traIIic so no
more wasted Abis nibbles in B9.

Dynamic Abis allocation is mandatorv Ieature (automatically enabled) in B9.

Enhance Transmission Resource Management
The Enhanced transmission resource management Ieature can be seen on top oI the the
M-EGCH Statistical Multiplexing and Dynamic Abis allocation Ieatures.
Indeed, it assumes that the M-EGCH Statistical Multiplexing Ieature is implemented in
RLC/MAC layers, and it relies on the Dynamic Abis allocation Ieature which oIIers a
means to dynamically adjust (increase or decrease) the M-EGCH link size oI the TRXs.
Figure 13: Enhance transmission resource management

The main goals oI the Enhanced transmission resource management Ieature are the
Iollowing:
- Determine the M-EGCH link size oI all the TRXs and the nature oI their GCHs.
- Create release the M EGCH links oI the TRXs, add remove preempt some GCHs
over the M EGCH links oI the TRXs.
Manage the Abis congestion situations at BTS level and the Ater congestion
situations at GPU level by applying some 'equity rules
Ensure GPRS access in all the cells

Enhanced transmission resource management is mandatorv Ieature (automatically
enabled) in B9. For more details, please reIer to |2|.

Ater Resource Management
The Ater Resource Management in a given GPU is based on two complementary
mechanisms:
- GPU Ater TS margin
Goal: Ensure that GPRS access never be blocked in a cell due to lack oI Ater
resources in the GPU.
Mean: Reserve at least NATERTSMARGINGPU (O&M parameter) timeslots
in GPU to serve only new prioritary TBF establishment.

Figure 14: AterMUX TS reserved by GPU Ater TS margin

- 'High Ater usage` handling
It is the way to manage the Ater resource when Ater usage enters 'high state
determined by the parameter AterUsageThreshold.
II Ater usage is high, the target number oI GCH associated to TRXs oI the GPU will
be reduced according to GCHREDFACTORHIGHATERUSAGE (O&M
parameter). However, this reduction Iactor is only applied on PDCHs newly open.

Ater Resource Management is mandatorv Ieature (automatically enabled) in B9. For more
details, please reIer to |2|.
DL retransmission in the BTS
The principle oI this Ieature is to store, in the memory oI the TREs oI the BTSs, the DL
RLC data blocks transmitted by the MFS to the MS. This avoids consuming transmission
resources (Abis Ater) in case oI DL RLC data block retransmissions.
Atermux PCM link
64 kbit/s timeslot # 0
64 kbit/s timeslot # 1

64 kbit/s timeslot # n
0 1 2 3
NATERTSMARGINGPU
Ater TS Reserved in GPU for prioritary request


Figure 15: Better transmission resource usage with DL retransmission in the BTS

Without DL Retransmission in the BTS, the RLC/MAC layer shall retransmit the
complete DL RLC data block to the TRE when retransmission needed so called
~complete retransmission - B8 case.

II DL Retransmission in the BTS is activated, the RLC/MAC layer may take the beneIit to
store RLC data block bv TRE in the BTS. In this case, the RLC/MAC layer may
retransmit to the TRE only RLC/MAC header and ask the TRE to add RLC data block
beIore transmission to the MS so called 'reduced retransmission - B9 case.

DL Retransmission in the BTS is optional Ieature, which can be enabled/disabled at
TRX/TRE level. In order to save transmission resource, it is recommended to activate this
Ieature.

3 Detailed BSS Architecture Process
This section describes in details oI the BSS architecture process in release B9. Several sub-
sections are created to Iocus on each network elements and interIaces.
3.1 BTS
The area covered by a BSS is divided into cells and each cell is managed by a BTS. Each
BTS consists oI radio transmission and reception devices including antennae and signal
processing equipment Ior the Air InterIace.
3.1.1 BTS Configurations
The Iollowing diagram presents the BTS generations, which are supported in release B9.

Figure 16: BTS generation/type supported in B9

G1 BTS - First BTS Generation
Only MKII with DRFU is supported in B9. It stays at B7.2 Iunctionality and its
conIiguration is presented in Table 3.

Data in this table, based on |9|
Table 3: CongiIuration G1 BTS MKII with DRFU
For more details, please reIer to |1| and |3|

G2 BTS - Second BTS Generation
Only G2 BTS with DRFU is supported in B9 with Iollowing the rule: the FUMO in G2
BTS must be replaced by DRFU beIore B7/B8 release migration.
G2 BTS stays at B7.2 Iunctionality and its conIiguration is presented in Table 4.

Table 4: ConIiguration G2 BTS
Type Characteristic Nb of sectors Nb of TRX GSM 900
MK Std + DRFU
1 8
x
Extension / Reduction
PhysicaI LogicaI
Min Max
G
2 1
TRE
1
Sector:
8
TRE
1
TRE
1
TRE
Configuration
BTS
Min
BTS
Generation
Evolium Evolution G1 BTS Evolium BTS G2 BTS
- G1 BTS MK II
with DRFU
- G2 BTS DRFU

- G3 BTS
- M4M
- G4 BTS
- M5M

Evolium BTS - Third BTS Generation
The Evolium BTS is designed with some improvements as compared to the previous
BTS generation (G2). The main changes (related to architeture design) are:
- Support Abis Statistical Multiplexing (64 kbps and 16 kbps).
- Secondary Abis link (except micro BTS M4M)
- GPRS CS-3, CS-4 is available.
With B9 support, Evolium BTSs include G3 BTS, G3.5 BTS (which is G3 BTS with
new power supply modules) and micro BTS M4M. See their conIigurations in Table 5.

Table 5: ConIiguration Evolium BTS

Evolium Evolution - Fourth BTS Generation
Further evolutions (Irom Evolium BTSs) introduce new main Ieatures:
- G4 BTS platIorm is ready Ior EDGE and E-GPRS.
- GSM 900 output power has been increased to 45W.
- The new architecture oI the Transceiver module (digital & analog parts on the
same board) brings the possibility to develop a low power TRE that would allow
achieving a 18 TRX capacity in one rack.
With B9 support, Evolium Evolution BTSs include:
- G3.8 BTS, which is G3.5 BTS with SUMA, ANC, new power supply modules.
- G4.2 BTS, which introdues a new TRE with EDGE HW Capability.
- Micro BTS M5M.
Their conIigurations are presented in Table 6.

Table 6: ConIiguration Evolium Evolution
For more details, please reIer to |1|, |6|, |7|
PhysicaI LogicaI
Min Max
Evolium BTS
(G
3
/ G
3
.
5
)
1
TRE
Up to
12
TRE
1
to
6
Sectors
1
TRE
1
TRE
M
+
M
(Micro BTS)
2
TRE
Up to
6
TRE
1
to
6
Sectors
2
TRE
1
TRE
Configuration
Min
BTS
PhysicaI LogicaI
Min Max
Evolium Evolution
(G
3
.
8
/ G
+
.
2
)
1
TRE
Up to
12
TRE
1
to
6
Sectors
1
TRE
1
TRE
M
5
M
(Micro BTS)
2
TRE
Up to
12
TRE
1
to
6
Sectors
2
TRE
1
TRE
Min
BTS
Configuration

Summary BTS Hardware Capability - B9 release
As shown in Table 7:

Table 7: BTS HW Capability in B9

3.1.1.1 Cell ConIiguration
Cell Types: the Iollowing table describes all the cell types (with proIile type
parameters) available in B9.

Table 8: Cell Types
Extended Cell:
Its conIiguration is a BTS with up to 4 TRX in the inner cell and up to 4 TRX in the
outer cell.
M4M and M5M do not support extended cell conIigurations.
Only one extended cell per BTS is possible.
G1 BTS G2 BTS
G1 BTS MK
DRFU G2 BTS DRFU G3 BTS M+M G+ BTS M5M
No Multiplexing x x x x x x
16K Static Multiplexing x x x x x
6+K Statistical Multiplexing x x x x
16K Statistical Multiplexing x x x x
2nd Abis access x x x
FR x x x x x x
DR x x x x x x
AMR x x x x x x
EFR x x x x x x
GPRS (CS-1, CS-2) x x x x x x
GPRS (CS-3, CS-+) x x x x
EGPRS (MCS-1 to MCS-9) x x
GSM 850 x x
GSM 900 x x x x x x
GSM 1800 x x x x x
GSM 1900 x x x x
850/1800 x x x
850/1900 x x x
900/1800 x x x x
900/1900 x x x
M
u
l
t
i
b
a
n
d
EvoIium BTS EvoIium EvoIution
B9 reIease
A
b
i
s
f
e
a
t
u
r
e
V
o
i
c
e
T
r
a
f
f
i
c
D
a
t
a
T
r
a
f
f
i
c
M
o
n
o
b
a
n
d
Dimension Coverage Partition Range
Micro Micro Overlaid Normal Normal
Single Macro Single Normal Normal
Mini Macro Overlaid Normal Normal
Extended Macro Single Normal Extended
Umbrella Macro Umbrella Normal Normal
Concentric Macro Single Concentric Normal
Umbrella-Concentric Macro Umbrella Concentric Normal
ndoor Micro Micro ndoor Normal Normal
ProfiIe Type Parameters
CeII Type

Shared Cell:
A cell shared by several BTSs is possible to support up to 16 TRX.
Only the A9100 Evolium BTS (G3 BTS & G4 BTS) support shared cell.
The BTSs in a shared cell must be clock synchronized.
M4M and M5M do not support a shared cell because they cannot be clock
synchronized.

Frequency Hopping:
The Table 9 shows the hopping types supported in B9.

* RH works only with M1M and M2M that are now obsolete.
Table 9: Frequency Hopping supported in B9

3.1.1.2 SDCCH ConIiguration
Since B8 release, the dynamic SDCCH allocation Ieature is a new mechanism that
provides automatic (the optional number oI) SDCCH in the cell, which translates as
a set oI dynamic SDCCH/8 TS, used Ior TCH traIIic or Ior SDCCH traIIic,
depending on the requirement.

Principle:
Static SDCCH sub-channels are deIined to handle normal SDCCH traIIic.
Dynamic SDCCH sub-channels are deIined to handle high SDCCH traIIic.

Main Rules:
- At least one static SDCCH/8 or SDCCH/4 timeslot on BCCH TRX must be
conIigured in a cell.
- Combined SDCCHs (SDCCH/4 BCCH) are always static.
- The total number oI SDCCH sub-channels conIigured on static or dynamic
SDCCH TS or on a BCCH/CCCH TS (CCCH combined case) must not exceed
24 sub-channels per TRX and 88 sub-channels per cell.
- In order to avoid incoherent allocation strategies between SDCCH and PDCH, a
dynamic SDCCH/8 TS cannot be a PDCH.
- BTS with DRFU do not support dynamic SDCCH allocation.

Hopping Type Supported in B9
Non Hopping (NH) x
Base Band Hopping (BBH) x
Radio Hopping (RH) * -
Non Hopping / Radio Hopping (NH/RH) x
NH/RH with Pseudo Non Hopping TRX x
BBH with Pseudo Non Hopping TRX x

Recommended SDCCH configuration:
In a cell, the number oI SDCCHs is deIined variously, based on:
Location Update (LU) signaling traIIic: 1 LU/call Ior standard cell
SMS signaling traIIic: 0.5 SMS/call Ior standard cell
Number oI TRXs

Recommended deIault number oI SDCCHs and conIiguration are presented in Table
10.

Table 10: Recommended SDCCH conIiguration Ior a standard cell only FR TRXs

Remarks:
1) SDC means Static SDCCH, SDD means Dynamic SDCCH, and Max presents
the maximum number oI SDCCHs (SDCSDD) that may be allocated in a cell.
2) Up to16 TRXs are possible to be conIigured Ior a cell thanks to shared cell
Ieature.
3) For one TRX, dynamic SDCCH are over-dimensioned because oI the
granularity oI 8. According to Alcatel traIIic model, all dynamic SDCCH will
not be used.
4) An additional dynamic SDCCH/8 must be provided Ior each DR TRX (these
are expected mainly on small cells).
5) For some particular cells with high (LU and/or SMS) signaling load, the
operator will probably need to customize the number oI SDCCHs (diIIerent
Irom the recommendation) according to his requirements; otherwise the
SDCCH dimensioning should be applied (please reIer to section 3.1.3.1.1).


TotaI SDC SDD
1 Yes 12 + 8
2 Yes 12 + 8
2 No 2+ 8 16
3 No 2+ 8 16
+ No 32 8 2+
5 No 32 8 2+
6 No 32 8 2+
7 No +0 16 2+
8 No +0 16 2+
9 No +8 16 32
10 No +8 16 32
11 No +8 16 32
12 No 56 16 +0
13 No 56 16 +0
1+ No 6+ 2+ +0
15 No 72 2+ +8
16 No 72 2+ +8
Number of TRXs BCCH Combined
Number of SDCCH sub-channeIs

3.1.2 Determination of BTS configuration
For each sites, it is necessary to deIine the number oI required BTSs, which depends
on the total number oI required TRXs and cells and maximum capacity oI the given BTS
(reIer to section 3.1.1).
To determine the number oI required TRXs, the cell dimensioning (reIer to section
3.1.3) is needed to start Iirst, and then the Iollowing processes to determine BTS
conIiguration will be perIormed aIterwards as shown in Figure 17.

Figure 17: Determination oI BTS conIiguration

3.1.3 Cell dimensioning
The number oI required TRXs can be derived Irom the combination oI several kinds oI
radio timeslots:
- BCCH TS: 1 TS
- SDCCH TS: to be deIined based on SDCCH traIIic, more details in section 3.1.3.1.1
- TCH/PDCH TS: to be deIined based on CS/PS traIIic, more details in section
3.1.3.1.2

and a TRX consists oI 8 radio timeslots.

So,

Number oI TRXs (BCCH TS SDCCH TS TCH/PDCH TS) / 8
Nb oI required TRXs
Nb oI required cells
Max. Capacity oI
the given BTS

Assessment
(comparision)
OK
Under-dimensioning
Increase installed BTSs
Required > Installed
Required Installed
Required < Installed
Over-dimensioning
Decrease installed BTSs
Nb oI installed BTSs Nb oI required BTSs

3.1.3.1.1 SDCCH Dimensioning
1) Gathering the counters to represent the SDCCH traIIic & congestion per cell;

Counters Definition
MC400 Cumulated time (in seconds) during which the SDCCH sub-channels are busy. II the
SDCCH dynamic Ieature is activated, static SDCCH sub-channels and dynamic
SDCCH sub-channels, which are allocated on the dynamic SDCCH/8 TS, are taken
into account
MC04 Number oI immediate SDCCH sub-channel assignment preparation Iailures due to
congestion
MC148 Number oI immediate assignment plus SDCCH normal assignments -whose
SDCCH channel is allocated by the BSC
Table 11: Counter list - SDCCH dimensioning

Gathering periods:
Up to 7 day data busy hour; otherwise, at least 2 working day data
busy hour
Note: busy hour means the hour has the highest SDCCH traIIic

2) Applying the SDCCH dimensioning method
The number oI needed SDCCH resources is estimated according to SDCCH
traIIic, SDCCH congestion rate, a required blocking probability p
SDCCH
and the
Erlang B (which can be used since there is no sharing oI SDCCH channels
between diIIerent services).

So,

Then,

Number of required SDCCH Timeslots
Nb oI required SDCCH sub-channels / 8; Ior non- BCCH combined cell
(Nb oI required SDCCH sub-channels 4) / 8; Ior BCCH combined cell

Nb of required SDCCH sub-channels Erlang B (SDCCH_req_traffic, p
SDCCH
)
where:
p
SDCCH
is usually recommended at 0.5
SDCCHreqtraIIic (MC400
cell
/ 3600) / (1 (MC04 / MC148))

3) Assessment

Figure 18: SDCCH dimensioning assessment

3.1.3.1.2 TCH/PDCH Dimensioning
1) Gathering the needed counters per cell as Iollowing;

TCH Counters

Counters Definition
MC380a Time (in seconds) during which the TCH radio TS in FR usage is busy
MC380b Time (in seconds) during which the TCH radio TS in HR usage is busy
MC812 Number oI Iailures when switching Irom SDCCH to the TCH (call establishment
only) due to congestion on Air InterIace channels (RTCH).
MC703 Number oI TCH (in HR or FR usage) normal assignment - whose RTCH channel is
allocated in the BSC, per TRX
Table 12: Counter list - TCH dimensioning

PDCH Counters

Counters Definition
P38e Time (in seconds) during which the TCH radio TS in FR usage is busy.
P38I Time (in seconds) during which the TCH radio TS in HR usage is busy.
P160 Number oI DL TBF establishment requests requesting 1 slot, which are satisIied at
once by the initial allocation.
P161 Number oI UL TBF establishment requests requesting 1 slot, which are satisIied at
once by the initial allocation.
P162 Number oI DL TBF establishment requests requesting 2 or 3 slots which are totally
satisIied at once by the initial allocation.
Nb oI ~required SDCCH
sub-channels or timeslots
Nb oI ~installed SDCCH
sub-channels or timeslots
Assessment
(comparision)
OK
Under-dimensioning
'Increase installed SDCCH
Required Installed
Over-dimensioning
'Decrease installed SDCCH

P163 Number oI UL TBF establishment requests requesting 2 or 3 slots which are totally
P164 Number oI DL TBF establishment requests requesting 4 or 5 slots which are totally
P165 Number oI UL TBF establishment requests requesting 4 or 5 slots which are totally
P20x
(x a,.. ,d)
In acknowledged mode, number oI DL RLC blocks (except RLC blocks containing
LLC Dummy UI Commands only) on PDTCH encoded in CS-x (i.e CS-1 (P20a) .
CS-4 (P20d)) retransmitted due to unacknowledgement oI the MS.
P21x
(x a,.. ,d)
In acknowledged mode, number oI UL RLC blocks on PDTCH encoded in CS-x (i.e
CS-1 (P21a) . CS-4 (P21d)) retransmitted due to unacknowledgement oI the MFS.
P20e In acknowledged mode, number oI DL RLC data bytes (except RLC blocks
containing LLC Dummy UI Commands only) on PDTCH encoded in MCS-x (with
x 1 to 9) retransmitted due to unacknowledgement oI the MS.
P21e In acknowledged mode, number oI UL RLC data bytes received on PDTCH
encoded in MCS-x (with x 1 to 9) retransmitted due to unacknowledgement oI the
MFS.
P55x
(x a,.. ,m)
Number oI useIul DL RLC blocks sent in RLC acknowledged mode on PDTCH
encoded in (M) CS-x i.e. CS-1 (P55a) . CS-4 (P55d) and MCS-1 (P55e) . MCS-9
(P55m).
P57x
(x a,.. ,m)
Number oI useIul UL RLC blocks received in RLC acknowledged mode on PDTCH
encoded in (M) CS-x i.e. CS-1 (P57a) . CS-4 (P57d) and MCS-1 (P57e) . MCS-9
(P57m).
Table 13: Counter list - PDCH dimensioning

Gathering periods:
Up to 7 day data on hourly basis; otherwise, at least 2 working day data
on hourly basis

2) Applying the TCH/PDCH dimensioning method
In case oI the TS sharing between two services (CS and PS), the Knapsack traIIic
model with the KauImann-Robert algorithm is used as the TCH/PDCH
dimensioning method. The aim is to deIine the total number oI required TS Ior
TCH/PDCH.

Figure 19: TCH/PDCH dimensioning method

Kaufmann-
Robert
Algorithm
CS service
input data
PS service
input data
Total
required TS
for TCH and
PDCH

CS service input data:
- CS TraIIic Intensity in Erlang:
The CS traIIic intensity is calculated separately between Full Rate (FR) and HalI
Rate (HR) TraIIic.
The calculation will take into account the real measured traIIic and additional
margin Irom congestion rate.
The way to calculate the congestion rate Ior FR and HR is presented below:

Per) RealCong CS Per Cong CS , 30 min( =
Note: 30 is deIined as the max congestion rate to be considered because several congested
calls can be re-produced Irom one given user trying to access the network several times.
Request n RTCHAssig
Cong n RTCHAssig
ngPer CSRealCo
=
703 812 MC MC
MC812
+
=
As there is no speciIic counter to identiIy the type oI congestion (Irom FR calls
or HR calls), below is the calculation to divide the global congestion rate into
FR congestion rate and HR congestion rate.
Per Cong CS
b MC a MC
a MC
Per Cong FR
380 380
380

+
=
Per Cong CS
b MC a MC
b MC
Per Cong HR
380 380
380

+
=

Then,

Full Rate CS traIIic Intensity is:
) 1 ( 3600
380
1

Per Cong FR
a MC
Per Cong FR
Traffic Successful FR
cell
FR

=
=

HalI Rate CS traIIic Intensity is:
) 1 ( 3600
380
1

Per Cong HR
b MC
Per Cong HR
Traffic Successful HR
cell
HR

=
=

- CS Bandwidth:
1 TS; Ior FR
0.5 TS; Ior HR
- CS GoS (as requirement): Blocking Probability rate 2 , Ior instance

PS service input data:
- PS TraIIic Intensity in Erlang:
P38e
cell
/ 3600; Ior DL
P38I
cell
/ 3600; Ior UL

- PS Bandwidth (minimum number oI TS per a request on each direction):
1 / MAXDLTBFSPDCH; Ior DL
1 / MAXULTBFSPDCH; Ior UL
Note. MAXDL(UL)TBFSPDCH is the O&M parameter, which defines the maximum number
of Down (Up) link (E)GPRS TBFs per Slave PDCH.

- PS GoS (as requirement): Delay in seconds and Quantile in
- PS debit (throughput) in kbps:

For DL:
DL PS
d

nTimeDL Transmisio
DataDL
=

e P
e P Si:e Block RLC P Si:e Block RLC P
m
a x
x x
d
a x
x x
38 1024
20 55 20 8
+ +
=

= =

For UL:
UL PS
d

UL Time n Transmisio
UL Data

=
f
m
a x
x x
d
a x
x x
P
e P Si:e Block RLC P Si:e Block RLC P
38 1024
21 57 21 8
+ +
=

= =

Where:

Table 14: RLC data block size Ior each (M) CS

ChanneI Coding scheme RLC data bIock size in bytes
CS-
1 22
CS-
2 32
CS-
3 38
CS-
+ 52
MCS-
1 22
MCS-
2 28
MCS-
3 37
MCS-
+ ++
MCS-
5 56
MCS-
6 7+
MCS-
7
(sent of
2
blocks)
2
*
56
MCS-
8
(sent of
2
blocks)
2
*
68
MCS-
9
(sent of
2
blocks)
2
*
7+

Kaufmann-Robert algorithm:
The dimensioning process Ior Radio TS using KauImann-Robert algorithm is under
development. Please contact PCS when such dimensioning is needed.

3) Assessment
The Iollowing diagram presents the TCH/PDCH assessment process.

Figure 20: TCH/PDCH dimensioning assessment

To adjust the number oI the installed radio TSs Iollowing the required ones, it can
happen the case oI the low eIIiciency resource utilization, Ior example, one or two
additional TSs require one new TRX!
Thus, the RNE has to deIine the 'optimized number oI required radio TSs to
trade-oII between the returned gain and the investment cost.

Nb oI ~required
TCH/PDCH TSs
Nb oI ~installed
TCH/PDCH TSs
Assesment
(comparision)
OK
Under-dimensioning
'Increase installed TCH/PDCH
Required Installed
Over-dimensioning
'Decrease installed TCH/PDCH

3.2 Abis InterIace
The Abis interIace is standard ITU-T G.703 / G.704 interIace. It is based on a Irame
structure. The Irame length is 256 bits grouped in 32 timeslots numbered Irom 0 to 31. The
rate oI each timeslot is 64 kbit/s.

There are several media to transport Abis over networks:
- A terrestrial link reIerred to as PCM 2Mbits/s link (64 Kbits * 32 Time Slots 2048
Kbits/s)
- A microwave link (same capacity or higher)
- Digital Cross-connect Network equipment, which concentrates 4, 16 or 64 PCM
2Mbit/s link
- A microwave hub equivalent to DCN
- A Satellite link

3.2.1 Abis Configuration
3.2.1.1 Abis Network Topology

The Iollowing network topologies are deIined Ior BTS to BSC connection.

Chain topology (or Multi-drop)
Several BTSs are connected to the same Abis interIace. It means the Abis link is
statically shared.

Figure 21: Abis Chain (Multi-drop) Topology

Chain topology brings the gain to save number oI Abis links but it is possible
only Ior the BTSs with small TRX conIiguration.

BSC
BTS

Abis

Abis

Abis

BTS

BTS

Up to 15 BTSs
per
1 Abis Chain

Star topology
Each BTS is connected to the BSC directly. An Abis link is dedicated to a BTS.

Figure 22: Abis Star Topology

A star topology can be considered as a particular case oI a chain topology with
only one BTS.
This topology is well suited to support BTSs with large conIiguration and is also
Ilexible Ior TRX expansion.

Ring topology (or Closed loop)
Several BTSs are connected to the same Abis interIace. It means the Abis link is
statically shared. Moreover, the last BTS oI the chain is connected to the BSC.
Compared to multi-drop, ring topology enhances security because the traIIic
between any BTS and BSC is broadcast on two paths and the selection is based
on dedicated service bits and bytes.

Figure 23: Abis Ring (Closed loop) Topology

It is anyway more recommended to secure the transmission link rather than
wasting BSC connectivity resources by using this kind oI topology.

BTS

BTS

BTS

BTS

Abis

Abis

Abis

Abis

BSC

BTS

BTS

BTS

BSC

Abis

Abis

Abis

Abis

Only 1 BTS
per
1 Abis Star
Up to 7 BTSs
per
1 Abis Ring

Secondary Abis topology
Since B8 (EDGE introduction), secondary Abis topology may be needed to
activate EDGE on some BTSs that have large TRX conIiguration.
There are two possible conIigurations Ior secondary Abis topology, supported in
release B9:

Figure 24: Secondary Abis Topology

ConIiguration # 1: Primary Abis connects only one BTS and Ior Secondary
Abis there can be BTSs multi-dropped to each other.
ConIiguration # 2: Primary Abis connects only one BTS and Secondary
Abis is looped back to BSC.

3.2.1.2 Abis Channels
Three types oI channels are mapped onto an Abis link:
Qmux Channel - only necessary for C1 and C2 B1S
It is used by TSC O&M transmission supervision Ior non-Evolium BTS (G1 and
G2 BTS).
In case oI Evolium BTS, the Iunctionality oI Qmux can be managed through the
OML, via OML autodetection.

Ring Control Channel - used in Ring topology only
This channel is used by the transmission equipment (BIE), which depends on the
TSC. There are two kinds oI bits (R 'Ring control bits and S 'Sychronization
bits) containing in ring control channel.

Pri Abis
BTS

BSC

Sec Abis
BTS

BTS

BTS

BSC

Sec Abis
Pri Abis
Configuration # 1
Configuration # 2

3 types of BTS Channels
1) TCH/GCH Channels: 8 Radio TS per TRX is mapping onto 2 Abis TS.

Figure 25: TRX - Abis mapping
For a given moment, a radio TS on a GPRS capable TRX can carry
- Either CS traIIic, then it is called as TCH and the corresponding Abis
channel is also called as TCH,
- Or PS traIIic, then it is called as PDCH and the corresponding Abis
channel(s) is/are called as GCH(s). Several GCHs per PDCH are used in
case oI EDGE.

2) LAPD Channels: carry one or more LAPs (RSL and/or OML).
Only 1 RSL per TRX
Only 1 OML per BTS

The GSM Recommendation 08.52 deIines 2 logical links between the BTS
and the BSC:
- The Radio Signaling Link (RSL) is used Ior supporting traIIic
management procedures (MS to network communication).
- The Operation and Maintenance Link (OML) is used Ior supporting
networkmanagement procedures.
For details about Abis resource management Ior RSL/OML, please reIer to
section 3.2.1.4.

3) Extra Abis TS
On Abis interIace, two types oI 64 kbps TS are considered:
- Basic Abis TS: handle OML, RSL and traIIic TS
- Extra Abis TS: handle only supplementary GPRS (CS-3/CS-4) and
EDGE (MCS-1 to MCS-9) nibbles when needed.
In release B9, the maximum number oI extra Abis TS can be conIigured
through the new OMC parameter NEXTRAABISTS.

Abis
TS 0 TS 1 TS 2 TS 3
TS + TS 5 TS 6 TS 7
TRX
TS 0 TS 1 TS 2 TS 3 TS + TS 5 TS 6 TS 7

Summary Abis Channels:
TS position
Channel type
TS0 usage TS0 transparency
Purpose
Qmux Channel
Qmux TS0 Other TS except TS0
Used by the BSC to manage Remote
Transmission Network Elements.
Ring control Channel used in Ring topologv onlv
'Ring control R bits
Other TS
except TS0
Other TS except TS0
(=Qmux)
Supervision oI Ring continuity
'Synchronisation controls S bits TS0 Included with Qmux Direction oI clock synchronisation
BTS Channels
TCH/GCH Other TS except TS0 GSM (GPRS CS-1/CS-2) traIIic
LAPD channel Ior BTS (1 OML per BTS)
LAPD Other TS except TS0
LAPD channel Ior TRX (1 RSL per TRX)
Extra Abis TS Other TS except TS0 To support GPRS CS-3/CS-4 and EDGE
Table 15: Abis Channel Types

Remarks : There are two TS 0 modes:
TS 0 Usage: It means that TS 0 carries Qmux.
TS 0 transparencv. The Qmux is carried by any other TS Irom TS1 to TS31 (TS 0
does not carry Qmux). TS 0 transparency is strongly recommended.

3.2.1.3 Abis Link Capacity
The Iollowing table lists the number oI TS available in one Abis link to use Ior TCH
(or GCH), Ior signaling channels, and Ior extra Abis TS.

Chain & Star Topology Ring Topology
G1 or G2 BTS EVOLIUM BTS (*) G1 BTS (**) G2 or EVOLIUM BTS
TS0 TRANSPARENCY 30 31 28 29
TS0 USAGE 31 31 30 30

Table 16: Number oI TS available in one Abis link

From Table 16, one Abis link capcity depends on:
- Type oI Abis network topology
- TS 0 mode (TS 0 usage or TS 0 transparency)
- BTS generations
(*) Improvement with EVOLIUM BTS: In case all BTSs oI a chain are EVOLIUM BTSs, and iI TS0 transparency is used, then the
time-slot used Ior transmission supervision (QMUX) can be saved (because the OML oI EVOLIUM BTS supports also the transmission
supervision inIormation).
(**) This column applies even iI there is only one G1 BTS in a closed multidrop where other BTSs are not G1 BTSs.

3.2.1.4 Signaling Sub-Multiplexing Schemes
The signaling sub-multiplexing schemes oIIer improvement in terms oI required
PCM time slots Ior the signaling channels i.e. RSL and OML on the Abis interIace.
This leads to substantial savings in terms oI Abis interIace resources.
There are 4 types oI signaling sub-multiplexing schemes:
No Multiplexing
16K Static Multiplexing
64K Statistical Multiplexing
16K Statistical Multiplexing

3.2.1.4.1 No Multiplexing
Without multiplexing, the signaling channels will consume Abis TS as below.

1 RSL: 1 Abis TS (64 kbit/s)
1 OML: 1 Abis TS (64 kbit/s)

The Iollowing Iigure shows the example oI Abis timeslot consumption Ior 1 BTS
with 4 TRXs when no multiplexing is applied.

Figure 26: Example oI Abis TS usage Ior 1 BTS/4 TRX No Multiplexing

3.2.1.4.2 16K Static Multiplexing
NibbIe 1 NibbIe 2 NibbIe 3 NibbIe 4
TS 0
TS 1 TRX 1 - TS 0 TRX 1 - TS 1 TRX 1 - TS 2 TRX 1 - TS 3
TS 2 TRX 1 - TS + TRX 1 - TS 5 TRX 1 - TS 6 TRX 1 - TS 7
TS 3
TS 6
TS S TRX 3 - TS + TRX 3 - TS 5 TRX 3 - TS 6 TRX 3 - TS 7
TS 9
TS 10 TRX + - TS 0 TRX + - TS 1 TRX + - TS 2 TRX + - TS 3
TS 11 TRX + - TS + TRX + - TS 5 TRX + - TS 6 TRX + - TS 7
TS 12
TS 13
:
:
:
TS 31
:
:
Abis Configuration
OML
TRX 2 - RSL
TRX 3 - RSL
TRX 4 - RSL
TS 0 Usage / Transparency
TRX 1 - RSL
:
13 TS required
in case of
No Multiplexing

The RSL oI a FR TRX requires only 16 kbit/s. It is thereIore possible to pack up to
Iour RSL into one 64 kbit/s Abis time slot.
However, the OML is still carried on a Iull 64 kbit/s Abis time slot.
That means:
Up to 4 RSL: 1 Abis TS (64 kbit/s)
1 OML: 1 Abis TS (64 kbit/s)

with 4 TRX when 16K Static multiplexing is applied.

Figure 27: Example oI Abis TS usage Ior 1 BTS/4 TRX 16K Static Multiplexing

Rules:
- 16K Static Multiplexing is used only in a BSS with Evolium BTS and G2 BTS
with DRFU, whereby each TRX carries a maximum oI 8 SDCCH.
- Not compatible with the HalI Rate mode.
- BTS should be connected to a G2 BSC.

3.2.1.4.3 64K Statistical Multiplexing
TS 0
TS S TRX + - TS + TRX + - TS 5 TRX + - TS 6 TRX + - TS 7
TS 9
TS 10
:
:
:
TS 31
:
TRX 1 - RSL / TRX 2 - RSL / TRX 3 - RSL / TRX 4 - RSL
OML
:
:
Abis Configuration
10 TS required
in case of
16K Static
Multiplexing

The Abis channels Ior this multiplexing scheme may be seen as a group oI MCB
(Multiplexed Channel Block).
Three types oI MCB have then been deIined in accordance to the number oI TRX.
1) MCB 64/1 64K Statistical Multiplexing for 1 TRX
It is used Ior FR or DR TRX with high signaling load.
3 Abis TS per TRX

Figure 28: 64K Statistical Multiplexing MCB 64/1 mapping

It is used Ior FR TRX with high signaling load or DR TRX with normal
signaling load.
2.5 Abis TS per TRX


It is used Ior only FR TRX with normal signaling load.
2.25 Abis TS per TRX

with 4 TRX when 64K Statstical multiplexing is applied.
TS 0
TS 3
Abis Configuration
TRX 1 - RSL / OML
TS 0
TS 5
Abis Configuration
TRX 1 - RSL / TRX 2 - RSL / OML
TS 0
TS 9
Abis Configuration
TRX 1 - RSL / TRX 2 - RSL / TRX 3 - RSL / TRX 4 - RSL / OML


Figure 31: Example oI Abis TS usage Ior 1 BTS/4 TRX 64K Statistical Multiplexing
Rules:
- 64K Statistical Multiplexing is used only with Evolium BTS and G2 BSC.
- A BTS with N FR TRE conIigured with 64K statistical multiplexing requires:
I. (N/4) MCB 64/4
II. One MCB 64/1 when N mod 4 1 (BTS with 1, 5 or 9 TREs)
III. One MCB 64/2 when N mod 4 2 (BTS with 2, 6 or 10 TREs)
IV. One MCB 64/1 and one MCB 64/2 when N mod 4 3 (BTS with 3, 7 or 11
TREs). This conIiguration is used instead oI MCB 64/3 to allow a better
usage oI TCU resources at the BSC. It consists oI splitting the last 3 RSL
into 2 Abis-TS. The 2 Iractions can be mapped on 2 diIIerent TCUs

- A BTS with N DR TRE conIigured with 64K statistical multiplexing includes
((N-1)/2)1 MCBs oI which:
I. (N/2) MCB 64/2
II. (N mod 2) MCB 64/1
Dual rate attribute is now introduced per TRE and not anymore per BTS. As a
result, only the TRXs using the DR mode must Iollow the rules concerning DR
TRXs in particular the possibility to connect 2 TRXs-DR per TCUC.
3.2.1.4.4 16K Statistical Multiplexing
TS 0
TS 9
:
:
:
TS 31
:
Abis Configuration
TRX 1 - RSL / TRX 2 - RSL / TRX 3 - RSL / TRX 4 - RSL / OML
:
:
9 TS required
in case of
64K Statistical
Multiplexing
Number of FR TRE per BTS List of physicaI MCBs Max SDCCH weight per MCB
1 6+/1 2+
2 6+/2 32
3 6+/2; 6+/1 32;2+
+ 6+/+ 32
5 6+/+; 6+/1 32; 2+
6 6+/+; 6+/2 32; 32
7 6+/+; 6+/2; 6+/1 32;2+;2+
8 6+/+; 6+/+ 32; 32
9 6+/+; 6+/+; 6+/1 32; 32; 2+
10 6+/+; 6+/+; 6+/2 32; 32; 32
11 6+/+; 6+/+; 6+/2; 6+/1 32; 32; 32; 2+
12 6+/+; 6+/+; 6+/+ 32; 32; 32

The basic Abis nibble corresponding to the radio timeslot 0 oI each TRX
encompasses the RSL oI this TRX and eventually the OML oI the BTS.
This multiplexing requires that no traIIic, but only signaling (BCCH or SDCCH), is
aIIected on timeslot 0 oI each TRX. In this case no additional timeslot is required
on the A-bis Ior signaling.
As Ior 64K statistical multiplexing, Abis transmission can be seen as a sequence oI
MCB 16/1, see below.


with 4 TRX when 16K Statstical multiplexing is applied.

Figure 33: Example oI Abis TS usage Ior 1 BTS/4 TRX 16K Statistical Multiplexing

Rules:
- 16K Statistical Multiplexing is used only with Evolium BTS and G2 BSC.
- Not compatible with the HalI Rate mode.
- Not compatible with dynamic SDCCH allocation.
- TS 0 oI each TRX must not be assigned to TraIIic channel but to a signaling
channel BCCH/CCCH, SDCCH.).

3.2.1.5 Secondary Abis Link
TS 0
TS 1 TRX1-RSL/OML TRX 1 - TS 1 TRX 1 - TS 2 TRX 1 - TS 3
Abis Configuration
TS 0
TS 1 TRX1-RSL/OML TRX 1 - TS 1 TRX 1 - TS 2 TRX 1 - TS 3
TS 3 TRX2 - RSL TRX 2 - TS 1 TRX 2 - TS 2 TRX 2 - TS 3
TS 5 TRX3 - RSL TRX 3 - TS 1 TRX 3 - TS 2 TRX 3 - TS 3
TS 7 TRX 4 - RSL TRX + - TS 1 TRX + - TS 2 TRX + - TS 3
:
:
:
TS 31
Abis Configuration
:
:
:
8 TS required
in case of
16K Statistical
Multiplexing

II EDGE is to be introduced in a BTS conIiguration, and iI there are not enough
Abis TS on one Abis link to carry all basic TS (TCH), signaling TS (RSL & OML)
and extra TS, a second Abis link can be attached to the BTS.
In release B9:
- The basic TS can be mapped to the primary or the secondary Abis link
contrarv to B8 where the basic TS can be onlv on the primarv link. For details,
please reIer to |2|
- The extra TS can be mapped to the primary or the secondary Abis link.

Figure 34: Abis TS conIiguration on primary and secondary links

For a BTS with two Abis links, the operator deIines the parameter:
MAXEXTRATSPRIMARY that is the maximum number oI extra timeslots the
system is allowed to allocate on the Iirst Abis Ior this BTS.
To keep the maximum Iree timeslots on the secondary Abis, the allocation oI extra
timeslots is done in priority on the Iirst Abis until this Abis is Iull or
MAXEXTRATSPRIMARY is reached.
The primary and secondary Abis links oI a BTS can be on diIIerent Abis TSU oI
diIIerent BSC racks.

Rules:
- Only EVOLIUM BTS with SUMA board or M5M supports the 2
nd
Abis link.
- An EVOLIUM BTS with SUMP board has to be upgraded. An EVOLIUM
BTS can manage onlv 2 termination points - this implies that it is not possible
to.
i) Connect a BTS in chain aIter a BTS with two Abis
ii) Change the Abis Irom chain to ring iI there is a BTS with two Abis
iii) Attach a second Abis to a BTS that is not at the end oI an Abis chain

3.2.2 Abis Dimensioning
B
S
C
B
T
S
ET ET ET ET OML RSL BT BT RSL BT BT
RSL BT BT RSL BT BT
ET ET ET ET ET ET ET ET
Primary Abis Link
Secondary Abis Link
BT: Basic Timeslot ET: Extra Timeslots
B
S
C
B
T
S
ET ET ET ET ET ET ET ET OML RSL BT BT OML RSL BT BT RSL BT BT RSL BT BT
RSL BT BT RSL BT BT RSL BT BT RSL BT BT
ET ET ET ET ET ET ET ET ET ET ET ET ET ET ET ET
Primary Abis Link
Secondary Abis Link
BT: Basic Timeslot ET: Extra Timeslots

The capacity oI one Abis link is Iixed at 32 TSs; however, only 31 TSs are actually
available because 1 TS (TS#0) is always used Ior Irame synchronization. II the
number oI needed TSs is greater than 31, the secondary Abis link is required.
Thus, the aim oI Abis dimensioning is to deIine how many Abis links (max. 2 links
per BTS since B8) is suIIicient to support the needed TSs.

The number oI needed Abis TSs is based on:
Type of Abis Topology
Chain (Star) or Ring
TS0 mode
TS 0 usage or TS 0 transparency
Qmux usage
Used or Not used
Type of signaling sub-multiplexing schemes
No mux, Static mux(16K), Statistical mux(16K or 64K)
Number of TRX
2 Abis TSs are needed to support 1 TRX.

Extra Abis TS
New type oI Abis TS, introduced since B8, to support
GPRS CS3-CS4 and EDGE services because 1 basic
Abis TS is not enough to transport the high data
throughput oI those services.
1 Extra Abis TS contains 4 GCHs (nibbles).
Various number oI required GCH is based on
modulation & coding scheme (MCS or CS), please
reIer to Table 2
Less GCH consumption in B9 thanks to M-EGCH
and dvnamic Abis allocation
Max number oI extra Abis TS is limited by parameter
N_EXTRA_ABIS_TS

It is simple to deIine the number oI needed Abis TSs Ior conditions oI topology, TS0
mode, Qmux usage, signaling sub-mux and number oI TRX because each oI them
requires the certain number oI TSs.
The most complicated part oI Abis dimensioning in B9 release is how to deIine the
number oI extra Abis TSs per BTS, as this kind oI TS is allocated dvnamicallv on
Abis link when needed by traIIic demand and it can be shared among the BTS sector.
~Static
number of
needed
Abis TSs
~Dynamic
number of
needed Abis
TSs

The Iollowing presents the Abis dimensioning processes to deIine the needed extra
Abis TSs based on the counter analysis.

1) Gathering counters
All the counters needed Ior Abis dimensioning are the same ones Ior
TCH/PDCH dimensioning, thereIore please reIer to section 3.1.3.1.2.

2) Applying the Abis dimensioning methods
There are 2 diIIerent methods as Iollowing:
2.1) Abis dimensioning without concerning counter measurement
This dimensioning is based on a maximum number oI simultaneously
GPRS and/or EDGE Timeslots with the maximum declared (M)CS.
Advantage: This method is quite simple to apply and it may be used Ior a
'new network, which has not yet had GPRS or EDGE service i.e.
counters not available.
Disadvantage: The dimensioning is less accurate as it is based on deIined
assumptions not on the exact measurement e.g real traIIic, radio condition
(which may lead to using lower (M)CSs) and the retransmission in the
BTS.

Example: Abis dimensioning without concerning counter measurement
Ior a BTS having 3 cells with TRX conIiguration FR 222 when EDGE
activation with Maximum MCS-9.

Figure 35: BTS conIiguration example oI Abis dimensioning without
concerning counter measurement

Abis Timeslot Usage Calculation:

Abis TS Usage Number of TS (s)
TS0: Ior Frame Synchronization 1
Basic Abis TS 12
(2 Abis TS per TRX * 6 TRX)
RSL & OML Abis TS 2
(In case oI 64K Statistical Multiplexing,
please reIer to section 3.2.1.4.3)
Max required Extra Abis TS 17
(*)
Total 32
Only 1 Abis link enough!
(`)
Max required Extra Abis TS calculation:
From Figure 35: In each cell, only TRX#2 can support GPRS/EDGE as
the parameter TRXPREFMARK 0, so max PDCH group si:e is 7
PDCHs per cell.
Max MCS is MCS-9 and in B9 with M-EGCH link, MCS-9 requires
only 4.49 GCH per PDCH (whereas 5 GCH per PDCH in B8).
ThereIore,
Total GCH 7 PDCH * 3 Cells * 4.49 GCH 94.3 GCH
Total Abis Nibbles 94.3 GCH 95 Abis Nibbles
Then,
Total Abis Nibbles Basic Abis Nibbles Extra Abis Nibbles
95 21 Extra Abis Nibbles
(7 PDCH per cell. 7 basic nibbles per cell)
Extra Abis Nibbles 74 Nibbles
Then,
Extra Abis Nibbles Max required Extra Abis Nibbles Bonus Basic
Nibble
74 Max required Extra Abis Nibbles 6
(2 bonus basic nibbles per cell from BCCH in TRX=1 and from SDCCH in TRX=2)
Max required Extra Abis Nibbles 68 Nibbles
Max required Extra Abis Timeslots 68/4 17 TS.

Remark: This dimensioning method gives the maximum number oI
required extra Abis TS, which Iits to the assumption: simultaneously all
GPRS and/or EDGE Timeslots having the maximum declared (M)CS.
To get more accurate Abis dimensioning, please reIer to the next method.

2.2) Abis dimensioning with concerning counter measurement (recommended)
This dimensioning is based on the traIIic, (M)CS usage and QoS
requirements.
Advantage: This method is recommended, as it should provide reliable
dimensioning due to real measurement inputs.
Disadvantage: It is the complex method.

This section will be available verv soon
The dimensioning method is under development

3.3 BSC
Two generation oI BSC are supported in B9:
- G2 BSC
- BSC Evolution, relying on Advanced Telecom Computer Architecture (ATCA).

3.3.1 G2 BSC Configuration
The G2 BSC or A9120 BSC consists oI 3 Terminal Sub-Units (TSU), responsible Ior
speciIic Iunctions, plus Group Switches realising the connections between TSUs
connected to the BTSs and TSUs connected to the Transcoder or MFS.

Figure 36: G2 BSC (A9120 BSC) Architecture

From Figure 36, the BSC is basically divided in three building blocks:
3) Abis TSU: For Abis interIace management Iunctions towards the Base
Stations (BTS), see details in section 3.3.1.2
4) Ater TSU: For Ater interIace management Iunctions towards the Core
Network (Circuit and Packet), see details in section 3.3.1.3
5) Common TSU: For all central Iunctions oI the equipment;

3.3.1.1 BSC Capacity
The Iollowing Iigure presents the cabinet layout oI maximum BSC conIiguration
(ConI. 6). The smaller conIigurations consist oI less racks or halI Iilled racks.

Figure 37: G2 BSC Cabinet layout

In release B9, six conIigurations oI G2 BSC are oIIered:

Table 17: G2 BSC Capacity

Config 1 Config 2 Config 3 Config 4 Config 5 Config 6
Capacity FR 32 128 192 288 352 ++8
DR 1+ 62 92 1+0 170 218
32 120 192 2+0 26+ 26+
23 95 1+2 21+ 255 255
6 6 6 6 6 6
+ 6 10 12 16 16
+5+ 686 11+8 1380 18+2 207+
Nb of TSU 1 + 6 9 11 1+
2 3 5 6 8 9
Nb of E1 6 2+ 36 5+ 66 8+
+ 6 10 12 16 18
Erlang Traffic 160 627 107+ 1300 1700 1900
G2 BSC (A9120 BSC)
Configuration
Abis
Ater (CS&PS)
on A interface (1:+ Mux)
Nb TRX
Nb Cell
Nb BTS
Nb GPU
Nb SS7 links
Nb CCs
Abis TSU
Ater TSU

3.3.1.2 Abis TSU
The Abis TSU is a Iunctional entity terminating the interIaces carrying the
speech/data traIIic and signaling to and Irom the BTS. It includes the Iollowing
boards:
Figure 38: Abis TSU G2 BSC

1 BIUA: Base Station Interface Unit type A
BIUA is submultiplexing and cross-connect module, which provides six Abis
PCM connections.
Rules:
- 6 Abis connection oI a BIUA can support the Iollowing Abis conIiguration:
Maximum 3 Ring conIigurations
Maximum 6 Chain/Star conIigurations
- The primary and the secondary Abis links oI a BTS can be on diIIerent
TSUs (or BIUA) and also on diIIerent BSC racks.
- All TRXs oI all BTSs oI a same Abis multidrop must be connected to a
single Abis TSU.

8 TCUCs: Terminal Control Unit type C
The TCUC perIorms the telecommunication Iunction and the O&M Iunctions
required to connect the BSC and the BTS.
Rules:
- Each TCUC can handle 6 LAPD signaling links LAPD (i.e. RSL, OML and
TSL) that allows:
4 RSL+ 2 OML
3 RSL+ 3 OML

For the TSL/TCU mapping is Iixed as below table:

Table 18: TSL/TCU Mapping

- Each TCUC can handle 32 TraIIic channels which allows:
4 Full Rate TRXs
2 Dual Rate TRXs
8 Extra Abis TSs
(First Abis TSU oI each rack can only support 14 DR TRXs)

- Each TCUC handle either Full Rate or Dual Rate traIIic but not both.
- FR TCUC can handle a mix oI FR & Extra Abis TS.
- DR TCUC does not support extra Abis.
- Each TCUC can handle 32 SDCCH channels. However, in case oI 16K
Signaling Multiplexing (Static or statistical 16kbit/s) each TRX can carry 8
SDCCH channels maximum.
- One TCUC shall not handle more than 2 BCCH in case oI GPRS cell, this
rule is a warning but it is not checked by the SW.
- For 16K Static multiplexing, all RSLs oI a given 64 kbit/s Abis time-slot
must be handled by the same TCUC.
- For Statistical Multiplexing, all multiplexed RSL and OML are processed
on the same TCU.
- Mix oI the diIIerent signaling multiplexing and not multiplexed signaling on
the same TCU is allowed Ior Full Rate.

2 AS: Access Switch
It allows TCUC to gain access to Group Switch.

For more Abis TSU rules, please reIer to |1|

BIUA number
(BSC-Adapt SBL nbr)
TSL
1
(first rack)
1 1
TSL
2
(second rack)
6 +1
TSL
3
(third rack)
11 81
TSL Iinks G2 BSC TCU number

3.3.1.3 Ater TSU
The Ater TSU is a Iunctional entity terminating the interIaces to and Irom
thetranscoder and/or the MFS.
It includes the Iollowing boards:
2 ASMB: providing multiplexing 16 Kbit/s Irom 4 tributaries to 1 highway.
8 DTCC: one DTCC can handle up to 30 circuits when no TS are used Ior
Qmux, X25 or SS7.
2 access switches

Figure 39: Ater TSU G2 BSC

DTC Rules:
- Any oI the Iirst DTCs in each group oI 4 supporting an Atermux interIace
(among the 16 Iirst Ater Mux) can terminate an SS7 signaling link iI the Ater
Mux is CS.
- There are 6 potential BSC synchronization sources (one Irom each Atermux in
the Iirst rack). II the Atermux is used, then the Iirst DTC attached to that ASMB
recovers a synchronization reIerence signal and sends this to the BSC central
clock.
- DTCC can be dedicated Ior SS7-MTP (supporting a physical SS7 link), GSL
(supporting a physical GSL), BSSAP/GPRSAP (higher layers oI SS7 and GSL)
or TCHRM (TCH allocation)
- One DTCC TCH-RM pair can handle up to 60 cells and the number oI TRX per
TCH-RM is limited to 90.

For more Ater TSU rules, please reIer to |1|

3.3.2 BSC Evolution Configuration
The architecture oI the BSC Evolution (or A9130 BSC) relies on the Advanced
Telecom Computing Architecture (ATCA), re-using the same soItware as the G2
BSC.
A virtual CPU approach has been developed: each control module (CCP or OMCP)
supports several soItware processes corresponding to the TCUC, DTCC, TSCA or
CPRC processor modules oI the previous generation G2 BSC.
The Iollowing Iigure shows the BSC Hardware (HW) architecture on an ATCA
platIorm.

Figure 40: BSC Evolution (A9130 BSC) HW Architecture

The main elements oI the BSC Evolution are:
Telecom sub-racks: there is one or two sub-racks per BSC Evolution
cabinet but a BSC can use only 1 sub-rack (in Iuture soItware releases, we
may support BSC Evolution conIigurations relying on two sub-racks). This
means we may have 2 BSCs per cabinet. Each sub-rack can accommodate
up to 14 boards.
Boards: Iour types oI boards are deIined:
- CCP board: the Call Control Processing board, in charge oI all the telecom
Iunctions oI the BSC, except the TCH Resource Management. There are 1 to
5 active CCP board per BSC, i.e. per sub-rack, and 1 board Ior redundancy.
Each CCP board can manage up to 200 TRXs.

- OMCP board: the O&M Control Processing board, in charge oI all the
O&M Iunctions oI the BSC and TCH Resource Management. There are 2
OMCP boards per BSC, i.e. per subrack, including 1 Ior redundancy.
- SSW board: this board allows exchanges between all the elements oI the
platIorm and external IP/Ethernet equipment. It support IP Layer 3 Iunctions
and is based on Gigabit Ethernet. There are two SSW boards per shelI, 1
active and 1 Ior redundancy
- TP board: this board is in charge oI the transmission processing Iunctions oI
the BSC. It mainly processes the Abis timeslots and decides whether to send
them back directly towards the LIU shelI (case oI extra Abis timeslots, which
explains why the extra Abis timeslots have no impact on the BSC Evolution)
or towards one oI the CCP boards.

LIU shelf: This module is in charge oI the physical E1 connections, i.e.
Abis, AterCS and AterPS.

3.3.2.1 BSC Capacity
In release B9, three standard conIigurations oI BSC Evolution are oIIered:

Data in this table, based on |1| and |11|
Table 19: BSC Evolution Capacity

3.3.2.2 Delta BSC Evolution versus G2 BSC

.

For more details, please reIer to |1|
200 TRX 400 TRX 600 TRX
Capacity FR 200 +00 600
DR 100 200 300
192 26+ 26+
1+2 255 255
6 6 6
8 16 16
102+ 2068 3112
1 2 3
Nb of E1 96 96 176
10 20 30
6 12 18
Erlang Traffic 900 1800 2700
Configuration
BSC EvoIution (A9130 BSC)
Ater CS
Ater PS
on A interface (Erlang)
Nb SS7 links
Nb CCs
Nb active CCP
Abis
Nb TRX
Nb Cell
Nb BTS
Nb GPU
Different Behaviors:
TSU is removed
No more SDCCH limitation per
TCU (32)
Higher capacity max. 600 TRX
Abis/Ater Iixed mapping to LIU
boards
Same Behaviors
No change in logical model oI the
BSC
No change in radio conIiguration
mechanisms
Same set oI radio parameters
Same set oI PM counters/indicators
as A9120 BSC.

3.3.3 BSC Dimensioning
The BSC dimensioning is based on the configuration & connectivitv aspect, not
directly on the traIIic counter analysis because the traIIic analysis is already taken into
account at the lower NE layer i.e BTS and Abis.

Thus, the main priniple oI BSC dimensioning is to deIine which BTSs together with
their Abis are connected towards the BSC in accordance to the BSC conIiguration
limitations and the BTS & transmission location constraints.

The below diagram shows the BSC dimensioning process:

Figure 41: BSC dimensioning process

In Figure 41, basically the BSC dimensioning consists oI two Iollowing parts:
Design BSC area
Parenting Abis TSU ports of the BSC

BI5 inpuls
Conligurolions
Locolion
B5C dimensioning process
B5C inpuls
5ollwore releose
Avoiloble conligurolions
Archileclure Conslroinls
Access lronsmissionNelwork lopology
Core lronsmission nelwork lopology
Delinilion ol sels ol BI5s (B5C Areo}
solislying lhe orchi leclure conslroinls
For eoch B5C oreo, choose o B5C
conligurolion
Check B5C border wilh kNP leom
OK ?
No
Check Abis conneclivily
Yes
OK ?
No
Choose on olher B5C conligurolion,
il possibl e ?
No Yes
Check Aler conneclivily
OK ?
No
Yes
Yes
Oulpuls
B5C conligurolions
B5C Areos
BI5 inpuls
Conligurolions
Locolion
B5C dimensioning process
B5C inpuls
5ollwore releose
Avoiloble conligurolions
Archileclure Conslroinls
Access lronsmissionNelwork lopology
Core lronsmission nelwork lopology
Delinilion ol sels ol BI5s (B5C Areo}
solislying lhe orchi leclure conslroinls
For eoch B5C oreo, choose o B5C
conligurolion
Check B5C border wilh kNP leom
OK ?
No
Check Abis conneclivily
Yes
OK ?
No
Choose on olher B5C conligurolion,
il possibl e ?
No Yes
Check Aler conneclivily
OK ?
No
Yes
Yes
Oulpuls
B5C conligurolions
B5C Areos

3.3.3.1 Design BSC area
As the design oI BSC area is mainly based on the BTS and Transimission locations,
it is recommended to perIorm this design by mean oI a geographical program e.g
Mapinfo or other equivalent programs.

There are three steps to complete designing the BSC area:

1) Get BTS position & ConIiguration
BTS positions are important to create a set oI BTS as BSC area in the same
geographical area.

Moreover, the BTS configuration that includes: -
- Number oI TRX per cell (Full rate and Dual Rate)
- Maximum number oI extra TS deIined by the O&M parameter
NEXTRAABISTS at BTS level
- Number oI Abis links deIined Ior this BTS (eventual use oI 2
nd
Abis link)
gives the TRX & Abis load that this BTS will have at BSC level.

Figure 42: BTS position & conIiguration design BSC area step 1

2) Get transmission planning & BSC positions
Then, transmission plan is gathered to allow & veriIy BTS physical connection
to BSC planned location (several BSCs may be colocalised)

Figure 43: Transmission planning & BSC position design BSC area step 2

3) BSC area deIinition
The aggregation oI TRX, cell, BTS, Abis loads at BSC level is used to deIined
BSC conIiguration (please reIer to Table 17).
It is recommended not to overcome 80 TRX load at BSC level, to allow Ior
network extension.

Figure 44: BSC area deIinition design BSC area step 3

3.3.3.2 Parenting Abis TSU ports oI the BSC
It consists oI two Iollowing steps:
1) Transmission load checking
The number oI Abis links used Irom one geographical location to another
depends on: -
- Number oI BTS in that location
- Number oI Abis used per each BTS
- Eventual multidrops deIined between several BTS (on the same location
and/or on diIIerent ones)
- Number oI E1
This number oI Abis used between each geographical location has to be
checked with the actual available nb oI E1 links which will be implemented in
the network.

This task is usually perIormed by the transmission team.

Figure 45: Transmission load checking

2) BTS / Abis parenting on BSC
Each Abis used in a given BSC area has to be mapped to a given AbisTSU
board & port oI this BSC, taking into account the corresponding Abis TSU
conIiguration rules described in section 3.3.1.2.
It is highly recommended to have an evenly spreaded load on each AbisTSU
boards to Iorecast the possibility Ior network evolution i.e adding TRX,
changing TRX conIiguration Irom FR to DR, adding ExtraAbis TS, etc.

The picture below gives an example oI such a topology, using the AMT .NET
tool.
Figure 46: BTS / Abis parenting on BSC done by AMT.NET

3.3.4 LA Dimensioning
DeIinition: A location area (LA) is the area in which a normal page Ior a particular
mobile, registered in this LA, will be broadcasted.
Too large LAs may lead to a too high paging load in the BTS resulting in congestion
and lost pages.
Smaller LAs reduce the paging load in the BTSs as well as in the BSCs. However,
small LA also means a larger number oI LA border cells. Each time a mobile crosses
the boarder between two LAs, a location updating is perIormed. The LA updatings has
an eIIect on the load on the signaling subchannels, SDCCH, in the LA border cells.
Goal: The aim oI LA dimensioning is to deIine the appropriate size oI a Location
Area, which is mainly driven by the maximum number oI paging the LA can handle,
i.e. by the traIIic seen on this Location Area.

The Iollowing presents the LA dimensioning processes:

1) Gathering the paging traIIic counter at cell level.

Counters Definition
MC8a PCH load: number oI 48.058 PAGING COMMAND messages sent either Ior PS
traIIic or Ior CS traIIic on Abis towards the selected cell.
Table 20: Counter list LA dimensioning

Note: the MC8a values Ior each cell in the same LA should be identical. However
sometimes it was observed (Irom the counter oI live networks) that some cells in
the same LA have the diIIerent MC8a value Ior this case, the most Irequency
value will be chosen to be represented the paging traIIic oI the LA.

Gathering periods:
busy hour

2) Apply the LA dimensioning method
The maximum number oI paging per Location Area is derived Irom the paging
limitations at Um interIace, Abis InterIace and BSC side
Um interface Limitation - Combined cells
There are 3 CCCH blocks per M51 Irame Ior combined cells.
Among those 3 blocks, 3 minus BSAGBLKRES are reserved Ior paging
(BSAGBLKRES 1 as an usual deIault value Ior combined cells).
A 2 Paging/PCH value has been used to derive the maximum paging load per
Location Area.
A value oI 3 paging or even 4 paging per PCH can be reached iI and only iI:
- High PCH load (~ 80). The (saIe) engineering limit taken later makes
likely that this load is not reached. Indeed the CCCH capacity is not a
linear Iunction because oI the paging request encoding method. Real time
simulations perIormed internally show that when the 3 Paging/PCH ratio
is reached we usually have a high blocking rate on PCH (about 5),
which will induce repetition by the MSC.
- Very good distribution oI MS among all paging groups. This depends on
the IMSI distribution.

ThereIore;
Available blocks Ior paging per hour:
2 PCH blocks/MultiIrame * (3600s/ 235ms) 30,638 PCH blocks/ hour
Note. 235 ms is the period of 51 Multiframe
Maximum paging per hour:
2 paging/Block * 30,638 Blocks 61,276 paging/hour (100load)

Recommended max paging per hour: 42,890 paging/hour

When 70 engineering limit is applied Alcatel recommemdation

Um interface Limitation - Non-combined cells
There are 9 CCCH blocks per 51 MultiIrame Ior non-combined cells.
Among those 9 blocks, 9 minus BSAGBLKRES are reserved Ior paging
(BSAGBLKRES 4 as an usual deIault value Ior non-combined cells).
The calculation is similar to the one related to combined cell above. The only
diIIerence is a higher number oI paging blocks per 51 MultiIrame.

ThereIore;
Available blocks Ior paging per hour:
5 PCH blocks/MultiIrame * (3600s / 235 ms) 76,596 PCH / hour
Maximum paging per hour:
2 paging/Block x 76,596 Blocks 153,192 paging/hour (100load)

Recommended max paging per hour: 107,234 paging/hour

When 70 engineering limit is applied Alcatel recommemdation

Abis Interface Limitation
The Abis limitation is determined by the maximum amount oI paging
commands that can be sent through the Abis interIace to the cell.
An Abis can carry a paging load oI 30 paging commands per second.
Or

Maximum paging per hour: 108,000 paging/hour

BSC Limitation
The BSC limit is 70 paging/sec on the A interIace (Alcatel traIIic model).

Maximum paging per hour: 252,000 paging/hour

The paging on the A interIace is the sum oI the paging on all Location Area
which are conIigured on a BSC. So it depends on the Paging rate on Location
Area and on the number oI Location Areas in a BSC.

Limiting Factor
The minimum value Irom those Iour limitation is thereIore given by the Um interIace
and is 42,890 paging/hour iI the Location area contains some combined cells or
107,234 paging/hour iI the Location area contains only non-combined cells.
This conclusion holds true as long as there are less than 252,000/42,890 6 Location
Areas covered by the BSC (which should always be the case but it is probably worth
mentioning it).

3) Assessment
Below Iigure shows the LA dimensioning assessment.

Figure 47: LA dimensioning assessment

In Figure 47, the assessment is to perIorm checking measured paging traIIic versus
the paging limitation at the diIIerent levels:
- BSC limitation
- Um limitation
For checking Abis limitation: it is not signiIicant, because Um limitation (42980
paging, combined and 107234 paging, non-combined) is lower than Abis one
(108000 paging). ThereIore, Um limitation is usually triggered Iirst.

TotaI MC8a > 252000
(Total MC8a of all LA in the BSC)
Re-Design LA, and/or
Reduce nb of LA per BSC
AII Cells in a LA are non-combined
MC8a > 42,890 MC8a > 107234
Yes
No
No
No
No Yes Yes
Yes
OK
OK
Re-Design LA Change to non-combined
Re-Design LA
Check BSC Limitation
Check Um Limitation

3.3.5 RA Dimensioning
A Routing Area (RA) is a sub-set oI one LA and identiIies one or several cells in a
location area.
In case oI a mobile terminating call in GSM, the MS in idle mode will be paged in all
cells belonging to the LA, which the MS is present.
For PS services, the SGSN pages the MS in STANDBY state, in case oI a downlink
TBF. It means additional signalling eIIort (Ior GPRS/EDGE) will be produced in the
network: at each DL TBF establishment the MS will be paged in the RA iI the MS is
in the GMM Standby state
Introducing RA, which should be smaller than LA, the signalling effort for
paging is now more focused to a smaller area, the signalling load for the cells
being reduced.

Figure 48: Subdivision oI a LA in GPRS routing areas (RA)

The Iollowing presents the RA dimensioning processes:

1) Gathering the paging traIIic counter at cell level.

Counters Definition
P53a Number oI (BSCGP) PAGING REQUEST Ior PS paging sent to the MS (through
the BSC which manages the PCH resource).
This counter gives an indication oI the PCH load used Ior GPRS.
MC8a PCH load: number oI 48.058 PAGING COMMAND messages sent either Ior PS
traIIic or Ior CS traIIic on Abis towards the selected cell.
Table 21: Counter list RA dimensioning

Note: the P53a (respectively MC8a) values Ior each cell in the same RA
(respectively LA) should be identical. However sometimes it was observed (Irom
the counter oI live networks) that some cells in the same RA (respectively LA)
have the diIIerent P53a (respectively MC8a) value Ior this case, the most
Irequency value will be chosen to be represented the paging traIIic oI the RA
(respectively LA).

Gathering periods:
busy hour

2) Apply the RA dimensioning method

Main rule: RA size must be smaller than or equal to the LA size

The simple RA dimensioning, that is the RA si:e equals to LA si:e, is usually
applied Ior the initial RA area design.
However, it is recommended to perIorm aIterward the RA dimensioning based on
the GPRS paging traIIic counter. The main idea is to check that the RA size is
appropriate and not create the high ratio oI GPRS paging traIIic (P53a) when
compared to the global paging (MC8a); otherwise, the smaller RA size may be
needed to reduce the global paging load and to avoid PCH resource overload due
to GPRS.
Note: GSM and GPRS services share the PCH (CCCH) resources (iI the master channel Ieature is
not activated) in order to transport the paging traIIic.

PCH load rate used for GPRS P53a / MC8a

3) Assessment
The limited PCH load rate Ior GPRS has to be deIined.
II the measured PCH load rate Ior GPRS is over the limit, the re-design RA area
(implying to have the smaller RA size) is required.

3.4 AterMUX and A interIaces

AterMUX interface:
The AterMUX interIace is both the interIace between the BSC and the TC, and between
the BSC and the MFS.
The AterMUX interIace may transport pure circuit, and then it is called
AterMUX CS.
When it transports packet traIIic, it is called AterMUX PS.
It is possible to mix PS and CS traIIic on one single AterMUX link, and
then it is called AterMUX CS/PS.
On the AterMUX CS interIace, a 64 kb/s timeslot transmits inIormation Ior 4 Circuit
Switch calls (whatever they use FR or HR codecs).
On the AterMUX PS interIace, a 64 kb/s timeslot supports 4 GCHs.

A interface:
The A interIace is a set oI 2 Mbit/s PCM links carrying CS traIIic between the TC and
the MSC.
One 64 kbps channel on A is corresponding to one 16 kbps channel on AterMUX.

AterMUX interface versus A interface:

Figure 49: AterMUX and A relationship

Since release B7.2, it is possible only 4:1 multiplexing at BSC side and 4:1 de-
multiplexing at TC side.
ThereIore, the number oI A interIace links is Iour times oI the number oI AterMUX CS
interIace links. That is:

TC BSC MSC
AterMUX A
N AterMUX CS Links 4`N A Links

3.4.1 AterMUX configuration
The AterMUX interIace is supported by 2 Mbps PCM links (64kpbs * 32 TSs) with
the structure as shown below.

Figure 50: AterMUX interIace structure

In Figure 50, AterMUX consists oI the Iollowing channels:
TS 0 transparency: used Ior Irame synchronization
Traffic Channels: TCH in case oI CS traIIic but GCH Ior PS traIIic
Signaling Channels: 5 types oI signalling
- Qmux: always carried in the Iirst nibble oI TS 14. One Qmux exists on the 2
AterMUX oI the Iirst Ater TSU oI each rack oI the BSC.
- Alarm octet: reporting technical hitches on any DTC so it must be conveyed
on each PCM oI each Ater TSU.
- SS7: carrying the signaling inIormation about call control and mobility
management between BSS and MSC. There are a maximum oI 16 SS7 links.
This TS is unused Ior AterMUX PS but cannot be used Ior GCH.
- X.25: II X.25 is used, it is implemented on the 2 PCM oI the Iirst Ater TSU
oI the Iirst rack oI the BSC.
- GSL: It handles signaling Ior GPRS paging and Ior all synchronization
between the BSC and the MFS (TS 28). Each GPU requires at least one GSL
channel (depending on the traIIic), so there can be 0 or 1 GSL per AterMUX.
For security reasons, it is recommennded to have 2 GSL channels per GPU.

AterMUX CS AterMUX PS
CH# 1 CH# 2 CH# 3 CH# + CH# 1 CH# 2 CH# 3 CH# +
TS 0 TS 0
TS 1 TCH TCH TCH TCH TS 1 GCH GCH GCH GCH
TS + TCH TCH TCH TCH TS + GCH GCH GCH GCH
TS 1+ Qmux TCH TCH TCH TS 1+ GCH GCH GCH GCH
TS 15 TS 15
TS 16 TS 16
TS 2+ TCH TCH TCH TCH TS 2+ GCH GCH GCH GCH
TS 28 TCH TCH TCH TCH TS 28
TS 31 TS 31 GCH GCH GCH GCH
TS 0 Transparency
AIarm octet
SS7 (not used)
GSL
AIarm octet
SS7
X25
TS 0 Transparency

3.4.1.1 AterMUX CS and A

AterMUX CS:
ReIerring to AterMUX CS structure (in Figure 50), below Iigure presents the
AterMUX CS conIigurations that depend on the G2 BSC conIiguration.

Figure 51: AterMUX CS interIace conIiguration G2 BSC

In Figure 51, the number oI TCHs is diIIerent Ior each AterMUX link as it depends
on the appearance oI signaling channels.

For G2 BSC, the maximum number oI AterMUX CS interIaces is summarized in
below table.

Table 22: Max number oI AterMUX CS interIaces G2 BSC

For BSC evolution (A9130 BSC), the maximum number oI AterMUX links Ior CS
traIIic (Irom BSC to TC) is 30 and they are addressed by Ater-Hway-TP Irom 1 to
30.

X25 Qmux AIarm SS7 TCH Number
PCM 1 (x) x x x 111
PCM 2 (x) x x x 111
PCM 1 x x 116
PCM 2 x x 116
PCM 1 x x 116
PCM 2 x x 116
X25 Qmux AIarm SS7
PCM 1 x x x 115
PCM 2 x x x 115
PCM 1 x x 116
PCM 2 x x 116
PCM 1 x x 116
PCM 2 x x 116
X25 Qmux AIarm SS7
PCM 1 x x x 115
PCM 2 x x x 115
PCM 1 x x 116
PCM 2 x x 116
PCM 1 x 116
PCM 2 x 116
Total TCH 207+
Ater TSU 9
BSC Rack 1
BSC Rack 2
BSC Rack 3
Ater TSU 5
Ater TSU 6
Ater TSU 7
Ater TSU 8
Ater TSU 1
Ater TSU 2
Ater TSU 3
Ater TSU +
G2 BSC Nb of Ater TSU Max nb of AterMUX CS
Configuration 1 2 +
Configuration 2 3 6
Configuration 3 5 10
Configuration + 6 12

A interface:
The channel mapping between AterMUX CS interIace and A interIace is presented
below:

Figure 52: Channel mapping between AterMUX CS and A

The A channel is known as CIC (Circuit IdentiIication Code).
Each 16kbits/sec TCH oI AterMUX CS is mapped on one 64kbits/sec CIC oI A
interIace. So, one AterMUX CS link requires Iour A links to complete the channel
mapping.
Table 23 presents the maximum number oI A interIaces in case oI G2 BSC.

Table 23: Max number oI A interIaces G2 BSC
AterMUX CS
CH#
1
CH#
2
CH#
3
CH#
+
TS
0
TS
1
TCH TCH TCH TCH
TS
2
TCH TCH TCH TCH
:
:
TS
1+ Qmux TCH TCH TCH
TS
15
TS
16
TS
17
TCH TCH TCH TCH
TS
18
TCH TCH TCH TCH
:
:
TS
30
TCH TCH TCH TCH
TS
31
TS :
6+
Kbits/sec
Channel or Nibble :
16
Kbits/sec
AIarm octet
SS7
X25
:
:
:
:
A Interface
TS
0
TS
1
TS
2
TS
3
TS
+
TS
5
:
:
:
:
:
:
:
TS
30
TS
31
TS :
6+
Kbits/sec
CC 31
CC +
CC 5
:
:
:
:
:
:
CC 30
CC 1
CC 2
CC 3
:
G2 BSC Nb of Ater TSU Max nb of AterMUX CS Max nb of A
Configuration 1 2 + 16
Configuration 2 3 6 24
Configuration + 6 12 4S

3.4.1.2 AterMUX PS
ReIerring to AterMUX PS structure (in Figure 50), below Iigure presents the possible
AterMUX PS conIigurations Ior a GPU.

Figure 53: AterMUX PS interIace conIiguration - GPU
Notes:
- One GPU can support max. 480 GCH (a GPU has 4 DSPs one oI which supports
120 GCH).
- 5 AterMUX PS are needed to support 480 GCH
Note: The max capacity oI 5 AterMUX PS is 572 GCH, which is enough to support 480 GCH
reIer to Figure 50.
- At least one GSL is required Ior a GPU, but it is recommended to have 2 GSLs
per GPU as the security reason is concerned.
- Maximum 1 GSL is possible Ior an AterMUX PCM link (TS 28).

For G2 BSC, the maximum number oI AterMUX PS (BSC-MFS) is depended on BSC
conIiguration as shown in Table 24.

Table 24: Max number oI AterMUX PS G2 BSC

For BSC evolution (A9130 BSC), the maximum number oI AterMUX links
dedicated Ior PS traIIic (Irom BSC only to MFS) is 18 and they are addressed by
Ater-Hway-TP Irom 31 to 48.

One GPU
G2 BSC Max nb of AterMUX PS
Configuration 1 +
Configuration 2 6
Configuration 3 10
Configuration + 12
Configuration 5 16
Configuration 6 18
GSL AIarm SS7 GCH Number
PCM
1
x x x
112
PCM
2
(x) x x
112
PCM
3
x x
116
PCM
+
x x
116
PCM
5
x x
116
Total GCH
572

3.4.1.3 AterMUX CS/PS
The Iollowing inIormation describes GPRS and GSM traIIic on the Atermux oI the
BSS (A9120 BSC, G2 TC).

Sharing AterMUX PCM Links

Figure 54: Sharing AterMUX links

From Figure 54: - X is the number oI AterMUX between BSC and GPU.
- Y is the number oI AterMUX between GPU and TC.
- Z is the number oI Gb between GPU and SGSN.

Rule of sharing AterMUX Link.

Sharing AterMUX PCM Timeslots
For mixed GPRS/CS Atermux links (or AterMUX CS/PS), the traIIic TS can be used
12.5 or 25 or 50 or 75 or 100 Ior GPRS, with or without GSL LAPD see
Table 25.

Table 25: Ratio oI Mixing CS and PS TraIIic in Atermux
BSC
GPU
(MFS)
TC
SGSN
X
Y
Z
1) X+Y+Z < 16

2) When the AterMUX transports mixed traffic: XY
CS Nb of TCH PS Nb of GCH
Full
116
Null
0
7
/
8 100 1
/
8 16
3
/
+ 8+ 1
/
+ 32
1
/
2 56 1
/
2 60
1
/
+ 28 3
/
+ 88
Null
0
Full
116

The Figure 55 presents details oI Timeslot sharing between CS (TCH) and PS (GCH):

Figure 55: AterMUX CS/PS Timeslot conIiguration

Notes:
- The TS numbers are a maximum value, and depend on the presence (or not) oI
signaling links.
- The use oI GSL on a given Ater Mux takes the place oI 4GCH nibbles on this link.
See Figure 50.
- The Atermux channels located on the same Atermux TS as the Qmux (TS14)
cannot be used Ior GPRS (they are kept as CICs).
- TS 15 is always occupied Ior N7, even iI it is not used.

However, when there is enough PS traIIic to Iill 2 or more PCMs, there is an advantage
to dedicate complete PCMs to PS (AterMUX PS) rather than mixing PS with CS traIIic
AterMUX CS/PS). Indeed, doing so avoids connecting the MFS to the Transcoder, with
AterMUX PCMs not Iully devoted to CS traIIic, and thus avoids wasting transcoder
resource. So, the minimum usage oI mixed AterMUX (CS PS) is recommended.

PS Traffic Ratio 1/S 1/4 1/2 3/4 FuII
TS 0
TS 1
TCH TCH TCH TCH GCH
TS 2
TCH TCH TCH TCH GCH
TS 3
TCH TCH TCH TCH GCH
TS +
TCH TCH TCH TCH GCH
TS 5
TCH TCH TCH TCH GCH
TS 6
TCH TCH TCH TCH GCH
TS 7
TCH TCH TCH TCH GCH
TS 8
TCH TCH TCH GCH GCH
TS 9
TCH TCH TCH GCH GCH
TS 10
TCH TCH TCH GCH GCH
TS 11
TCH TCH TCH GCH GCH
TS 12
TCH TCH TCH GCH GCH
TS 13
TCH TCH TCH GCH GCH
TS 1+
TCH TCH TCH GCH GCH
TS 15
TS 16
TS 17
TCH TCH GCH GCH GCH
TS 18
TCH TCH GCH GCH GCH
TS 19
TCH TCH GCH GCH GCH
TS 20
TCH TCH GCH GCH GCH
TS 21
TCH TCH GCH GCH GCH
TS 22
TCH TCH GCH GCH GCH
TS 23
TCH TCH GCH GCH GCH
TS 2+
TCH GCH GCH GCH GCH
TS 25
TCH GCH GCH GCH GCH
TS 26
TCH GCH GCH GCH GCH
TS 27
TCH GCH GCH GCH GCH
TS 28
GCH GCH GCH GCH GCH
TS 29
GCH GCH GCH GCH GCH
TS 30
GCH GCH GCH GCH GCH
TS 31
GCH GCH GCH GCH GCH
AterMUX CS/PS
TS 0 Transparency
AIarm octet
SS7

3.4.2 AterMUX Dimensioning
The purpose oI the dimensioning is to deIine the number oI required AterMUX links
based on the measured traIIic.
According to previous sections, there are 3 types oI AterMUX interIaces i.e. one
dedicated Ior CS traIIic, one dedicated Ior PS traIIic, and the last one with mixed
(CS&PS) traIIic.
The diIIerent dimensioning methods Ior each AterMUX type are presented in the
Iollowing sub-sections.

3.4.2.1 AterMUX CS and A
AterMUX CS Dimensioning:
The Iollowing are the dimensioning processes to deIine the number oI required
AterMUX CS links to support the CS traIIic.

1) Gathering the CS traIIic counters, which are available at cell level.

Counters Definition
MC380a Time (in seconds) during which the TCH radio TS in FR usage is busy
MC380b Time (in seconds) during which the TCH radio TS in HR usage is busy
Table 26: Counter list AterMUX CS Dimensioning

Gathering Periords:
Up to 7 day data on hourly basis; otherwise, at least 2 working day data
on hourly basis

2) Applying the AterMUX CS dimensioning method
The number oI needed AterMUX CS resources is estimated according to CS traIIic
(at BSC level) and a required blocking probability p
AterMuxCS
. Then, Erlang B is
applied to get the number oI AterMUX CS channels (TCH).

Figure 56: AterMUX CS dimensioning process

Erlang B
CS traIIic
BSC level
15Margin
p
AterMuxCS

Total
required
AterMUX CS
Channels
Total
required
AterMUX CS
Links

CS Traffic at BSC level + 15 Margin

The overall CS traIIic oI every cell is summed up at BSC level.

3600
380 380 b MC a MC
Traffic
+
=

3600
380 380 b MC a MC
Traffic
+
=

3600
380 380 b MC a MC
Traffic
+
=

Figure 57: Calculation oI CS traIIic at BSC level

At BSC level, the summed traIIic at busy hour is considered.

Then, a 15 margin is added to the traIIic in order to take into account two
phenomena:
- Measurements have been retrieved Ior limited periods
- The counter busy hour average eIIect: RNO indicators do not provide an
instantaneous value oI the number oI channels occupied but the traIIic
measured during one hour. Moreover, the busy hour is not determined via a
sliding window but by selecting the maximum oI the measure realized each
hour (please see graph below)

Figure 58: DiIIerence between Exact busy hour, RNO busy hour and Peak traIIic
Cell 1
Cell 2
Cell n
+
BSC
Total CS TraIIic :
:
:
:
:
:
:
:
:

8H00 H00 10H00 11H00 12H00 13H00 14H00
kNO tro|||c meosurements
Exoct 8usy hour
Feok tro|||c
N
u
m
b
e
r

o
f

o
c
c
u
p
i
e
d

C
h
a
n
n
e
l
s
+ 15
margin

Required blocking probability p
AterMuxCS

The typical maximum blocking rate at AterMUX interIace is 0.1.

Number of required AterMUX CS Channels (TCH):
Erlang B (BSCCStraIIic, p
AterMuxCS
)

Where: BSCCStraIIic summed CS traIIic BSC level 15 margin
p
AterMuxCS
0.1 blocking rate

Number of required AterMUX CS Links:
This can be derived Irom comparing the total number oI AterMUX CS channels
(TCH) with AterMUX CS link capacity, which is shown in Figure 51.
For example:
II the total number oI AterMUX CS channels oI BSC x is 1200 TCHs.
Then, the number oI needed AterMUX CS links oI BSC x is 11 links.
Note.
From Figure 51, the total capacitv of 11 AterMUX CS links is.
111TCH(link=1) 111TCH(link=2) 116TCH(link=3) 116TCH(link=4)
116TCH(link=5) 116TCH(link=6) 115TCH(link=7) 115TCH (link=8)
116TCH(link =9) 116TCH(link =10) 116TCH(link =11)
1264 TCHs ~ 1200 TCHs

3) Assessment
It is to check whether the number oI installed AterMUX CS links is suIIicient to
support the measured traIIic, which is represented by the number oI required
AterMUX CS links.
However, the number required AterMUX CS links is not only based on the
number oI required TCHs (to support user traIIic) but also on the number oI
required SS7 links (to support signaling traIIic).
ThereIore;

Number oI required AterMUX CS links
Max |NbreqAterMUX CS (based on user traIIic), NbreqAterMUX CS
(based on signaling traIIic)|

Please reIer the next sub-section (SS7 dimensioning) to determine
NbreqAterMUX CS based on signaling traIIic.

SS7 Dimensioning:

The dimensioning oI SS7 links in the Alcatel BSS is linked to three issues:
SCCP traIIic
Processor load
Physical link load
This section will explain here the SCCP traIIic issue without going in the detailed oI
processor load and physical link load.

For each scenario, a dedicated SCCP connection is open between the BSS and the
MSC, Ior the duration oI the scenario. It will carry all the signaling pertaining to that
scenario.
ThereIore, there is one SCCP connection open Ior:
Speech calls, Ior a duration approximately equal to the SDCCH TCH
holding time
External handover, Ior a duration equal to the overlap time, during which
the TCH resources in the old and the new BSC are simultaneously activated
Location updates, Ior a duration approximately equal to the SDCCH
holding time
SMS and other services, Ior a duration approximately equal to the SDCCH
holding time
As seen above, the most traIIic on SCCP connections (or SS7 links) is related to the
SDCCH traIIic

So, the SS7 dimensioning will deIine the number oI 'required SS7 links according to
the measured SDCCH traIIic at BSC level.

Below is the important conIiguration rule to be concerned Ior SS7 dimensioning.

Since B7.2,
The Alcatel BSS with G2 BSC provides 256 SCCP connections per SS7 link.
There is one SS7 link per AterMUX CS link.

The processes oI SS7 dimensioning are Iollowing:

1) Gathering the SDCCH traIIic counter at cell level.

Counters Definition
MC400 Cumulated time (in seconds) during which the SDCCH sub-channels are busy. II the
SDCCH dynamic Ieature is activated, static SDCCH sub-channels and dynamic
SDCCH sub-channels, which are allocated on the dynamic SDCCH/8 TS, are taken
into account
Table 27: Counter list SS7 dimensioning

Gathering periods:
busy hour

2) Applying the SS7 dimensioning method

The number oI needed SS7 links can be derived Irom the number oI SCCP
connections (1 SS7 link: 256 SCCP connections).

The number oI needed SCCP connections is estimated according to SDCCH traIIic
(at BSC level) and a required blocking probability p
SS7
. Then, Erlang B is applied
to get the number oI SCCP connections.

Figure 59: SS7 dimensioning process

Erlang B
SDCCH traIIic
BSC level
15Margin
p
SS7

Total
required
SCCP
connections
Total required
SS7 Links
(Equivalent to
AterMUX CS
link)

SDCCH Traffic at BSC level + 15 Margin
The overall SDCCH traIIic oI every cell is summed up at BSC level.

3600
400 MC
Traffic =

3600
400 MC
Traffic =

3600
400 MC
Traffic =

Figure 60: Calculation oI SDCCH traIIic at BSC level

At BSC level, the summed traIIic at busy hour is considered.
Then, a 15 margin is added to the traIIic - see more explanation in Figure 58

Required blocking probability p
SS7

The typical maximum blocking rate at AterMUX interIace is 0.1.

Number of required SCCP Channels/Connections:
Erlang B (BSCSDCCHtraIIic, p
SS7
)

Where: BSCSDCCHtraIIic summed SDCCH traIIic BSC level 15
margin
p
SS7
0.1 blocking rate

Number of required SS7 Links:
This can be derived Irom the total number oI required SCCP connections, as we
know 256 SCCP connections are available Ior one SS7 link. That is;
=
256

7
s Connection SCCP required Nb
links SS required Nb

For example:
II the total number oI required SCCP connections oI BSC x is 2800.
Then, the number oI required SS7 links oI BSC x is 11 links.
Identically to the number oI SS7 links, the number oI needed AterMUX CS links
is 11.
Cell 1
Cell 2
Cell n
+
BSC
Total SDCCH
TraIIic
:
:
:
:
:
:
:
:
:
+ 15
margin

A Dimensioning:

According to Figure 52, basically the number oI required A interIaces depends on the
number oI AterMUX CS links connected to the transcoder as Iollowing relation;

Number oI required A Links Number oI required AterMUX CS links * 4

For example;
II the total number oI required AterMUX CS links oI TC x is 40.
Then, the number oI required A links oI TC x is 160 links (40*4).

3.4.2.2 AterMUX PS

3.4.2.3 AterMUX CS/PS


3.5 TC
There are two transcoder (TC) generations, supported in B9:
G2 TC
G2.5 TC
The main architecture oI transcoder is the Sub-Unit (TCSU), which is compounded by:
- One Sub-Multiplexing Unit (SMU)
- One or more Transcoding Units (TRCU)
In the case oI G2.5 TC, these units are combined on one single board, the MT120, which
oIIers an Atermux connection to a BSC and up to 4 A-trunk connections to the MSC.
The MT120 can also be installed in the place oI the ASMC in the G2 TC, and replaces 1
ASMC, 4 ATBX and 8 DT16 boards.
Here aIter summary oI technical data overall generation transcoder.

Data in this table, based on |1| and |9|
Table 28: G2 TC/ G2.5 TC capabilities

3.5.1 G2 TC Configuration
There are 2 types oI G2 TC:
G2 TC equipped with ASMC and TRCU
G2 TC equipped with ASMC/TRCU MT120 boards (in the case oI an
extension). This TC type can be applied according to Iollowing rules:
- It must contain at least 2 (ASMC 4 TRCUs)
- When a new TC rack is needed (G2 TC Iull equipped, 3 racks), the extension
is perIormed by a G2.5 TC rack.

Table 29: G2 TC conIiguration
G2 TC G2.5 TC
Rack Up to 3 1
AterMux per rack 6 +8
A interfaces 2+ 192
CC 2+*29 192*29
SMU ASMC
TRCU ATBX DT16
MT120
PhysicaI LogicaI
Min Max
G2 TC 2 AterMux 6 AterMux 1 AterMux 1 AterMux
SU 2 6 1 1
ASMC 2 6 1 1
TRCU SM +:1 + 2+ + +
MT120 - + 1 1
TC
Configuration
Min

3.5.2 G2.5 TC Configuration
The G2.5 TC (or A9125 Compact TC) can be equipped with up to 48 sub-units
(reIerred to as MT120 boards). Each MT120 offers one Atermux connection to a BSC
and up to 4 A trunk connections to the MSC, so that the G2.5 TC oIIers up to 192
Atrunk connections to MSC.
The G2.5 TC can be shared between several G2 BSCs. One MT120 board in any slot
oI any subrack can be allocated to any Atermux oI a G2 BSC. These BSC can belong
to several OMC-R.
The Iollowing tables describe the G2.5 TC conIigurations.

Table 30: G2.5 TC conIiguration

And, the capacity in terms oI MT120 boards is summed up in Table 31.

Table 31: G2.5 TC capacity

Rules:
- Each BSC must be connected to at least two MT120 boards Ior redundancy
purposes, reIer to Table 30.
- Each AterMux CS or mixed link requires one MT120 board.
- Each BSC rack can have up to 6 AterMux links and thereIore up to 6 MT120
boards: these boards Iorm a cluster inside TC and have all to be in the same TC
rack (but may be in diIIerent subracks).
- The AterMux CS and mixed links are gathered in groups oI 6 in order to Iorm a
complete cluster handled by one TC; the rest oI the links are grouped together
and will Iorm a cluster too, potentially connected to another TC.
- A TC rack can handle several BSCs.


Extension / Reduction step
PhysicaI LogicaI
Min Max
MT120 2 +8 1 1
G2.5 TC
Configuration per Rack
(AterMux)
Min
Configuration 1 subrack 2 subracks 3 subracks 4 subracks
Max MT120 moduIes
12 2+ 36 +8

3.5.3 TC Dimensioning
The TC dimensioning is based on the connectivitv aspect rather than counter (or
traIIic) point oI view.
The concerned connectivity is the total number oI required AterMUX CS links coming
Irom all BSCs toward to the TC.
Also, the used TC type (either G2 TC or G2.5 TC) has to be taken into account
because each type provides diIIerent conIiguration and capacity.

The below Iigure presents the process oI TC dimensioning.

Figure 61: TC dimensioning process

For example;
II a small network consists oI 4 BSCs with Iollowing required AterMUX CS links;
BSCa: 10 AterMUX CS links
BSCb: 12 AterMUX CS links
BSCc: 6 AterMUX CS links
BSCd: 8 AterMUX CS links
and the chosen TC type is G2.5 TC.

Then,
ReIer to section 3.5.2; we know that each AterMUX link needs one MT120
board of G2.5 TC. ThereIore,
BSCa needs 10 MT120 boards
BSCb needs 12 MT120 boards
BSCc needs 6 MT120 boards
BSCd needs 8 MT120 boards

As 36 MT 120 boards are needed, this required one G2.5 TC with 3
subracks - refer to Table 31.
Total 36 MT 120 boards
# AterMUX CS links Irom BSC1
# AterMUX CS links Irom BSC2
# AterMUX CS links Irom BSCn
Used TC type
(G2 TC or G2.5 TC)
Total
links
Needed TC
Configuration
(Nb of boards)
:
:
:
:
:
:
+

3.6 MFS
The MFS provides resource and equipment management Iacilities Ior the packet-switched
system (GPRS) in the BSS. It has 2 main Iunctions: the PCU Iunction and Gb interIace
management.
Each MFS can support multiple BSCs, and can be connected to several SGSNs. Several
MFSs can be connected to the same OMC-R.
Two generations oI MFS are supported in B9:
The 1
st
MFS generation or A9135 MFS
MFS Evolution or A9130 MFS

3.6.1 The 1
st
MFS generation (A9135 MFS)
It was introduced on the market in year 2000 together with the Iirst GPRS release oI
Alcatel (release B6). The Iollowing Iigure presents A9135 MFS architecture.

Figure 62: The 1
st
MFS generation (A9135 MFS) Architecture

The A9135 MFS comprises 3 sub-systems:
- Control Sub-System (CSS): built Irom 2 DECAlpha AS800 or COMPAQ
DS10 servers, one oI which is active and one oI which is standby, reIerred to
as the Control Station
- Telecom Sub-System (TSS): a set oI GPU and JBETI boards
- Hub subsystem: consisting oI duplicated 100 Mbit/s Ethernet networks Ior
interconnection.

3.6.1.1 GPRS Processing Unit (GPU)
The GPU supports the Packet Control Unit (PCU), as deIined by GSM. The PCU
handles Gb-related Iunctions, Radio Resource Allocation Iunctions and protocol
exchanges with the Mobile Stations.
Each GPU consists of 4 DSPs, which are in charge oI the RLC/MAC Iunctions as
well as the EGCH protocol exchanges with the BTSs.
Each DSP supports 120 GCH but the GPU should handle less than 480 (120
GCH ` 4 DSP) GCH to avoid blocking the DSP.
A GPU board is linked to one BSC.
There are a maximum of 16 PCM links (AterMux & Gb) per GPU board.

3.6.1.2 Multiple GPU per BSS
In order to increase the GPRS capacity oI the BSS in terms oI the number oI PDCH,
it is possible to connect several GPUs boards to the BSC to support the PCU
Iunction.
The GPUs linked to same BSS do not need to be in same MFS subrack.
Cell Mapping means that a cell is associated with a GPU. The mapping of cells onto
GPU is performed bv the MFS control station, which deIines the mapping oI cells
onto LXPU (logical GPU, which represent either the primary GPU, or the spare
GPU in the case oI a switchover). All the GPRS traIIic oI one cell is handled by one,
and only one GPU.

The Iollowing Iigure shows the BSC connection Ior mulit-GPU per BSS.

Figure 63: Multiple GPU per BSS
BSC
GPU1
GPU2
GPU3
GPU4
MFS
GSL1
GSL2
cell15
cell14
cell1
cell2
cell3
cell4
Sub-BSS 1
cell5
cell7
cell6
Sub-BSS2
Sub-BSS4
cell8
cell10
cell11
cell9
cell12 cell13
Sub-BSS3 GSL3
GSL4
GPU1: cell1, cell2, cell3, cell4
GPU2: cell5, cell6, cell7
GPU3: cell8, cell9, cell10, cell11 cell12, cell13
GPU4: cell14, cell15

3.6.1.3 Capacity
The Iollowing table describes the A9135 MFS capacity Ior DS10.

Table 32: The 1
st
MFS generation (A9135 MFS) Capacity


3.6.2 MFS Evolution (A9130 MFS)
It is a brand new MFS introduced on the market in 2005, relying on the Advanced
Telecom Computing Architecture (ATCA).

The MFS Evolution is composed oI the main Iollowing elements:
Telecom sub-racks: there is one or two sub-racks per MFS Evolution
cabinet. Each subrack can accommodate up to 14 boards. The sub-racks are
in Iact ATCA shelves.
Boards: three types oI boards are deIined:
- GP board: the equivalent oI the GPU board Irom the MFS 1st generation.
Only 1 GP board is needed Ior redundancy Ior the whole MFS, irrespective
oI the number oI shelves.
- SSW board: this board allows exchanges between all the elements oI the
platIorm and external IP/Ethernet equipment. It support IP Layer 3 Iunctions
and is based on Gigabit Ethernet. There are two SSW boards per shelI, 1
active and 1 Ior redundancy.
- OMCP board: this board is in charge oI managing the whole platIorm Irom
an O&M standpoint. It provides the logical interIace to the Operation and
Maintenance Centre (OMC). There are two OMCP boards per MFS, 1 active
and 1 Ior redundancy.
LIU shelf: This module is in charge oI physical E1 connections Ior BSC and
MFS applications.

A9135 MFS Configuration Standard Standard Pre-equipped
Nb of telecom subracks 1 2
Min GPU per MFS + One GPU for redundancy 1+1 1+1
Max GPU per MFS + One GPU for redundancy 15+1 2 * (15+1)
Max GPRS GCH per MFS 3600 or (2+0*15) 7200 or (2+0*30)
Max BSC per MFS 15 22
Max GPU per BSC 6 6
Max BSC per GPU 1 1
Max PCM links (AterMux + Gb) per GPU 16 16

3.6.2.1 Capacity
The Iollowing table describes the A9130 MFS capacity.

Table 33: The MFS Evolution (A9130 MFS) Capacity

3.6.2.2 Delta MFS Evolution versus the 1
st
MFS generation
The main change/unchanged between those two MFS generation are below:


Different Behaviors:
The GP replaces the current
GPU
No spare physical GP (still N1
protection scheme)
Control stations are replaced by
the OMCP board
In the A9130 MFS, there are
only 12 ports per GP

Same Behaviors
No change in the radio
conIiguration mechanisms, and
same parameters are used
No change in the PM
mechanisms, same
counters/indicators
No change in the Ater/Gb
transmission conIiguration and
display

A9130 MFS Configuration Standard Large
Nb of LU boards 8 16
Nb of OMCP boards 1+1 1+1
Nb of SSW boards 1+1 2+2
Nb of GP boards 9+1 21+1
Max BSC per MFS 9 21
Max GP boards per BSC 6 6
Max BSC per GP 1 1

3.6.3 GPU Dimensioning


3.7 Gb interIace
The Gb interIace connects between the MFS and the SGSN or between the MSC and
the SGSN, in order to exchange the PS signaling and traIIic data.
The Gb interIace is based on Frame Relay protocol, whether or not an actual Frame
Relay network is set.
On the physical layer, the Gb interIace is supported by 2MBit/s PCM links oI 32 TS at
64Kbit/s.

3.7.1 Gb Configuration
There are 3 possible ways to connect the MFS and the SGSN via the Gb interIace:
- Through a Frame Relay network
- Direct MFS-SGSN connections: this is the most chosen case oI Gb connections.
- Through NSS transmission network

The Iigure below displays the diIIerent types oI Gb connections between the MFS and
the SGSN.

Figure 64: Gb interIace connections

The maximum number of E1 links handled by a GPU board is 16: these links have
to be shared between AterMux and Gb interIaces.
The maximum number of Gb links from one GPU board to the SGSN is 8.
The minimum number of Gb links from one GPU board to the SGSN is 2. At least
2 Gb links per GPU is recommended Ior security reason.

For more details, please reIer to |1| and |10|.

1) Through a FR Network MFS
2) Direct MFS - SGSN connections MFS
3) Through NSS transmission network MFS MSC/VLR MSC/VLR
SGSN
Frame ReIay
Netwok
Gb
Gb
Gb
Gb Gb

3.7.2 Gb Dimensioning
The goal oI Gb dimensioning is to deIine the required number oI Gb links per GPU.

The processes oI Gb dimensioning are Iollowing:
1) Gathering the needed counters at GPU level as below

Counters Definition
P10
Number oI DL LLC bytes discarded due to congestion.
P23 Number oI UL LLC bytes discarded due to congestion in the SNS sublayer (the MS is in
packet transIer mode UL).
P43 Number oI DL LLC bytes received Irom the SGSN at BSSGP level per cell.
P44 Number oI UL LLC bytes sent to the SGSN at BSSGP level per cell.
P45 Number oI kilobytes received Irom the SGSN at SNS sublayer.
P46 Number oI kilobytes sent to the SGSN.
P100I Maximum numbers oI busy GCH (16k channel) in the GPU.
P101 Cumulative time (in seconds) during which a GCH resource (16k channel) is available in
the GPU. The counter is integrated over all the GCH resources conIigured in the GPU.
P474 Cumulative time (in seconds), per GPU, during which there are Iree Ater nibbles.
Table 34: Counter list Gb dimensioning

Gathering periods:
busy hour

2) Applying the Gb dimensioning method
Method:
The Gb dimensioning will start with Iinding the required number oI Gb 64 kbit/sec
timeslots, which can handle the peak Gb traIIic.

sec / 64

kbit
Throughput Peak Gb
TS Gb Nb = (F1)

Then, the number oI Gb E1 links can be derived by:

TS
TS Gb Nb
Link Gb Nb
31

= (F2)

However, we do not have any counter to measure the peak Gb traIIic, but the
average Gb traIIic. Due to Ater-Gb mapping, we can assume that the ratio oI
PeakThroughput / AverageThroughput is the same Ior both Ater and Gb.

Throughput Avg Suc Gb
Throughput Peak Suc Gb
Throughput Avg Suc Ater
Throughput Peak Suc Ater

=

The ratio PeakTraIIic / AverageTraIIic is measurable in Ater. As a result, peak
traIIic in Gb can be estimated as Iollowing:

Throughput Avg Suc Gb
Throughput Avg Suc Ater
Throughput Peak Suc Ater
Throughput Peak Suc Gb

=

The real peak Gb traIIic should include not only the successIul case but also the
congestion one. The Gb traIIic is measured at NS (Network service) layer, but the
congestion in Gb is only measurable at LLC level. Thus, we can assume that the
ratio oI SuccessIulTraIIic / CongestionTraIIic is the same at NS as at LLC level.

Traffic Cong LLC
Traffic Suc LLC
Traffic Cong Gb
Traffic Suc Gb
Ratio Suc Gb

= =

Then,

Traffic Cong Gb Throuhput Peak Suc Gb Throughput Peak Gb + =
+ =
Ratio Suc Gb
Throuhput Peak Suc Gb

1
1

When GbPeakThroughput is known, the Gb dimensioning can be done with
Iormulas (F1) and (F2).

Counter Mapping:
GbSucAvgThroughput

=
GPU
PJC
P bits
sec 3600
45 8
; In DL

=
GPU
PJC
P bits
sec 3600
46 8
; In UL
sec / 16 100 kbits f P Throughput Peak Suc Ater =

AterSucAvgThroughput
sec / 16
sec 3600
474 101
kbits
P P

=

LLCSucTraffic
=
GPU
Cell
P bits 43 8 ; In DL
=
GPU
Cell
P bits 44 8 ; In UL
LLCCongTraffic
=
GPU
Cell
P bits 10 8 ; In DL
=
GPU
Cell
P bits 23 8 ; In UL

CbPeak1hroughput:
( )
GPU
Cell
GPU
Cell
GPU
PJC
P bits
P bits
P bits
P P
f P
43 8
10 8
1
sec 3600
45 8
474 101
sec 3600 100
; In DL
( )
GPU
Cell
GPU
Cell
GPU
PJC
P bits
P bits
P bits
P P
f P
44 8
23 8
1
sec 3600
46 8
474 101
sec 3600 100
; In UL

Remark: GbPeakThroughput will be chosen in the only one direction, which
gives the higher value.

3) Assessment
On each GPU, the assessment is to compare the number oI required Gb links
(based on the Gb dimensioning) with the number oI installed Gb links.
However, it is recommended to install at least 2 Gb links per a GPU Ior security
reason.


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