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BACHELOR OF ENGINEERING
In
SardarVallabhbhai Patel Institute of Technology, VASAD. Electronics & Communication Engineering Department 2011
CERTIFICATE
Date: 7/12/2011
This is to certify that the dissertation entitled GENERAL PURPOSE DATA LOGGER SYSTEM has beencarried out by CHINTAN NAIKWADE and HARSHIL THORIA under my guidance in fulfillment of the degree ofBachelor of Engineering in Electronics and Communication (7th Semester) of GujaratTechnological University, Ahmedabad during the academic year 2011-12. Guides:
.
Internal Project Guide: Mr. S.M.Patel Assistant Professor, E&C Dep. SVIT, Vasad
Externa Project Guide: Mr. Ali Najhmi, Electronics Engineer, E Cube India Solution, Vadodara.
Head of the Department: Mr. Ashok Charaniya H.O.D E & C Dept., SVIT-VASAD.
ACKNOWLEDGEMENT
We wish to express our profound thanks to the university which gave us the opportunity to make the project and gave us the chance to show ours skills. This report is synergistic result of many minds. We are grateful for the inspiration and wisdom of many thinkers.
We thank our internal guide Mr. S M Patel, and Industry coordinator Mr.AliNajmiwho motivated and guided us through the project. He encouraged and gave unstinting support for working on this project.
We are also highly obliged to the Head of Department, Prof. Ashok Charania and laboratory technicians Mr. Tejas S. Patel and Mr. Nirav H. Pandya for helping us for the use of college laboratory. Lastly we thanks the entire faculty for supporting us.
ABSTRACT
GENERAL USAGE BASED VENDING SYSTEMS LIKE BEVERAGE MACHINES(TEA/MILK/COLA) ,PACKAGED FOODS(CHOCOLATES/ WAFERS),TICKET KIOSKS;ATM CENTRES ETC HAVE HUGE AMOUNT OF DATA TRANSACTIONS AND DATA STORAGE FACILITIES IN THEM.
DUE TO THESE HUGE AMOUNT OF TIME AND MONEY/MAN POWER WAS WASTED FOR MAINTENANCE OF MACHINE,DATA ACQUISITION AND EVEN ITS TIMELY REFILLING(EG:CASES OF MILK THE PROPOSED DATA LOGGER SYSTEM SOLVES THE PROBLEM OF CONTINUOUS MONITORING OF DATA ACQUISITION WITH HELP OF CHEAP WIRELESS COMMUNICATION. JUST LIKE SCADA[4] ORIGNALLY THE DATA STORED IN THE SYSTEM IS TRANSFERRED TO A CONTROLLER (LPC 2136) AND THEN THE MODEM WHICH IS CONNECTED TO THE CONTROLLER SENDS THIS THROUGH G.P.R.S. TO THE SERVER. THIS DATA IS RECEIVED AT THE SERVER OF COMPANY.IT IS REPEATEDLY REFRESHED SO THAT DEPRIVATION DOES NOT OCCURE.
LIST OF FIGURES
Figure No 3.1 3.2 4.1 5.1 5.2 6.1 6.2 7.1 7.2 7.3 7.4 8.1 8.2 8.3 9.1 10.1 11.1 11.2 12.1 Figure Description BLOCK DIG OF GPRS FUNCTIONAL DIG OF GPRS BLOCK DIG OF DATA LOGGER SYSTEM PIN DIG OF LPC 2148 BLOCK DIG OF LPC 2148 KEYBOARD FLOW CHART OF KEYBOARD SIMPLE DIG OF PIR INTERNAL BLOCK DIG OF PIR FUNCTIONAL DIG OF PIR WORKING DIG OF PIR PICTURE OF MODEM OPERATIONAL DIG FOR MODEM INTERFACING OF D15 CONNECTOR LCD RS232 PIN DIG TEMPERATURE SENSORS CHARACTERSTICS OF TEMP SENSOR OPERATORS MONITOR SCREEN PageNo 5 6 8 12 13 17 18 19 19 20 21 22 23 24 25 28 29 31 33
LIST OF TABLES
Table No Table 3.1 Table 8.1 Table 9.1 Table 9.2 Table 9.3 Table Description GPRS NETWORK ELEMENT SPECIFICATION OF D15 PINS ELECTRICAL SPECIFICATION OF LED CHARACTER ADDRESS CODE PIN SPECIFICATION Page No 4 24 26 26 27
TABLE OF CONTENTS
Acknowledgement Abstract List of Figures List of Tables Chapter : 1 Company Profile Chapter : 2 General Purpose Data Logger System Chapter : 3 GPRS 3.1 general description 6 3.2 Terminals of gprs Chapter :4 Block dig of data logger 4.1 Modules Chapter : 5 LPC 2148 5.1 Description 5.2 Features 5.3 Interrupt controller 5.4 Ports 5.5 Interfacing connectors Chapter : 6 Keyboard Chapter :7 PIR Sensors Chapter : 8 Modem Chapter : 9 LCD Chapter : 10 RS 232 Chapter : 11 Temperature sensor Chapter : 12 Operators screen 8 9 10 10 11 14 15 16 18 19 22 25 28 29 33 i ii iv vii 1 2 3
CHAPTER 3 GPRS
(General Packet Radio Service)
The general packet radio system (GPRS) provides packet radio access for mobile Global System forMobile Communications (GSM) and time-division multiple access (TDMA) users. In addition toproviding new services for today's mobile user, GPRS is important as a migration step towardthird-generation (3G) networks. GPRS allows network operators to implement an IP-based corearchitecture for data applications, which will continue to be used and expanded for 3G services forintegrated voice and data applications. The GPRS specifications are written by the EuropeanTelecommunications Standard Institute (ETSI), the European counterpart of the American NationalStandard Institute (ANSI).[2]
GPRS is the first step toward an end-to-end wireless infrastructure and has the following goals: Open architecture. Consistent IP services. Same infrastructure for different air interfaces. Integrated telephony and Internet infrastructure. Leverage industry investment in IP. Service innovation independent of infrastructure. Benefits of GPRS The GPRS provides the following benefits: Overlays on the existing GSM network to provide high-speed data service Always on, reducing the time spent setting up and taking down connections Designed to support bursty applications such as e-mail, traffic telematics, telemetry, broadcastservices, and web browsing that do not require detected connection. By implementing Cisco GPRS products and related solutions, mobile service providers can optimize their networks to deploy high quality mobile voice and data services. They can also benefit from new operating efficiencies, peer-to-peer IP-based architecture for scalability, and IP standard interfaces to billing and customer support.
FIGURE 3.1
3.1 : GPRS Terminals: The term terminal equipment is generally used to refer to the variety of mobile phones and mobile stations that can be used in a GPRS environment. The equipment is defined by terminal classes and types. Ciscos gateway GPRS serving no de (GGSN) and data network components interoperate with GPRS terminals that meet the GPRS standards. Three classes of GPRS terminals are provided: Class A, Class B, or Class C.
Class A Terminals Class A terminals support GPRS and other GSM services (such as SMS and voice) simultaneously. This support includes simultaneous attach, activation, monitor, and traffic. Class A terminals can make or receive calls on two services simultaneously. In the presence of circuit-switched services.
Class B Terminals: Class B terminals can monitor GSM and GPRS channels simultaneously but can support only one of these services at a time. Therefore, a Class B terminal can support simultaneous attach, activation, and monitor, but not simultaneous traffic. As with Class A, the GPRS virtual circuits are not disconnected when circuit-switched traffic is present. Instead, they are switched to busy mode. Users can make or receive calls on either a packet or a switched call type sequentially, but not simultaneously.
Class C Terminals: Class C terminals support only sequential attach. The user must select which service to connect to. Therefore, a Class C terminal can make or receive calls from only the manually selected (or default) service. The service that is not selected is unreachable. The GPRS specifications state that support of SMS is optional for Class C terminals.
CHAPTER 4
FIGURE 4.1
For critical code size applications, the alternative 16-bit Thumbmode reduces code by more than 30 % with minimal performance penalty. Due to their tiny size and low power consumption, LPC2148 is ideal forapplications where miniaturization is a key requirement, such as access control andpoint-of-sale.
Serial communications interfaces ranging from a USB 2.0 Full-speed device,multiple UARTs, SPI, SSP to I2C-bus and on-chip SRAM of 8 kB up to 40 kB, make thesedevices very well suited for communication gateways and protocol converters, softmodems, voice recognition and low end imaging, providing both large buffer size and high processing power.
Interrupt Controller:
The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. Fast interrupt request (FIQ) has the highest priority. If more than one request is assignedto FIQ, the VIC combines the requests to produce the FIQ signal to the ARM processor.
The fastest possible FIQ latency is achieved when only one request is classified as FIQ,because then the FIQ service routine does not need to branch into the interrupt serviceroutine but can run from the interrupt vector location. If more than one request is assignedto the FIQ class, the FIQ service routine will read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt. Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assignedto this category. Any of the interrupt requests can be assigned to any of the 16 vectoredIRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest. Non-vectored IRQs have the lowest priority. The VIC combines the requests from all the vectored and non-vectored IRQs to producethe IRQ signal to the ARM processor. The IRQ service routine can start by reading aregister from the VIC and jumping there. If any of the vectored IRQs are pending, the VICprovides the address of the highest-priority requesting IRQs service routine, otherwise itprovides the address of a default routine that is shared by all the non-vectored IRQs. Thedefault routine can read another VIC register to see what IRQs are active.
INTERFACING CONNECTORS
USB 2.0 DEVICE CONTROLLER: The USB is a 4-wire serial bus that supports communication between a host and anumber (127 max) of peripherals. The LPC2148 is equipped with a USB device controller that enables 12Mbit/s data exchange with a USB host controller. It consists of a register interface,serial interface engine, endpoint buffer memory and DMA controller. UARTs: The LPC2141/42/44/46/48 each contain two UARTs. In addition to standard transmit andreceive data lines, the LPC2148 UART1 also provides a full modem controlhandshake interface. I2C-BUS: The LPC2148 each contain two I2C-bus controllers. It Can Connects 127 devices. At one time the data transfer is occur between one device only.The I2C-bus implemented in LPC2141/42/44/46/48 supports bit rates up to 400 kbit/s(Fast I2Cbus). LPC 2148 has also SPI and SSP Serial I/O Controller. LPC 2148 has facility of Real Time Clock(RTC) and Watch Dog Timer. PULSE WIDTH MODULATOR: The PWM is based on the standard timer block and inherits all of its features, althoughonly the PWM function is pinned out on the LPC2148. The timer is designedto count cycles of the peripheral clock (PCLK) and optionally generate interrupts orperform other actions when specified timer values occur, based on seven match registers.The PWM function is also based on match register events.
CHAPTER 6
KEYBOARD
Keyboard is the essential Interfacing Device by which we can enter the appropriate value to the Micro Controller. In The Keyboard The Keys are detected by the matrices. In Both Row and in Column the voltage is given. If any switch is pressed then the path is completed and the pressed switch is Decoded.
FIGURE 6.1
FLOW CHART
This chart Show how the program runs and decode step by step. When the Switch is pressed then Interrupt is generated and the pressed key is Decoded.
FIGURE 6.2
PIR Sensor Cover Whole 140 Degree of Cone in its Sensing Range. FIGURE 7.3
It connect to other device and Alart the User for moving Object Detection.
FIGURE 8.1
The FASTRACK Supreme 10 and FASTRACK Supreme 20 are discrete, rugged cellular Plug & Play Wireless CPU offering state-of-the-art GSM/GPRS (and EGPRS for FASTRACK Supreme 20) connectivity for machine to machine applications. This Is how The Service Provider Is Inserted In Modem.
FIGURE 8.2
Features of LCD: 5 x 8 dots with cursor Built-in controller (KS 0066 or Equivalent) + 5V power supply (Also available for + 3V) 1/16 duty cycle B/L to be driven by pin 1, pin 2 or pin 15, pin 16 or A.K (LED) N.V. optional for + 3V power supply
TABLE 9.1
TABLE 9.2
For the Serial Data Communication we require MAX 232 I.C and a DB-9 (Male/Female) connector. The MAX232 is an integrated circuit that converts signals from an RS-232 serial port to signals suitable for use in TTL compatible digital logic circuits. The MAX232 is a dual driver/receiver and typically converts the RX, TX, CTS and RTS signals.
FIGURE 10.1
FIGURE 11.1
An analog temperature sensor is pretty easy to explain, its a chip that tells you what the ambient temperature is! These sensors use a solid-state technique to determine the temperature. That is to say, they dont use mercury (like old thermometers), bimetalic strips (like in some home thermometers or stoves), nor do they use thermistors (temperature sensitive resistors). Instead, they use the fact as temperature increases, the votage across a diode increases at a known rate. (Technically, this is actually the voltage drop between the base and emitter - the Vbe - of a transistor. By precisely amplifying the voltage change, it is easy to genereate an analog signal that is directly proportional to temperature. There have been some improvements on the technique but, essentially that is how temperature is measured.
Because these sensors have no moving parts, they are precise, never wear out, don't need calibration, work under many environmental conditions, and are consistant between sensors and readings. Moreover they are very inexpensive and quite easy to use
FIGURE 11.2
Using the TMP36 is easy, simply connect the left pin to power (2.7-5.5V) and the right pin to ground. Then the middle pin will have an analog voltage that is directly proportional (linear) to the temperature. The analog voltage is independant of the power supply. To convert the voltage to temperature, simply use the basic formula: Temp in C = [(Vout in mV) - 500] / 10 So for example, if the voltage out is 1V that means that the temperature is ((1000 mV - 500) / 10) = 50 C If you're using a LM35 or similar, use line 'a' in the image above and the formula: Temp in C = (Vout in mV) / 10 Problems you may encounter with multiple sensors...
If, when adding more sensors, you find that the temperature is inconsistant, this indicates that the sensors are interfering with each other when switching the analog reading circuit from one pin to the other. You can fix this by doing two delayed readings and tossing out the first one
CHAPTER 12
REFRENCES
1) IMPROVEMENT OF DATA LOGGER SYSTEM FOR RENEWABL ENERGY,BY: JAKREE SRINONCHAT, ASIAN GENERAL ON ENERGY AND EVVIRONMENT,AUG 2009. 2) SURVE V, A WIRELESS COMMUNICATION DEVICE FOR SHORT MESSAGES MASTER THESIS 2006. 3) EFFICINT USE OF SPRECTUM,RYSAVYA RESEARCH,BY:CHRISTOFER GUTTMAN, 4) GENERAL PACKET RADIO SERVICES ,WHITE PAPER,BY: USHA COMMUNICATION TECHNOLOGY ,1998 TAYLOR K MOBILE MONITORING AND CONTROL INFRASTRUCTURE CSIRO AVAILABLE ONLINE AT
http://mobile.act.cmis.csiro.au