Dynamically Reconfigurable Processors

Department of Electrical and Computer Engineering

Introduction Classification Examples Summary

Introduction
What is runtime reconfiguration ?

Runtime : Processor is running and executing programs Reconfigurations : Processor can change its design/instructions

Introduction
How are Reconfigurable Processors built? Recipe 1

Take Field Programmable Gate Arrays (FPGAs) Take a conventional processor Combine both Through PCI-X,Memory,Co-processor Interface,.. Recipe 2 Use a soft-core Processor on a FPGA

Introduction : What is a FPGA ?

Hardware to implement one or many logic functions Logic of functions can be changed after production Consist of Configurable Logic Blocks Configuration is loaded with Bit files

Introduction : Configurable Logic Block

4 Slices = 1CLB 2 LUTs = 1 Slice FlipFlops Form a shift register Sometimes adder , multiplier

Introduction : Reconfiguration

Special feature of FPGAs (Xilinx : Partial Reconfiguration) Parts of FPGA can be changed while other parts are computing

Introduction : A Very Simple Processor

Classification : What Kind of architecture exist ?

Functional Unit based

Different kinds of Fus ALU, Multiplier,... No direct memory access Mostly no internal state

Classification : Co-processor Based

Co-processor interface used (ARM based) RAM interface used (x86 based) Often internal state available Version:2 Direct memory access

Classification : Soft/Hardcore based

Hardcore based : Everything till now Soft-core based : Processor configured onto FPGA simpler adaption of core flexible reconfiguration

Classification : Multicore

many heterogeneous cores

Possible processor cores build out of a repertory of components different processor types (ARM, x86, Mips, . . . )

Example:Intel Atom+Altera FPGA

Example : Convey HC1

memory

space is shared between host and FPGAs c interface to communicate with application engines FPGA configuration file is loaded dynamically no scheduling of application engines

Example : Reconfigurable Minimips

RM can be ALU, MUL, F-ALU, F-MUL, Register

compiler support is needed

special reconfiguration instruction

Summery

FPGAs are used as configurable hardware different types of runtime reconfigurable processors Functional Unit , Co-processor, Soft-/Hardcore and Single-/Multicore based example architectures: Atom/Altera, HC1, miniMips,

Thank You