Deep-Trap SILC (Stress Induced Leakage Current) Model For Nominal and Weak Oxides

Shiro Kamohara", Donggun Park, Chenining H u *Semiconductor & Integrated Circuit Div., Hitachi Ltd. CRL of Hitachi, 1-280, Higashi-koigakubo, Kokubunji, Tokyo 185, Japan Dept. of EECS, University of California a t Berkeley

ABSTRACT
We have successfully developed a new quantitative ITAT (inelastic trap-assisted tunneling)-based SILC (stress induce leakage current) model by introducing traps with a deep energy level of around 4.OeV which can explain both of t h e two field dependencies, i.e. FowlerNordheim (FN)-field and t h e direct tunneling (DT) -field dependence. For simple analytical models, we introduce t h e most favorable trap position, which gives t h e largest contribution to t h e leakage current. A-mode and B-mode SILC are the leakage currents in the nominal oxide region and at t h e weak oxide spots, respectively, which can be deduced by t h e large difference of t h e area density between t h e single trap area ( - l E l l cm-2) and t h e multi-trap path (-lE2 cm-2). Our model suggests t h a t for flash EPROM a 13nm-oxide thickness is required for 1.0 fC on t h e floating gate to last 100 years.

However, there is no consistent and quantitative ITATbased SILC model t h a t can explain t h e two different field-dependencies, even though the model for the leakage currents dependency with respect to the field is important to predict the retention characteristics. The goal of this work is t o give consistent and quantitative SILC models not only to explain t h e fielddependencies, but also to predict t h e retention-leakagecurrent. I n this work, we successfully developed a new quantitative ITAT-based SILC model by introducing traps with a deep energy level of around 4.0eV to explain t h e two field dependencies in a consistent way. Our model suggests t h a t for flash EPROM a 13nm-oxide thickness is required for 1.0 fC on the floating gate to last 100 years.

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1.INTRODUCTION
The study of t h e stress induced leakage current (SILC) is crucial for t h e gate oxide reliability of MOS devices, especially in applications such a s E2PROM and flash EPROM. It is well known t h a t SILC consists of t h e steady-state and t h e transient components. We call t h e steady-state SILC as SILC, for simplicity, in this paper. The electric field dependencies of SILCs fit t h e Fowler-Nordheim (FN)-field dependence with a reduced barrier height [l] or t h e direct tunneling (DT) -field dependence with a reduced oxide thickness a s shown in Fig. 1. These empirical dependencies are used to predict, for example, the retention time of the flash memory using unphysical fitting parameters such as reduced barrier height and reduce oxide thickness. However the two field dependencies result in such different behavior t h a t we should understand the mechanisms behind these two field dependencies and t h e origin of t h e unphysical fitting parameters. Recent studies suggest t h a t SILC is caused by inelastic trap-assisted tunneling (ITAT) [2,3,4]. The ITAT-based SILC model can successfully explain t h e independence of the substrate currents on the amount of SILCs [Z] and the oxide thickness dependence of SILC [3].
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Eox ( W / cm) Fig. I . Two types of SILC Eox-dependencies: theFN-fieki dependence and the DT-field dependence.

2. DEEP TRAP SILC MODEL

Because almost identical stress-induced currents are observed i n either polarity following stress in one polarity [5], the trap distribution should be symmetrical. Thus, two types of trap dispositions are possible, as shown in Fig. 2.
57
IEEE 98CH36173. 36m Annual lntemationalReliability Physics Symposium, Reno, Nevada, 1998

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I n A-mode, electrons at t h e cathode are captured by t h e trap, and are emitted to t h e anode, while in B-mode, electrons hop to successively lower traps (multi-trap path) before being emitted to t h e anode by tunneling [6], as shown in Fig. 3. The capture and emission of the electron is subject to the ITAT mechanism and can be described by t h e phonon-assisted Shockley-Hall-Read (SRH) model as between the virtual tunnel state and the trap state [4], shown i n Fig. 3-(a).

t h e same. I n Fig. 4, t h e calculation results of t h e tunneling probability dependence on the trap position for t h e different oxide fields are shown. The transition probabilities, PIand PZare calciilated based on t h e ITAT model. The most favorable trap position, Xt,a for A-mode shows the dominant tunneling probability and only weak depends on the oxide field. For B-mode, t h e tunneling from t h e trap to t h e anode becomes the limiting process of the current when the trap level is deeper than the conduction band edge of the anode. We choose t h e trap position where t h e trap level is coincident with the conduction band edge of the anode as t h e most favorable trap position, &,B. I n Fig. 5, we show the calculation results showing a strong dependence of Xt,B on E,. Here, we neglect t h e temperature effect on t h e transition because the I-V curve is almost independent of 5 ] . the temperature [

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Anode

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Fig.2. Two typesof t h e trap-assisted tunneing. Amode i s the current through single traps and B-mode is through muki-trap leak paths [7].

1E-22 1E-24 1E-26 1E-28

1E-30 0.00

XtA

6.50

Trap position in Si02 (nm)

Fig. 4. Trap position dependence of the A-Mode trap-assisted tunneling probability. The d m h a n t contribution to t h e leakage current comes from the trap located at the position where Pi=Pz. T most favorable trap positions only weakly depends on Eox.

(a) A-Mode (b) B-Mode F Q . 3 Inelastic tunneling through the deep trap inside the oxde. In Amode,
abctrons at the cahock are captured bythe trap,and are emitted to the anodeby tunneling h B-mode, electrons hcp to successively lowertraps before behg emlttedto the a m d e b y t u m e h g .

Finally, we can get a simple equation for A-mode and Bmode SILC described by t h e most favorable trap position to the leakage current by the unified form as

To simplify the equations for SILC, we introduce the most favorable trap position. For A-mode, we choose t h e trap which gives the largest contribution to the leakage current as t h e most favorable trap position. At t h e most favorable trap, the transition probability from the cathode is to the trap (PI) and that fiom the trap to the anode (Pz)
58

where Et is the trap energy, T, is the oxide thic is the oxide field, xt is the most favorable trap PO t h e electron charge, moxis electron effective mass

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the oxide. For A-mode, a =0.5, Ntis the area density of t h e most favorable trap and t h e most favorable trap position, XtA is obtained by solving,

For B-mode, (Y =1.0, Nt is t h e area density of t h e multitrap path and t h e most favorable trap position, X b is ~ obtained by solving,

between t h e experimental results [5] and t h e A-mode model. Good agreement is obtained, which means t h e single-trap-assisted tunneling is t h e cause of these leakage currents. We found t h a t E t = 4.0 eV yields good agreement. Here, the relaxation time, z, is 1.OE-15 sec [7]. Fig. 7 shows t h e trap area density dependence on t h e injected charge which is obtained from t h e comparisons shown in Fig. 6. The trap area density, Nt, dependence on the injected charge, Qln,, is given by,

By substituting the most favorable trap position in Eq. (1) using Eq. (2) and Eq. (3), t h e DT and t h e FN-field dependence of A-mode and B-mode SILC can be explained respectively. For A-mode, the most favorable trap position, XtA, is almost independent on the oxide field as shown i n Fig. 4, and Eq. (l),therefore, becomes t h e DTAtunneling equation which describe t h e electron tunneling from t h e trap to the anode. The reduced oxide thickness is given by T, - &A. For B-mode, the most favorable trap position, X~,B, is strongly dependent on the oxide field through Eq. (3) as shown in Fig. 5, Eq. (1) becomes t h e FN-tunneling equation. The reduced barrier height is clearly given by our equation as Et3n-Eg,~3n.

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fig. 6. Comparisons of the leakage current between the and the A-Mode model. Good experimental results [6] agreement is obtained when Et=4.0 eV.

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Fig. 7. Trap ama densitydependenceon theinjected charge.Trap areadensity issubjecttothepower law of the injected charge.

3. COMPARISONS WITH EXPERIMENTAL

RESULTS
Fig. 6 shows t h e comparison of the leakage currents
59

Fig. 8 shows a comparison of t h e leakage current between another set of experimental results and t h e B-

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Mode model. Good agreement is obtained, which means 10. This result is qualitatively consistent with the the multi-trap path conduclion is the cause oPthis leakage experimental results. For t h e qualitative comparisons, is 1.0 the transient components of SILC and the Nt -dependence current [6]. The reduced barrier height, Eta2-Eg,~a2, eV, which means the trap level is at 3.6 eV under E g p 3 . 2 on Qln, is incorporated. eV. The area density of t h e multi-trap path is 5 0 0 ~ m - ~ , which is eight orders smaller t h a n t h a t of t h e A-mode SILC. 6.OOE+OO The trap levels obtained in this work, 3.6-4.0 eV, are 1 reasonable with t h a t obtained by experiments [Z]. The trap level difference between A-mode and B-mode SILC would come from t h e structural differences of t h e traps. 4.OOE+OO The large difference of t h e area density between t h e single trap area and t h e multi-trap path means t h a t Av 3.OOE+OO di mode and B-mode SILC are t h e leakage currents in t h e Q nominal oxide region and at t h e weak oxide spots, respectively.
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4. DISCUSSIONS
The most favorable traps for A-mode SILC are located around t h e center of t h e oxide. Therefore, their position from t h e cathode becomes deeper as t h e oxide becomes thicker, a s shown in Fig. 9. The relation between the most favorable t r a p positions of A-mode SILC and t h e oxide thickness is give by

f i g . 10. Oxide thickness dependence of 4.OeV-trap Am d e SILC.The transient SlLC and the B-mode SlLC m k e comparisonswith experiment difficult.

Using Eq. (5), A-mode SILC dependence on t h e oxide thickness for NFlE11 (cm-2)is obtained, a s shown i n Fig.

The area density of t h e multi-trap path for t h e Bmode SILC is -100 sidered t o be t h e density of the weak oxide e, inside the flash memory chip, a small number of t h e memory cells are inflicted by the B-mode SILC and become anomalous cells [SI, while normal cells are inflicted only by A-mode SILC. Each B-mode leak path can conduct -0.2 pA at 2.5 MVlcm according to the model of the B-mode SILC (frombeakage current]/Nt in Fig. 8). This is consistent with t h e overerase i n 0.1 sec observed in anomalous flash memory cells.

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The model can predict the tunnel-oxide field which does not cause data retention failure in a anomalous Cell ( for 1.0 fC on the floating gate to last 100 years, each B-mode weak path must not conduct more t h a n lO-24A). The relation between the oxide thickness and the tunnel oxide is given by

multi-trap path (-1E2 cm-2). Our model suggests that for flash EPROM a 13nm-oxide thickness is required for 1.0 fc on the floatinLg gate to last 100 years.

ACKNOWLEDGMENTS
The authors would like to thank t h e colleagues in Hitachi, Dr. Lee, Ms. Manabe, Mr. Takeuchi, Mr. Okuyama and Mr. Kubota, for their valuable comments.

where C1 is the interpoly capacitance, CO is the sum of t h e interpoly, the tunnel-oxide, source and drain capacitances, Va is t h e threshold voltage, and Vao is t h e threshold voltage at the charge neutrality of the floating gate. This result in t h a t t h e minimum tunnel oxide thickness of flash memory is 13 nm as shown in Fig. 11.

REFERENCES
[l] J. D. Blauwe , J. Van Houdt, D. Wellekens, R. Degraeve, Ph. Roussel, L. Haspeslagh, L. Deferm, G. Groeseneken, H. E. Maes, "A new quantitative model t o predict SILC-related disturb characteristics in Flash EzPROM devices," IEDM Tech. Dig., p. 343-346,1996. [2] S. Takagi, N. Yasuda, A. Toriumi, "Experimental evidence of inelastic tunneling and new I-V model for stress induced leakage current," IEDM Tech. Dig., pp. 323-326,1996. [3] E. Rosenbaum, L. F. Register, "Mechanism of stressinduced leakage current in MOS capacitor," IEEE Trans. Electron Devices, pp. 317-323, 1997. [4] K. Sakakibara, N. Ajika, M. Hatanaka, H. Miyoshi, "A quantitative analysis of stress induced excess current (SIEC) in Si02 fiims," Proc. of IRPS 96, pp. 100-107, 1996. [5] R. Moazzami, C. Hu, "Stress-induced current in t h i n silicon dioxide films," Tech. dig. of IEDM 92, p. 139, 1992. [6] K. Okada, "A new dielectric break down mechanism i n silicon dioxide," Symp. on VLSI Tech. Dig., pp. 143-144, 1997. [7] I. Lundstorm and C. Svensson, "Tunneling to traps i n insulator," J. Appl. Phys., vol. 43, p. 5043, 1972. [SI S. Yamada, K. Amemiya, T. Yamane, H. Hazawa, K. Hashimoto, "Non-uniform current flow through t h i n oxide after Fowler-Nordheim stress," Proc. of IRPS 96, pp. 108-112, 1996.

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falures

10

15

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fig. 11. Mininum oxide thickness for the retention failure of the anomalous cell. The predicted minimrm oxidethickness is -13nmfor 1fC onthe floating gate to last 100 years.

5. CONCLUSIONS
We have successfully developed a new quantitative ITAT (inelastic trap-assisted tunneling)-based SILC (stress induce leakage current) model by introducing traps with a deep energy level of around 4.OeV which can explain both of t h e two field dependencies, i.e. FowlerNordheim (FN)-field and t h e direct tunneling (DT) -field dependence. For simple analytical models, we introduce t h e most favorable trap position, which gives t h e largest contribution to the leakage currents. A-mode and B-mode SILC are the leakage currents in the nominal oxide region and a t t h e weak oxide spots, respectively, which can be deduced by t h e large difference of t h e area density between t h e single trap area ( - 1 E l l cm-2) and t h e

61
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