IEEE 2007 International

Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

A Low-Power AC/DC Rectifier for Passive UHF RFID

Transponders
Zhihua Changming Ma1 Chun of Electronic (^Department Engineering, Tsinghua University, Beijing, China, 100084) of (2Institute Microelectronics, Tsinghua University, Beijing, China, 100084)
Abstract: The operating principle of typical MOSFETs AC/DC rectifier is introduced in this paper. In order to maximize the operating range of RFID transponder, low-power design techniques are needed. Therefore, the key design parameters optimization of passive rectifier is discussed. Besides, the design of a

Zhang2

Wang2

low-power rectifier for passive UHF RFID transponder, which is compatible with standard CMOS process and can be applied to the environment in which the distance from interrogator changes greatly, is also presented
in this paper. Measurement results showed that if a 510 kilo-ohm resistance is added at the rectifier output and 4W EIRP interrogator transmit power, the rectifier

output 1. 6V to 2V DC voltage, the minimum RF input power is about 230 y. W corresponding to a reading distance of 3. 45m.
can

Keywords:

RFID Rectifier

Transponder

1 Introduction
voltage multiplier, converts input RF signal received by the antenna into a stable DC supply voltage for the analog
pump
or

Rectifier, also called charge

front-end circuits, base-band DSP block and memory of RFID transponder. Depending on the type of inputs, rectifier can be classified as AC/DC and DC/DC types [4]. This paper only focuses on the former. Rectifier is one of the essential parts of the RF Front-End circuits of RFID transponder. High sensitivity, low-power rectifier is one of the most critical circuits of RFID

network[l][2]. This architecture is based on the DC/DC charge pump circuit, which is proposed by Dickson in 1976[3]. Owing to low series resistance, little threshold voltage, large saturation current and low Schottky junction capacitance, Silicon-Titanium Schottky diodes are generally used in AC/DC rectifier. However, the particularity of manufacturing processes for Schottky diodes and the inconsistency in quality between different product processes often make the integration of Schottky rectifier incompatible with standard CMOS circuits and then limit its application [4]. So, various junction diodes, such as diodeconnected MOS FETs, instead of the Schottky diodes are used in rectifier. One of the main obstacles that restrict the development and the application of passive RFID transponder is the performance of RF rectifier. The primary index of it's performance is the power efficiency and the stabilization of the output supply voltage. Low-power, long operating range rectifier design is also a critical project. This paper is concerned with the above issues. This paper is divided into five sections. In Section two, the basic principle of N-stage MOS FETs rectifier is introduced. Rectifier optimization analysis is described in Section three. The design of low-power UHF passive rectifier is presented in Section four. And experimental results are given in Section five. Conclusion is given in Section six.

transponder. Typical AC/DC Rectifier circuit architecture used in common is composed of N-stage capacitor-diode
Project D0305003040111 is sponsored by Beijing Municipal Science & Technology Commission.

2 Basic Principle Of N-Stage

MOS FETs Rectifier

In this section, we will analyze the N-stage MOS

1-4244-1044-4/07/S25.00 2007 IEEE.

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IEEE 2007 International

Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications
M:\ t;i_

-)|-^(

lt>ut

M4

\)1 WH

V'OLlt
('

\\-f

Ml

tx

Figure 1.

The N-Stage NMOS AC/DC rectifier.

at the end of this charging the transistor M2n-i turns off. When the input process, signal changes to the positive phase shown in Fig.3 (b), the voltage of input signal increases, and VK increases also, when VK>VN, the transistor M2n turns on, the charging current IN flows from capacitor CH(n) to CV(N). At the end of this process, some charges on capacitor CV(n-i) have been transferred to capacitor

M2n-i turns on, for VK< VN at this time, the transistor M2n turns off. The charge transfers from capacitor
or

Cv(n-i) to capacitor CH(n),

FETs rectifier in details and introduce its basic

operating principle. A N-stage rectifier consists of a cascade of N peak-to-peak detectors used ultra-low threshold voltage MOS FETs, whose drain and gate terminals are connected directly, as shown in Fig.2. The capacitor C is the coupling capacitor, which answers for the transfer of electric charge. The capacitor CL, whose value is generally large, is responsible for depositing charge (energy). Supposed that the rectifier's input is a sinusoidal voltage Vrf, with a frequencyf0 and amplitude V0.
As diodes used and the operating mode is mainly about charging and discharging, rectifiers are nonlinear circuits[6]. And they have a complex startup process, which is difficult to analyze. Rectifiers are also nonlinear in the steady state. However, we can use an approximately linear model to analyze [6]. Assumed that all transistors are identical, the output current is stable and all the coupling capacitor can be considered as short at the operating frequency, we analyze MOS AC/DC rectifier as follows. A. The Operating Principle of N-stage rectifier (Neglecting the Parasitic Capacitor of

N-stage rectifier as shown in Fig.2, in the dc analysis, all the transistors are connected in series, so the dc voltage between every transistor's two terminals is given by (2) V^d(dc)
For
2N And in the RF

Cy(N).

be considered as short-circuits, therefore, all the diode-connected transistors are connected in parallel or unparallel between the RF inputs. The ac voltage of every transistor is given by
can

analysis, all the coupling capacitors

vrf(t) V0coS(2xf0t) (1)

=

V V d(ac)

+V V ' ~~V
rf

(3)

sign "+" is applied to transistors with an even subscript and the sign "-" is applied to transistors with an odd subscript. So, the voltage that drops across each transistor is given by (4) K, -Vd(dc) +Vd(ac) --+Vrf
where the
y
^ y

out

From the
in-:

output dc voltage is
[.I UM
IVhvi V\-i

equation above, we can deduce that the

CniNi

2N

-^ Y:\ym Vx

Vlf

The Nth stage unit rectifier cell is shown in Fig.3 (a) and (b).CH(N) is the horizontal coupling capacitor, CV(N) and CV(n-i) is the vertical capacitor. During the negative phase of input RF signal Vrf indicated in Fig.3 (a), when VN.i>Vd^Vrf, the transist

Transistors)

rnl

y^JLijiM: Vs
%
vi\)

CviN .CSiK'

Vf4LM2Vl VITO e
V\-i

Figure 2. (a) The Nth-Stage Rectifier during the Negative Phase of input RF signal and (b) The Nth-Stage Rectifier during the Positive phase of input RF signal. ( Cs(k) is the sum of all parasitic capacitors at the terminal K).

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IEEE 2007 International

Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

Vmt=2N{Vrf-Vd(even))
Where is the

(5)
rs

Cgs
Source

voltage drop on the transistors VRevert) with an even subscript. B. The Operating Principle of N-stage rectifier(Take Parasitic Effect into Account) The analysis above doesn't consider any parasitic effects. Because the input signal of rectifier is large signal, the amplitude is often up to several hundreds millivolts, all the transistors operate at large signal condition. The large signal equivalent model of diode-connected transistor is shown in Fig.4[5]. The sum of all parasitic capacitors at the terminal K, that is CS(K), is given by
^

Ids .llxl

ra
v v'""'

lbs

Yds

Cbs

$Vbs Vbd*
Substrate

Cp

Rdb=l/gdb

(Gate)

Drain

Cp=Cbd-Csib
model of diode-

Figure 3.

the large connected transistor

signal equivalent

Vd Vds
=

c S(K)

c + c ^BS(N-l) ^^BD(N) +r ^^GB(N)

(6)
So the
ac

As indicated above, in the RF

analysis, the voltage

of terminal K

.CH{N)Vrf l{cH(N)+CS{K)).
^

voltage of every transistor is given by (7) Vd(ac) =+C lie +C .^H(NYVrf 'V^H(N) ^S(K) J) So, the voltage that drops across each transistor is given by V Vd(dc) + Vd{ac) =+C Vrf 'V^H(N) lie ^^S(K)/^ +C )+^out/ -^H{N)V /2N (8)
V
v

^ V

And the output voltage also changes to

'N
=

it is clear that with a constant output current Iouh the smaller the threshold voltage, the lower V& and the higher the output dc voltage Vout is. In the practical design, low threshold transistors [7] or nearly zero threshold transistors [4] are used. C. The Body Effect and Ripple Voltage If rectifiers use NMOS FET, the substrate bias voltage Vsb (positive for n-channel devices) is equal to the voltage Vt(l<i<N) The voltage across the reverse-biased source- substrate junction will increase the threshold voltage of the transistor. The bigger transistors' subscript is, the higher the threshold voltage, and then the lower voltage multiplier DC output is. The dependence of the threshold voltage on the source-substrate voltage is
.

According to the equation (5),

j2IdsL/(M.CmW) + V,h

(10)

expressed by [5].

^^\^H(NYrf 'y^H(N) + ^S(K))~ "d(even))

'

Vth=Vm+y^2(pf+VSB-j2ff)
at the

(ll)
a

equation (9) shows that the larger the capacitance of parasitic capacitor CS(k) is, the lower of output voltage is. For the same output voltage and load, the amplitude of RF input should be increased. And the RF input power should be increased too. Therefore, the power efficiency will decrease. So we should take care of the size of transistor and layout, try to reduce parasitic effect. Owing to short connection between gate and drain, all NMOS FETs operate in saturation region, namely,
The

It should be noted that there will be

small ripple

voltage, Vr9 given by

The

output [3]. This ripple voltage is

V.

Jfosc Cout

Jfosc R L Coi

(12)

ripple voltage can be substantially reduced by increasing the operating frequencyfosc or using a large output capacitance Cout. In the latter case, it would

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IEEE 2007 International

Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications
function of W/L, shown in Fig 5(a) and Fig. 5(b). When it is comes to the number of stages. Owing to the body effect, the transistors' threshold will increase, and the power efficiency of rectifier will decrease. So the maximum power efficiency is obtained by using the minimum number of stages [8]. However, it is clear that the output voltage will be higher with more numbers of stages. And the simulation result is shown in Fig 6 (a) and Fig. 6(b). Therefore, considered the power efficiency, we should choose a proper number of stages and optimize the size of transistors.
are a

make the rectifier

significantly longer to reach steady

output state.

Optimization Analysis

number of stage. There are some tradeoffs in AC/DC rectifier design, such as the tradeoff between quality factor, power efficiency, output voltage, input impedance, operating point (load)[2] and engineering feasibility of matched antenna. Optimization parameters include the number of stages, the size of Schottky diode or transistor, the capacitance of coupling capacitors and energy storage capacitor.
As for the size of transistor, large W/L will result in large saturation current, but, the reverse current will increase too. So, the output voltage will increase with the increase of W/L, however, the power efficiency is not the case. The output voltage and power efficiency
0.43f
0.4
> 0.35 >

design parameters of the rectifier are the size of transistor, the capacitance of the coupling capacitor and storage capacitor and the

For a voltage rectifier, the

4
We

Design and Implementation

designed an eight-stage rectifier, in Fig.6. In this design,
which is

0.3 0.25 0.2 Number of Stages

(a)

Number of Stages

the output voltage VDD versus the size of transistor of four stages rectifier, and (b). the power efficiency versus the size of transistor of four stages rectifier.
0.4

Figure 4. (a)

./..
:0 W " 40

UHttK

H-VDD=" _.1--'

Figure 5. (a) the input voltage Vin versus stages, and (b). the power efficiency versus
stages.

(a)

il_=0.5u) .

(b)

20 W

(L=0.5u)

40

the number of the number of

shown we use detector-connected ultra low threshold voltage MOSFETs instead of Schottky diode. The I-V characteristic of the diode-connected transistors is shown in Fig.7. The figure shows that the threshold of this type transistors is only about 50mV, though the reverse current of this type MOSFET is higher than the one of general threshold voltage MOSFETs, the forward current is much larger than reverse current. So this type of transistor fits better for the AC/DC rectifier. The protocol of this RFID system is ASK modulation, In order to increase the time constant and reduce the ripple voltage, a large capacitance capacitor is used to deposit charge transfer- red from the former stage and act as chip power supply. The operating distance of RFID varies dramatically, so the dynamic range of RF input power may be as high as 30dB. In order to make all the circuits work normally, the power supply can not be too high. Voltage regulator or voltage limiter is needed to limit the power amplitude when rectifier is in near field. Voltage limiter of this design is shown in Fig.6. It is composed of a voltage dividing circuit and a current leak-off circuit. The voltage dividing circuit consists of four cascade diode-connected PMOS transistor and

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IEEE 2007 International

Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications

Voltage Lil

Figure 6.

the circuit of low-power AC/DC rectifier

Figure 8.

the I-V character of voltage limiter

<f

//
.~-

*r-

Figure 7.

the I-V characteristic of the diode-connected ultra low threshold transistors.

a

Figure 9. Chip photogragh

resistor. When the output voltage of rectifier is higher than 2V and the ripple voltage is AV, the ripple voltage of resistor is aAV (0<a<l). The leak-off transistor is on and the deposit capacitor is discharged, so the output voltage of rectifier reduces. The I-V character of voltage limiter is shown in Fig.7(b). Voltage limiter is off until the output voltage of rectifier is more than 2V. Simulation results showed that if input RF power is no more than 1.5mW, the output voltage of rectifier is lower than 2.5 V.

input RF power versus the in is shown output voltage Fig. 10. The minimum input RF power is 230uW in order to output 1.8V. At the condition of an interrogator operating at 915MHz and 4W EIRP and assuming a 0-dB rectifier antenna gain, the rectifier can operate at a distance of 3.45m. From the Fig. 10, it is clear that at large RF input power, the
measurement results of

5 Measurement Results
The proposed rectifier is implemented in a 0.18um CMOS process. The die photograph is shown in Fig.9. The size of the whole chip is 470um><500um. The rectifier can be easily integrated in RFID transponder and is compatible with standard CMOS processes. Table I shows the input impedance of rectifier. The

0.5 1 Power in / tnW

1.5

Figure 10.

The measurement results of input RF power versus

the output voltage

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IEEE 2007 International

Symposium on Microwave, Antenna, Propagation, and EMC Technologies For Wireless Communications
the

higher than 2.5V, limiter circuit works successfully.

no

output voltage is
TABLE I.

voltage

Author Biographies B.S.

Rectifier Measurement Results

Frequency
915MHz

Rectifier

Re(Zin)/Q Im(Zin)/Q
28.2 -40.9

6 Conclusion
This paper has introduced the operating principle of N-stage MOSFETs AC/DC rectifier with parasitic capacitance, body effect and ripple voltage considered. We also discussed design parameters optimization and some critical tradeoffs in low-power rectifier design. The design of a low-power passive AC/DC rectifier has been presented. The measurement results showed that at the condition of 4W EIRP and 0-dB antenna gain, this rectifier can operate at the distance of 3.45m and can accommodate the environment of large dynamic range of RF input power.
Reference
[1] Klaus Finkenzeller, RFID Handbook: Fundamentals and

engineering
in 2006.

Astronautics in 1999, and the M.S. degree in the electronic from Tsinghua University, Beijing, China

Changming Ma received the degree in electronic engineering from Beijing University of Aeronautics and

During the autumn of 2004, he joined CAS Labs, EE department of Tsinghua University, where he was involved with low power RFID front-end design. His research interests include low power Mixed signal circuits and RF circuits design in CMOS technologies.

Applications in Contactless Smart Cards and Identification, 2nd ed. New York:Wiley,2003, pp. 85-96,
70-80, 55-63.

[2] U. Karthaus and M. Fischer, "Fully integrated passive

UHF RFID

[3] [4] [5] [6] [7]

transponder IC with 16.7-^ minimum RF input power," IEEE J .Solid-State Circuits, vol. 38, no. 10, pp. 1602-1608, Oct. 2003. J.Dickson, "On-chip High-Voltage Generation in NMOS Integrated Circuits Using an Improved Voltage Multiplier Technique," IEEE J. Solid-state Circuits, vol.11, no.6, pp. 374-378, June 1976. Yuan Yao, Yin Shi, a novel low-power input-independent MOS AC/DC charge pump", Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on 23-26 May 2005 Page(s):380-383 Vol. 1. Philip E. Allen, Douglas R. Holberg, "CMOS analog circuit Design", Second ed. pp. 75-85. J.-P.Curty et al., "A model for //-powered rectifier analysis and design", IEEE Trans. Circuit Syst. I, Reg. Papers, vol.52, no.12, pp 2771-2773, DEC. 2005. Jari-Pascal Curty, Norbert Joehl, Catherine Dehollain, Michel J.Declercq, "Remotely Powered Addressable UHF RFID Integrated System", IEEE J .Solid-State Circuits,
"

[8] Giuseppe De Vita and Giuseppe Iannaccone, "Design

vol. 40, no. 11, pp. 2193-2202, NOV. 2005.

Criteria for the RF Section of UHF and Microwave Passive RFID Transponders", IEEE Transaction on Microwave and Techniques, vol.53, no.9, pp. 2978-2980, Sep. 2005

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