(Universal Asynchronous Receiver/Transmitter)

Universal Asynchronous Receiver Transmitter(UART)

Used for serial data transfer using RS-232 protocol

RS-232protocol:
Serial asynchronous Full duplex protocol

Physical Specification of RS -232

Logic Voltage level

High Mark
Low(space) Undefined Simplest in terms of programming Available in most microcontrollers (in built UART)

-12V to -3V
+12V to +3V +3V to -3V

RS-232 Voltage Level :

Mark (-12 to -3) Space (+12 to +3)

Time

TTL voltage level (Hardware board):

High (+5V) Low (0V)

Time

Serial communication Block Diagram

Timing Diagram
Below is a timing diagram for the transmission of a single byte Uses a single wire for transmission Each block represents a bit that can be a mark(logic 1) or space(logic 0)

mark

space
Time

The start bit marks the beginning of a new word When detected, the receiver synchronizes with the new data stream
Start

Next follows the data bits(5,6,7,8 or 9) The least significant bit (LSB) is sent first 8 Data bits LSB MSB

The parity bit is added to make the number of 1s even (even parity) or odd (odd parity) This bit can be used by the receiver to check for transmission errors Use of parity bits is optional Parity Bit

The stop bit marks the end of transmission Receiver checks to make sure it is 1 Separates one word from the start bit of the next word You can send 2 stop bits also Stop Bit

In the configuration shown, it takes 11 bits to send 8 bits of data

8 Data bits Start LSB

Parity MSB bit

Stop Bit

START & STOP BIT :

The start bit is low and the stop bit is high. This ensures that between two bytes there's always a high-to-low transition the receiver can synchronize on.

Stop bit defines the number of stop bits implemented in the transmitter
This parameter can be set to 1(default) or 2data bits

Word is given to the UART for asynchronous transmission Start Bit is added to the beginning of the word START BIT is added to alert the receiver about sending of the word

It also forces the clock in the receiver into synchronization with the clock in the transmitter
These clocks must be accurate enough to not have the frequency drift by more than 10% Once after sending start Bit , the individual bits of the word of data are send, with LSB first When receiver has received all of the bit in the data word, it may check for the Parity Bits Then receiver looks for a Stop Bit

For example, at 9600 bps a bit time is 104 s

Then it would sample the start bit at T0 + 52 s, the first data bit at T0 + 52 s + 104 s, the second data bit at T0 + 52 s + 2 104 s, and so on.
T0 is the falling edge of the start bit.

When both receiver and transmitter clock is synchronized

If the Stop Bit does not appear then the UART considers the entire word to be garbled and will report a Framing Error to the host processor when the data word is read. The usual cause of a Framing Error is that the sender and receiver clocks were not running at the same speed, or that the signal is interrupted.

When both receiver and transmitter clock is not synchronized

Transmission Requirement
Before transmission begins, transmitter and receiver must agree on: Baud rate (300,600,etc)

1,1.5 or 2 stop bits

5,6,7 or 8 data bits Even, odd or no parity

Approaches
Approaches
Polling

Interrupt driven approaches

Polling Flowchart :

Start

Initialize

Ready Service Device 1

Check Device 1 Busy

Service Device N

Check Device 2 Busy

CPU keeps on checking periodically if an event which is desired has occurred Occurrence of event is generally signaled by setting a flag

Advantages:
Simple Knowledge of interrupt priorities not required

Predictable behavior

Disadvantages:
Eats up CPU time
If there are too many services/devices to be polled ,responsiveness will decrease

Interrupt Driven Approach:

Start ISR

Initialize

Save current state and disable interrupt

Execute Main Loop

Service Interrupt

Restore State and Enable interrupt

Advantages:
CPU is free for majority of the time
Responsiveness is better as compared to polling based approach

Disadvantages:
Software implementation is complex Nested interrupts can lead to stack over flow(RTOS)

Difference Between UART & USART

Universal Asynchronous Receiver Transmitter Universal Synchronous Asynchronous Receiver Transmitter

Device requires only data

we can send a clock along with data

Data need not to be continuous or may be burst data but is transmitted at fixed rate Data is send byte by byte

Data is continuous at fixed rate

Data is send in the form of blocks

Maximum speed is 100 kbps

Speed can reach upto 115 kbps

Example: NS 16450, NS16C550

Example: Intel 82C51