06-Chapter 6 Boards

OptiX OSN 9500 Hardware Description Manual
Contents
Contents
6 Boards
6.1 Overview 6.A.1 Classified Board Description 6.A.2 Board Relationships 6.A.3 Board Appearance 6.2 STM-64 Optical Interface Board JL64 6.A.4 Functions and Principles 6.A.5 Front Panel 6.A.6 Interface 6.A.7 Parameter Configuration 6.A.8 Specifications 6.3 STM-16 Optical Interface Board JO16/JQ16/JD16/JL16 6.A.1 Functions and Principles 6.A.2 Front Panel 6.A.3 Interface 6.A.4 Parameter Configuration 6.A.5 Specifications 6.4 STM-4/STM-1 Optical Interface Board JH41/JLQ4/JLH1 6.A.1 Functions and Principles 6.A.2 Front Panel 6.A.3 Interface 6.A.4 Parameter configuration 6.A.5 Specifications 6.5 STM-1 Electrical Interface Board JLHE 6.A.6 Functions and Principles 6.A.7 Front Panel 6.A.8 Interface 6.A.9 Parameter configuration 6.A.10 Specifications 6.6 6-Port Gigabit Ethernet Processing Board GE06 6.A.11 Functions and Principles 6.A.12 Front Panel 6.A.13 Interface 6.A.14 Parameter configuration 6.A.15 Specifications
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Contents
6.7 General High Order Cross-Connect Board GXCH 6.A.16 Functions and Principles 6.A.17 Front Panel 6.A.18 Interface 6.A.19 Specifications 6.8 Enhanced High Order Cross-Connect Board EXCH 6.A.20 Functions and Principles 6.A.21 Front Panel 6.A.22 Interface 6.A.23 Specifications 6.9 General Low Order Cross-Connect Board GXCL 6.A.24 Functions and Principles 6.A.25 Front Panel 6.A.26 Interface 6.A.27 Specifications 6.10 System Control & Communication Board JSCC 6.A.28 Functions and Principles 6.A.29 Front Panel 6.A.30 Interface 6.A.31 Parameter Configuration 6.A.32 Specifications 6.11 Synchronous Timing Generation Board JSTG 6.A.33 Functions and Principles 6.A.34 Front Panel 6.A.35 Interface 6.A.36 Parameter Configuration 6.A.37 Specifications 6.12 Synchronous Timing Interface Board JSTI 6.A.38 Functions and Principles 6.A.39 Front Panel 6.A.40 Interface 6.A.41 Parameter Configuration 6.A.42 Specifications 6.13 Orderwire Board JEOW 6.A.43 Functions and Principles 6.A.44 Front Panel 6.A.45 Interface 6.A.46 Parameter configuration 6.A.47 Specifications 6.14 System Communication Board JCOM 6.A.48 Functions and Principles 6.A.49 Front Panel 6.A.50 Interface 6.A.51 Specifications 6.15 Power Interface Board JPIU 6.A.52 Functions and Principles 6.A.53 Front Panel 6.A.54 Interface 6.A.55 Specifications
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Contents
6.16 Electromechanical Information Processing Board EMPU 6.A.56 Functions and Principles 6.A.57 Front Panel 6.A.58 Interface 6.A.59 Parameter configuration 6.A.60 Specifications 6.17 Key Power Backup Board JPBU 6.A.61 Functions and Principles 6.A.62 Front Panel 6.A.63 Interface 6.A.64 Specifications 6.18 Booster Amplifier Board JBA2 6.A.65 Functions and Principles 6.A.66 Front Panel 6.A.67 Interface 6.A.68 Parameter Configuration 6.A.69 Specifications 6.19 Pre-amplifier Board JBPA 6.A.70 Functions and Principles 6.A.71 Front Panel 6.A.72 Interface 6.A.73 Parameter Configuration 6.A.74 Specifications 6.20 Dispersion Compensation Board JDCU 6.A.75 Functions and Principles 6.A.76 Front Panel 6.A.77 Interface 6.A.78 Specifications
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Figures
Figures
Figure 4.1Max. access capacities for respective slots when the subrack cross-connect capacity is 400 G Figure 1.1Board relationships Figure 1.1Board appearance Figure 2.1Principle block diagram of the JL64 Figure 1.1LC optical interface Figure 2.1Principle block diagram of the JO16 Figure 2.1Principle block diagram of the JH41 Figure 2.1Principle block diagram of the JLHE Figure 2.1Principle block diagram of the GE06 Figure 2.1Principle block diagram of the GXCH Figure 2.1Principle block diagram of the EXCH Figure 2.1Block diagram of the GXCL Figure 2.1Functional modules of the JSCC Figure 2.2Functional module of the JSCC Figure 2.1Principle block diagram of the JSTG Figure 2.1Principle block diagram of the JEOW Figure 2.1Principle block diagram of the JCOM Figure 2.1Principle block diagram of the JPIU
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Figures
Figure 2.1Principle block diagram of the EMPU Figure 2.1Principle block diagram of the JPBU
90 95
Figure 2.1Principle block diagram of the BA functional module on the JBA2 100 Figure 3.1Function of the BA module in the system 101
Figure 2.1Principle block diagram of the PA module on the JBPA 104 Figure 3.1The PA module on the JBPA receives optical signals from the line 105 Figure 2.1Position of the JDCU in the system 108
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Tables
Tables
Table 1.1Board configuration resources Table 1.1Mandatory board list Table 1.1Service boards available when the subrack is configured with GXCH Table 1.2Service boards available when the subrack is configured with EXCH Table 1.1Board size Table 1.2Widths of the board front panel Table 1.1Appearance and components of the front panel Table 1.1Parameter configuration Table 1.1Relevant ITU-T specifications for the optical interface Table 1.2Comparison among the JO16, JQ16, JD16 and JL16. Table 1.1Appearance and components of the front panel Table 1.1Parameter configuration Table 1.1Relevant ITU-T specifications for the optical interface Table 1.2Comparison between the JH41, JLQ4 and JLH1 Table 1.1Appearance and components of the front panel Table 1.1Parameter configuration Table 1.1Optical interface specifications Table 1.1Appearance and components of the front panel Table 1.1Parameter configuration Table 1.1Appearance and components of the front panel Table 1.1Parameter configuration Table 1.1Appearance and components of the front panel Table 1.1Front Panel 2 3 5 5 7 7 11 12 14 15 19 20 22 23 27 28 30 34 35 39 40 45 49
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Tables
Table 1.1Appearance and components of the front panel Table 1.1Appearance and components of the front panel Table 1.1Pinouts of Ethernet NM interface Table 1.1Pinouts of F&f/OAM serial ports Table 1.1Parameter configuration Table 1.1Encoding mode of the SSM Table 1.1Appearance and components of the front panel Table 1.1Parameter configuration Table 1.1Appearance and components of the front panel Table 1.1Appearance and components of the front panel Table 1.1Pinouts of the orderwire phone Table 1.1Pinouts of interface F1 Table 1.2Pinouts of Serial 1Serial 4 Table 1.1Parameter configuration Table 1.1Appearance and components of the front panel Table 1.1Pinouts of the Ethernet interface Table 1.1Appearance and components of the front panel Table 1.1JPIU Interface description Table 1.2Pinouts of HUB power interface Table 1.1Appearance and components of the front panel Table 1.1Pinouts of ALARM interface (DB50) Table 1.1Description of the indicator drive interface (DB9) Table 1.1Parameter configuration Table 1.1Appearance and components of the front panel Table 1.1Appearance and components of the front panel Table 1.1Parameter configuration
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Tables
Table 1.1Appearance and components of the front panel Table 1.1Parameter configuration Table 1.1Appearance and components of the front panel
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6Boards
Boards
This chapter introduces board classification, board appearance, and specifications. The specifications include: Functions and principle Front panel Interface Parameter configuration Specifications
6.1 Overview
6.A.1 Classified Board Description
The OptiX OSN 9500 has 58 slots and 40 of them are service slots, which can be installed with different boards as required to meet the actual networking demands. For detailed networking configurations, refer to OptiX OSN 9500 Intelligent Optical Switching System Technical Manual System Description. Board configuration resources for the OptiX OSN 9500 are shown in Table 1.1.
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Table 1.1 Board configuration resources
Unit name SDH unit
Board name JL64 JO16 JQ16 JD16 JL16
Full name STM-64 Optical Interface Board 8 x STM-16 Optical Interface Board 4 x STM-16 Optical Interface Board 2 x STM-16 Optical Interface Board 1 x STM-16 Optical Interface Board 4 x STM-4 Optical Interface Board 16 x STM-4/STM-1 Optical Interface Board 16 x STM-1 Optical Interface Board 16 x STM-1 Electrical Interface Board 6-Port Gigabit Ethernet Processing Board General High Order Cross-Connect Board Enhanced High Order Cross-Connect Board General Low Order Cross-Connect board System Control & Communication Board Synchronous Timing Generation Board Synchronous Timing Interface Board Orderwire Board System Communication Board Power Interface Board Electromechanical Information Processing
Slot IU01IU40 IU01IU32 IU01IU40 IU01IU40 IU01IU40 IU01IU40 IU01IU40 IU01IU40 IU01IU40 IU01IU40 XCH XCH IU01IU32 SCC STG STI EOW COM PIU EPU
SDH unit
JLQ4 JH41 JLH1 JLHE
Ethernet processing unit Cross-Connect unit
GE06 GXCH EXCH GXCL
System control & communication unit Synchronous timing generation board
JSCC JSTG JSTI
Orderwire unit System communication unit Power interface unit Electromechanical information processing
JEOW JCOM JPIU EMPU
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Unit name unit Key power backup unit Fan control unit Dispersion compensation unit Booster amplifier (BA) & Pre-amplifier (PA) unit
Board name
Full name Board
Slot
JPBU JFAN JDCU
Key Power Backup Board Fan Control Board Dispersion Compensation Board Pre-amplifier Board
PBU FAN IU01 IU40/DCU/STI/ EOW/SIG IU01 IU40/DCU/STI/ EOW/SIG IU01 IU40/DCU/STI/ EOW/SIG
JBPA
JBA2
BA Board
System backplane
JAFB
System Backplane
Note: 1. The system backplane (JAFB) has been introduced in Chapter 4 Subrack. 2. The fan control board (JFAN) has been introduced in Chapter 5 Fan Tray Assembly. 3. Other boards are covered in this chapter. 4. Slots for JO16/JQ16/JD16/JL16/JLQ4/JH41/JLH1/JLHE/GE06/GXCL depend on configuration of the cross-connect board. Refer to relevant parts of respective boards for details.
The board configuration principle is described as follows:

2. Mandatory Boards
Table 1.1 Mandatory board list
Unit
Board name GXCH/EXCH JSCC JSTG JCOM JPIU
Protectio n scheme 1+1 protection 1+1 protection 1+1 protection
Remarks
Cross-connect unit System control and communication unit Synchronous timing generation unit System communication unit Power interface unit
GXCH and EXCH are optional for configuration.
1+1 protection
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Unit
Board name EMPU
Protectio n scheme
Remarks
Electromechanical information processing unit Key power backup unit Fan control unit Service unit
JPBU JFAN JL64/JO16/JQ 16/JD16/JL16/ JLQ4/JH41/JL H1/JLHE/GE0 6 1:3 key power protection Configured as the actual needs of the user.
3. Optional Boards
The JSTI, JDCU, JBPA/JBA2, GXCL and JEOW can be configured as required by the actual needs of the user.
4. Access Capacity
The maximum access capacity for the service board should not exceed the maximum cross-connect capacity of a single subrack. For example, when the cross-connect capacity of the subrack is 400 G/720 G, the maximum accessed service should not exceed 400 G/720 G. When the cross-connect capacity of the subrack is 400 G, and boards with access capacity of up to 20 G are supported. The access capacities for respective slots are as shown in Figure 4.1.
I U 0 1 0 5 G
01
I U 0 2 0 5 G
02
I U 0 3 1 0 G
03
I U 0 4 1 0 G
04
I U 0 5 1 0 G
05
I U 0 6 1 0 G
06
I U 0 7 2 0 G
07
I U 0 8 2 0 G
08
I U 0 9 2 0 G
09
I U 1 0 2 0 G
10
I U 1 1 1 0 G
11
I U 1 2 1 0 G
12
I U 1 3 1 0 G
13
I U 1 4 1 0 G
14
I U 1 5 0 5 G
15
I U 1 6 0 5 G
16
P B U
E S O C W C
S C C
I U 3 3 0 5 G
33
I U 3 4 0 5 G
34 41
X C H
X C H
I U 3 5 0 5 G
35
I U 3 6 0 5 G
36
S T I
E P U
P I U
55
51
47
48
42
58
52
56
I U 1 7 0 5 G
17
I U 1 8 0 5 G
18
I U 1 9 1 0 G
19
I U 2 0 1 0 G
20
I U 2 1 1 0 G
21
I U 2 2 1 0 G
22
I U 2 3 2 0 G
23
I U 2 4 2 0 G
24
I U 2 5 2 0 G
25
I U 2 6 2 0 G
26
I U 2 7 1 0 G
27
I U 2 8 1 0 G
28
I U 2 9 1 0 G
29
I U 3 0 1 0 G
30
I U 3 1 0 5 G
31
I U 3 2 0 5 G
32
Front slot area
D C U
S I G
S I G
C O M
I U 3 7 0 5 G
37
I U 3 8 0 5 G
38 43
X C H
X C H
I U 3 9 0 5 G
39
I U 4 0 0 5 G
40
Back slot area S T G S T G P I U
53
49
50
54
44
45
46
57
Figure 4.1 Max. access capacities for respective slots when the subrack cross-connect capacity is 400 G
When the GXCH is configured in the subrack, the slots can be installed with boards as follows:
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Table 1.1 Service boards available when the subrack is configured with GXCH
Slot types 20 G slots (IU7IU10 and IU23 IU26) 10 G slots (IU3IU6, IU11IU14, IU19IU22, IU27IU30) 5 G slots (IU1, IU2, IU15, IU16, IU17, IU18, IU31, IU32 and IU33 IU40) Cross-connect slots (41, 42, 43 and 44)
Available boards JL64/JO16/JQ16/JD16/JL16/JLQ4/J H41/JLH1/JLHE/GE06/JBPA/JBA2/J DCU/GXCL JL64/JQ16/JD16/JL16/JLQ4/JH41/JL H1/ JLHE/GE06/JBPA/JBA2/JDCU JD16/JL16/JLQ4/JLH1/ JLHE/JBPA/JBA2/JDCU GXCH
When the subrack cross-connect capacity is 720 G, the access capacity for each of the 32 slots in the front board area is 20 G, and that for each of the 8 slots in the rear board area is 10 G.
Table 1.2 Service boards available when the subrack is configured with EXCH
Slot types 20 G slots (IU1IU32) 10 G slots (IU33IU40) Cross-connect slots (41, 42, 43 and 44)
Available boards JL64/JO16/JQ16/JD16/JL16/JLQ4/JH41/ JLH1/ JLHE/GE06/JBPA/JBA2/JDCU/GXCL JL64/JQ16/JD16/JL16/JLQ4/JH41/JLH1/ JLHE/GE06/JBPA/JBA2/JDCU EXCH
6.A.2 Board Relationships

Figure 1.1 shows the relationships among the boards of the OptiX OSN 9500. For details, refer to board relationships in respective sections of board principles.
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Working power input
HUB power output
External alarm input/output
JPIU JPIU System working power
EMPU System environment monitoring
JPBU Key power backup JD64/JL64/ JO16/Q16/ JD16/JL16 STM-64 & STM-16
STM-64 & STM-16
JBPA/ JBA2
JD64/JL64/ JO16/Q16/ JD16/JL16
STM-4 & STM-1
EXCH/ GXCH STM-1(e) JLHE GXCL
EXCH/GXCH
JDCU
JH41/ JLH1/ JLQ4/
JH41/ JLH1/ JLQ4/
STM-4 & STM-1
GE
GE06
JEOW
System orderwire
System clock External clock input/output interface
Inter-board communication
System communication control JSCC JSCC System management system
JSTI
JSTG JSTG
JCOM
JSCC
Active/standby
Figure 1.1 Board relationships
Note: The JDCU in Figure 1.1 is only connected with the optical interface board, responsible for dispersion compensation.
6.A.3 Board Appearance

Board architectures of the OptiX OSN 9500 are shown in Figure 1.1. By widths of the front panel, the boards fall into three types, as shown in Table 1.2.
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1. Power access 4.Board name 7. Ejector lever 10. Power interface 13. Shell
2. Connector 5. Indicator 8. Optical interface 11. Power switch
3. Captive screw 6. Front panel 9. Prompt 12. HUB power output
Figure 1.1 Board appearance
Note: The slot and appearance of the JFAN are not the same as those of other boards. The JFAN is installed on the fan box, responsible for fan control. There is no front panel on the JFAN.
Table 1.1 shows the size of the boards.

Table 1.1 Board size
Board name All boards
Size 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
Widths of front panels of the OptiX OSN 9500 boards fall into three specifications, as shown in Table 1.2:
Table 1.2 Widths of the board front panel
Board name EXCH/GXCH JPIU Other boards
Width of front panel 60.96 mm, see the middle one in Figure 1.1. 50.80 mm, see the right one in Figure 1.1. 30.48 mm, see the left one in Figure 1.1.
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Note: Always wear an ESD wrist strap when holding boards, and make sure the wrist strap is well grounded to prevent static electricity from damaging the board.
Warning: It is strictly forbidden to stare straightly at the optical interface board and optical interface, lest the laser beam inside the optical fiber would hurt your eyes.
6.2 STM-64 Optical Interface Board JL64

The STM-64 optical interface board is abbreviated to JL64 hereinafter.
6.A.4 Functions and Principles

1. Functions
The JL64 integrates the transmitting and receiving of two channels of 10 Gbit/s optical signals and performs functions such as section overhead (SOH) processing of one channel of STM-64 signals, higher order path overhead (POH) monitoring and pointer justification. It also supports ITU-T G.664. The maximum access capacity of a single JL64 is 10 G.
The JL64 supports concatenating services in modes of VC-4-4c, VC-4-16c and VC-4-64c. The JL64 supports mutual exclusion among inloop, outloop, non-loopback and loopback. Non-loopback is set as the default. The JL64 supports loopback at the optical interface. Also, it can provide loopback alarm, cancel the loopback periodically, and insert AIS at loopback. The output wavelength of the optical interface of the JL64 is in line with the ITUT Recommendation G.692, with the optical interface type being compliant with the ITU-T Recommendation G.957. The JL64 provides optical interface types of I-64.1, S-64.2b, Le-64.2, L-64.2b, V-64.2b and 100G EA. Items such as power feeding, environment temperature monitoring and poweron/off control are realized through the maintenance bus (MBUS). Items, such as communication with the JSCC, collecting and reporting the alarm and performance events, interpreting and processing the configuration commands sent by the network management system (NM) through the host, are implemented by the communication channel. Through this channel, the inter-board overhead pass-through can also be realized when JSCC is not in position.
2. Principles
The JL64 is an interface board for 1 x STM-64 optical signals. It performs O/E and E/O conversion, multiplexing/demultiplexing, overhead processing and pointer Huawei Technologies Proprietary 8
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justification on the 1 x STM-64 SDH signals, and interchanges data between the active and standby cross-connect boards through the high-speed bus. Figure 2.1 shows a principle block diagram of the JL64.
SDH processing module 1 x STM-64 optical signals O/E 1 x STM-64 optical signals E/O Multiplexing / Demultiplex ing Frame synchronization /descrambling Scrambling Active/Standby cross-connect board Active/Standby cross-connect board
SOH termination SOH POH insertion
POH processing
Logical control bus Slave MBUS module Clock processing module
Data bus
Address bus Communication bus
Control & communication module
MBUS
EMPU
Front panel interface
Backplane interface
Figure 2.1 Principle block diagram of the JL64
O/E conversion module
It is responsible for the O/E or E/O conversion, signal multiplexing/demultiplexing and line clock extraction. SDH processing module In receiving direction, it performs framing, descrambling, overhead extraction, alarming and processing of part of the overheads within itself. Such information can be obtained by reading the status register inside the chip. In transmitting direction, it inserts the overhead and implements scrambling. Clock processing module It locks the system clock from the clock board and generates the system clock of itself, thus to provide the SDH processing unit and the optical signal processing unit with reference clock. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS unit functions temperature and voltage monitoring and the board power-on/off control. Control and communication module It controls the SDH processing unit, configures the services and communicates with the JSCC. The communication between respective boards can also be realized through the JCOM, and the information transmission between boards requires no transfer of the system control and communication module. In the receiving direction, it converts the overhead bytes output by the SDH signal processing unit and then transmits them to the JSCC. In the transmitting direction, it receives and converts the overhead bytes from the JSCC, and then transmits them to the SDH signal processing unit and inserts Huawei Technologies Proprietary 9
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them into the SDH SOH to be transmitted.

3. Board Relationships
Relationship with the JSCC
The JSCC sends configuration command and multiplex section (MS) switching command to the JL64, and collects information such as alarm performance reported from the JL64. The JL64 sends the overhead it receives to the system control and communication module for processing. Meanwhile, it receives the transmission overhead from the JSCC and sends it out through the optical fiber. Relationship with the cross-connect board The JL64 transmits/receives service data from the GXCH/EXCH and receives the in-position signal and status signal of the cross-connect board. Relationship with the JCOM The JL64 communicates with other boards through the JCOM. Relationship with the JSTG The JL64 transmits clock signal to the JSTG for selection. It also receives the system clock provided by the JSTG, and receives signals indicating whether the JSTG is in-position. Relationship with the EMPU Through the MBUS control module, functions such as controlling power-on/off, enabling/disabling power protection, monitoring power voltage and board environmental temperature, and so on, can be implemented. Then, the collected monitoring information is sent to the EMPU for processing through the MBUS. With its power fed by the EMPU and JPBU through backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure.
6.A.5 Front Panel

Appearance and components of the front panel are shown in Table 1.1.
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Table 1.1 Appearance and components of the front panel
Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing Common alarms parameters Normally off The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second. Flash twice every other second. No alarms Self-test error Normally off Normally on
RUN ALM
JL64
Critical alarm occurs.
On for 0.3 s and off for 0.3 s for three times, then off for 1 s. On for 0.3 s and off for 0.3 s twice, then off for 1 s. On for 0.3 s and off for 0.3 s once, then off for 1 s.
R_LOS and R_LOF
Major alarm occurs. Minor alarm occurs.
MS_AIS, AU_AIS and AU_LOP MS_RDI, HP_TIM and HP_SLM
IN1 OUT1
Flash once every other second
Status description of the green running indicator-RUN Status Meaning Flashing parameters Flash once every two seconds. Flash five times every second. Flash once every four seconds. The board is operating normally (in-service). The board is not operating normally (not in-service). Database protection mode; The communication between the board and the JSCC is interrupted. On for 1 second and off for 1 second. On for 0.1 second and off for 0.1 second. On for 2 seconds and off for 2 seconds.
Optical interface connector LC Size of front panel 322.25 mm (H) x 30.48 mm (W)
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6.A.6 Interface
The JL64 adopts the multi-source agreement (MSA) compliant transponder with LC optical connector and supports the ALS function. Located on the front panel of the optical interface unit, the LC optical connector features the following characteristics: Small volume, requiring little space at the board interface, and convenient in use. Convenient in installation/demounting for single module, supporting hot swapping and on-site installation. The LC optical connector is shown in Figure 1.1.
Figure 1.1 LC optical interface
6.A.7 Parameter Configuration

Before using the JL64 for running the service, parameters should be set for it through the NM. Common parameter settings for the JL64 are shown in Table 1.1.
Table 1.1 Parameter configuration
Name J0 to be transmitted
Range and reference value Default value: HuaWei SBS No more than 15 bytes
Meaning Sets the regenerator section (RS) trace byte J0 to be transmitted. Usually the default value is selected. The settings should be the same for the interconnected equipments.
J0 to be received
Default value: HuaWei SBS No more than 15 bytes
Sets the RS trace byte J0 to be received. Usually the default value is selected. The settings should be the same for the interconnected equipments.
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Name J0 received
Range and reference value No more than 15 bytes
Meaning Shows the actually received RS trace byte J0. In normal conditions, it should be the same as the J0 value to be received.
J1 to be transmitted
Sets the higher order path trace byte J1 to be transmitted. Usually the default value is selected. The settings should be the same for the interconnected equipments. Sets the higher order path trace byte J1 to be received. Usually the default value is selected. The settings should be the same for the interconnected equipments.
J1 to be received
C2 to be transmitted
Path unloaded signal, path loaded non-specific payload, TUG structure, locked TU, asynchronous mapping of the 34.368 Mbit/s and 44.736 Mbit/s signals into C-3, asynchronous mapping of the 139.264 Mbit/s signal into C-4, ATM, MAN (DQDB), FDDI, test signal or VC-AIS. Default value: TUG structure
Sets the signal label byte C2 to be transmitted. It should be set as the actual service type required.
C2 to be received
Sets the signal label byte C2 to be received. It should be set as the actual service type required.
Laser switch
Range: enabled/disabled. Default value: enabled.
Sets the laser on/off status of the optical interface board. Usually the default value is selected. It can be set as what the user wants.
Optical interface name
No more than 15 bytes
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6.A.8 Specifications
Specifications for the JL64 are shown as follows:
Parameters Rate Line code pattern Laser class Connector Processing capability Optical interface type Size (mm) Width of front panel Silkscreen print Power consumption (W) Weight (kg) Slots available Description 9953.280 Mbit/s Scrambled NRZ Class 1 LC 1 x STM-64 signal I-64.1, S-64.2b, Le-64.2, L-64.2b, V-64.2b, 100G EA 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 30.48 mm JL64 About 41 W 1 1. When the subrack cross-connect capacity is configured as 720 G, all the 40 IU slots in the subrack are available for the JL64. 2. When the subrack cross-connect capacity is configured as 400 G, slots IU3IU14 and IU19IU30 on the front of the subrack are available for the JL64.
Indices stipulated in the ITU-T Recommendations for the JL64 board are shown in Table 1.1
Table 1.1 Relevant ITU-T specifications for the optical interface
Optical module type I-64.1 S-64.2b Le-64.2 L-64.2b V-64.2b 100 G EA
Launched power (dBm) 6 to 1 1 to +2 +1 to +4 +13 to +15 +13 to +15 3 to 1
Receiver sensitivity (dBm) < 14 < 14 < 19.5 < 26 < 27 < 14
Overload point (dBm) > 1 > 1 > 9 > 3 > 9 > 1
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6.3 STM-16 Optical Interface Board JO16/JQ16/JD16/JL16

The 8 x STM-16 optical interface board is abbreviated to JO16 hereinafter. The 4 x STM-16 optical interface board is abbreviated to JQ16 hereinafter. The 2 x STM-16 optical interface board is abbreviated to JD16 hereinafter. The 1 x STM-16 optical interface board is abbreviated to JL16 hereinafter. The JQ16/JD16/JL16 is basically the same as the JO16 in principle, but in terms of functions, they are different in channel number of the SDH optical signals accessed. For the detailed differences in specifications, refer to the respective sections of specifications. The following description takes the JO16 as an example.
Table 1.2 Comparison among the JO16, JQ16, JD16 and JL16.
Items Processing capability Front panel Processing capability Maximum access capacity Optical interface type
JO16 8 STM-16 8 pairs of optical interfaces 8 x STM-16 optical signals 20G I-16, S-16.1, L16.1 and L-16.2
JQ16 4 STM-16 4 pairs of optical interfaces 4 x STM-16 optical signals 10G I-16, S-16.1, L16.1 and L-16.2
JD16 2 STM-16 2 pairs of optical interfaces 2 x STM-16 optical signals 5G I-16, S-16.1, L16.1, L-16.2, V16.2, Le-16.2 and U-16.2
JL16 1 STM-16 1 pair of optical interfaces 1 x STM-16 optical signal 2.5G I-16, S-16.1, L-16.1 and L-16.2

1. Functions
The JO16 integrates the transmission and receiving of eight channels of 2.5 Gbit/s optical signals and performs functions such as SOH processing of eight channels of STM-16, higher order POH monitoring and pointer justification.
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The maximum accessing capacity of a single JO16 is 20 G. The maximum accessing capacity of a single JQ16 is 10 G. The maximum accessing capacity of a single JD16 is 5 G. The maximum accessing capacity of a single JL16 is 2.5 G.
The JO16/JQ16/JD16/JL16 supports concatenated services in the modes of VC-4-4c and VC-4-16c. The JO16/JQ16/JD16/JL16 supports mutual exclusion among inloop, outloop, non-loopback and loopback. Non-loopback is set as the default. It supports loopback at the optical interface. Also, it can provide loopback alarm, cancel the loopback periodically, and insert AIS at loopback. The output wavelength of the optical interface of the JO16 is in line with the ITU-T Recommendation G.692, with the optical interface type compliant with the ITU-T Recommendation G.957. The JO16 provides optical interface types of I-16, S-16.1, L-16.1 and L-16.2. The optical interface module supports hot swapping. The JQ16 provides optical interface types of I-16, S-16.1, L-16.1 and L-16.2. The optical interface module supports hot swapping. The JD16 provides optical interface types of I-16, S-16.1, L-16.1, L-16.2, V16.2, Le-16.2 and U-16.2. The JL16 provides optical interface types of I-16, S-16.1, L-16.1 and L-16.2. Supports power monitoring, environment temperature monitoring and poweron/off controlling through the MBUS. Items, such as communication with the JSCC, collecting and reporting the alarm and performance events, interpreting and processing the configuration commands sent by the NM through host, are implemented by the communication channel. Through this channel, the inter-board overhead pass-through can also be realized in the event of JSCC not-in-position.
2. Principles
The JO16 is an interface board for 8 x STM-16 optical signals. It performs O/E and E/O conversion, multiplexing/demultiplexing, overhead processing and pointer justification on the 8 x STM-64 SDH signals, and interchanges data between the active and standby boards through the high-speed bus. Figure 2.1 shows a principle block diagram of the JO16.
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Figure 2.1 Principle block diagram of the JO16
Note: Each STM-16 optical signal in Figure 2.1 has its corresponding optical transceiver module, O/E and E/O conversion unit and overhead processing unit. Same in principles, they are not presented respectively.
It performs O/E conversion and multiplexing/demultiplexing on the signal, and extracts the line clock. SDH processing module In receiving direction, it performs framing, descrambling, overhead extraction, alarming, and processing of part of the overheads within itself. Such information can be obtained by reading the status register inside the chip. In transmitting direction, it inserts the overhead and implements scrambling. Clock processing module It processes the system clock and provides the SDH processing unit with working clock. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS monitors the board temperature and voltage, and controls the board power-on/off. Communication and control module It controls the SDH processing unit, configures the services and communicates with the JSCC. The communication between respective boards can also be realized through the JCOM, and the information transmission between boards requires no transfer of the JSCC.
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In the receiving direction, it converts the overhead bytes output by the SDH signal processing unit and then transmits them to the JSCC. In the transmitting direction, it receives and converts the overhead bytes from the JSCC, and then transmits them to the SDH signal processing unit and inserts them into the SDH SOH to be transmitted.
The JSCC sends configuration command and MS switching command to the JO16, and collects information such as alarm performance reported from the JO16. The JO16 sends the overhead it receives to the JSCC for processing. Meanwhile, it receives the transmission overhead from the JSCC and sends it out through the optical fiber. Relationship with the cross-connect unit The JO16 transmits/receives service data from the GXCH/EXCH and receives the in-position signal and status signal of the cross-connect board. Relationship with the JCOM The JO16 communicates with other boards through the JCOM. Relationship with the JSTG The JO16 transmits clock signal to the JSTG for selection. It also receives the system clock provided by the JSTG, and receives signals indicating whether the JSTG is in-position. Relationship with the EMPU Through the MBUS control module, functions such as controlling power-on/off, enabling/disabling power protection, monitoring power voltage and board environmental temperature, and so on, can be implemented. Then, the collected monitoring information is sent to the EMPU for processing through the MBUS. With its power fed by the EMPU and JPBU through backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure.
6.A.2 Front Panel

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Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing Common alarms parameters Normally off The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second. No alarms Self-test error Normally off Normally on
RUN ALM
JO16
IN1 OUT1
Critical alarm occurs. Major alarm occurs. Minor alarm occurs.
R_LOS and R_LOF.
IN2 OUT2
Flash twice every other second.
MS_AIS, AU_AIS and AU_LOP.
IN3 OUT3
Flash once every other second.
MS_RDI, HP_TIM and HP_SLM.
IN4 OUT4
Status description of the green running indicator-RUN Status Meaning Flashing parameters
IN5 OUT5
Flash once every two seconds. Flash five times every second. Flash once every four seconds.
The board is operating normally (in-service). The board is not operating normally (not in-service). Database protection mode; The communication between the board and the JSCC is interrupted.
On for 1 second and off for 1 second. On for 0.1 second and off for 0.1 second. On for 2 seconds and off for 2 seconds.
IN6 OUT6
IN7 OUT7
IN8 OUT8
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Note: The difference between the JQ16/JD16/JL16 and JO16 lies in their board names and number of optical interfaces.
6.A.3 Interface
The optical interface connector of the JO16/JQ16/JD16/JL16 is of LC type. Refer to the interface description of the JL64 for details.

Meaning Sets the RS trace byte J0 to be transmitted. Usually the default value is selected. The settings should be the same for the interconnected equipments. Sets the RS trace byte J0 to be received. Usually the default value is selected. The settings should be the same for the interconnected equipments.
J0 to be received
J0 received
Shows the actually received RS trace byte J0. In normal conditions, it should be the same as the J0 value to be received.
Sets the higher order path trace byte J1 to be transmitted. Usually the default value is selected. The settings should be the same for the interconnected equipments.
J1 to be received
Sets the higher order path trace byte J1 to be received. Usually the default value is selected. The settings should be the same for the interconnected equipments.
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Name C2 to be transmitted
Range and reference value Path unloaded signal, path loaded non-specific payload, TUG structure, locked TU, asynchronous mapping of the 34.368 Mbit/s and 44.736 Mbit/s signals into C-3, asynchronous mapping of the 139.264 Mbit/s signal into C-4, ATM, MAN (DQDB), FDDI, test signal or VC-AIS. Default value: TUG structure
Meaning Sets the signal label byte C2 to be transmitted. It should be set as the actual service type required.
C2 to be received
Sets the signal label byte C2 to be received. It should be set as the actual service type required.
Laser switch
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Specifications for JO16/JQ16/JD16/JL16 are shown as follows
Parameters JO16 Rate Line code pattern Laser class Connector Size (mm) Width of front panel Silkscreen print Weight (kg) Power consumption (W) Slots available 2488.320 Mbit/s Scrambled NRZ Class 1 LC 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 30.48 mm JO16 1.2 kg 50 W When the subrack crossconnect capacity is configured as 720 G, all 32 IU slots on the front of the subrack are available for the JO16, for example, IU1IU32. When the subrack crossconnect capacity is configured as 400 G, the middle 8 IU slots on the front of the subrack are available for the JO16, for example, IU7IU10 and IU23IU26. JQ16 1 kg 32 W When the subrack cross-connect capacity is configured as 720 G, all the 40 IU slots of the subrack are available for the JQ16. When the subrack cross-connect capacity is configured as 400 G, the slots IU3IU14 and IU19IU30 on the front of the subrack are available for the JQ16. JD16 1 kg 35 W All IU slots of the subrack. JL16 1 kg 23 W All IU slots of the subrack. Description JQ16 JD16 JL16
Note: The boards JO16/JQ16/JD16/JL16 with different signal transmission distances have different power consumptions. Those listed in the above table are their maximum power consumption values.
Indices stipulated in the ITU-T Recommendations for the JO16/JQ16/JD16/JL16 board are shown in Table 1.1
Table 1.1 Relevant ITU-T specifications for the optical interface
Optical module type I-16 S-16.1 L-16.1 L-16.2 Le-16.2
Launched power 3 to 10 5 to 0 2 to +3 2 to +3 +5 to +7
Receiver sensitivity < 18 < 18 < 27 < 28 < 28
Overload point > 3 >0 > 9 > 9 > 9
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Optical module type
Launched power
Receiver sensitivity
Overload point
V-16.2 U-16.2
+13 to +15 +15 to +18
< 28 < 34
> 9 > 18
6.4 STM-4/STM-1 Optical Interface Board JH41/JLQ4/JLH1

The 16 x STM-4/STM-1 optical interface board is abbreviated to JH41 hereinafter. The 16 x STM-1 optical interface board is abbreviated to JLH1 hereinafter. The 4 x STM-4 optical interface board is abbreviated to JLQ4 hereinafter. The JLQ4/JLH1 is basically the same as the JH41 in functions and principles, except that the latter supports hybrid access of different channels of STM-1/STM-4 SDH optical signals. Refer to the respective sections of specifications for their specific differences. The JH41 is taken as an example in the following descriptions.
Table 1.2 Comparison between the JH41, JLQ4 and JLH1
Items Processing capability
JH41 16 x STM-1, 16 x STM-4 or mixture of multiple STM-1s and STM-4s. 16 pairs of optical interfaces Mixture of 16 x STM4/STM-1 optical signals. 10 G
JLQ4 4 x STM-4
JLH1 16 x STM-1
Front panel Processing capability Maximum access capacity Optical interface type
4 pairs of optical interfaces 4 x STM-4 optical signals 2.5 G
16 pairs of optical interfaces 16 x STM-1 optical signals 2.5 G
S-4.1 and S-1.1
S-4.1
S-1.1

1. Functions
The JH41 integrates the transmission and receiving of 16 channels of 622 M/155 M optical signals and performs functions such as SOH processing of 16 channels of STM-4s or STM-1s, POH monitoring and pointer justification. It also supports the ALS function. The maximum access capacity of a single JH41 is 10 G (16 x STM-4 signals).

The maximum access capacity of a single JLQ4 is 2.5 G. The maximum access capacity of a single JLH1 is 2.5 G. Huawei Technologies Proprietary 23
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The STM-4 optical interface of the JH41/JLQ4/JLH1 supports concatenated services in VC-4-4c mode. The JH41/JLQ4/JLH1 supports mutual exclusion among inloop, outloop, nonloopback and loopback. Non-loopback is set as the default. It also supports loopback at all optical interfaces, and can provide loopback alarm, cancel the loopback periodically, and insert AIS at loopback. The output wavelength of the optical interface of the JH41 is in line with the ITU-T Recommendation G.692, with the optical interface type being compliant with the ITU-T Recommendation G.957. The JH41 provides optical interfaces of S-4.1 and S-1.1 types, which can be configured freely as the actual service required. The optical interface modules support hot swapping. The JLQ4 provides optical interfaces of S-4.1 types. The optical interface module supports hot swapping. The JLH1 provides optical interfaces of S-1.1 types. The optical interface module supports hot swapping. Supports power monitoring, environment temperature monitoring and poweron/off controlling through the MBUS. Functions such as communication with the JSCC, collecting and reporting the alarm and performance events, interpreting and processing the configuration commands sent by the NM through host, are implemented by the communication channel. Through this channel, the inter-board overhead pass-through can also be realized in the event of JSCC not-in-position.
2. Principles
The JH41 is an interface board for 16 x STM-4/STM-1 optical signals. It performs O/E and E/O conversion, multiplexing/demultiplexing, overhead processing and pointer justification on the mixture of 16 x STM-4/STM-1 SDH signals, and interchanges data between the active and standby boards through the high-speed bus. Figure 2.1 shows a principle block diagram of the JH41.
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SDH processing module 16 x STM-4/STM-1 optical signals O/E 16 x STM-4/STM-1 optical signals E/O Multiplexing / Demultiplex ing Frame synchronization /descrambling Scrambling Active/Standby cross-connect board Active/Standby cross-connect board
SOH termination SOH POH insertion
POH processing
Logical control bus Slave MBUS module Clock processing module
Data bus
MBUS
EMPU
Backplane interface
Figure 2.1 Principle block diagram of the JH41
Note: Each STM-4/STM-1 optical signal in Figure 2.1 has its corresponding optical transceiver module, O/E and E/O conversion unit and overhead processing unit. Same in principles, they are not presented respectively.
It is responsible for O/E conversion of the signal. SDH processing module In receiving direction, it performs framing, descrambling, overhead and line clock extraction, alarming and processing of part of the overheads within itself. Such information can be obtained by reading the status register inside the chip. In transmitting direction, it inserts the overhead and implements scrambling. Clock processing module It processes the system clock and provides the SDH processing unit with working clock. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS monitors the board temperature and voltage, and controls the board power-on/off. Communication & control module It controls the SDH processing module, configures the services and communicates with the JSCC. The communication between respective boards can also be realized through the JCOM, and the information transmission between boards requires no transfer of the JSCC board.
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Relationship with the JSCC board
The JSCC sends configuration command and MS switching command to the JH41, and collects information such as alarm performance reported from the JH41. The JH41 sends the overhead to JSCC board. Meanwhile, it receives the transmission overhead from the JSCC and sends it out through the optical fiber. Relationship with the cross-connect board The JH41 transmits/receives service data from the GXCH/EXCH and receives the in-position signal and status signal of the cross-connect board. Relationship with the JCOM The JH41 communicates with other boards through the JCOM. Relationship with the JSTG The JH41 transmits clock signal to the JSTG for selection. It also receives the system clock provided by the JSTG, and receives signals indicating whether the JSTG is in-position. Relationship with the EMPU Through the MBUS control module, functions of the EMPU such as controlling the JH41 power-on/off, enabling/disabling power protection, monitoring power voltage and board environmental temperature, and so on, can be implemented. Then, the collected monitoring information is sent to the EMPU for processing via the MBUS. With its power fed by the EMPU and JPBU via backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure.
6.A.2 Front Panel

Appearance and components of the front panel are shown in the following table.
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Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing Common parameters alarms Normally off No alarms Self-test error Normally off Normally on
RUN ALM
JH41
I1 O1 I2 O2 I3 O3 I4 O4 I5 O5 I6 O6 I7 O7 I8 O8 I9 O9 I10 O10 I11 O11 I12 O12 I13 O13 I14 O14 I15 O15 I16 O16
The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second. Flash twice every other second. Flash once every other second.
R_LOS and R_LOF.
MS_AIS, AU_AIS and AU_LOP. MS_RDI, HP_TIM and HP_SLM.
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6.A.3 Interface
The JH41 adopts the LC optical interface connector and direct fiber out-leading mode. Refer to the interface description part of the JL64 for details.
6.A.4 Parameter configuration

Meaning Sets the RS trace byte J0 to be transmitted. Usually the default value is selected. The settings should be the same for the interconnected equipments. Sets the RS trace byte J0 to be received. Usually the default value is selected. The settings should be the same for the interconnected equipments.
J0 to be received
J0 received
Shows the actually received RS trace byte J0. In normal conditions, it should be the same as the J0 value to be received.
Sets the higher order path trace byte J1 to be transmitted. Usually the default value is selected. The settings should be the same for the interconnected equipments.
J1 to be received
Sets the higher order path trace byte J1 to be received. Usually the default value is selected. The settings should be the same for the interconnected equipments. Sets the signal label byte C2 to be transmitted. It should be set as the actual service type required.
C2 to be transmitted
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Name C2 to be received
Range and reference value Path unloaded signal, path loaded non-specific payload, TUG structure, locked TU, asynchronous mapping of the 34.368 Mbit/s and 44.736 Mbit/s signals into C-3, asynchronous mapping of the 139.264 Mbit/s signal into C-4, ATM, MAN (DQDB), FDDI, test signal or VC-AIS. Default value: TUG structure
Meaning Sets the signal label byte C2 to be received. It should be set as the actual service type required.
Laser switch
Specifications for JLQ4/JH41/JLH1 are shown as follows
Parameters JLQ4 Rate Line code pattern Laser class Connector Size (mm) Width of front panel Silkscreen print Weight (kg) Power consumption (W) Slots available Description JH41 JLH1
155.520 Mbit/s or 622.080 Mbit/s Scrambled NRZ Class 1 LC 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 30.48 mm JLQ4 1 kg 61 W When the subrack crossconnect capacity is configured as 720 G, all the 40 IU slots of the subrack are available for the JH41. When the subrack crossconnect capacity is configured as 400 G, the slots IU3IU14 and IU19IU30 on the front of the subrack are available for the JH41 1 kg 48 W All IU slots. JLH1 1 kg 60 W All IU slot.
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Parameters JLQ4 JH41.
Description JH41
JLH1
Note: The boards JH41/JLQ4/JLH1 with different signal transmission distances have different power consumptions. Those listed in the above table are their maximum power consumption values.
Indices stipulated in the ITU-T Recommendations for the JLQ4/JH41/JLH1 board is shown in Table 1.1
Table 1.1 Optical interface specifications
Optical module type S-1.1 S-4.1
Launched power (dBm) 15 to 8 15 to 8
Receiver sensitivity (dBm) < 28 < 28
Overload point (dBm) > 8 > 8
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6.5 STM-1 Electrical Interface Board JLHE

The 16 x STM-1 electrical interface board is abbreviated to JLHE hereinafter.

1. Functions
The JLHE integrates the transmission and receiving of 16 channels of STM-1 electrical signals and performs functions such as SOH processing of 16 channels of STM-1singnal, POH monitoring and pointer justification. It also supports the ALS function. Provides 75 SMB interfaces.

The maximum access capacity of a single JLHE is 2.5 G.
The JLHE supports inloop, outloop, non-loopback and loopback. Non-loopback is set as the default. It also supports loopback at all electrical interfaces, and can provide loopback alarm, cancel the loopback periodically, and insert AIS at loopback. Supports power monitoring, environment temperature monitoring and poweron/off controlling through the MBUS. Supports configuration of such bytes as D1, D2D12, E1 and E2 to transparent transmission or into other unused overhead bytes. Deals with 4 channels DCC of the 16 x STM-1electrical interfaces.

Supports various protection schemes such as 1+1 or 1:N linear MSP.
Provides abundant alarm and performance events for convenient equipment management and maintenance. Supports smooth software upgrade and expansion.
Supports hot swapping.
2. Principles
The JLHE is an interface board for 16 x STM-1 electrical signals. It performs transmission and receiving of electrical signal, multiplexing/demultiplexing, overhead processing and pointer justification on the mixture of 16 x STM-1 SDH signals, and interchanges data between the active and standby boards through the high-speed bus. 6.A.1Figure 2.1 shows a principle block diagram of the JLHE.
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16 STM-1 elecrical signals
Signal converting module CMI/ NRZ Active/Standby cross-connect board SDH processing module NRZ/ CMI Active/Standby cross-connect board
16 STM-1 elecrical signals
Logical control module Slave MBUS module Clock processing module
Data bus
Maintenance bus
EMPU
Backplane interface
Figure 2.1 Principle block diagram of the JLHE
Signal converting module
It is responsible for CMI/NRZ and NRZ/CMI conversion of the signal. SDH processing module In receiving direction, it performs framing, descrambling, overhead and line clock extraction, alarming and processing of part of the overheads within itself. Such information can be obtained by reading the status register inside the chip. In transmitting direction, it inserts the overhead and implements scrambling. Clock processing module It processes the system clock and provides the SDH processing unit with working clock. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS monitors the board temperature and voltage, and controls the board power-on/off. Control & communication module It controls the SDH processing module, configures the services and communicates with the JSCC. The communication between respective boards can also be realized through the JCOM, and the information transmission between boards requires no transfer of the JSCC board.
The JSCC sends configuration command to the JLHE, and collects information such as alarm performance reported from the JLHE. The JLHE sends the overhead to JSCC board. Meanwhile, it receives the transmission overhead from the JSCC and sends it out through the cables.
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Relationship with the cross-connect board
The JLHE transmits/receives service data to/from the GXCH/EXCH and receives the in-position signal and status signal of the cross-connect board. Relationship with the JCOM The JLHE communicates with JSCC board through the JCOM. Relationship with the JSTG The JLHE transmits clock signal to the JSTG for selection. It also receives the system clock provided by the JSTG, and receives signals indicating whether the JSTG is in-position. Relationship with the EMPU Through the MBUS control module, functions of the EMPU such as controlling the JLHE power-on/off, enabling/disabling power protection, monitoring power voltage and board environmental temperature, and so on, can be implemented. Then, the collected monitoring information is sent to the EMPU for processing via the MBUS. With its power fed by the EMPU and JPBU via backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure.
6.A.7 Front Panel

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Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing Common parameters alarms Normally off The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second. Flash twice every other second. Flash once every other second. No alarms Self-test error Normally off Normally on
RUN ALM
JLHE
RX1 TX1 RX2 TX2 RX3 TX3 RX4 TX4 RX5 TX5 RX6 TX6 RX7 TX7 RX8 TX8 RX9 TX9 RX10 TX10 RX11 TX11 RX12 TX12 RX13 TX13 RX14 TX14 RX15 TX15 RX16 TX16
R_LOS and R_LOF.
MS_AIS, AU_AIS and AU_LOP. MS_RDI, HP_TIM and HP_SLM.
Electrical interface connector SMB Size of front panel 322.25 mm (H) x 30.48 mm (W)
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6.A.8 Interface
JLHE provides 75 SMB unbalanced interface, with the maximum transmission distance reaching 70 m.

Meaning Sets the RS trace byte J0 to be transmitted. Usually the default value is selected. The settings should be the same for the interconnected equipments.
J0 to be received
Sets the RS trace byte J0 to be received. Usually the default value is selected. The settings should be the same for the interconnected equipments. Shows the actually received RS trace byte J0. In normal conditions, it should be the same as the J0 value to be received.
J0 received
Specifications for JLHE are shown as follows
Parameters Rate Access capability Line code pattern Connector Transmitting signal eye pattern Size (mm) Width of front panel Silkscreen print Power consumption (W) Weight (kg) Description 155.520 Mbit/s 16 x STM-1 electrical signals CMI SMB Compliant with the ITU-T Recommendation G.703 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 30.48 mm JLHE About 45 W About 1 kg
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Parameters Slots available
Description All IU slot.
Note: That listed in the above table is its maximum power consumption value.
6.6 6-Port Gigabit Ethernet Processing Board GE06

The 6-port Gigabit Ethernet process board is abbreviated to GE06 hereinafter.

1. Functions

Accesses six channels of Gigabit Ethernet signals. Supports transmission mode of 1000BASE-LX/1000BASE-SX.
Supports point-to-point Ethernet transparent transmission of the GE-to-GE services. Controls the data flow.

Supports PPP, LAPS (X.85 or X.86) and GFP-F framing protocol. Supports virtual concatenation and cross-connect at VC-4 level. Maps/demaps the SDH signal.
Supports virtual concatenation and adjacent concatenation. Specifically, each GE path corresponds to virtual concatenation in VC-4-Xv mode (where X is 1 through 8 optional), or the adjacent concatenation in VC-4-Xv mode (where X is 1 and 4 optional). IEEE802.1p/IEEE802.q-supporting port feature. Supports the IEEE802.3X protocol, with adjustable transmission distance supported by the flow control performance. At present, the optical module employed has a transmission distance of 550 m or 10 km. The optical interface module supports hot swapping.
2. Principles
The GE06 performs O/E conversion and mapping on the six channels of Gigabit Ethernet optical signals, and processes the Ethernet frames and overhead pointer. Through connection of the active and standby cross-connect boards through backplane, data exchange can be implemented and thus service grooming can be realized consequently. Figure 2.1 shows a principle block diagram of the GE06.
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6 Gigabit Ethernet optical signals Optical transceiver module Data processing and mapping module
Data bus
Active/standby crossconnect board
6 Gigabit Ethernet optical signals
Data bus
Active/standby crossconnect board
Slave MBUS module
Clock processing module
communication & Communication bus Control module MBUS
Inter-board communication EMPU
Backplane interface
Figure 2.1 Principle block diagram of the GE06
Optical transceiver module
It performs O/E and E/O conversion on the Ethernet interface signal. The GE06 uses the LC optical connector, which is located at the front panel of the optical interface unit. Data processing and mapping module It includes physical layer (PHY), medium access control layer (MAC) and mapping processing part. In receiving direction, the PHY implements data recovery, clock extraction, serial/parallel conversion and decoding on the Ethernet input signal. In the transmitting direction, it performs signal parallel/serial conversions. Being compliant with IEEE 802.3, the GMAC judges and counts the Ethernet data and performs flow control on it. It will discard the error packets passing by and reports the error information to the JSCC board. The mapping processing part maps/demaps the SDH signals, processes the virtual concatenation at VC-4 level, and performs HDLC, LAPS and GFP- F encapsulation/de-encapsulation of the data. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module on the EMPU through the MBUS. The MBUS monitors the board temperature and voltage, and controls the board power-on/off.
The JSCC sends configuration command to the GE06, and collects information such as alarm performance reported from the GE06. Relationship with the cross-connect unit The GE06 transmits/receives service data from the GXCH/EXCH and receives the in-position signal and status signal of the cross-connect board. Relationship with the JCOM Huawei Technologies Proprietary 37
6Boards
The GE06 communicates with other boards through the JCOM. Relationship with the JSTG The GE06 receives the system clock and frame header signal from the JSTG. Relationship with the EMPU Through the MBUS control module, functions of the EMPU such as controlling the GE06 power-on/off, enabling/disabling power protection, monitoring the power voltage and board environmental temperature, and so on, can be implemented. Then, the collected monitoring information is sent to the EMPU for processing via the MBUS. With its power fed by the EMPU and JPBU via backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure.
6.A.12 Front Panel

6Boards
Appearance
Description Status description of the red alarm indicator-ALM Status Meanin Flashing Common alarms g parameters Normally off The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second. Flash twice every other second. Flash once every other second. No alarms Self-test error Normally off Normally on
RUN ALM
GE06
R_LOS and LINK_ERR.
I1 O1 I2 O2 I3 O3 I4 O4 I5 O5 I6 O6
AU_AIS, AU_LOP and AU_CMM HP_TIM and HP_SLM
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6.A.13 Interface
The GE06 employs the LC optical interface connector. Refer to the interface description part of the JL64 for details.

Domain Time interval of adjacent packets (8 ns) Max. packet length Dead time after flow control packet transmission (512 ns) Auto-negotiation enabling Counter of correct packets in receiving direction Counter of error packets in receiving direction Counter of all packets in receiving direction Optical interface loopback
Description Time interval of the two adjacent packets transmitted. Maximum length of the packet. Dead time after the flow control packet is transmitted. Range: disabled/enabled. Default value: enabled. Number of correct packets received.
Number of error packets received. Number of all packets received. Sets whether to loop back the optical interface. Range: inloop, outloop and non-loopback. Default value: non-loopback. Refers to the data encapsulation protocol of the port. Controls the laser switch. Range: enabled/disabled. Default value: enabled.
Data encapsulation protocal Laser switch
Flow control
Controls the flow.
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Parameters Transmission rate Size Weight (kg) Power consumption (W) Width of front panel (mm) Processing capability Laser class Interface Type Slots available Description 1000 Mbit/s 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 1.9 kg 70 W 30.48 mm Six channels of GE signals. Class 1 LC When the subrack cross-connect capacity is configured as 720 G, all the 40 IU slots of the subrack are available for the GE06. When the subrack cross-connect capacity is configured as 400 G, the slots IU3IU14 and IU19 IU30 on the front of the subrack are available for the GE06.
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6.7 General High Order Cross-Connect Board GXCH

The General high order cross-connect board is abbreviated to GXCH hereinafter. Note: Two cross-connect boards of the same type are recommended for the 1+1 hot backup for the sake of protection, for example, you can use either two GXCHs or two EXCHs, but no hybrid configuration is allowed.

1. Functions
A single board supports a cross-connect capacity of 200 G, and a single subrack, 400 G. It implements flexible service grooming at VC-4 granularity, including loopback, cross-connect, multicast and broadcast. It supports the 1+1 protection at board level, with the active and standby boards backing up each other. In the event that the active board goes faulty, the service can be reliably switched over to the standby board automatically. The slots 41 and 42 provide hot backup for each other, so do the slots 43 and 44.
Note: The cross-connect board hot backup is of binding protection scheme, for example, when switching occurs, the cross-connect boards in both the upper and lower frames will perform switches simultaneously.
When services are configured to/deleted from the GXCH as response to the service configuration send by the JSCC, it will bring no negative effect to the original services configured. Through the communication bus, the GXCH implements the configuration sent by the JSCC and sends the signal indicating completion of sending of the configuration from the JSCC back to the relevant boards. It also reports information such as performance, status and alarm of itself to the JSCC. It provides perfect performance and alarm reporting, very convenient in maintenance.
2. Principles
The GXCH is chiefly responsible for the higher order service grooming and protection. It implements unblocked cross-connection of the 1280 x 1280 VC-4 services, which are equivalent to a cross-connect capacity of 200 G x 200 G. The cross-connect capacity of a single subrack is 400 G, fulfilled by the cross-connect boards on both the upper and lower frames, who possess a cross-connect capacity of 200 G respectively. The principle block diagram of the GXCH is shown below.
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Data bus cross-connect matrix (1280 x 1280 VC-4 ) Data bus Service board
communication & Control board
Communication bus
System clock Frame header signal Slave MBUS module Front panel interface MBUS
JSTG
EMPU
Backplane interface
Figure 2.1 Principle block diagram of the GXCH
Cross-connect matrix
It implements unblocked cross-connection of multicast and broadcast services and full cross-connection of the 1280 1280 VC-4 services. Functions such as broadcast, multicast and loopback to the services can be performed through this unit. The cross-connect matrix unit connects with the service bus of the optical interface board through backplane. Clock processing module It provides system clock and frame header signal from the active and standby clock boards for the cross-connect unit. Communication & Control module It provides the communication channel and control signals. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS functions monitoring of the board temperature and voltage.
It reports the performance and alarm data of itself to the JSCC and receives the control command and parameter configuration from the JSCC. Relationship with the optical interface board It receives the service signal from the optical interface board and then sends it to the optical interface board after cross-connection, thus implementing the service grooming function. Relationship with the JCOM The GXCH communicates with other boards through the JCOM. Relationship with the JSTG Huawei Technologies Proprietary 43
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It receives the system clock provided by the JSTG, and the active/standby signal and in-position signal of the JSTG. Relationship with the EMPU The EMPU can perform power on/off controlling, monitoring of the power voltage and board ambient temperature of the GXCH through the MBUS control module. The collected monitoring information is reported to the EMPU through the MBUS for processing. With its power fed by the EMPU and JPBU through backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure.
6.A.17 Front Panel

The appearance and components of the front panel are shown in Table 1.1.
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Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing Common alarms parameters Normally off The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second. Flash twice every other second. Flash once every other second. No alarms Self-test error Normally off Normally on
RUN ALM
GXCH
NO_BD_SOFT
FPGA_ABN and TEMP_OVER W_OFFLINE
Size of front panel 322.25 mm (H) x 60.96 mm (W)
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6.A.18 Interface
None
Parameters Size Weight (kg) Power consumption (W) Width of front panel Cross-connect capacity Slots available Slot silkscreen print Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 1.5 kg About 52 W 60.96 mm A single board: 200 G A single subrack: 400 G The slots 41 and 42, 43and 44 provide hot backup for each other. XCH
6.8 Enhanced High Order Cross-Connect Board EXCH

The enhanced high order cross-connect board is abbreviated to EXCH hereinafter. Note: Two cross-connect boards of the same type are recommended for the 1+1 hot backup for the sake of protection, for example, you can use either two GXCHs or two EXCHs, but no hybrid configuration is allowed.

1. Functions
A single board supports a cross-connect capacity of 360 G, and a single subrack, 720 G. It implements flexible service grooming at VC-4 granularity, including loopback, cross-connect, multicast and broadcast. It supports the 1+1 protection at board level, with the active and standby boards backing up each other. In the event that the active board goes faulty, the service can be reliably switched over to the standby board automatically. The slots 41 and 42 provide hot backup for each other, so do the slots 43 and 44. When services are configured to/deleted from the EXCH as response to the service configuration send by the JSCC, it will bring no negative effect to the original services configured. Through the communication bus, the EXCH implements the configuration sent by the JSCC and sends the signal indicating completion of sending of the
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configuration from the JSCC back to the relevant boards. It also reports information such as performance, status and alarm of itself to the JSCC. It provides perfect performance and alarm reporting, very convenient in maintenance.
2. Principles
The EXCH is chiefly responsible for the higher order service grooming and protection. It implements unblocked cross-connection of the 2304 x 2304 VC-4 services, which are equivalent to a cross-connect capacity of 360 G x 360 G. The cross-connect capacity of a single subrack is 720 G, fulfilled by the cross-connect boards on both the upper and lower frames, who possess a cross-connect capacity of 360 G respectively. Figure shows the principle block diagram of the EXCH.
Data bus cross-connect matrix (2304 x 2304 VC-4 ) Data bus Service board
communication & Control board
Communication bus
System clock Frame header signal Slave MBUS module Front panel interface MBUS
JSTG
EMPU
Backplane interface
Figure 2.1 Principle block diagram of the EXCH
Cross-connect matrix
It implements unblocked cross-connection of multicast and broadcast services and full cross-connection of the 2304 x 2304 VC-4 services. Functions such as broadcast, multicast and loopback to the services can be performed through this unit. The cross-connect matrix unit connects with the service bus of the optical interface board through backplane. Clock processing module It provides system clock and frame header signal from the active and standby clock boards for the cross-connect unit. communication & Control module It provides the communication channel and control signals. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring Huawei Technologies Proprietary 47
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module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS functions the board temperature monitoring function.
It reports the performance and alarm data of itself to the JSCC and receives the control command and parameter configuration from the JSCC. Relationship with the optical interface board It receives the service signal from the optical interface board and then sends it to the optical interface board after cross-connection, thus implementing the service grooming function. Relationship with the JCOM The EXCH communicates with other boards through the JCOM. Relationship with the JSTG It receives the system clock provided by the JSTG, and the active/standby signal and in-position signal of the JSTG. Relationship with the EMPU The EMPU can perform power on/off controlling, monitoring of the power voltage and board ambient temperature of the EXCH through the MBUS control module. The collected monitoring information is reported to the EMPU through the MBUS for processing. With its power fed by the EMPU and JPBU through backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure.
6.A.21 Front Panel

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Table 1.1 Front Panel
Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing Common alarms parameters Normally off The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second. Flash twice every other second. Flash once every other second. No alarms Self-test error Normally off Normally on
RUN ALM
EXCH
Critical alarm occurs. Major alarm occurs.
NO_BD_SOFT
FPGA_ABN and TEMP_OVER
Minor alarm occurs.
W_OFFLINE
Status description of the green running indicator-RUN Status Meaning Flashing parameters Flash once every two seconds. Flash five times every second. Flash once every four seconds. The board is operating normally (in-service). The board is not operating normally (not in-service). Database protection mode; The communication between the board and the JSCC is interrupted.
Size of front panel
On for 1 second and off for 1 second. On for 0.1 second and off for 0.1 second. On for 2 seconds and off for 2 seconds.
322.25 mm (H) x 60.96 mm (W)
6.A.22 Interface
None
Parameters Size Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
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Weight (kg) Power consumption (W) Width of front panel Cross-connect capacity Slots available Slot silkscreen print
1.5 kg 70 W 60.96 mm A single board: 360 G A single subrack: 720 G The slots 41 and 42, 43 and 44 provide mutual backup for each other. XCH
6.9 General Low Order Cross-Connect Board GXCL

The general low order cross-connect board is hereinafter abbreviated to GXCL.
Caution: This board must be used in cooperation with the high order cross-connect board.

1. Functions
Supports the 20 G low order cross-connect capability, realizing low order crossconnect functions. Supports flexible grooming of VC-12, VC-3 and hybrid service types.
Provides 1+1 protection at board level, with the active and standby boards providing hot backup for each other. Responds the service configuration sent from the JSCC, bringing no negative effect on the original services configured when adding/reducing services. Achieves the configuration sent by the JSCC via the communication bus and sends a signal back to the JSCC, indicating the completion of sending the configuration. Reports the performance, status and alarm information for the convenience of maintenance.
2. Principles
The GXCL of the OptiX OSN 9500 achieves the low order service grooming function. The GXCL includes such functional modules as the low order cross-connect processing module, clock processing module, communication & control module, and slave maintenance bus module.
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Data bus Low order cross-connect matrix Data bus

High order crossconnect board
Communication & control module
Communication bus
System clock Frame header signal Slave MBUS module Front panel interface MBUS JSTG
EMPU
Backplane interface
Figure 2.1 Block diagram of the GXCL
Low order cross-connect matrix
It realizes 8064 x 8064 VC-12 services cross connection as well as such functions as service broadcast, multicast and loopback, connecting the high order crossconnect board through the backplane. It achieves signal space division and time division cross connection for the service. The time division cross-connect module achieves the cross connection among different timeslots within the same VC-4, and the space division cross-connect module achieves the cross connection among identical timeslots of different VC4s. Clock processing module It provides the system clock and frame header signal, which come from the active and standby JSTG boards, for the board. Communication & control module It provides the communication path and control signals. Slave MBUS module It is an MBUS-based maintenance and environment monitoring module, which monitors the board temperature and voltage, and controls the board power-on/-off. The slave MBUS module on a board communicates with the master MBUS module through the MBUS.
It reports the performance and alarm data of itself to the JSCC and receives the control command and parameter configuration from the JSCC. Relationship with the JCOM The GXCL communicates with other boards via the JCOM. Relationship with the JSTG
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The JSTG provides the system clock, the active/standby signals and the inposition signal for the GXCL. Relationship with the EMPU Via the MBUS control module, the EMPU can monitor the voltage of the control power supply for powering on/off the GXCL and the board ambient temperature, and it processes the collected monitoring information through the MBUS.
6.A.25 Front Panel

The appearance and components of the front panel are shown in Table 1.1.
Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing status parameter Normally off Normally on On for 0.3 s and off for 0.3 s for three times, then off for 1 s On for 0.3 s and off for 0.3 s twice, then off for 1 s On for 0.3 s and off 0.3 s once, then off for 1 s NO_BD_ SOFT Commo n alarms
RUN ALM
GXCL
Normally off Alarm indicator normally, running indicator off Flash times every other second.
No Memory selferror Critical alarm occurs. Major alarm occurs. Minor alarm.
Flash twice every other second.
FPGA_A BN, _OVER W_OFFLI NE
Status description of the green running indicator-RUN Status Flash once every two seconds. Flash five times every second. Flash once every four seconds. Size of front panel 322.25 mm (H) x 30.48 mm (W) Meaning The board is operating normally (in service). The board is not operating normally (not service). Database protection mode. The communication between the board and the JSCC is interrupted. Flashing status parameter On for 1 and off for 1 second On for 0.1 second and off for 0.1 On for 2 seconds and off for 2 seconds
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6.A.26 Interface
None
Parameter Size Weight Power consumption Width of front panel Cross-connect capacity Slots available Description 2.5 mm (W) x 218.5 mm (D) x 322.25 mm (H) 1 kg 32.6 W 30.48 mm 20 G low order cross connection IU01IU32 are available when the high order cross connection is 720 G. IU07IU10, IU23IU26 are available when the high order cross connection is 400 G. Slot silkscreen print IU
6.10 System Control & Communication Board JSCC

The system control & communication board is abbreviated to JSCC hereinafter. Note: The JSCC does not employ the DIP switch for setting of the NE ID. The NE ID is set through the NM or command. Two JSCCs are recommended for mutual backup for protection.

1. Functions
Supports communication between the data communications channel (DCC) and respective NEs, thus realizing management over the whole network. It supports up to 160 embedded control channels (ECCs). Supports overhead access capacity of 40 service slots, and can be flexibly multiplexed for multiple optical interfaces. Processes the signaling and realizes communication between the byte J0 and optional byte D. Provides Ethernet interface (on the front panel) for connection with the PC or workstation, which is compatible of signals (accessed to the NM) at rates of 10 M and 100 M. Provides RS-232 interface (on the front panel) for connection with the PC or workstation, using as debug serial port (F&f) or remote OAM maintenance serial port.
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Collects performance data from the respective subrack units after a certain time period (for example, 15 minutes) and sends them with time marks to the NM periodically. Also, it outputs critical alarms and non-critical alarms based on the data collected, and monitors the system power supply and fan alarm signals. Performs service configuration and service grooming in the whole subrack and monitors the respective service performances. Once fault occurs to the service, it can protect and recover the service rapidly. It can provide MSP and SNCP schemes. Employs an active board and a standby board for 1+1 hot backup. In the event that the active board goes wrong, the service can be reliably switched over to the standby board automatically. Supports hot swapping.

Provides databases fdb0, fdb1, drdb and mdb for data backup.
Technical details: Data in mdb will lose in the case of system power failure, Whereas that in drdb will not lose under the same circumstances. Once the equipment is powered on again, the service will be recovered automatically. However, since the data is maintained by the standby battery of the board, once the battery runs out, the data will lose accordingly. Data in fdb0 and fdb1 will remain if the system is powered off. Once the equipment is powered on again, the service will be recovered automatically. mdb will hold the latest service data configured, and the system will automatically save the data in drdb. But fdb0 and fdb1 requires manual backup of the user. It is recommended that you back up data in fdb0 and fdb1 periodically, and keep them consistent in fdb0, fdb1, drdb and mdb.
Supports functions of on-line loading and upgrading of the NE software and field programmable gate array (FPGA), which are not service affecting. Supports setting NE ID by software.
Supports multiple reset functions and the function of manually hardware resetting the CPU, switch button set on the front panel. And it supports the information recording power-on reset, hardware reset and software reset.
2. Principles
The JSCC performs the system control and communication function compliant with the ITU-T Recommendation G.783. Also, it processes the intelligent protocol. System control function refers to the synchronous equipment management function (SEMF), which is responsible for collecting the alarms and performance events of others boards in the system and performing corresponding management operations. The communication function refers to the message communication function (MCF), which is responsible for communication between the JSCC and other boards. It also exchanges OAM information with other NEs through the DCC, thus facilitating unified management of the NM over this NE and other NEs networkwide.
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The intelligent protocol processed by the JSCC refers to the route searching protocol required by the intelligent dynamic grooming and the general multiprotocal label switching (GMPLS) signaling for the connection establishment. According to the ITU-T Recommendation G.783, the JSCC comprises the following logical functional modules, as shown in Figure 2.1. SEMF
MCF
Sn
SEMF
F interface
V MCF
P D4-D12 (DCC m) N D1-D3 (DCC R)
Q interface
Figure 2.1 Functional modules of the JSCC
Descriptions for these two modules are as follows: SEMF The SEMF chiefly facilitates the NM to manage the respective boards of the NEs, and performs real-time monitoring, maintenance and management on the equipment. It also exchanges management information with other functional blocks of the equipment through the reference points, and converts, processes and stores the collected performance data and hardware alarm events from the respective functional blocks. Moreover, it sends the control and management information to other functional blocks of the equipment. As shown in Figure 2.1, the SEMF exchanges the management information with other functional blocks through the reference point Sn, and sends the input/output information to the MCF through the reference point V. The function of the SEMF functional module is realized through communication with the JCOM, then it may achieve communication with other boards and collects information such as board configuration, performance, alarm data, transmission control and management, thus implementing the synchronous equipment management function.
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Technical details: There are lots of reference points Sn (1n19 on the SEMF functional block, which can be regarded as management information reference points. The functional blocks of other boards in the SDH equipment also have corresponding reference points. These reference points report the collected performance and alarm data to their respective boards, and then to the JSCC through the JCOM for processing and storage. Similarly, such management information as board configuration, switching and control are sent to respective boards of the equipment by the JSCC through the reference points, passing through the JCOM. Then, the bidirectional information exchange is realized between the JSCC and respective boards of the equipment.
MCF
The MCF is responsible for transmission of various information (used for network management) between the NM and NEs, and between respective NEs. Actually, it is an interface for communication between the NM and the SEMF and other functional blocks. Through the MCF, the SEMF exchanges OAM information with the functional blocks Regenerator Section Termination (RST) and Multiplex Section Termination (MST), thus fulfilling interlocking of the OAM information between NEs. Through the standard NM interface provided by the MCF, the equipment can communicate with the NM. As shown in Figure 2.1, the MCF exchanges various information with the SEMF through the reference point V and provides interfaces F and Q for communication with the NM. Through the reference point N, the MCF places the exported DCC bytes in the bytes D1D3 (DCCR) of the regenerator section overhead (RSOH), and acts as a single message-facing path of 192kbit/s for communication of the OAM information with the RST Through the reference point N, the MCF provides nine data communication paths, consecutively placed in the bytes D4D12 of the multiplex section overhead (MSOH) for communication of the OAM information with the MST. Figure 2.2 shows the principle block diagram of the JSCC.
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Signaling processing module
Data backup module
Reset button
DCC F&Q interface Communication & control module Sn
Optical interface boards All boards
NM
Clock procesing module
Overhead processing module
Slave MBUS module
EMPU
Backplane interface
Figure 2.2 Functional module of the JSCC
The communication and control module controls the communication of the JSCC. The communication interfaces provided by the JSCC include the external communication interfaces and the communication channels between boards. The external communication interfaces are the 100M Ethernet NM interface and F&f/OAM serial port; and the internal communication interfaces include those for communication between the JSCC and the active/standby cross-connect boards and optical interface board, and between the JSCC and other boards. Synchronous timing generation board It provides the clock resource required by the functional modules on the JSCC. Overhead processing module It accesses and processes the overhead bytes and performs process and crossconnection to them. Signaling processing module It processes the signaling that support automatization and intellectualization of the network topology and processes the GMPLS-based signaling protocol. Also, it deals with the overhead bytes J0 and D1D12 from various interface boards. Data backup module It backs up the performance/alarm data and configuration data. With the intellectual features supported, the data backup unit will provide storage of the charge information. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS functions monitoring of the board temperature and voltage.
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Note: The MBUS on the JSCC does not feature the function of board power on/off. The JSCC is always powered on in the first place.
Relationship with the optical interface board
Through the inter-board communication interface, the JSCC facilitates the NM to manage the respective boards of the NEs, and performs real-time monitoring, maintenance and management on the equipment. The service boards report data such as board parameter, status and performance alarm to the JSCC board through the inter-board communication interface. And the JSCC also sends control information such as data configuration and parameter definition to various service access boards through the inter-board communication interface. Relationship with the EXCH/GXCH The EXCH/GXCH reports data such as board parameter, status and alarm to the JSCC through the inter-board communication interface. And the JSCC also sends control information such as data configuration and parameter definition to the EXCH/GXCH through the inter-board communication interface. Relationship with the JSTG The JSCC receives the synchronization timing signal generated by the clock unit of the JSTG. Relationship with the JCOM The performance and alarm data of each board are sent to the JSCC for processing, passing through the JCOM. And the management information such as board configuration, switching and control are sent to various boards of the equipment by the JSCC, passing through the JCOM. In another word, the JCOM fulfills the bidirectional information exchange between the JSCC and various boards.
6.A.29 Front Panel

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Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing parameters Normally off Flash three times every other second. Flash twice every other second. No alarms Critical alarm occurs. Major alarm occurs. Minor alarm occurs. Normally off On for 0.3 s and off for 0.3 s for three times, then off for 1 s. On for 0.3 s and off for 0.3 s twice, then off for 1 s. On for 0.3 s and off for 0.3 s once, then off for 1 s. NESTATE_INST ALL SECU_ALM K1_K2_M
RUN ALM
JSCC
COM
RESET
Status description of the green running indicator-RUN Status Meaning Flashing parameters Flash once every two seconds. Flash five times every second. Flash once every four seconds. The board is operating normally (inservice). The board is not operating normally (not in-service). Database protection mode; The communication between the board and the JSCC is interrupted. On for 1 second and off for 1 second. On for 0.1 second and off for 0.1 second. On for 2 seconds and off for 2 seconds.
F&f
Type
Status description of interfaces at Ethernet interface Meaning On: indicating there are data transmitted/received. On: indicating connection of the data channel is normal. Interface description Description It is of RJ45 type, and is used for Ethernet interface connection between the JSCC and the NM. DB9
Yellow indicator Green indicator Name Ethernet interface F&f/OAM interface
Function of RESET button Holding down the RESET button can reset the JSCC. Size of front panel 322.25 mm (H) x 30.48 mm (W)
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6.A.30 Interface
1. Ethernet NM Interface
Table 1.1 Pinouts of Ethernet NM interface
Front view
Pin No. 1 2 3
Signal TX+ TX RX+ RX N.C
Description Positive data transmission end Positive data transmission end Positive data receiving end Negative data receiving end Not defined.
6 4, 5, 7 and 8
2. F&f/OAM Serial Port

Table 1.1 Pinouts of F&f/OAM serial ports
Front view
.
Pin No. 1 2
Signal PGND RXD TXD GND N.C
Description Protection ground Data receiving Data transmission Signal ground Not defined
1 6
.
3
.
2 7 3 8 4 9 5
5 4, 6, 7, 8 and 9
. .
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Domain Parameter setting of extended ECC
Name ECC extension mode
Range and reference value Range: automatic mode or specified mode. Default value: automatic mode.
Meaning Sets the ECC extension mode. When it is set to automatic mode, the ECC between the NEs is established through the optical fibers. When it is set to specified mode, the ECC is established according to the specified IP address and port number of the server and client. Selects the objects to be set. Sets the IP address of the server and client.
Specified mode setting Opposite IP Port NE communicatio n parameter setting IP Extended ID
Range: server or client.
160165535 1255 1255
Sets the port number of the server and client for the extended ECC communication. Sets the last eight bits of the NE IP. Sets the extended ID of the NE IP address, which is 9 for the optical network products of Huawei. Sets the gateway currently used by the NE. It should be done as per the network actual situation required. Sets the subnet mask of the NE. Usually, it is set to 255.255.0.0.
Gateway
1255
Subnet mask
1255
Parameters Size (mm) Weight (kg) Power consumption (W) Width of front panel (mm) Slots available Slot silkscreen print Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 0.9 kg About 50 W 30.48 mm 47 and 48 for mutual hot backup. SCC
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6.11 Synchronous Timing Generation Board JSTG

The synchronous timing generation board is abbreviated to JSTG hereinafter.

1. Functions

Provides various boards with system clock and frame header signal.
Supports clock extraction from the line unit and external timing interface (2 Mbit/s or 2 MHz) for phase locking. Supports three kinds of working modes: free-run mode, tracing mode and holdover mode. Supports two channels of external synchronous inputs and outputs respectively. You can select either 2 MHz or 2 Mbit/s, with the output impedance matched as 75 ohm. Supports the external synchronous output to extract timing signal from the line signal directly. Supports setting of the clock source priority table. Support the clock source mode to be non-synchronization status message (SSM) mode, standard SSM mode or extended SSM mode. Supports processing and SSM extraction, and prevents the timing loop.

Support both restore switching and non-restore switching in non-SSM mode.
Supports external commands for source selection: clock source lockout and unlock, forced and manual switching, and switching clearing. Supports 1+1 protection switching of the clock board.

Supports manual setting of the clock source SSM level and the clock ID.
Provides clock meeting the requirement stipulated in the ITU-T Recommendation G.813. Monitors the overvoltage/undervoltage situation and power failure of respective power modules of the boards through the MBUS, and controls power-on/off of the board.
2. Principles
The JSTG features system timing function, and performs tracing and synchronization of the system clock. It can either select any one from the 2 MHz or 2 Mbits/s external clock source signals or from all line clock signals as the clock source for tracing, or work in the holdover or free-run mode. Also, it can process the SSM. The OptiX OSN 9500 can obtain line clock source from up to 40 line interface units, with each of them providing 16 line clock sources at most. Meanwhile, the two channels of G.703-ocmpliant 2 Mbit/s or 2 MHz external clock signals are sent to the JSTG as the time signal through the JSTI. Therefore, there are totally 42 clock sources for selection. The JSTG can make selection from them based on their priorities, or select the free-run mode. Through the JSTI, the JSTG sends two channels of G.703-compliant 2 Mbit/s or 2 MHz clock signals for other equipments. Also, it provides each interface unit with Huawei Technologies Proprietary 62
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system clock and frame indication signal.

System clock Frame header clock External synchronous clock
JSTI
Slave MBUS module
Communication bus JSCC
MBUS Front panel interface Backplane interface
EMPU
Figure 2.1 Principle block diagram of the JSTG
It features system timing function and provides the system with clock and frame header signals. The clock processing module can also provide the 2 MHz or 2 Mbits/s clock signal for equipments outside the system. It may select any one from the 2 MHz or 2 Mbits/s external clock source signal or from the 40 line clock source signals as the clock source for tracing. Moreover, it can process the synchronization status message byte (SSMB), enabling the JSTG to run in tracing mode, holdover mode or free-run mode. Communication and control module The communication unit acts as the board communication link, used for communication between the boards and with the host, and for the on-line debugging. The control unit provides address bus, data bus and control signals such as resetting required by various functional units of the JSTG. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS monitors the board temperature and voltage, and controls the board power-on/off.
3. Clock Working Mode
The clock synchronization mode falls into two types: active/standby synchronization mode and mutual synchronization mode. The former is adopted by the OptiX OSN 9500 intelligent optical switching system developed by Huawei.
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Technical details: Brief introduction to active/standby synchronization mode: A series of clocks in different levels are used in the active/standby synchronization mode, with each keeping synchronous to the clock with level higher than it. There is a reference clock, or primary clock, in the network, which is of the highest level and requires a high degree of precision and stability. Cesium-beam atomic oscillator, building integrated timing supply (BITS) or quartz oscillator with high precision can be selected for it. Clock signals are assigned by this reference clock to the clocks with levels only below it. Then, through the phased-locked loop, the frequency of the local clock is locked to the reference timing clock it receives, thus achieving synchronization of the clocks of respective nodes in the network with the reference clock.
Under the active/standby synchronization mode, clocks of the NEs usually work in the following three modes: Normal mode It is also called tracing mode, the one operated under actual service circumstances. In this mode, the NE clock is synchronous with the reference synchronization clock it receives. Here, the reference synchronization clock refers to the synchronous clock source of the primary station in the network received by the line, or the one obtained from the higher-level standby clock temporarily working in holdover mode. Holdover mode In the case of all timing reference signals are lost, the NE will enter the so-called holdover mode. Then the standby clock will take the frequency information saved before the loss as its timing reference in operation. Limited by the memory hole-in time, the holdover mode can last 24 hours at most, and then the NE will enter freerun mode. Technical details: When NE works in the holdover mode, make sure only a small deviation exists between the standby clock frequency and the reference frequency, thus making the slip damage generated being within the specifications allowance.
Free-run mode
If the NE suffers from loss of both the external timing reference received by the line and that held in the memory, it can take the fixed frequency of the crystal oscillator inside it for operation.
4. System Clock Configuration
For application neither having external clock input/output nor requiring byte S1 for clock protection switching, its clock unit configuration is quite simple, only the clock source level and synchronization source are required. But when the clock reference source is the external BITS clock and requires protection switching, the configuration is relatively complex. In this case, you should configure not only the clock source and clock trace level but also the external BITS type, and set the Huawei Technologies Proprietary 64
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clock ID and value ranges for the clock protection switching action and external clock output. The following is the description of the clock configuration items in the NM. Clock source level It is the level of all clock reference sources available to the clock unit. The clock reference sources for the clock unit to selectively trace include two external clock sources and 40 clock sources from the line unit. In normal operation, the clock unit will first select the clock source with highest level as its reference clock source. In case the clock source of higher level is lost, the one with lower level will be used instead, and so on, till the clock source of the lowest level is used ultimately. As the internal clock source is selected as the lowest clock source level, the clock module will work in free-run mode at last when all traceable clock sources are lost. Synchronous source Refers to the current synchronous clock source, it should be one listed in the clock source priority. As a general rule, the clock source with highest level is selected as the synchronous source. In common applications, the clock unit can work normally with the above two items (the clock source level and synchronous level) configured only. External input clock source mode When the external clock source is selected as the synchronous source, the input mode of the clock source (2 Mbit/s or 2 MHz) should be set. External clock output mode When outputting the external clock, the mode of the external clock source (2 Mbit/s or 2 MHz) should be configured. SSMB In the SDH optical transmission system, the 2 Mbit/s external clock signal uses bit Sa to transmit the SSM, whereas the line unit uses the byte S1 in the SOH to transmit the quality information of the clock source. With the information contained in this byte, the clock board can fulfill the automatic protection switching of the clock source. When the input mode of the external clock source is 2 Mbit/s and the SSM protocol is required, the receiving position of the external source quality information (Sa) is to be configured. The receiving position refers to the bits (offered by the external clock provider) occupied by the SSM in the external clock signal. Moreover, the ID of the external clock source also needs setting, so that the clock board can receive the information correctly. Note: The JSTG supports both the standard and extended SSM protocols. When the standard SSM protocol is employed, the clock source ID is not required; whereas the clock ID is needed when the extended SSM protocol is used.
The low four bits (58) in byte S1 contains the SSM. Table 1.1 shows the information encoding mode of it.
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Table 1.1 Encoding mode of the SSM
S1 (b5b8) 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
Byte S1 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
Level description of SDH synchronization quality The synchronization quality is unknown (in the existing synchronous network). Reserved. Clock signal recommended by G.811. Reserved. Clock signal of the transfer office recommended by G.812. Reserved. Reserved. Reserved. Clock signal of the local office recommended by G.812. Reserved. Reserved. Synchronous Equipment Timing Source (SETS) signal. Reserved. Reserved. Reserved. Not used for synchronization.
Range of the external clock output
It can be set manually. With the SSM protocol mode enabled, the clock signal should be disabled (by breaking the external clock output or sending the alarm indication signal [AIS] alarm) when the quality level of the output external clock is lower than the value range set. Source selection in the SSM protocol mode When the clock protection switching occurs, the system will above all examine the reference clock sources with highest quality and select one with highest priority from them as the NE clock synchronous source. S1 contains the quality information of the clock synchronous source. Less is its value (0x02, 0x04, 0x08 and 0x0B), higher is the clock quality. The clock level can be set manually. 2 M phase-locked loop selection Refers to the phase locking source of the 2 MHz or 2 Mbit/s clock signal provided by the JSTG to the outside. The 2 M clock reference source output by the JSTG external clock can be set by software. That is, the reference source of the 2 M Huawei Technologies Proprietary 66
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phased-locked loop can be configured as any one of the line clock sources or internal clock sources.
Relationship with the optical interface board
The JSTG can select any one of the clock signals extracted by all optical interface boards as the clock source for tracing. And, it provides each optical interface board with the system clock and frame header signal. Relationship with the JSCC The JSTG provides the JSCC with the system clock and frame header signal, and reports alarm, performance event and working status of itself to the JSCC through the communication bus. The JSCC sends such commands as active/standby switching to the JSTG. Relationship with the EMPU Through the MBUS control module, functions of the EMPU such as controlling the JSTG power-on/off and enabling/disabling power protection, monitoring power voltage and board environmental temperature, and so on, can be implemented. The collected monitoring information is sent to the EMPU for processing through the MBUS. With its power fed by the EMPU and JPBU through backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure. Relationship with other boards The JSTG provides boards such as the EXCH/GXCH and JEOW with the system clock and frame header signal.
6.A.34 Front Panel

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Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing parameters Common alarms Normally off The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second. Flash twice every other second. Flash once every other second. No alarms Self-test error Normally off Normally on
RUN ALM
JSTG
LTI and NO_BD_SOFT S1_SYN_CHANG E SYN_BAD and SYNC_C_LOS
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6.A.35 Interface
None

Domain Clock source priority
Name Priority table
Range and reference value
Meaning Shows the clock source table currently used by the NE. The ones with higher priorities are listed before those with lower priorities.
External clock source mode SSMB
2 MHz/2 Mbit/s
Sets the mode of the external clock source, only available to the input external clock source. Sets the SSMB, only available to the external clock source in the 2 Mbit/s input mode. Sets the threshold of the output 2 M synchronous source. This threshold is applicable to the clock protection of S1.And it is taken by the NE clock system as the quality base of the clock output. Only when the clock quality is prior to this threshold, it can be output to the external clock. Provides the condition for the clock source switching occurrence,and decides whether to perform switching to the clock source when AIS alarm occurs to NE. Provides the condition for the clock source switching occurrence,and decides whether to perform switching to the clock source when bit error thresholdcrossing occurs to NE. The NE considers the corresponding clock source a failure if alarm RLOS, RLOF or OOF occurs.
Sa4/Sa5/Sa6/Sa7/Sa8
Clock source threshold
No threshold. SETS signal, G.812-compliant local office clock signal, G.812-compliant transfer office clock signal, G.811-compliant clock signal, or unknown ones.
Clock source switching condition
AIS alarm
Yes/no
Bit errors thresholdcrossing
Yes/no.
Clock source switching
RLOS, RLOF or OOF alarm
Yes
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Domain Phaselocked source of external clock output
Name NE synchronous clock output < 2 M PhaseLocked Source>
Range and reference value Internal clock source
Meaning Sets the 2 M phase-locked source output of the clock. Generally, "Internal Clock Source is selected. In special applications, the 2 M phaselocked source acts as a regenerator to amplify the clock source. Then, other clock sources (such as the line clock source) should be selected as the 2 M phase-locked source to match the clock level setting.
External clock output mode in the case of the output 2 M synchronous source fails Output mode of external clock source 1
Synchronous quality unavailable, AIS output, or disconnect. Default value: disconnect. 2 Mbit/s /2 MHz
Sets the actions executed by the system when the NE synchronous clock output (for example, 2 M phase-locked source) fails. The NE provides two channels of clock outputs. Set the output mode of the external clock source 1 here. The NE provides two channels of clock outputs. Set the output mode of the external clock source 2 here. Sets the data output mode for the output clock when the system clock works in holdover mode. Sets whether to enable the clock source switching. Performs switching to the clock source. In the event that the clock source with higher priority degrades, the NE will automatically switch to the clock source with lower priority. When it is set to Auto-restore, the NE will automatically switch back to the clock source with higher priority when this source recovers. If it is set to Not-autorestore, the switching described above will not occur.
Output mode of external clock source 2
2 Mbit/s /2 MHz
Data output mode in holdover mode
Normal data output mode, or keeping the latest data Default value: normal data output mode.
Clock source switching
Lockout status Switching Recovery mode of clock source with high priority
Lockout/unlocked Forced switching/manual switching/switching clearing. Auto-restore/not-auto-restore
Clock source recovery parameter
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Domain Clock source recovery parameter
Name Clock source Wait-toRestore Time (WRT)
Range and reference value 012 mins Unit: min.
Meaning Sets the time interval between the recovery of the test signal and the triggered response of the clock selector. It is to prevent the repeated clock switching when the signal becomes unstable. Sets the subnet ID. Sets whether to enable the SSM protocol. Huawei employs the first four bits in S1 to identify the clock source, which are the very internal clock source ID of the clock subnet. Displays the line ports that can be controlled. Sets whether the line ports are enabled to output the quality information of S1.Generally, Disabled is set at the edge of the clock network, lest it has negative influence on other equipments. Manually sets the clock quality. It can specify the clock quality of the clock source listed in the priority table. If options besides Automatic extraction are selected, the NE will take the specified clock quality (other than the actual clock quality) as criteria The clock source quality actually received by the NE is extracted by the NE from byte S1 of respective clock sources. If the actual clock quality is queried, it can only be displayed when returned by the NE successfully. Otherwise, you will get No information displayed. Displays the line ports whose clock ID can be set. Enables the clock ID.
Clock subrack
Subnet belonged SSM protocol Clock source ID
Default value: 0 Yes/no 115
SSM output control
Line port Control status
All current line ports of the NE Enabled/disabled.
Clock source quality
Configuration quality
G.811-compliant clock signal, G.812-compliant transfer office clock signal, G.812compliant local office clock signal, SETS signal, synchronous source unavailable, or automatic extraction. Default setting: automatic extraction.
Clock quality
G.811-compliant clock signal, G.812-compliant transfer office clock signal, G.812compliant local office clock signal, SETS signal, synchronous source unavailable, or automatic extraction.
Enabling of the clock ID Enabling of the clock ID
Line port Enabling status
All current optical interface board ports of the NE Enabled/disabled Default value: enabled.
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Parameters Size (mm) Weight (kg) Power consumption (W) Width of front panel (mm) Slots available Slot silkscreen print Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 0.7 kg 24 W 30.48 mm 45 and 46 for mutual hot backup. STG
6.12 Synchronous Timing Interface Board JSTI

The synchronous timing interface board is abbreviate to JSTI hereinafter.

The JSTI provides the system with two external clock input interfaces and two clock output interfaces.
1. External Clock Access
The JSTI provides two external clock input interfaces IN1 and IN2 for the equipment to access the 2 Mbit/s or 2 MHz external clock.
2. Clock Output
It also provides two clock output interfaces OUT1 and OUT2 for the equipment to output the 2 Mbit/s or 2 MHz clock signal. The clock output quality is in line with the ITU-T Recommendation G.703.
6.A.39 Front Panel

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Appearance Name IN1 OUT1

JSTI
.
Description Interface description Description External clock input 1, SMB Clock output 1, SMB External clock input 2, SMB Clock output 2, SMB
IN2 OUT2
IN1
OUT1
IN2
OUT2
6.A.40 Interface
The JSTI provides the system with two external synchronous clock interfaces (which can be configured as 2 MHz or 2 Mbit/s). The interface of the JSTI should be matched with a 75 ohm coaxial connector. If 120 ohm clock interface is required, the 75 ohm to 120 ohm impedance convertor provided by Huawei is needed to implement the 75 ohm to 120 ohm impedance conversions.

Refer to the section of the JSTG. Huawei Technologies Proprietary 73
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Parameters Size (mm) Weight (kg) Power consumption (W) Input clock Output clock Width of front panel (mm) Slots available Slot silkscreen print Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 0.5 kg 0W 2 x 2 Mbit/s or 2 x 2 MHz 2 x 2 Mbit/s or 2 x 2 MHz 30.48 mm 58 STI
6.13 Orderwire Board JEOW

The orderwire board is abbreviated to JEOW hereinafter.

1. Functions

Supports one orderwire phone. Supports conference call.
Supports two orderwire subnet outgoing connections, enabling interneting and conversation among three subnets. Supports one 64kbit/s data interface. Supports four broadcast data interfaces (RS232 and RS422), with their maximum rate being 19.2 kbit/s. Supports communication of the network port with the JSCC and other board through LAN switch. Provides MBUS for communication with other boards.
Provides the JSCC the in-position signal of itself and check whether the JSCC is in-position and whether is an active or standby one.
2. Principles
The JEOW is responsible for processing the overhead from the JSCC. It provides one orderwire phone interface, two subnet outgoing connection interfaces for orderwire phone, one 64 K transparent data interface F1, and four broadcast data interfaces Serial 1Serial 4 (where two of them support signaling transmission through the subnet outgoing connection). Also, it provides the orderwire phone with ringing current module.
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Ringing current module
Active/standby JSTG
Orderwire phone Subnet outgoing phone F1 Serial1Serial4 Overhead processing module Communication bus
Active/standby JSCC
Slave MBUS module
Communication bus MBUS
Inter-board communication EMPU
Backplane interface
Figure 2.1 Principle block diagram of the JEOW
Overhead processing module
It extracts, inserts, exchanges and processes the bytes E1, E2, F1 and Serial 1 Serial 4. Clock processing module It converts the clock signal from the JSTG into the working clock required by the JEOW. Communication & control module The communication module provides communication channels for communication between the boards and with the host, and for on-line debugging. The control module provides address bus, data bus and control signals such as resetting required by various functional module of the JEOW. Ringing current module It produces the ringing current signal required by the orderwire phone. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS monitors the board temperature and voltage, and controls the board power-on/off.
The JEOW receives and processes the overhead signals from the JSCC, including bytes such as E1, E2, F1 and Serial 1Serial 4. It also reports the alarm and working status of itself to the JSCC through the communication bus, and receives the configuration command from the JSCC. Relationship with the EMPU
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Through the MBUS control module, functions of the EMPU such as controlling the JEOW power-on/off, enabling/disabling power protection, monitoring power voltage and board environmental temperature, and so on, can be implemented. Then, the collected monitoring information is sent to the EMPU for processing through the MBUS. With its power fed by the EMPU and JPBU through backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure.
6.A.44 Front Panel

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Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing Common alarms parameters Normally off No alarms Self-test error Normally off Normally on
RUN ALM
JEOW
PHONE
VOICE1
VOICE2
BD_STATUS
SERIAL1
SERIAL2
SERIAL3
Status description of the green running indicator-RUN Status Meaning Flashing parameters Flash once every two seconds. The board is operating normally (in-service). The board is not operating normally (not in-service). Database protection mode; The communication between the board and the JSCC is interrupted. RJ48 DB9 On for 1 second and off for 1 second. On for 0.1 second and off for 0.1 second. On for 2 seconds and off for 2 seconds.
SERIAL4
Flash five times every second.

F1
Flash once every four seconds.
Name Orderwire phone or subnet outgoing interface Interface F1 and serial 1serial 4 Size of front panel 322.25 mm (H) x 30.48 mm (W)
Interface Type
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6.A.45 Interface
1. Orderwire Phone and Subnet Outgoing Phone
Both the interfaces of the orderwire phone and subnet outgoing phone adopt the RJ48 connector.
Table 1.1 Pinouts of the orderwire phone
Front view
Pin No. 4 5 1, 2, 3, 6, 7 and 8
Signal signal 1 signal 2 N.C
Descriptio n signal 1 signal 2 Not defined.
2. F1 and Serial1Serial4 Interfaces
The 64K transparent data interface F1 and the four broadcast data interfaces (Serial 1Serial 4) employ the DB9 connector, where the four broadcast data interfaces can be configured as RS232C or RS422 interfaces. Technical details: About the interface Being a serial interface and adopting non-balanced mode, the RS-232 interface features a short communication distance. The RS-422 interface, adopting differential balance mode, has a comparatively longer communication distance and can provide a higher data transmission rate than the RS-232, though it is also a serial interface.
Table 1.1 Pinouts of interface F1
Front view
.
Pin No. 1 2, 3, 4
Signal PGND N. C GND TT TR RT RR
Description Protection ground Not defined. Signal definition. Transmitting T end Transmitting R end Receiving T end Receiving R end
1 6
.
5
.
2 7 3 8 4 9 5
6 7 8 9
. .
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Table 1.2 Pinouts of Serial 1Serial 4
Front view
.
Pin No. 1 2
Signal PGND RS232 RXD RS 232 TXD GND RS422TXD + RS422TXD RS422RXD + RS422RXD
Description Protection ground Data received by RS 232 Data transmitted by RS 232 Signal ground Positive data transmission end of RS422 Negative data transmission end of RS422 Positive data receiving end of RS422 Negative data receiving end of RS422
1 6
.
2 7 3 8 4 9 5
3 5 6 7 8 9
. .

Name Normal Call waiting time
Range and reference value 19 Unit: second Default value: 9 Conference call Phone 1 10099999999 Default value: 999 10099999999
Meaning Sets the waiting time for call establishment.
Sets the number of conference call, supporting up to eight numerals. Sets the number of NE orderwire call, which depends on the engineering planning. Sets availability of the optical interface in the status of conference call.
Availability setting of the conference call optical interface Electric feature setting of the subnet outgoing serial port
Representing availability of the optical interface in the status of conference call. "1 means the optical interface is available, and 0, unavailable. 0 is the default value. Setting the interface level feature of the subnet outgoing serial port (RS232/RS422). The default is RS232.
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Name Normal Setting of the serial port subnet outgoing enabling status Selected orderwire phone port Alternative orderwire phone port High level attribute Bytes occupied by the orderwire Selected conference call optical interface Alternative conference call optical interface Broadcast data interface Overhead byte
Range and reference value
Meaning Enable/disable the subnet outgoing connection of the serial port.
All optical interface board optical interfaces of the equipment. All optical interface board optical interfaces of the equipment. E1/E2 Default value: E1
Shows the optical interface board ports for orderwire call transmission. Shows the alternative orderwire phone ports. E1 is the RSOH, and E2 is the MSOH. If E2 is adopted, orderwire call can not be made with the Regenerator (REG). Shows the conference call optical interfaces selected.
Conference call
All optical interface board optical interfaces of the equipment.
Shows the alternative conference call interfaces.
SERIAL1/SERIAL2/SERIAL3/SE RIAL4 Default value: SERIAL1
Selects the broadcast data channel which requires setting.
Working mode Electric feature setting of the data interface Broadcast data source
RS232 Configuring the data interface level feature (RS232 or RS422).The default is RS232.
Sets working mode of the data interface. Configures the level feature of the data interface. A broadcast data channel provides data channel for a broadcast. The broadcast data source is the very source data channel of this broadcast data channel. The broadcast data sink channel is the sink data channel of the broadcast data channel. Multiple sink channels are supported due to the broadcast mode.
Broadcast data sink
Parameters Size (mm) Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W)
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Weight (kg) Power consumption (W) Width of front panel (mm) Slots available Slot silkscreen print
0.8 kg About 20 W 30.48 mm 51 EOW
6.14 System Communication Board JCOM

The system communication board is abbreviated to JCOM hereinafter.

1. Functions
Implements communication of the control information between the JSCC and other relevant boards in the subrack. It ensures the unblocked exchange of various control information and commands, and as well as the reliable communication between various boards. The communication of the JCOM with the JSCC and other boards is through Ethernet communication. Supports hot swapping of the boards.

Supports monitoring and protection function of the MBUS. Supports software resetting. Provides debug network port on the front panel of the board.
2. Principles
Through the inter-board communication channel provided by the JCOM, the status information of various boards is reported to the JSCC, and the control commands from the JSCC are sent to the boards as well. The JCOM provides Ethernet interfaces for the respective slots in the subrack. The JCOM also provides the subrack with two Ethernet interfaces on the front panel of the board for board/system debugging.
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100M 2 system commissioning serial port 100M Ethernet switching module
Communication bus Communication bus
Other boards
Active/standby JSCC
Control module
Slave MBUS module
MBUS
EMPU
Backplane interface
Figure 2.1 Principle block diagram of the JCOM
Ethernet switching unit
It provides the service interface and forwards the services. Synchronous timing generation board It provides working clock signal for the Ethernet switching unit. Control unit It fulfills functions such as power-on initialization configuration, management and control of the board. Slave MBUS unit The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. The MBUS monitors the board temperature and voltage.
Through the JCOM, the performance and alarm data of various boards are sent to the JSCC for processing, and the management information of the JSCC such as configuration, switching and control of the broad is sent to boards of the equipment as well. In other words, the JCOM fulfills the bidirectional information exchange of the JSCC and various boards of the equipment. The alarm and performance events generated from the JCOM will be reported to the JSCC, and then the JCOM will execute the control commands made by the JSCC as response to the received alarm information. Relationship with the EMPU Through the MBUS control module, functions of the EMPU such as enabling/disabling power protection, monitoring power voltage and board environmental temperature, and so on, can be implemented. Then, the collected monitoring information is sent to the EMPU for processing through the MBUS. With its power fed by the EMPU and JPBU through backplane, the function of the MBUS is independent of the boards, thus ensuring its operation not influenced by board power failure. Relationship with other boards
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The communication between the JSCC and other relevant boards on the level of control is realized through the JCOM.
6.A.49 Front Panel

Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing parameters Common alarms Normally off No alarms Self-test error Normally off Normally on
RUN ALM
JCOM
COM1
COM2
External interface description RJ45 Size of front panel 322.25 mm (H) x 30.48 mm (W)
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6.A.50 Interface
The JCOM provides the system with two 100 M debug network ports on its front panel, with the connector being RJ45.
Table 1.1 Pinouts of the Ethernet interface
Front view
Pin No. 1 2 3
Signal TX+ TX RX+ RX N.C
Description Positive data transmission end Negative data transmission end Positive data receiving end Negative data receiving end Not defined.
6 4, 5, 7 and 8
Parameters Size (mm) Weight (kg) Power consumption (W) Width of front panel (mm) Slots available Slot silkscreen print Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 0.9 kg About 35 W 30.48 mm 54 COM
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6.15 Power Interface Board JPIU

The power interface board is abbreviated to JPIU hereinafter. Note: 1. The JPIU does not support hot swapping. Disconnect the power supply connected to the JPIU before swapping it. 2. Disconnecting the power supply will cause service interruption.

1. Functions

Accesses and backs up two channels of DC power supply. Provides over-current and short-circuit protection for the subrack. Performs EMI filter to the DC power input port. Provides over-current protection for the DC power input port. Provides surge protection for the DC power input port. Provides the in-position signal of itself. Provides stable 48 V power supply for the fan through the backplane. Indicates the working status of itself. Provides HUB power interface.
2. Principles
The JPIU accesses, protects and filters the two channels of system power supply, and provides HUB power interface.
HUB power Magnetic circuit breaker Power access and filter module NEG(-) Feed through filter Protection module RTN(+) Feed through filter Board in-position test module Power indicator Backplane BGND HUB power interface Fan power voltageregulating module Fan power voltageregulating module Fan voltage 1 EMPU Fan voltage 2 Backplane -48V
JSCC
Backplane interface
Figure 2.1 Principle block diagram of the JPIU
Power access and filter module
It provides input interface for system power supply and performs EMI filter to the Huawei Technologies Proprietary 85
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DC power input. Protection module It provides protection for the circuits and components on the equipment against damages caused by over-current and surge voltage due to lightning or other factors. Fan power voltage-regulating module It performs voltage regulation to the fan input power and makes the voltage of the fan power to be a stable 48 V power. There are two such units on the JPIU, whose output voltages are sent to the fan box independently through the backplane. Power indication module It is to indicate whether there is external power voltage output to the JPIU. HUB power interface It provides the HUB with 48 V power. Board in-position test module The JSCC will judge whether the JPIU is in-position by checking the in-position signal from the JPIU.
The JPIU tells the JSCC its in-position status by sending in-position signal. Relationship with the fan box The JPIU provides the fan box with a stable 48 V power. Relationship with the EMPU The EMPU monitors the two channels of accessed power supply and the output fan voltage of the JIPU, and reads the manufacturing information of the JPIU.
6.A.53 Front Panel

Appearance and components of the front panel is shown in Table 1.1.
6Boards
Appearance
Description Status description of the red alarm indicator-ALM Status Meaning On The output voltage of the two fan power modules of the JPIU is abnormal. No alarms.
RUN ALM
JPIU .
Off
NEG(-)
RTN(+)
Status description of the green running indicator-RUN Status Meaning On

ON
The JPIU is connected with the power supply. The JPIU is disconnected with the power supply. Front panel Meaning External power access Power ground Magnetic circuit breaker The HUB power interface adopts the shielded DB3 power connector.
Off
PW R
OFF
Name NEG()
HUB
RTN(+) Power switch HUB power interface
This unit don't hot plug!
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6.A.54 Interface
Table 1.1 JPIU Interface description
Front view
Terminal No. NEG() RTN(+)
Description Power supply Working ground
NEG(-) RTN(+)
Table 1.2 Pinouts of HUB power interface
Front view
Terminal No. 1 2 3
Signal 48 V N.C BGND
Description Power Idle pin Working ground
Parameters Size (mm) Weight (kg) Power consumption (W) Width of front panel (mm) Slots available Slot silkscreen print Input DC power voltage range Input DC power current Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 3.5 kg 15 W 50.8 mm 56 and 57 for mutual hot backup PIU 38.4 V to 72V Maximum: 65 A
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6.16 Electromechanical Information Processing Board EMPU

The electromechanical information processing board is abbreviated to EMPU hereinafter.

1. Functions
Monitors the two independent voltages of the JPIU, and provides the system with under-voltage protection. Monitors the board temperature and voltage.
As the sink active board of the master MBUS module, it communicates with the slave MBUS modules on various boards and collects information such as voltage and temperature of the board. It also controls power-on/off of the board. Provides working power for itself and the system master MBUS. The power for the system master MBUS provided respectively by the EMPU and JPBU combine on the backplane and mutually back up each other. Provides 16 channels of external alarm inputs and 4 channels of system alarm outputs and concatenated alarms respectively, including critical alarms, major alarms, minor alarms and warning. Communicates with the JSCC through LAN Switch, reports information of various boards collected by the MBUS, and sends configurations. Controls indicators on the top of the cabinet and provides such signals as normal, major and critical alarms. Signals of alarm and minor alarm levels are reserved. Provides audio and visual alarm. The board indicator is connected with a waveguide post. Controls the rotational speed of the intelligent speed-regulating fans.

Supports hot swapping of the board. Supports lamp test function. Supports alarm cut function.
2. Principles
The EMPU chiefly processes the electromechanical information of the system, including the board power-on/off, system voltage and temperature, user Boolean value, system alarm and fan.
6Boards
alm_cut lamp test Alarm input Alarm output Alarm concatenation Cabinet indicator drive Communication & control module
System power detection module Fan monitoring module Communication bus
JPIU
Fan tray assembly
JSCC
MBUS Master MBUS module
Slave MBUS on other boards JPBU
Backplane interface
Figure 2.1 Principle block diagram of the EMPU
Communication and control module
It monitors and processes the electromechanical information of the system, processes the alarm and configuration information from the JSCC, and reports the information of various boards collected by the MBUS. It also provides the system with interfaces for functions such as alarm cutoff, lamp test, alarm input/output, alarm concatenation and cabinet indicator drive, and fulfills fan monitoring functions such as controlling and testing the fan rotational speed and the fan indicator. System power detection module It detects the two channels of system voltages and monitors the fan power. Fan monitoring module It controls and checks the fan rotational speed, and controls the fan indicator. Master MBUS module The MBUS unit is seated on the EMPU in the form of pinch board. The one on the EMPU is the master MBUS, whereas those on other boards are standby ones. Through communication between the active and slave MBUSs, functions such as board temperature and voltage monitoring and board power-on/off controlling can be realized.
The EMPU processes the alarm and configuration information from the JSCC, and reports the electromechanical information of various boards collected by the MBUS to the JSCC. Relationship with the JFAN Through the JFAN, the EMPU fulfills functions such as controlling and checking the fan rotational speed and controlling the fan indicator. Relationship with the JPIU The EMPU monitors the two channels of accessed power supply and the output fan voltage of the JIPU, and reads the manufacturing information of the JPIU. Huawei Technologies Proprietary 90
6Boards
Relationship with other boards
The EMPU can perform power on/off and power protection to other boards with slave MBUS, and monitor power voltage and ambient temperature of other boards same with slave MBUS through the master MBUS control module. The collected monitoring information is reported to the EMPU through the MBUS for processing.
6.A.57 Front Panel

Appearance
Description Status description of the red alarm indicator-ALM Status Meaning Flashing parameters Normally off No alarms Self-test error Normally off Normally on
RUN ALM
EMPU
MUTE
LAMPTEST
ALARM IN
PILOTLAMP
Status description of the green running indicator-RUN Status Meaning Flashing parameters Flash once every two seconds. The board is operating normally (in-service). On for 1 second and off for 1 second.
ALARM OUT
CASCADING
Name MUTE LAMP TEST ALARM IN ALARM OUT CASCADING PILOTLAMP Size of front panel
Interface description Description Toggle switch Button switch DB50 DB9 DB9 DB9
322.25 mm (H) x 30.48 mm (W)
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6.A.58 Interface
1. 16-channel Alarm Input Interface
Table 1.1 Pinouts of ALARM interface (DB50)
Front panel
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 26 27 28 29 13, 30 38 and 4350
Definition Alarm input 1 Alarm input 2 Alarm input 3 Alarm input 4 Alarm input 5 Alarm input 6 Alarm input 7 Alarm input 8 Alarm input 9 Alarm input 10 Alarm input 11 Alarm input 12 Alarm input 13 Alarm input 14 Alarm input 15 Alarm input 16 Not defined.
Pin No. 14 15 16 17 18 19 20 21 22 23 24 25 39 40 41 42
Definition Ground of alarm input 1 Ground of alarm input 2 Ground of alarm input 3 Ground of alarm input 4 Ground of alarm input 5 Ground of alarm input 6 Ground of alarm input 7 Ground of alarm input 8 Ground of alarm input 9 Ground of alarm input 10 Ground of alarm input 11 Ground of alarm input 12 Ground of alarm input 13 Ground of alarm input 14 Ground of alarm input 15 Ground of alarm input 16
6Boards
2. Alarm Output and Concatenation Front view

.
Pin No. 1 2
Description Critical alarm output Major alarm output Auxiliary alarm Boolean 1 Auxiliary alarm Boolean 2 Not defined Ground of critical alarm output Ground of major alarm output Ground of auxiliary alarm Boolean 1 Ground of auxiliary alarm Boolean 2
1 6
.
3
.
2 7 3 8 4 9 5
4 5 6 7
. .
8 9
3. Cabinet Indicator Driving Interface

Table 1.1 Description of the indicator drive interface (DB9)
Front view
Pin of the DB connector 1 2
Signal description Green indicator driving signal Red indicator driving signal Yellow indicator driving signal Orange indicator driving signal White indicator driving signal Power supply
Remarks
On: power of the subrack is normal. On: critical alarm occurs. On: major alarm occurs. On: minor alarm occurs. On: warning occurs.
1 6
.
2 7 3 8 4 9 5
3 4 5
. .
6, 7, 8 and 9
6Boards

Name Value setting of the rated power voltage Value setting of the power voltage threshold Configuration of 16 Boolean inputs
Range and reference value 48 V/60 V
Meaning Sets the value of the rated power voltage. Sets the value of the power voltage threshold.
Upper threshold/ lower threshold
Occupation status of the first Boolean input (0: not used; 1: used) Input alarm level value of the first Boolean input (0: produce alarm; or 1: produce alarm).
Configures the 16 Boolean inputs. This command is a must for setting all these 16 Boolean inputs. The default is not using Boolean input.
Parameters Size (mm) Weight (kg) Power consumption (W) Width of front panel (mm) Slots available Slot silkscreen print Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 0.9 kg 10 W 30.48 mm 52 EPU
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6.17 Key Power Backup Board JPBU

The key power backup board is abbreviated to JPBU hereinafter.

1. Functions
Monitors the four channels of voltages of the JPBU, including setting the alarm threshold, querying the voltage value and processing the undervoltage protection information. Provides the master MBUS power supply, and works with the EMPU to provide the MBUS with 1+1 power hot backup. Provides key power backup (+5 V, +3.3 V and 5.2 V) for slots of the interface board, JEOW and JCOM. It can protect no more than three interface boards at the same time. Controls all secondary power module of the board, including disconnection at undervoltage, alarming at overvoltage, protection against too high temperature, and remote shutting down. Supports hot swapping.
2. Principles
The OptiX OSN 9500 provides the JPBU board for power backup of the MBUS module and boards without equipment-level protection. The principle block diagram of the JPBU is shown in Figure 2.1.
-48 V Protection module Combining module -48 V
DC/DC convertor module
Key power
IU/COM/EOW slot and master MBUS
Slave MBUS module
MBUS
EMPU
Backplane interface
Figure 2.1 Principle block diagram of the JPBU
Combining module
It combines the two channels of accessed 48 V power supply. Protection module It fulfills functions such as power protection, board buffer startup and filtering. Power protection can suppress the energy brought by factors such as lightning, and protect against system power failure due to short-circuit of the board. Huawei Technologies Proprietary 95
6Boards
DC/DC convertor module
The DC/DC convertor converts the 48 V power into the key backup power, including 5 V, 5.2 V, 3.3 V and MBUS backup power. Slave MBUS module The MBUS unit is an MBUS-based maintenance and environment monitoring module. The slave MBUS module communicates with the master MBUS module through the MBUS. It functions monitoring of the board temperature and voltage and controlling of the board power-on/off.
It provides the interface board, JEOW, JCOM and the master MBUS on EMPU with key backup power.
6.A.62 Front Panel

6Boards
Appearance
Description Status description of the red alarm indicator-ALM Status Meaning On Overvoltage/Undervoltage occurs to the board output protection power.
RUN ALM
JPBU
Status description of the green running indicator-RUN Status Meaning On The output protection power of the board is normal.
6.A.63 Interface
None
6Boards
Parameters Size (mm) Weight (kg) Power consumption (W) Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 0.9 kg (1) When the system works normally, the power consumption of the JPBU is so small that can be ignored. (2) When the JPBU and EMPU work together to provide power supply to the system MBUS, the power consumption is 70 W. (3) When the function of power protection is enabled, the JPBU can provide power protection for three boards at the same time, with the maximum power consumption reaching 250 W. Width of front panel (mm) Slots available Slot silkscreen print Rated voltage of protection tube (V) Rated current of protection tube (A) 30.48 mm 55 PBU 250 V 15 A
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6.18 Booster Amplifier Board JBA2

The booster amplifier board is abbreviated to JBA2 hereinafter.

1. Functions
Transparently amplifies two channels of optical signals. The optical power amplification can be set to single or dual output mode. Its output optical power is 14/17 dBm.
Technical details: The five specifications of JBA2 can be configured as per actual situations. The specific configuration will be done before delivery. 1. Single erbium-doped fiber amplifier (EDFA) power amplifier. Output power: +14 dBm. 2. Single EDFA power amplifier. Output power: +17 dBm. 3. Dual EDFA power amplifier. Output power: +14 dBm. 4. Dual EDFA power amplifier. Output power: +17 dBm. 5. Dual EDFA power amplifier. Output power: +14 dBm or +17 dBm.
Detects the input/output optical power and controls the output optical power. Provides EDFA overload protection.
Provides ALS function. When there is no light input, the software will automatically shut down the laser; when the light input is recovered, the laser will be automatically started again. Detects the laser performance parameter and provides maintenance information.
2. Principles
The JBA2 enhances the launched power and transmission distance of the equipment. It is composed of the EDFA module and employs the BA module to amplify the launched optical power (which can be up to 14 dBm or 17 dBm,) and increase the transmission distance. Technical details: The EDFA can be used in the following three modes in the optical transmission system: (1) Booster/power amplifier, which enhances the launched power of the optical transmitter. (2) Line amplifier, which functions a REG in the transmission line. (3) Pre-amplifier, which increases the receiver sensitivity of the optical receiver.
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The principle block diagram of the JBA2 is shown in the following diagram.
Pump power detection module
IN
Drive module EDFA BA module Temperature control module
A/D D/A conversion module
JSCC
OUT
Input/output optical detection module
Backplane interface
Figure 2.1 Principle block diagram of the BA functional module on the JBA2
Note: The JBA2 in Figure 2.1 can amplify two channels of optical power. Same in principles, they are not presented respectively.
The EDFA BA unit and peripheral auxiliary unit
The BA module on the JBA2 is transparent for the optical path. The input light will get a fixed power output (14 dB or 17 dB) after amplification of the optical amplifier module, and then be output to the transmission line directly. The peripheral EDFA circuit drives the pump laser, amplifies the optical monitoring signal and controls the laser temperature. A/D and D/A conversion unit Various parameters about working status of the EDFA are processed by the control unit after A/D conversion, so as to provide maintenance information to the administration personnel. Communication and control module It drives the current, monitors the alarm and performance and communicates the JSCC.
Relationship with the optical interface board connected
The JBA2 receives the optical signal from the optical interface board and performs power amplification to it. Then, it sends the signal to the optical fiber, as shown in Figure 3.1.
6Boards
Transmitting end Optical interface board
Booster amplifier
Fiber
Receiving end Optical interface board
Figure 3.1 Function of the BA module in the system
Note: The input optical power of the JBA2 must not go beyond its specified upper threshold. Especially, you should not connect the optical output of a JBA2 to the optical input of another JBA2 directly.
The JBA2 reports the alarm information and status data of itself to the JSCC, and starts or shuts down the EDFA module according to the command of JSCC.
6Boards
6.A.66 Front Panel

Appearance
RUN ALM
JBA2
The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second.
NO_BD_PARA and IN_PWR_FAIL REG_WR_FAIL and TEMP_OVER
IN1 OUT1
Flash twice every other second. Flash once every other second.
IN2 OUT2
6Boards
6.A.67 Interface
LC optical interface connector

Name ALS enabling flag setting
Range and reference value Enabled/disabled
Meaning Enables or disables The ALS function.
Parameters Size (mm) Weight (kg) Power consumption (W) Laser class Type of optical interface connector Width of front panel (mm) Slots available Slot silkscreen print Output power (dB) Input wavelength (nm) Range of input optical power (dBm) Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 1.1 kg About 20 W Class 1M LC 30.48 mm All IU slots and slots DCU, STI, EOW and SIG. IU/DCU/STI/EOW/SIG 14 dB or 17 dB 1530 nm1560 nm 6 dBm to +5 dBm
6Boards
6.19 Pre-amplifier Board JBPA

The pre-amplifier board is abbreviated to JBPA hereinafter.

1. Functions
Provides one power amplification and one pre-amplification for the optical signal respectively. Also, it amplifies the optical signal at both the receiving and transmitting sides. The output power of the BA is 14 dBm or 17 dBm.

The gain of the pre-amplifier is 22 dB. Detects the input/output optical power.
Provides ALS function. When there is no light input, the software will automatically shut down the laser; when the light input is recovered, the laser will be automatically started again. Controls the laser temperature.
2. Principles
The JBPA integrates the functions of power amplification and pre-amplification to enhance the launched power of the equipment and pre-amplify the received optical power. The JBPA is mainly composed of the EDFA module, and employs the Power Amplifier (PA) module to pre-amplify the received optical power and increase the receiver sensitivity. The principle block diagram of the JBPA is shown as follows.
Pump power detection module
IN
EDFA preamplifier module
Drive module
A/D D/A conversion module
JSCC
Temperature control module
OUT
Input/output optical detection module
Backplane interface
Figure 2.1 Principle block diagram of the PA module on the JBPA
Note: Usually, the JBPA contains a PA module and a BA module. As the principle of the BA module is the same as that on the JBA2, it is not presented in the above diagram.
6Boards
The EDFA pre-amplifier module and peripheral auxiliary module
The PA module on the JBPA is transparent for the optical path. The input light will get a stable gain (22 dB) after amplification of the optical amplifier module, and then be output to the transmission line directly. The peripheral EDFA circuit drives the pump laser, amplifies the optical monitoring signal and controls the laser temperature. A/D and D/A conversion module Various parameters about working status of the EDFA are processed by the control unit after A/D conversion, so as to provide maintenance information for the administration personnel. Communication and control module It drives the current, monitors the alarm and performance and communicates the JSCC.
Relationship with the optical interface board connected
The PA module on the JBPA receives optical signals from the line and outputs them to the receiving board, as shown in Figure 3.1.
Transmitting end Optical interface board Fiber Pre-amplifier(PA) Receiving end Optical interface board
Figure 3.1 The PA module on the JBPA receives optical signals from the line
Note: The input optical power of the JBPA must not go beyond its specified upper threshold. Especially, you should not connect the optical output of a JBPA to the optical input of another JBPA directly.
The JBPA reports the alarm information and status parameter of itself to the JSCC, and starts or shuts down the EDFA module according to the command of JSCC.
6Boards
6.A.71 Front Panel

Appearance
RUN ALM
JBPA .
The alarm indicator is normally on, while the running indicator is normally off. Flash three times every other second.
IN1 OUT1
NO_BD_PARA, OUT_PWR_ABN and IN_PWR_FAIL REG_WR_FAIL and TEMP_OVER
IN2 OUT2
Flash twice every other second. Flash once every other second.
6Boards
6.A.72 Interface
LC optical interface connector.

Name
Range and reference value Enabled/disabled
Meaning
ALS enabling flag setting
Enables or disables The ALS function.
Parameters Size (mm) Weight (kg) Power consumption (W) Laser class Type of optical interface connector Width of front panel (mm) Slots available Slot silkscreen print Power gain of pre-amplifier (dB) Input wavelength of pre-amplifier (nm) Input optical power range of pre-amplifier (dBm) Output power of booster amplifier (dBm) Input wavelength of booster amplifier (nm) Input optical power range of booster amplifier (dBm) Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 1.1 kg About 20 W Class 1M LC 30.48 mm All IU slots and slots DCU, STI, EOW and SIG. IU/DCU/STI/EOW/SIG 22 dB 1550.12 nm 38 dBm to 10 dBm 14 dBm or 17 dBm 1530 nm to 1560 nm 6 dBm to +5 dBm
6Boards
6.20 Dispersion Compensation Board JDCU

The dispersion compensation board is abbreviated to JDCU hereinafter.

1. Functions
Provides two specifications for compensation for one or two channels of signals. Provides dispersion compensation modules (DCMs) with compensation distance at 60km or 80km for flexible configuration in actual networking applications.
Figure 2.1 shows the position of the JDCU in the system, functioning dispersion compensation.
Transmitting end Optical interface board Dispersion compensation Pre-amplifier PA JDCU Optical interface board Receiving end
Booster amplifier Fiber BA
Figure 2.1 Position of the JDCU in the system
6.A.76 Front Panel

6Boards
Appearance Name IN1 OUT1

JDCU .
Description Interface description Description LC optical interface connector LC optical interface connector LC optical interface connector LC optical interface connector
IN2 OUT2
IN1 OUT1
IN2 OUT2
Note: The JDCU has two specifications for compensation for one or two channels of signals. Its interfaces will be different on the front panel as per different situations.
6Boards
6.A.77 Interface
LC optical interface connector
Parameters Size (mm) Weight (kg) Power consumption (W) Laser class Type of optical interface connector Insertion loss Central wavelength under normal temperature Width of front panel (mm) Slots available Slot silkscreen print Description 322.25 mm (H) x 218.5 mm (D) x 2.5 mm (W) 0.5 kg 0W Class 1M LC 7 dB 1550.12 nm
30.48 mm All IU slots or slots 53, 51, 58, 49 and 50. IU/DCU/STI/EOW/SIG
Note: Slot for the JDCU is not fixed. If JSTI board and JEOW board is not seated in the system, the JDCU can be inserted in the slot STI/EOW/SIG. However, taking the future system upgrade into consideration, try not to occupy these slots.

06-Chapter 6 Boards

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06-Chapter 6 Boards

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OptiX OSN 9500 Hardware Description Manual

Huawei Technologies Proprietary i

OptiX OSN 9500 Hardware Description Manual

Huawei Technologies Proprietary ii

OptiX OSN 9500 Hardware Description Manual

Huawei Technologies Proprietary iii

OptiX OSN 9500 Hardware Description Manual

OptiX OSN 9500 Hardware Description Manual

Huawei Technologies Proprietary v

OptiX OSN 9500 Hardware Description Manual

Huawei Technologies Proprietary vi

OptiX OSN 9500 Hardware Description Manual

OptiX OSN 9500 Hardware Description Manual

106 107 109

Huawei Technologies Proprietary viii

OptiX OSN 9500 Hardware Description Manual

Huawei Technologies Proprietary 1

OptiX OSN 9500 Hardware Description Manual

Table 1.1 Board configuration resources

Unit name SDH unit

Board name JL64 JO16 JQ16 JD16 JL16

JLQ4 JH41 JLH1 JLHE

Ethernet processing unit Cross-Connect unit

GE06 GXCH EXCH GXCL

System control & communication unit Synchronous timing generation board

JSCC JSTG JSTI

JEOW JCOM JPIU EMPU

Huawei Technologies Proprietary 2

OptiX OSN 9500 Hardware Description Manual

Full name Board

JPBU JFAN JDCU

The board configuration principle is described as follows:

Board name GXCH/EXCH JSCC JSTG JCOM JPIU

Protectio n scheme 1+1 protection 1+1 protection 1+1 protection

GXCH and EXCH are optional for configuration.

Huawei Technologies Proprietary 3

OptiX OSN 9500 Hardware Description Manual

Board name EMPU

Front slot area

Back slot area S T G S T G P I U

Huawei Technologies Proprietary 4

OptiX OSN 9500 Hardware Description Manual

Available boards JL64/JO16/JQ16/JD16/JL16/JLQ4/JH41/ JLH1/ JLHE/GE06/JBPA/JBA2/JDCU/GXCL JL64/JQ16/JD16/JL16/JLQ4/JH41/JLH1/ JLHE/GE06/JBPA/JBA2/JDCU EXCH

6.A.2 Board Relationships

Huawei Technologies Proprietary 5

OptiX OSN 9500 Hardware Description Manual

Working power input

HUB power output

External alarm input/output

JPIU JPIU System working power

EMPU System environment monitoring

STM-64 & STM-16

JD64/JL64/ JO16/Q16/ JD16/JL16

STM-4 & STM-1

EXCH/ GXCH STM-1(e) JLHE GXCL

JH41/ JLH1/ JLQ4/

JH41/ JLH1/ JLQ4/

STM-4 & STM-1

System clock External clock input/output interface

System communication control JSCC JSCC System management system

Figure 1.1 Board relationships

6.A.3 Board Appearance

Huawei Technologies Proprietary 6