Exp No:

Date:

Generation and Detection of TDM

Aim:
To study the operation of Time Division Multiplexing and De-multiplexing with the help of TDM trainer kit.

Equipment Required:
TDM kit, CRO and connecting probes.

Theory:
Time Division Multiplexing (TDM) The process of sending more than one signal through a single communication channel is called multiplexing. In TDM, channel is used by more than user on time share basis. The time interval over which all message are sampled at least once is called a frame. The portion of the time slot not used by any of the sample pulse is called the Guard Time. In a practical system, some time slots may be allocated to other function like signalling, monitoring, synchronization etc. To maintain proper positions of sample pulses in the multiplexer, it is necessary to synchronize the sampling process. A clock is used for sampling. This serves as a reference for all samples. At the receiving station, there is a similar clock synchronization can be derived from the received waveforms by observing the pulse sequence over many pulses. This module basically consists of the following sections: a. The Onboard Function Generator, b. The Transmitter, c. The Receiver with the associated synchronization circuitry. Onboard Function generator provides four amplitude variable (0-5V PP) synchronized sine waves, each 250Hz, 500Hz, 1 KHz, and 2KHz. and an amplitude variable DC level (05V).The 6.4 MHz crystal oscillator generate a 6.4 MHz clock. The transmitter section consists of a four analog input channels that provides sampling and time division multiplexing of each channel. As the control input of the decoder varies from 00 to 11, it selects the channels C1, C2, C3, C4 and the information of that channel is transmitted. Thus TDM is achieved effectively. The receiver section consists of a 4 pole analog switch, that de multiplexes the 4 channels and the reconstruction unit. The success of the demultiplexer operation is fully dependent on how exactly, RXCH0, RXCH1, RXCH2, RXCH3, signals match with the TXCH0, TXCH1, TXCH2, and TXCH3 signals. Thus, to ensure the proper de multiplexing, the two dividers are reset by the RXCH0 signals which correspond with the TXCH0. The demultiplexed signals are then given to the corresponding reconstruction units.

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Exp No: Circuit diagram:

Date:

Procedure:
1. Connect power supply in proper polarity to the kit & Switch on. 2. Connect the 250Hz, 500Hz, 1KHz and 2KHz sine wave signal to the multiplexer input channel CH0, CH1, CH2, CH3, by means of the patch-chords provided. 3. Connect the multiplexer output TXD of the transmitter section to the demultiplexer input RXD of the receiver section. 4. Connect the sampling clock TX CLK and Channel Identification Clock TXCHO of the transmitter section to the corresponding Rx Clk and Rx CH0 of the receiver section respectively. 5. Set the amplitude of the input sine wave as desire.

Model Waveforms:

Result:

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Exp No:

Date:

Generation and Detection of PSK

Aim: To study the operation of Phase Shift Keying modulation and demodulation with
the help of kit.

Equipment Required: PSK kit, CRO and connecting probes Theory:

Phase Shift Keying is a digital modulation Technique. A cosinusoidal carrier of a fixed amplitude and frequency is taken. The digital data of 1s and 0s is converted to s(t) = Ac cos(2fc t) , s(t) = Ac cos(2fc t+) respectively. In the kit, phase shift keying is obtained using an OP-AMP circuitry and a switch. If incoming bit is 0, the output is same as the carrier; if it is zero, the output is 90 phase shifted version of the carrier signal. For demodulation a coherent detector is used. It has 3 parts, a multiplier, and integrator and decision device.

Circuit diagram: PSK Modulator

PSK Demodulator

MVR COLLEGE OF ENGG & TECH, PARITALA

Exp No: Procedure:

Date:

1. Apply carrier signal to the input of the modulator. 2. Apply the modulating data signal from the D1, D2, D3, D4 terminals to the data input pin of the PSK modulator and observe the modulated signal in the CRO. 3. Apply the PSK modulator output to the input of demodulator. Also apply the carrier signal to the demodulator. 4. Observe the demodulator output on the CRO. 5. Compare the two signal amplitudes.

Precautions:
1. Keep the connections tight. 2. Check if the ICs of the kit are intact.

Model Waveforms:

Result:

MVR COLLEGE OF ENGG & TECH, PARITALA

Exp No:

Date:

Generation and Detection of FSK

Aim: To study the generation and detection of FSK applying different line codes. Equipment Required: FSK trainer kit, Cathode ray oscilloscope, Probes, Patch chords. Theory:
FSK is a modulation technique in which carrier frequency is shifted between two distinct frequencies to represent logic 1 and logic 0. The low carrier frequency represents a digital 0 and high frequency represents is a 1. FSK signaling schemes are used in wide range of applications in low-speed digital data transmission system. FSK schemes are not as efficient as PSK in terms of power and bandwidth utilization. The binary FSK waveform is a continuous, phase constant envelope FM waveform.

Circuit Diagram: FSK Modulator

FSK Demodulator

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Exp No: Procedure:

Date:

1. Connect each line code data to the serial data input pin of FSK modulator. 2. Observe the FSK modulated waveform in CRO. 3. Connect the FSK modulated output to the demodulator input and observe each line code respectively in CRO.

Model Waveforms:

Result:

MVR COLLEGE OF ENGG & TECH, PARITALA

Exp No:

Date:

Generation and Detection of Delta Modulation

Aim: To study the operation of delta modulation and demodulation with the help of kit. Equipment Required: DM kit, CRO and connecting probes Theory:
Delta modulation is the DPCM technique of converting an analog message signal to a digital sequence. The difference signal between two successive samples is encoded into a single bit code. The block and kit diagrams show the circuitry details of the modulation technique. A present sample of the analog signal m(t) is compared with a previous sample and the difference output is level shifted, i.e. a positive level (corresponding to bit 1) is given if difference is positive and negative level (corresponding to bit 0) if it is negative. The comparison of samples is accomplished by converting the digital to analog form and then comparing with the present sample. This is done using an up counter and DAC as shown in block diagram. The delta modulated signal is given to up counter and then a DAC and the analog input is given to OPAMP and a LPF to obtain the demodulated output.

Circuit Diagram:

MVR COLLEGE OF ENGG & TECH, PARITALA

Exp No:

Date:

Procedure:
1. Connect the clock signal from Tx clock output to clock input of bistable circuit and the modulating input signal from signal generator to integrator input. 2. Connect the integrator output to comparator and comparator output to bistable circuit. 3. Observe the modulated output and DM output to the demodulator circuit. Observe the demodulator output on the CRO.

Precautions:
1. Keep the connections tight. 2. Check if the ICs of the kit are intact.

Model Waveforms:

MVR COLLEGE OF ENGG & TECH, PARITALA

Exp No:

Date:

Result:

MVR COLLEGE OF ENGG & TECH, PARITALA

Exp No:

Date:

Pulse Code Modulation And Demodulation

Aim: Study of PCM Generation and Demodulation of analog signal Equipment Required:
1. PCM Generation & Demodulation using CODEC Chip 2. Patch chords 3. Storage Oscilloscope/ Dual Trace Oscilloscope

Theory:
Pulse modulation: A form of modulation in which a pulse train is used as the carrier. Information is conveyed by modulating some parameter of the pulses with a set of discrete instantaneous samples of the messages signal. The minimum sampling frequency is the minimum frequency at which the modulating waveform can be sampled to provide the set of discrete values without a significant loss of information. PCM: Pulse code modulation is a process of converting a analog signal into digital. The voice or any data input is first sampled using a sampler and then quantized. Quantization is the process of converting a given signal amplitude to an equivalent binary number with fixed number of bits. This quantization can be either midtread or mid-raise and it can be uniform or non-uniform based on the requirements. After quantization the signal is digital and the bits are passed through a parallel to serial converter. At the demodulator the received bits are first converted into parallel frames and each frame is de-quantized to an equivalent analog value. This analog value is thus equivalent to a sampler output. This is the demodulated signal. In the kit this is implemented differently. The analog signal is passed through a ADC and then the digital codeword is passed through a parallel to serial converter block. This is modulated PCM. This is taken by the Serial to Parallel converter and then through a DAC to get the demodulated signal. The input signal can be either DC or AC according to the kit. The waveforms can be observed on a CRO for DC without problem. AC also can be observed but with poor resolution.

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Exp No: Circuit Diagram: PCM Modulator

Date:

PCM Demodulator Procedure:

1. Make the following connections as shown in figure. 2. From Clock Source, connect 1.5MHz Clock output to System Clock of Sample rate generator. 3. Connect the channel CLK to LRCIN and Bit CLK to BCKIN. MVR COLLEGE OF ENGG & TECH, PARITALA

Exp No:

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4. Observe the signal available on channel CLK and Bit CLK on oscilloscope with respect to ground terminal. 5. Connect the output of AC source to Vin in order to provide analog signal for modulation. 6. Observe the signal of Dout on oscilloscope with respect to ground, which gives the modulated signal. 7. Connect the signal Dout of ADC to Din of DAC for demodulation. 8. Observe the demodulated signal waveform to oscilloscope by connecting Vout terminal of DAC to oscilloscope with respect to ground of board. 9. Change the system clock of sample rate generator to 3MHz, 6MHz and 12MHz; observe the effect of respective changes on PCM coding.

Model Waveforms:

.Result:

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