ELEC202 Electronic Circuits II

Tutorial 13

ELEC202 Electronic Circuits II Tutorial 13

Outline ______________________________________________________________________________
A. B. C. D. E. Offset voltage of differential pair Gain analysis: an intuitive approach Comparison of differential pair with resistive load and active load Examples Brief summary, Q&A

A. Offset voltage of differential pair

Vid

Non-ideal amplifier

Vod

VOS Vid
(a) (b)

Ideal amplifier

Vod

Fig.1 Equivalent input offset voltage for a differential amplifier. (a) NMOS differential pair (b) Equivalent circuit of the non-ideal amplifier by an ideal amplifier and offset voltage Cause of offset voltage Systematic offset: due to improper design can be eliminated by proper design cannot be eliminated, can only be reduced

Random offset: because of the mismatch between components

Components Mismatch in load resistors R1 and R2

Offset voltage

VOS1 =
VOS 2 =

(V gs Vtn ) R 2 R

Mismatch in transistor size (W/L)1 and (W/L)2 Mismatch in transistor threshold voltage Vtn1 and Vtn2 Total

(V gs Vtn ) (W / L) 2 (W / L)

VOS 3 = Vtn
Worst-case total offset voltage VOST = VOS1+VOS2+VOS3

ELEC202 Electronic Circuits II

Tutorial 13

Ex.1. Calculate the worst-case total offset voltage for an NMOS differential amplifier with the following mismatched parameters: Vtn1=1.02V, Vtn2=0.98V, R1=101K , R2=99K (W/L)1=20.5, (W/L)2=19.5, Given Vgs1=Vgs2=Vcm=1.5V.

Solution: With the above parameters, we could obtain

R = R1 R 2 = 2 K R= (W / L) = (W / L) 1 (W / L) 2 = 1 Vtn = Vtn1 Vtn 2 = 0.04V Vtn = Vtn1 + Vtn 2 = 1V 2 R1 + R 2 (W / L) 1 + (W / L) 2 = 100K = 20 (W / L) = 2 2 So, the offset voltage due to mismatched load resistors is (V gs Vtn ) R 1.5 1 2 K VOS1 = = = 5mV 2 R 2 100K The offset voltage due to mismatched transistor size is

VOS 2 =

(V gs Vtn ) (W / L) 1.5 1 1 = = 12.5mV 2 (W / L) 2 20

The offset voltage due to mismatched transistor threshold voltage is

VOS 3 = Vtn = 1.02 0.98 = 40mV

Therefore, the worst-case total offset voltage is the addition of the three terms: VOST = VOS1+VOS2+VOS3 = 5mV + 12.5mV + 40mV = 57.5mV * It should be mentioned that MOS differential amplifies, typically, have an offset voltage of several tens of milli volts.

B. Gain analysis: an intuitive approach

Concepts in the intuitive analysis 1. 2. Small-signal gate-source voltage Vi will cause small-signal drain current id=gm*Vi A voltage will be induced when a current flows into a node. Vo=i*R, where R is the equivalent resistance from the node to the ground Technique: Step 1. Identify the transistor(s) that convert the input voltage to current (these transistors are called transconductance transistors). Step 2. Trace the currents to where they flow into an equivalent resistance to ground. Step 3. Multiply this resistance by the current to get the voltage at this node to ground. Step 4. Repeat this process until the output is reached.

ELEC202 Electronic Circuits II

Tutorial 13

i2=0 , Because VB does not change i Vi Vo Vi i Vo i=gmVi Vo= iRout Rout=rds//R Vi i2 i1 i1 Vo Vi i1=gmVi Vo= i1Rout Rout=rds1//rds2 Vo i1 i1=i2 i2

Fig.2. Analysis of single-stage amplifier and current mirror by intuitive approach

Now, we could extend the intuitive analysis for differential amplifier.

Step 1. Identify the transistors that convert the voltage into current

i1 =

vid g m1 , 2

i2 =

vid g m1 2

Step 2. Trace the currents

i3 i1 Rout

iout

i4 i2

i3 = i1
So,

(apparently) ,

i4 = i3

(current mirror)

i4 = i3 = i1 =

vid g m1 2

, and we could notice

iout = i4 i2 =

vid v g m1 ( id g m1 ) = vid g m1 2 2

Step 3. Obtain the voltage by multiplying the current and resistance

vo = iout Rout = vid g m1 ( rds 2 // rds 4 )

And the gain is A =

vo = g m1 (rds 2 // rds 4 ) vid

Fig.3. Analysis of differential amplifier by intuitive approach

* Please note: Half-circuit concept is not applicable in the analysis of differential amplifier with active load, because the circuit is no longer symmetrical. Instead, the intuitive analysis is developed to gain insight into the operation of the circuit. Now, lets analyze the gain of a two-stage amplifier using the intuitive method.

ELEC202 Electronic Circuits II

Tutorial 13

i7=0 -vid/2 i1 i3 i4
Fig.4. Analysis of two-stage amplifier by intuitive approach

vo

vid/2 i2 vo1 i8

The gain of the two-stage amplifier is the product of the first-stage gain and the second-stage gain. For the gain of the first stage, repeat the analysis for the amplifier in Fig.3, we have

A1 =

vo1 = g m1 (rds 2 // rds 4 ) vid

For the gain of the second stage, we first identify M8 as the transistor that convert the small-signal vo1 to i8,

i8 = vo1 g m 8
Then, So,

vo = i8 Rout = vo1 g m8 (rds 7 // rds 8 )

A2 = vo = g m8 (rds 7 // rds8 ) vo1 vo1 vo = g m1 (rds 2 // rds 4 ) g m8 (rds 7 // rds8 ) vid vo1

Therefore, the overall gain A is

Aall = A1 A2 =

C. Comparison of differential pair with resistive load and active load

One of the motivations of using active load We generally want high-gain amplifiers. The gain of a differential amplifier with active load usually will be much larger than that of a resistive-loaded differential amplifier.

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Table I. Summary of differential amplifier with resistive load and active load

Parameters Differential-mode gain Adm Common-mode gain Acm CMRR

Differential amplifier with resistive load

Differential amplifier with active load

Adm = g m1 ( R // rds1 )
Acm = R 2rds 5

Adm = g m1 (rds 2 // rds 4 )

Acm = 1 2 g m3 rds 5

CMRR =

Adm g m1 ( R // rds1 ) = R Acm 2rd 5

CMRR =

Adm = 2 g m3 rds 5 g m1 (rds 2 // rds 4 ) Acm

D. Exercise Examples

Ex.2. For the active-loaded MOS differential amplifier shown in Fig.3., all transistors have u0Cox(W/L)=200A/V2, and =1/50 V-1. and (a) Ibias=10A (current of M5). (b) Ibias=100A, calculate the gm of M1 and M2, the output resistance of M2 and M4, the total output resistance, and the voltage gain. Solution: (a) Ibias=10A

I d1 = I d 2 = I d 3 = I d 4 =

I bias = 5A 2

g m1 = g m 2 = 2 I d n C ox

W = 2 5A 200A / V 2 = 44.72A / V L

rds 2 = rds 4 =

1 50V = = 10 M I d 5A

Rout = rds 2 // rds 4 = 10 M // 10M = 5M Adm = vo = g m1 Rout = 44.72uA / V 5M = 223.6V / V 47 dB vid I bias = 50 A 2

(b) Ibias=100A

I d1 = I d 2 = I d 3 = I d 4 =

gm1 = gm2 = 2I d nCox

W = 2 50A 200A / V 2 = 141.42A /V L

ELEC202 Electronic Circuits II

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rds 2 = rds 4 =

1 50V = = 1M I d 50A

Rout = rds 2 // rds 4 = 1M // 1M = 0.5M Adm = vo = g m1 Rout = 141.42uA / V 0.5M = 70.7V / V 37 dB vid

* From this example, we could see that increasing the current will decrease the gain! Actually, for a certain transistor with fixed size, the intrinsic gain of a transistor is defined as

Aint rinsic = g m ro = 2 I d n C ox

W 1 W 1 1 = 2 n Cox L I d L Id

Thus, the intrinsic gain is inversely proportionally to the square root of the drain current. Ex.3. In an active-loaded differential amplifier as shown in Fig.3, all transistors are characterized by u0Cox(W/L)=800A/V2, and =1/20 V-1. Find the bias current Ibias (the current of M5) for which the gain vo/vid=80V/V. Solution:

g m1 = 2 I d n Cox
1 I d

W L
Rout = rds 2 // rds 4 = 1 1 2 I d

rds 2 = rds 4 =

So,

Adm =

vo W = g m1 Rout = 2 I d n Cox vid L

2

1 1 2 I d

Therefore, from the above equation, we have

1 1 1 W 1 1 2 Id = 2 C = 20 V 2 800 A / V = 25A n ox 2 A L 2 80 dm I bias = 2 I d = 50 A

ELEC202 Electronic Circuits II

Tutorial 13

Brief Summary 1. Offset voltage. Due to the mismatch between the devices, the output voltage will not be zero even if the input voltage is zero. A non-ideal amplifier with the offset voltage can be modeled as an ideal amplifier without offset voltage in combination with a voltage source in series with the inputs which represents the offset voltage. 2. Intuitive method for the analysis of the amplifier gain. 3. Comparison of differential pair with resistive load and active load. Amplifiers with active load generally have much larger gain than that with resistive load. The CMRR is also better. 4. Intrinsic gain. The intrinsic gain decreases with increasing current, for a certain transistor with fixed size.