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Microcontroller

Date:-

EXPERIMENT 1

AIM:

TO

STUDY

ARCHITECTURE

OF

8051MICROCONTROLLER DESCRIPTION
8051 is a low power, high performance CMOS 8-bit microcontroller with 8 Kbytes of Flash programmable and erasable read only memory (PEROM).The device is manufactured using Atmels high density nonvolatile memory technology. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel 8051 is powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control application. ARCHITECTURE OF MICROCONTROLLER 8051

FEATURES OF 8051, 8052 AND 8031

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PIN CONNECTION OF 8051 IC

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PIN DESCRIPTION OF IC 8051 I/O ports 1. PORT 0


Port 0 is an 8-bit open drain bi-directional I/O port. Port 0 can also be configured to be multiplexed lower order address/data bus during accesses to external program and data memory. If we use port 0 then needed external pull-up resistors.

2. PORT 1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups.

Port pin
P1.0 P1.1

Alternate Functions
T2 (external count input to timer / counter 2), clock-out T2EX (Timer / counter 2 capture / reload trigger and directional control)

3. PORT 2
Port 2 is 8-bit bi-directional I/O port with internal pull-ups. Port 2 emits the higher order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. Port 2 receives the higher order address bit and some control signal during Flash programming and verification.

4. PORT 3
Port 3 is 8-bit bi-directional I/O port with internal pull-ups.

Port pin
P3.0 P3.1 P3.2 G.P., PALANPUR Page 3

Alternate Function
RXD ( serial input port ) TXD ( serial output port ) INT0 (external interrupt 0 )

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P3.3 P3.4 P3.5 P3.6 P3.7

INT1 (external interrupt 1 ) T0 ( timer 0 external input ) T1 ( timer 1 external input ) WR ( external data memory write strobe ) RD ( external data memory read strobe )

SPECIAL FUNCTION REGISTERS OF MICROCONTROLLER (8051)


The 8051 is a flexible microcontroller with a relatively large number of modes of operations. Your program may inspect and/or change the operating mode of the 8051 by manipulating the values of the 8051's Special Function Registers (SFRs). SFRs are accessed as if they were normal Internal RAM. The only difference is that Internal RAM is from address 00h through 7Fh whereas SFR registers exist in the address range of 80h through FFh. Each SFR has an address (80h through FFh) and a name.

SFR DESCRIPTIONS
This section will endeavor to quickly overview each of the standard SFRs found in the above SFR chart map. It is not the intention of this section to fully explain the functionality of each SFR--this information will be covered in separate chapters of the tutorial. This section is to just give you a general idea of what each SFR does. P0 (Port 0, Address 80h, Bit-Addressable): This is input/output port 0. Each bit of this SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 0 is pin P0.0, bit 7 is pin P0.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level.

SP (Stack Pointer, Address 81h): G.P., PALANPUR Page 4

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This is the stack pointer of the microcontroller. This SFR indicates where the next value to be taken from the stack will be read from in Internal RAM. If you push a value onto the stack, the value will be written to the address of SP + 1. That is to say, if SP holds the value 07h, a PUSH instruction will push the value onto the stack at address 08h. This SFR is modified by all instructions which modify the stack, such as PUSH, POP, LCALL, RET, RETI, and whenever interrupts are provoked by the microcontroller. DPL/DPH (Data Pointer Low/High, Addresses 82h/83h): The SFRs DPL and DPH work together to represent a 16-bit value called the Data Pointer. The data pointer is used in operations regarding external RAM and some instructions involving code memory. Since it is an unsigned two-byte integer value, it can represent values from 0000h to FFFFh (0 through 65,535 decimal). PCON (Power Control, Addresses 87h): The Power Control SFR is used to control the 8051's power control modes. Certain operation modes of the 8051 allow the 8051 to go into a type of "sleep" mode which requires much less power. These modes of operation are controlled through PCON. Additionally, one of the bits in PCON is used to double the effective baud rate of the 8051's serial port. TCON (Timer Control, Addresses 88h, Bit-Addressable): The Timer Control SFR is used to configure and modify the way in which the 8051's two timers operate. This SFR controls whether each of the two timers is running or stopped and contains a flag to indicate that each timer has overflowed. Additionally, some non-timer related bits are located in the TCON SFR. These bits are used to configure the way in which the external interrupts are activated and also contain the external interrupt flags which are set when an external interrupt has occurred. TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used to configure the mode of operation of each of the two timers. Using this SFR your program may configure each timer to be a 16-bit timer, an 8-bit autoreload

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timer, a 13-bit timer, or two separate timers. Additionally, you may configure the timers to only count when an external pin is activated or to count "events" that are indicated on an external pin. TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two SFRs, taken together, represent timer 0. Their exact behavior depends on how the timer is configured in the TMOD SFR; however, these timers always count up. What is configurable is how and when they increment in value. TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two SFRs, taken together, represent timer 1. Their exact behavior depends on how the timer is configured in the TMOD SFR; however, these timers always count up. What is configurable is how and when they increment in value. P1 (Port 1, Address 90h, Bit-Addressable): This is input/output port 1. Each bit of this SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 1 is pin P1.0, bit 7 is pin P1.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level. SCON (Serial Control, Addresses 98h, Bit-Addressable): The Serial Control SFR is used to configure the behavior of the 8051's on-board serial port. This SFR controls the baud rate of the serial port, whether the serial port is activated to receive data, and also contains flags that are set when a byte is successfully sent or received. SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is used to send and receive data via the on-board serial port. Any value written to SBUF will be sent out the serial port's TXD pin. Likewise, any value which the 8051 receives via the serial port's RXD pin will be delivered to the user program via SBUF. In other words, SBUF serves as the output port when written to and as an input port when read from.

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P2 (Port 2, Address A0h, Bit-Addressable): This is input/output port 2. Each bit of this SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 2 is pin P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level. IE (Interrupt Enable, Addresses A8h): The Interrupt Enable SFR is used to enable and disable specific interrupts. The low 7 bits of the SFR are used to enable/disable the specific interrupts, where as the highest bit is used to enable or disable ALL interrupts. Thus, if the high bit of IE is 0 all interrupts are disabled regardless of whether an individual interrupt is enabled by setting a lower bit. P3 (Port 3, Address B0h, Bit-Addressable): This is input/output port 3. Each bit of this SFR corresponds to one of the pins on the microcontroller. For example, bit 0 of port 3 is pin P3.0, bit 7 is pin P3.7. Writing a value of 1 to a bit of this SFR will send a high level on the corresponding I/O pin whereas a value of 0 will bring it to a low level. IP (Interrupt Priority, Addresses B8h, Bit-Addressable): The Interrupt Priority SFR is used to specify the relative priority of each interrupt. On the 8051, an interrupt may either be of low (0) priority or high (1) priority. An interrupt may only interrupt PSW (Program Status Word, Addresses D0h, Bit-Addressable): The Program Status Word is used to store a number of important bits that are set and cleared by 8051 instructions. The PSW SFR contains the carry flag, the auxiliary carry flag, the overflow flag, and the parity flag. Additionally, the PSW register contains the register bank select flags which are used to select which of the "R" register banks are currently selected. ACC (Accumulator, Addresses E0h, Bit-Addressable): The Accumulator is one of the most-used SFRs on the 8051 since it is involved in so many instructions. The Accumulator resides as an SFR at E0h, which means the instruction MOV A, G.P., PALANPUR Page 7

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#20h is really the same as MOV E0h, #20h. However, it is a good idea to use the first method since it only requires two bytes whereas the second option requires three bytes. B (B Register, Addresses F0h, Bit-Addressable): The "B" register is used in two instructions: the multiply and divide operations. The B register is also commonly used by programmers as an auxiliary register to temporarily store values.

CONCLUSION:

EXERCISE QUESTION:
1. DRAW BLOCK DIAGRAM OF 8051 MICROCONTROLLER AND LIST ITS FEATURES. 2. DRAW CIRCUIT DIAGRAM OF PORT 0, PORT 1, PORT 2 AND PORT 3. 3. WHICH PORT HAS NO ALTERNATE FUNCTIONS?

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EXPERIMENT-2
AIM: TO STUDY 8051 OSCILLATOR CIRCUIT AND TIMING. THEORY: THE 8051 OSCILLATOR AND CLOCK:
The heart of 8051 is a circuit that generate clock pluses by which all internal operation are synchronized. Pins XTAL 1 and XTAL 2 are provide for connecting resonant network to from an oscillator. Typically quartz and capacitors are employed. The crystal frequency is the basic clock freq. of micro controller. The manufacturers make available 8051 design that can run at specified maximum and minimum freq. typically 1 MHz to 16 MHz minimum freq. imply that some internal memories are dynamic and must always operate above a minimum freq. or data will be lost. Serial data communication needs often dictate the frequency of the oscillator because of the requirement that internal counters must dived the basic clock rate to yield standard communication bit per second (baud) rates. If the basic click freq. is not divisible without a reminder, then the resulting communication freq. is not standard.

CRYSTAL OSCILLATOR AND CERAMIC RESONATOR:


Ceramic resonator may be used as a low cost alternative to crystal resonator. However, decrease in frequency stability and accuracy make the ceramic resonator a poor choice if high speed data communication with other systems, or critical timing, is to be done.

DESCRIPTION OF THE CIRCUIT:


The oscillator formed by the crystal, capacitors and an on chip inverter generates a pulse train at the freq. of the crystal. The clock freq. establishes the smallest interval of time within the microcontroller called the pulse P, time. G.P., PALANPUR Page 9

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CALCULATION OF TIME:
To calculate the time any particular instruction will take to be executed, find the numbers of cycles. The time to execute that instruction is then found by multiplying cycles by 12 and dividing the product by the crystal freq. Tints = c * 12 d Crystal freq. For example, if the crystal freq. is 16 MHz then the time to execute an ADD A, R1 one cycle instruction is 0.75 microseconds. A 12 MHz crystal yields the convenient time of 1 microsecond. An 11.0592 MHz crystal, although seemingly an odd value, yields a cycle freq. of 921.6 kilo Hz.

EXERCISE QUESTION:
Following shows crystal frequency of for three different 8051 based systems. Find the period of machine cycle of each case. A) 11.0592MHZ B) 16MHz C) 20MHz

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EXPERIMENT-3
AIM: TO STUDY AND PERFORM PROGRAMS USING DATA TRANSFER INSTRUCTIONS.
Objectives: i) ii) To Study Different Addressing Modes for Data Transfer Instructions. To Execute Transfer Data Byte Using Different Addressing Mode with Internal RAM, External RAM and Internal ROM. Apparatus Required: 1. Microcontroller Kit INTRODUCTION: An "addressing mode" refers to how you are addressing a given memory location. The 8051 instructions use eight addressing modes. These are: 1. Immediate 2. Register 3. Direct 3.1) External Direct 4. Indirect 4.1) External Indirect 5. Relative 6. Absolute 7. Long 8. Indexed

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1) Immediate Addressing
Immediate addressing is so-named because the value to be stored in memory immediately follows the operation code in memory. That is to say, the instruction itself dictates what value will be stored in memory. For example, the instruction: MOV A,#20h This instruction uses Immediate Addressing because the Accumulator will be loaded with the value that immediately follows; in this case 20 (hexadecimal). Immediate addressing is very fast since the value to be loaded is included in the instruction. However, since the value to be loaded is fixed at compile-time it is not very flexible.

2) Register Addressing
In this mode the data, which the instruction operates on, is in one of eight registers labelled R0 to R7 (Rn, ingeneral). These registers are to be found in one of four register banks, only one of which can be active at anyone time. The active bank may be selected by using bit 3 and bit 4 of the PSW (rs0 & rs1). On power-up orreset, the default register bank is bank 0. The format of an instruction using register addressing: Op code following instruction is used: ORL A, R3 and the op-code is 01001011B. The upper five bits, 01001, indicate the instruction, and the lower three bits, 011,the register. ==> n For example, to logically OR the contents of accumulator A with that of register R3, the

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3) Direct Addressing
Direct addressing is so-named because the value to be stored in memory is obtained by directly retrieving it from another memory location. For example: MOV A,30h This instruction will read the data out of Internal RAM address 30 (hexadecimal) and store it in the Accumulator. Instructions using direct addressing consists of two bytes: op-code and address. Op code Address

Direct addressing is generally fast since, although the value to be loaded isnt included in the instruction, it is quickly accessible since it is stored in the 8051s Internal RAM. It is also much more flexible than Immediate Addressing since the value to be loaded is whatever is found at the given address--which may be variable. Also, it is important to note that when using direct addressing any instruction which refers to an address between 00h and 7Fh is referring to Internal Memory. Any instruction which refers to an address between 80h and FFh is referring to the SFR control registers that control the 8051 microcontroller itself. The obvious question that may arise is, "If direct addressing an address from 80h through FFh refers to SFRs, how can I access the upper 128 bytes of Internal RAM that are available on the 8052?" The answer is: You cant access them using direct addressing. As stated, if you directly refer to an address of 80h through FFh you will be referring to an SFR. However, you may access the 8052s upper 128 bytes of RAM by using the next addressing mode, "indirect addressing."

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Disadvantages: Looping is not possible in direct addressing mode

3.1) External Direct


External Memory is accessed using a suite of instructions which use what I call "External Direct" addressing. I call it this because it appears to be direct addressing, but it is used to access external memory rather than internal memory. There are only two commands that use External Direct addressing mode: MOVX A,@DPTR MOVX @DPTR,A As you can see, both commands utilize DPTR. In these instructions, DPTR must first be loaded with the address of external memory that you wish to read or write. Once DPTR holds the correct external memory address, the first command will move the contents of that external memory address into the Accumulator. The second command will do the opposite: it will allow you to write the value of the Accumulator to the external memory address pointed to by DPTR.

4) Indirect Addressing
Indirect addressing is a very powerful addressing mode which in many cases provides an exceptional level of flexibility. Indirect addressing is also the only way to access the extra 128 bytes of Internal RAM found on an 8052. Indirect addressing appears as follows: MOV A,@R0 SUBB A, @R0 This instruction performs the operation: (A) (A) (C) ((R0)).

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This instruction causes the 8051 to analyse the value of the R0 register. The 8051 will then load the accumulator with the value from Internal RAM which is found at the address indicated by R0. For example, lets say R0 holds the value 40h and Internal RAM address 40h holds the value 67h. When the above instruction is executed the 8051 will check the value of R0. Since R0 holds 40h the 8051 will get the value out of Internal RAM address 40h (which holds 67h) and store it in the Accumulator. Thus, the Accumulator ends up holding 67h. Indirect addressing always refers to Internal RAM; it never refers to an SFR. Thus, in a prior example we mentioned that SFR 99h can be used to write a value to the serial port. Thus one may think that the following would be a valid solution to write the value 1 to the serial port: MOV R0,#99h MOV @R0,#01h Load the address of the serial port Send 01 to the serial port -- WRONG!!

This is not valid. Since indirect addressing always refers to Internal RAM these two instructions would write the value 01h to Internal RAM address 99h on an 8052. On an 8051 these two instructions would produce an undefined result since the 8051 only has 128 bytes of Internal RAM. Advantage: It makes accessing a data dynamics rather than static or in thecase of direct addressing mode.

Limitation :
R0 and R1 ( 8-bit wide ) are the only registers that can be used for pointer in register indirect addressing mode.

4.1 External Indirect


External memory can also be accessed using a form of indirect addressing which I call External Indirect addressing. This form of addressing is usually only used in relatively small projects that have a very small amount of external RAM. An example of this addressing mode is:

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MOVX @R0,A Once again, the value of R0 is first read and the value of the Accumulator is written to that address in External RAM. Since the value of @R0 can only be 00h through FFh the project would effectively be limited to 256 bytes of External RAM. There are relatively simple hardware/software tricks that can be implemented to access more than 256 bytes of memory using External Indirect addressing; however, it is usually easier to use External Direct addressing if your project has more than 256 bytes of External RAM.

Note : The use of leading 0 for all numbers that begin with an alphabetic character.
EXERCISE QUESTIONS: PROGRAM 1: Copy the byte in TCON (88h) to register R0 to R3 using Direct & Indirect Addressing Mode. PROGRAM 2: Place the number 3Fh in Register R5, R6 and R7 using Immediate & Register addressing Mode. PROGRAM 3: Copy the byte at internal RAM address 27h to external RAM address 27h. PROGRAM 4: Copy the external code byte at address 007Dh to the SP.

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EXPERIMENT-4
AIM: To Perform Program for Byte level Logical Instructions using microcontroller 8085. OBJECTIVE: To perform programcontaining Byte level Logical Instructions. APPRATUS USED: MICROCONTROLLER KIT.

Operatio XRL n: Function Bitwise Exclusive : OR XRL Syntax: operand1,operand2

Instructions XRL iramaddr,A

OpCode Bytes Cycles Flags 0x62 2 3 2 2 1 1 1 1 2 1 1 1 1 1 None None None None None None None

XRL iramaddr,#data 0x63 XRL A,#data XRL A,iramaddr XRL A,@R0 XRL A,@R1 XRL A,Ry (y= 0-7) 0x64 0x65 0x66 0x67 0x68

Description: XRL does a bitwise "EXCLUSIVE OR" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "EXCLUSIVE OR" compares the bits of each operand and sets the corresponding bit in the

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resulting byte if the bit was set in either (but not both) of the original operands, otherwise the bit is cleared. Operation: ANL Function: Bitwise AND Syntax: ANL operand1, operand2

Instructions ANL iramaddr,A

OpCode Bytes Cycles Flags 0x52 2 3 2 2 1 1 1 1 2 1 1 1 1 1 None None None None None None None

ANL iramaddr,#data 0x53 ANL A,#data ANL A,iramaddr ANL A,@R0 ANL A,@R1 ANLA,Ry (y=0-7) 0x54 0x55 0x56 0x57 0x58

Description: ANL does a bitwise "AND" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "AND" compares the bits of each operand and sets the corresponding bit in the resulting byte only if the bit was set in both of the original operands, otherwise the resulting bit is cleared. Operation: ORL Function: Bitwise OR Syntax: ORL operand1,operand2

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Instructions ORL iramaddr,A

OpCode Bytes Cycles Flags 0x42 2 3 2 2 1 1 1 1 2 1 1 1 1 1 None None None None None None None

ORL iramaddr,#data 0x43 ORL A,#data ORL A,iramaddr ORL A,@R0 ORL A,@R1 ORL A,Ry 0x44 0x45 0x46 0x47 0x48

(y=0-7) Description: ORL does a bitwise "OR" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "OR" compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either of the original operands, otherwise the resulting bit is cleared.

Operation: CLR Function: Clear accumulator Syntax: CLR accumulator

Instructions OpCode Bytes Cycles Flags CLR A 0xE4 1 1 None

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Description: CLR clears (sets to 0) all the bit(s) of the indicated register. If the register is a bit (including the carry bit), only the specified bit is affected. Clearing the Accumulator sets the Accumulators value to 0. Operation: CPL Function: Complement accumulator Syntax: CPL operand Instructions OpCode Bytes Cycles Flags CPL A 0xF4 1 1 None

Description: CPL complements operand, leaving the result in operand. If operand is a single bit then the state of the bit will be reversed. If operand is the Accumulator then all the bits in the Accumulator will be reversed. This can be thought of as "Accumulator Logical Exclusive OR 255" or as "255-Accumulator." If the operand refers to a bit of an output Port, the value that will be complemented is based on the last value written to that bit, not the last value read from it. CONCLUSION:

ASSIGMNEMT QUESTIONS: 1) WRITE A PROGRAM TOCLEAR BIT 3 OF RAM LOCATION 22H WITHOUT AFFECTING ANY OTHER BIT. 2) WRITE A PROGRAM TO XOR A NUMBER WITH WHATEVER IS IN A SO THAT THE RESULT IS FFH.

EXPERIMENT-5
AIM: To Perform Program for Bit level Logical Instructions using microcontroller 8051. OBJECTIVES: To perform program using bit level logical instructions. APPRATUS USED: MICROCONTROLLER KIT THEORY: the availability of individual bit addresses in internal RAM makes the use of the RAM very efficient when storing bit information. Whole bytes do not have to be used up to one or two bits of data. The correspondence between byte and bit addresses is shown in the following figure:

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Operation: ANL Function: Bitwise AND Syntax: ANL operand1, operand2

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Instructions ANL C,bitaddr ANL C,/bit addr

OpCode Bytes Cycles Flags 0x82 0xB0 2 2 1 1 C C

Description: ANL does a bitwise "AND" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "AND" compares the bits of each operand and sets the corresponding bit in the resulting byte only if the bit was set in both of the original operands, otherwise the resulting bit is cleared. Operation: ORL Function: Bitwise OR Syntax: ORL operand1,operand2

Instructions ORL C,bitaddr ORL C,/bit addr

OpCode Bytes Cycles Flags 0x72 0xA0 2 2 2 1 C C

Description: ORL does a bitwise "OR" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "OR" compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either of the original operands, otherwise the resulting bit is cleared. Operation: CPL Function: Complement Register Syntax: CPL operand

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Instructions CPL C CPL bit addr

OpCode Bytes Cycles Flags 0xB3 0xB2 1 2 1 1 C None

Description: CPL complements operand, leaving the result in operand. If operand is a single bit then the state of the bit will be reversed. If operand is the Accumulator then all the bits in the Accumulator will be reversed. This can be thought of as "Accumulator Logical Exclusive OR 255" or as "255-Accumulator." If the operand refers to a bit of an output Port, the value that will be complemented is based on the last value written to that bit, not the last value read from it. Operation: CLR Function: Clear Register Syntax: CLR register

Instructions CLR bit addr CLR C

OpCode Bytes Cycles Flags 0xC2 0xC3 2 1 1 1 None C

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Description: CLR clears (sets to 0) all the bit(s) of the indicated register. If the register is a bit (including the carry bit), only the specified bit is affected. Clearing the Accumulator sets the Accumulators value to 0. Operation: MOV Function: Move Memory Syntax: MOV operand1,operand2

Instructions MOV C,bitaddr MOV bit addr,C

OpCode Bytes Cycles Flags 0xA2 0x92 2 2 1 2 C None

Description: MOV copies the value of operand2 into operand1. The value of operand2 is not affected. Both operand1 and operand2 must be in Internal RAM. No flags are affected unless the instruction is moving the value of a bit into the carry bit in which case the carry bit is affected or unless the instruction is moving a value into the PSW register (which contains all the program flags).

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Operation: SETB Function: Set Bit Syntax: SETB bit addr

Instructions SETB C SETB bit addr

OpCode Bytes Cycles Flags 0xD3 0xD2 1 2 1 1 C None

Description: Sets the specified bit.

CONCLUSION:

ASSIGNMENT QUESTIONS: 1) MAKE A TABLE OF INTERNAL RAM BIT ADDRESSES. 2) LIST ALL THE BIT LEVEL OPERATIONS.

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EXPERIMENT-6
AIM: TO PERFORM ROTATE AND SWAP INSTRUCTIONS USING LOGICAL INSTRUCTIONS.
Objectives: i) To Study Rotate And SwapInstructions. ii) To Execute The Instructions Using Logical Instructions. Apparatus Required: 1. Microcontroller Kit. INTRODUCTION: In many applications there is a need to perform a bitwise rotation of an operand. In the 8051 the rotation instructions RL, RR, RLC, and RRC are designed specifically for that perpose. They allow a program to ratate the accumulator right or left. We explore the rotate instructions next since they are widely used in many different applications. In the 8051, to rotate a byte the operand must be in register A. There are two types of rotations. One is a simple rotation of the bits of A, and the other is a rotation through the carry. The SWAP instruction can be thought of as a rotation of nibbles in the A register. 1) RL INSTRUCTIONS: Operation: RL Function: Rotate Accumulator Left Syntax: RL A

RL

; rotate left A

In rotate left, the 8 bits of the accumulator are rotated one bit, and bit D7 exits from the MSB (most significant bit) and enters into D0 (least significant digit) .

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For example, the instruction MOV A, #72H ; A=0111 0010 RL A ; A=1110 0100 RL A ; A=1100 1001 2) RR INSTRUCTION: Operation: RR Function: Rotate Accumulator Right Syntax: RR A

RR

; rotate right A

In rotate right, the 8 bits of the accumulator are rotated right one bit, and bit D0 exits from the least significant bit and enters into D7 (most significant bit). For example, the instruction MOV A, #36H ; A=0011 0110 RR A ; A=0001 1011 RR A ; A=1000 1101 3) RLC INSTRUCTION: Operation: RLC Function: Rotate Accumulator Left Through Carry Syntax: RLC A

RLC

; rotate left through carry

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In RLC A, as bits are shifted from right to left they exit the MSB and enter the carry flag, and the carry flag enters the LSB. In other words, in RCL the MSB is moved to CY(carry flag) and CY is moved to the LSB. For example, the instruction SETB C ; make CY=1 MOV A, #15H ; A=0001 0101 RLC A ; A=0010 1011 CY=0 RLC A ; A=0101 0110 CY=0 RLC A ; A=1010 1100 CY=0 RLC A ; A=0101 1000 CY=1 4) RRC INSTRUCTION: Operation: RRC Function: Rotate Accumulator Right Through Carry Syntax: RRC A

RRC

; rotate right through carry

In RRC A, as bits are rotated from left to right, they exit the LSB to the carry flag, and the carry flag enters the MSB. In other words, in RRC A the LSB is moved to CY and CY is moved to the MSB. In reality, the carry flag acts as if it is part of register A, making it a 9-bit register. For example, the instruction CLR C MOV A, #26H RRC A RRC A RRC A

; make CY=0 ; A=0010 0110 ; A=0001 0011 CY=0 ; A=0000 1001 CY=1 ; A=1000 0100 CY=1

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5) SWAP INSTRUCTION: Operation: SWAP Function: Swap Accumulator Nibbles Syntax: SWAP A

SWAP A

; swap the two nibbles of the accumulator

In some cases it can be useful to swap the nibbles of the accumulator. A nibbles is four bits so there are two nibbles in the accumulator. The high nibble consists of bits 4 through 7 while the low nibble consists of bits 0 through 3. It works only on the accumulator(A). The lower 4 bits are put into the higher 4-bits, and the higher 4-bits are put into the lower 4-bits. For example, the instruction If the acumulator holds the value 56H, the SWAP instruction will convert it to 65H. Likewise F7H is converted into 7FH. CONCLUSION:

EXERCISE QUESTIONS: 1. Write a program that finds the position of the first high in an 8-bit data item. The data is scanned from D0 to D7. Give the result for 68H. 2. If A=90H, what is the content of A after RR A and RLC A instructions, if CY=1 ? 3. write a program to transfer value 41H serially (one bit at a time) via pin P2.1. Put two highs at a start and end of the data. Send the byte LSB first. 4. (a) Find the content of register A in the following code. (b) In the absence of SWAP instruction, how would you exchange the nibbles? Write a simple program to show the process.

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EXPERIMENT-7
AIM:TO PERFORM 8 BIT ADDITIONS AND SUBTRACTION USING ARITHMETIC
INSTRUCTION. OBJECTIVES:1. Write a program to add two 8-bit numbers stored in Register R0 and R1 and store the result at 4012 memory location using microcontroller kit. 2. Write a program to subtract two 8-bit numbers stored in Register R0 and R1 and store the result at 4012 memory location using microcontroller kit.

Apparatus Used:-Micro-controller kit. Assumption: Suppose the content of register R0 and R1 are 12 and 11respectively. Write
a program to add these values.

ADDITION Algorithm:
Load Numbers in two register. Move a number into accumulator. Add second number to accumulator. Initialize a location to store output. Store output at given location.

Program:

Result: Input: Output:

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Assumption: Suppose the content of register R0 and R1 are 12 and 11respectively. Write
a program to subtract these values.

SUBSTRACTION Algorithm:
Load Numbers in two register. Move a number into accumulator. Subtract second number from accumulator. Initialize a location to store output. Store output at given location.

Program:

Result: Input: Output: CONCLUSION:

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EXPERIMENT-8
AIM: TO PERFORM INCREMENT AND DECREMENT USING ARITHMETIC INSTRUCTIONS.
Objectives: i) To Study Increment And Decrement Instructions. ii) To Execute The Instructions Using Arithmetic Instructions. Apparatus Required: 1. Microcontroller Kit INTRODUCTION: The simplest arithmetic operations involve adding or subtracting a binary 1 and a number. These simple operations become very powerful when coupled with the ability to repeat the operationthat is, to INCrement or DECrement- until a desired result is reached. Register, direct, and indirect addresses may be INCremented or DECremented. No math flags (C,AC,OV) are affected. The following list shows the increment and decrement mnemonics:

INC <byte>
Function: Increment Description: INC increments the indicated variable by 1. An original value of 0FFH overflows to 00H. No flags are affected. Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins. i) INC A Bytes: 1 Cycles: 1 Encoding:
0 0 0 0 0 1 0 0

Operation: INC (A) (A) + 1 This instruction will increment the contents of register Accumulator by 1. ii) INC Rn Bytes: 1 Cycles: 1 Encoding:
0 0 0 0 1 r rr

Operation: INC (Rn) (Rn) + 1 This instruction will increment the content of register Rn of selected register bank 1.

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iii) INC direct Bytes: 2 Encoding:

Cycles:

Operation: INC (direct) (direct) + 1 This instruction will increment the contents of memory location whose direct address is specified in the instruction by 1. iv) INC @Ri Bytes: 1 Encoding:

Cycles:

Operation: INC ((Ri)) ((Ri)) + 1 This instruction will increment the content of memory location that is pointed by register Ri by 1. For Example: Register 0 contains 7EH(011111110B). Internal RAM locations 7EH and 7FH contain OFFH and 40H respectively. The following instruction sequence, INC @R0 INC R0 INC @R0 leaves register 0 set to 7FH and internal RAM locations 7EH and 7FH holding 00H and 41H,respectively. v) INC DPTR Function: Increment Data Pointer Description: INC DPTR increments the 16- bit data pointer by 1. A 16-bit increment Is performed , and an overflow of the low-order byte of the data pointer (DPL) from 0FFH to 00H increments the higher-order byte (DPH). No flags are affected. This is the only 16-bit register which can be incremented. Bytes: 1 Cycles: 2 Encoding: Operation: INC (DPTR) (DPTR) + 1

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For Example: Registers DPH and DPL contain 12H and 0FEH, respectively. The following instruction sequence, INC DPTR INC DPTR INC DPTR Changes DPH and DPL to 13H and 01H.

DEC <byte>
Function: Decrement Description: DEC byte decrements the variable indicated variable by 1. An original value of 00H underflows to 0FFH. No flags are affected. Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins. i) DEC A Bytes: 1 Cycles: 1 Encoding:
0 0 0 1 0 1 0 0

Operation: DEC (A) (A) - 1 This instruction will decrement the contents of register Accumulator by 1. ii) DEC Rn Bytes: 1 Cycles: 1 Encoding:
0 0 0 1 1 r rr

Operation: DEC (Rn) (Rn) - 1 This instruction will decrement the content of register Rn of selected register bank 1. iii) DEC direct Bytes: 2 Cycles: 1 Encoding: Operation: DEC (direct) (direct) - 1 This instruction will decrement the contents of memory location whose direct address is specified in the instruction by 1. iv) DEC @Ri Bytes: 1 Cycles: 1 Encoding: Operation: DEC

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((Ri)) ((Ri)) - 1 This instruction will decrement the content of memory location that is pointed by register Ri by 1. For Example: Register 0 contains 7EH(011111110B). Internal RAM locations 7EH and 7FH contain OFFH and 40H respectively. The following instruction sequence, DEC @R0 DEC R0 DEC @R0 Leaves the register 0 set to 7EH and internal RAM locations 7EH and 7FH set to 0FFH and 3FH.

CONCLUSION:

EXERCISE QUESTIONS: 1. Increment the contents of RAM location 13h, 14h and 15h using Indirect addressing only. 2. Increment external RAM locations 0100h and 0200h. 3. Decrement TLO, THO, TL1 and TH1.

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EXPERIMENT-9
AIM: To Perform8 Bit Multiplications And Division Using Arithmetic Instruction. Objectives:1. Execute a program to multiply two 8-bit numbers stored in Register R0 and R1 and store the result at 4012 memory location using microcontroller kit. 2. Execute a program to divide two 8-bit numbers stored in Register R0 and R1 and store the result at 4012 memory location using microcontroller kit.

Apparatus Used:- Micro-controller kit. Multiplication Assumption: Suppose the content of register R0 and R1 are 03
and 02 respectively. Write a program to multiply these values.

Algorithm:
Load 1 Number in Register R0. Load Second Number in Register R1. Move First number into accumulator. Move second Number into Register B. Now Multiply both number. Initialize a location to store output. Store output at given location.

Program:

Result: Input: Output:

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Division Assumption: Suppose the content of register R0 and R1 are 08 and 02


respectively. Write a program to multiply these values.

Algorithm:
Load 1 Number in Register R0. Load Second Number in Register R1. Move First number into accumulator. Move second Number into Register B. Now Divide both number. Initialize a location to store output. Store output at given location.

Program:

Result: Input: Output: CONCLUSION:

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EXPERIMENT-10
AIM:To Study BRANCH, JUMP and SUBROUTINE instruction using programs.
Objective: 1. To study BRANCH, JUMP and SUBROUTINE instructions 2. To perform programs based on BRANCH, JUMP and SUBROUTINE instructions.

Apparatus Used:-Micro-controller kit.


BRANCHING INSTRUCTIONS: The 8051 supports three kind of jump instructions: 1) LJMP 2) SJMP 3) AJMP LJMP LJMP (long jump) causes the program to branch to a destination address defined by the 16-bit operand in the jump instruction. Because a 16-bit address is used the instruction can cause a jump to any location within the 64KByte program space (216= 64K). Some example instructions are: LJMP LABEL_X ; Jump to the specified label LJMP 0F200h ; Jump to address 0F200h LJMP @A+DPTR ; Jump to address which is the sum of DPTR and Reg. A SJMP SJMP (short jump) uses a single byte address. This address is a signed 8-bit number and allows the program to branch to a distance 128 bytes back from the current PC address or +127 bytes forward from the current PC address. The address mode used with this form of jumping (or branching) is referred to as relative addressing, introduced earlier, as the jump is calculated relative to the current PC address. AJMP This is a special 8051 jump instruction, which allows a jump with a 2KByte address boundary (a 2K page) There is also a generic JMP instruction supported by many 8051 assemblers. The assembler will decide which type of jump instruction to use, LJMP, SJMP or AJMP, so as to choose the most efficient instruction. SUBROUTINES AND PROGRAM FLOW CONTROL A suboutine is called using the LCALL or the ACALL instruction.

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LCALL This instruction is used to call a subroutine at a specified address. The address is 16 bits long so the call can be made to any location within the 64KByte memory space. When a LCALL instruction is executed the current PC content is automatically pushed onto the stack of the PC. When the program returns from the subroutine the PC contents is returned from the stack so that the program can resume operation from the point where the LCALL was made The return from subroutine is achieved using the RET instruction, which simply pops the PC back from the stack. ACALL The ACALL instruction is logically similar to the LCALL but has a limited address range similar to the AJMP instruction. CALL is a generic call instruction supported by many 8051 assemblers. The assembler will decide which type of call instruction, LCALL or ACALL, to use so as to choose the most efficient instruction. PROGRAM CONTROL USING CONDITIONAL JUMPS Most 8051 jump instructions use an 8-bit destination address, based on relative addressing, i.e. addressing within the range 128 to +127 bytes. When using a conditional jump instruction the programmer can simply specify a program label or a full 16-bit address for the conditional jump instructions destination. The assembler will position the code and work out the correct 8-bit relative address for the instruction. Some example conditional jump instructions are: JZ JNZ JNC DJNZ not LABEL_1 LABEL_X LABEL_Y R2, LABEL ; Jump to LABEL_1 if accumulator is equal to zero ; Jump to LABEL_X if accumulator is not equal to zero ; Jump to LABEL_Y ; Decrement R2 and jump to LABEL if the resulting value of R2 is

zero. CJNE R1, #55h , LABEL_2 ; Compare the magnitude of R1 and the number 55h and jump to LABEL_2 if the magnitudes are not equal. Note: jump instructions such as DJNZ and CJNE are very powerful as they carry out a particular Operation (e.g.: decrement, compare) and then make a decision based on the result of this operation. Some example code later will help to explain the context in which such instructions might be used.

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BRANCHING , JUMP & SUBROUTINE TABLE OPERATION MNEMONIC DESCRIPTION BYTES CYCLES
JC rel JNC rel JB bit,rel JNB bit,rel JBC bit,rel ACALL addr11 LCALL addr16 RET RETI AJMP addr11 LJMP addr16 SJMP rel8 JMP @A+DPTR JZ rel8 JNZ rel8 CJNE A,direct,rel8 CJNE A,#data,rel8 CJNE Rn,#data,rel8 CJNE @Ri,#data,rel8 DJNZ Rn,rel8 DJNZ direct,rel8 NOP Jump if carry is set Jump if carry is NOT set Jump if direct bit is set Jump if direct bit is NOT set Jump if direct bit is set and clear that bit Absolute call within 2K page Absolute call (Long call) Return from subroutine Return from interrupt Absolute jump within 2K page Absolute jump (Long jump) Relative jump within +/- 127 bytes (Short jump) Jump direct relative to DPTR Jump if ACC is zero Jump if ACC is NOT zero Compare direct byte to ACC, jump if NOT equal Compare immediate to ACC, jump if NOT equal Compare immediate to register, jump if NOT equal Compare immediate to indirect, jump if NOT equal Decrement register, jump if NOT zero Decrement direct byte, jump if NOT zero No operation (Skip to next instruction) 2 2 3 3 3 2 3 1 1 2 3 2 1 2 2 3 3 3 3 2 3 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1

OV AC

X X X X

CONCLUSION: EXERCISING QUESTIONS: 1. What is the difference between SJMP, AJMP and LJMP? 2. What is subroutine? 3. Explain each instruction of conditional jump instructions with example. 4. Perform each Program using CJNE and DJNZ instructons.

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EXPERIMENT-11
AIM: To Study Matrix Keyboard interfacing with 8051.
OBJECTIVE: 1. To Study 4X4 Matrix Keyboard interfacing with 8051. APPRATUS: MICROCONTROLLER KIT THEORY: Keypad A keypad is a set of buttons arranged in a block or "pad" which usually bear digits, symbols and usually a complete set of alphabetical letters. If it mostly contains numbers then it can also be called a numeric keypad. Here we are using 4 X 4 matrix keypad. Interfacing keypad Fig. 1 shows how to interface the 4 X 4 matrix keypad to two ports in microcontroller. The rows are connected to an output port and the columns are connected to an input port. To detect a pressed key, the microcontroller grounds all rows by providing 0 to the output latch, and then it reads the columns. If the data read from the columns is D3-D0=1111, no key has been pressed and the process continues until a key press is detected. However, if one of the column bits has a zero, this means that a key press has occurred. For example, if D3-D0=1101, this means that a key in the D1 column has been pressed. After a key press is detected, the microcontroller will go through the process of identifying the key. Starting with the top row, the microcontroller grounds it by providing a low to row D0 only; then it reads the columns. If the data read is all 1s, no key in that row is activated and the process is moved to the next row. It grounds the next row, reads the columns, and checks for any zero. This process continues until the row is identified. After identification of the row in which the key has been pressed, the next task is to find out which column the pressed key belongs to.

Fig. 1 interfacing keypad to Microcontroller

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Interfacing keypad with 8051 We now want to scan a keypad in 8051 Slicker Board. In case of 4X4 matrix Keypad both the ends of switches are connected to the port pin i.e. four rows and four columns. So in all sixteen switches have been interfaced using just eight lines. 1Keypads arranged by matrix format, each row and column section pulled by high or low by selection J5, all row lines(P2.4 P2.7) and column lines(P2.0 to P2.3) connected directly by the port pins. Pin Assignment with 8051

4x4Matrix Lines 8051 Lines ROW-0 ROW ROW-1 ROW-2 ROW-4 COLUMN-0 COLUMN COLUMN-1 COLUMN-2 COLUMN-3 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7

4x4 Matrix Keypad

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Circuit Diagram to Interface keypad with 8051

Source Code The Interfacing keypad with 8051 program is very simple and straight forward that scan a keypad rows and columns. When the rows and columns are detected then it will display in PC through UART0. CONCLUSION: EXERCISING QUESTIONS: 1) WHAT IS A KEYPAD? 2) DRAW THE FIGURE OF INTERFACING 4X4 MATRIX KEYPAD WITH 8051 MICROCONTROLLER.

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EXPERIMENT-12
AIM:TO STUDY SEVEN SEGMENT LEDAND LCD INTERFACING WITH 8051.
APPRATUS: MICROCONTROLLER KIT SEVEN SEGMENT LED:Seven-segment displays can display the figures of our numbering system and a couple of special characters. There are many types of seven-segment displays from different manufacturers. Basically, this type of display consists of a number of LEDs with connected anodes or cathodes.

Common Cathode where all the segments share the same Cathode. Common Anode where all Segments share the same Anode.

Note: In common Anode in order to turn ON a segment the corresponding pin must be set to 0. And to turn it OFF it is set to 1. To display alphanumeric data with such a seven-segment display, it is necessary to define the control scheme. the anodes of the individual LEDs are interconnected. If a cathode resistor is connected to a microcontroller pin, the LED can be switched on and off. Lo at the controlling pin switches the LED on, and Hi switches it off. Following Table shows the segment control for characters 0 to 9 and A to F as is required for displaying hexadecimal numbers.

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Character 0 1 2 3 4 5 6 7 8 9 A B C D E F g 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 f 0 1 1 1 0 0 0 1 0 0 0 0 0 1 0 0

Segments e 0 1 0 1 1 1 0 1 0 1 0 0 0 0 0 0 d 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 1 c 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 1 b 0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 1 a 0 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0

Output &H40 &H79 &H24 &H30 &H19 &H12 &H02 &H78 &H00 &H10 &H08 &H03 &H46 &H21 &H06 &H0E

Interface seven segment display with Port P1. Write program to display number 0 to 9 on the seven segment display. Use delay between two count Circuit diagram:-

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LCD INTERFACING:LCD display is an inevitable part in almost all embedded projects and you can easily design embedded projects like digital voltmeter / ammeter, digital clock, home automation displays, status indicator display, digital code locks, digital speedometer/ odometer, display for music players etc . 162 LCD module is a very common type of LCD module that is used in 8051 based embedded projects. It consists of 16 rows and 2 columns of 57 or 58 LCD dot matrices. The module were are talking about here is type number JHD162A which is a very popular one . It is available in a 16 pin package with back light ,contrast adjustment function and each dot matrix has 58 dot resolution. The pin numbers, their name and corresponding functions are shown in the table below. Pin No: Name Function 1 VSS This pin must be connected to the ground 2 VCC Positive supply voltage pin (5V DC) 3 VEE Contrast adjustment 4 RS Register selection 5 R/W Read or write 6 E Enable 7 DB0 Data 8 DB1 Data 9 DB2 Data 10 DB3 Data 11 DB4 Data 12 DB5 Data 13 DB6 Data 14 DB7 Data 15 LED+ Back light LED+ 16 LEDBack light LED-

162 LCD module has a set of preset command instructions. Each command will make the module to do a particular task. The commonly used commands and their function are given in the table below.

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Command 0F 01 2 4 06 E 80 C0 38 83 3C 0C3 OC1

Function LCD ON, Cursor ON, Cursor blinking ON Clear screen Return home Decrement cursor Increment cursor Display ON ,Cursor ON Force cursor to the beginning of 1st line Force cursor to the beginning of 2nd line Use 2 lines and 57 matrix Cursor line 1 position 3 Activate second line Jump to second line, position3 Jump to second line, position1

LCD initialization. The steps that has to be done for initializing the LCD display is given below and these steps are common for almost all applications.

Send 38H to the 8 bit data line for initialization Send 0FH for making LCD ON, cursor ON and cursor blinking ON. Send 06H for incrementing cursor position. Send 01H for clearing the display and return the cursor.

Sending data to the LCD. The steps for sending data to the LCD module is given below. I have already said that the LCD module has pins namely RS, R/W and E. It is the logic state of these pins that make the module to determine whether a given data input is a command or data to be displayed.

Make R/W low. Make RS=0 if data byte is a command and make RS=1 if the data byte is a data to be displayed. Place data byte on the data register. Pulse E from high to low. Repeat above steps for sending another data.

Interface LCD with the microcontroller. Display your name on the LCD.

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Interfacing diagram:-

CONCLUTION:-

EXERCISING QUESTIONS: 1. DRAW THE FLOW CHART FOR INITIALIZATION PROCCESS OF LCD. 2. WHAT ARE THE SIGNALS REQUIRED FOR INTERFACIONG LCD AND LED WITH 8051 MICROCONTROLLER? 3. DISCUSS MERITS OF LCD AND LED.

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EXPERIMENT-13
AIM:TO STUDY ANALOG TO DIGITAL CONVERTER (ADC) INTERFACING WITH 8051.
OBJECTIVE: To Study Analog to Digital Converter Interfacing with 8051 Microcontroller.

MATERIALS:
8051 trainer 8051 assembler ADC R=10 K ohms, C=150 pF

THEORY:
As shown in the typica circuit, ADC0804 can be interfaced with any microcontroller. You need a minimum of 11 pins to interface ADC0804, eight for data pins and 3 for control pins. As shown in the typical circuit the chip select pin can be made low if you are not using the microcontroller port for any other peripheral (multiplexing). There is a universal rule to find out how to use an IC. All you need is the datasheet of the IC you are working with and take a look at the timing diagram of the IC which shows how to send the data, which signal to assert and at what time the signal should be made high or low etc.

Diagram:
Pinout: Typical application schematic:

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As shown in the typica circuit, ADC0804 can be interfaced with any microcontroller. You need a minimum of 11 pins to interface ADC0804, eight for data pins and 3 for control pins. As shown in the typical circuit the chip select pin can be made low if you are not using the microcontroller port for any other peripheral (multiplexing). There is a universal rule to find out how to use an IC. All you need is the datasheet of the IC you are working with and take a look at the timing diagram of the IC which shows how to send the data, which signal to assert and at what time the signal should be made high or low etc.

Circuit diagram:

1. Make CS = 0 and send a L-to-H pulse to pin WR to start the conversion. 2. Keep monitoring the INTR pin. If INTR is low, the conversion is finished and we can go to the next step. If INTR is high, keep polling until it goes low. 3. After the INTR has become low, we make CS = 0 and send a H-to-L pulse to the RD pin to get the data out of the ADC0804 IC chip. Note: CS is set to low for both RD and WR pulses.

procedure:

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Step-1 Select the input channel of the ADC 0809 by configuring the Address A, B and C. Step-2 Activate the ALE (Address latch enable) pin by making it high. Step-3 Assign a port as input port and connect it to the ADC. Step-4 Select the SC (Start of Conversion) and make it low. Step-5 Wait for data conversion by making EOC (End of Conversion) to low. Step-6 Enable read data by making OE (Output Enable)/ RD to high. Step-7 Get the data and disable OE. Step-8 To read another data again please refer to step-3 again.

Conclusion:

Assignment Question :
1) Draw the pin diagram of ADC. 2) Explain interfacing circuit diagram of ADC with 8051.

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EXPERIMENT-14
AIM: TO STUDY ANALOG TO DIGITAL CONVERTER (DAC) INTERFACING WITH 8051.
OBJECTIVE: To Study Analog to Digital Converter Interfacing with 8051 Microcontroller.

MATERIALS:

MCU (8051) DAC0808 Counter (IC 79LS43) Resistors (10k, 8.2k) Capacitors(33pF, 10uF) Op-amp Signal Generator Oscilloscope Power Supply

Theory:
The DAC0808 is an 8-bit monolithic digital-to-analog con-verter (DAC) featuring a full scale output current settling timeof 150 ns while dissipating only 33 mW with5V supplies. No reference current (IREF) trimming is required for mostapplications since the full scale output current is typically1LSB of 255 IREF/256. Relative accuracies of better that0.19% assure 8bit monotonicity and linearity while zerolevel output current of less than 4 A provides 8-bit zero accuracy for IREF2 A. The power supply currents of theDAC0808 is independent of bit codes, and exhibits essen-tially constant device characteristics over the entire supplyvoltage range. The DAC0808 will interface directly with popular TTL, DTL orCMOS logic levels, and is a direct replacement for theMC1508/MC1408. For higher speed applications, seeDAC0800 data sheet.

Pin diagram:

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Circuit diagram:
PROCEDURE FOR INTERFACING 8051 - DAC0808

Steps:
1) Connect the P1 of 8051 with the D0 to D7 Pin of DAC. 2) Give +5 volt to VCC and Vref of the DAC. 3) Connect -12v to VEE of DAC. 4) Connect a OPAMP to OUT pin of the DAC with 5k Resistor. 5) Connect the OSCILOSCOPE with the OPAMP and view the output.

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Procedure to generate Sin Wave:


To generate a sine wave, first a table is designed whose values represent the amplitude of the sine of the angles between 0 and 360 degrees. The value of the sine function varies from -1.0 to +1.0. Therefore the table values are integer numbers representing the voltage magnitudes for the sine of theta. This method ensures that only integer numbers are output to the DAC by the MCU. To generate the sine wave, the output of DAC is assumed to be 10V. Full scale output of the DAC is achieved when all the data inputs of the DAC are high. Therefore to achieve the fullscale 10V output, we use following equation. V out = 5V + (5* sin ) V out of DAC for various angles is calculated.

Conclusion:

Assignment Question :
1) Draw the pin diagram of the DAC. 2) Draw the circuit diagram of the 8051-DAC interfacing.

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3) Write the steps of the 8051-DAC interfacing.

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