ANALOG ELECTRONICS

Q. Power diode is generally made from a) Silicon b) Germanium c) Both d) None of these Q. When the both junction of NPN diode is reverse biased, then the diode is in which mode a) Active b) Cutoff c) Saturation d) inverted Q. Which transistor mode gives the inverted output a) Common Emitter b) Common Base c) Common Collector d) None of these Q. Which coupling gives the higher gain in case of amplifier a) Capacitor coupling b) Impedance coupling c) Transformercoupling Q. Which distortion is least objectionable in audio amplification a) Phase b) Frequency c) Harmonic d) Intermediation Q. A narrow band amplifier has a band pass nearlyof central frequency a) 33.3% b) 10% c) 50% Q. Phase shift oscillator consists a) RL b) RC c) RLC Q. Multivibrater Produces a) Sine wave b) Square wave c) Smooth wave d) sawtooth

Q. Convert the 101101 Binary number into octal no a) 65 b) 55 c) 51 d) 45 Ans: 55 Q. 10 in BCD a) 10100 b) 1100 c) 010111 d) None of these Ans: None of these Q. Which PNP device has a terminal for synchronizing purpose a) SCS b) Triac c) Diac d) SUS Q. Addition of indium in semiconductor crystal makes a) PNP b) NPN Q. Free electron exists in which band a) 1 b) 2 c) 3 d) Conduction band Q. Ripple factor of half wave rectifier a) 1.21 b) 0.48 c) 0.5 Q. Transistor that can be used in enhancement mode a) NPN b) UJT c) JFET d) MOSFET Q. Following contributes to harmonic distortion in Amplifier a) +Ve feedback b) Ve feedback c) Defective active device Q. High cutoff frequency

a) CB b) CC c) CE Q. Which is used as data selector? a) Encoder b) Decoder c) modulator d) Demodulator Q. Read write capable memory a) RAM b) ROM c) Both d) None of these Q.the radix or base of hexadecimal number system is ----------a) 8 b) 16 c) 5 d) none of these Ans: 16 Q.the no of 1s in the binary representation of the expression 162*9+162*7+16*5+3 are a) 10 b) 23 c) 6 d) 4 Q. the no of latches in F/F are ------a) 1 b) 2 c) 3 d) 4 Q.how many flip-flops are required to construct Mod -12 counter a) 5 b) 4 c) 12 d) none Ans: 4 Q. which logic gate has the output is compliment of its input ---------a) OR b) AND c) NOT d) X-OR

Ans: NOT Q.no.of 2-input multiplexers needed to construct a 210 input multiplexer. a) 12 b) 31 c) 20 d) 16 Q.By adding inverters to the inputs and output of a AND gate we can obtain a) OR b) AND c) NOT d) X-OR Ans: X-OR Q.how many NAND gates are needed to realize OR gate -------------a) 1 b) 2 c) 3 d) 4 Ans: 3 Q.which is the first integrated logic family --------------a) RTL b) DTL c) TTL d) none of these Q. Which logic gate has output high if and only if all inputs are low ---------? a) NOR b) NAND c) X-NOR d) AND Ans: NAND Q.According to Boolean algebra 1+A+B+C = a) A b) A+B+C c) 1 d) none of these Ans: 1 Q. If a=0x6db7 and b=0x2ae9 then what is the value of ab--------------

a) binary number for 1001.1101? b) decimal number for 19? c) excess-3 code for 29? Q.what is the value of A'+1 ? a) A b) A' c) 1 d) none of these Ans: 1 Q.2 in 4 bit number one bit indicates sign of the number then the locations are from a) -8 to 8 b) -7 to 7 c) -16 to 16 d) None Q.Avalanche photo diode is used when compared to PIN diode bcz a)larger band width b)high sensitivity C)------d)-------Q.some non zero DC voltage is to RC low pass circuit then the DC voltage in the output contains a) Same as in input b) Higher than input c) Zero d) Slightly increases Q.if the output of the gate is always high then the gates applied to this logic are 0,0 a) NAND and EX-NOR b) NAND and NOR c) AND and X-NOR d) OR and XOR Ans:a Q.Thermal Run away is not possible in FET bcz the flow of a)minority careers b)Transconductance c)_____ d)none Ans : minority careers Q.which of the following is/are true about 1's and 2's compements:

i)In 1's complement form. 0 has two representations ii)in 1's complement, the magnitude of lowest number is equal to the magnitude of highest number iii)In 2's complement, 0 has two representations a) i only b) i and ii c) iii only d) all of these Q.In the hybrid parameter model of a transistor reverse transfer voltage ratio and forward transfer current ratio are respectively given by: a) h11 and h21 b) h12 and h11 c) h21 and h11 d) None of these Q.The largest negative no can be represented with 8 bits in 2's compliment representation? a)-256 b)-255 c)-127 d)-128 Ans: -128 Q. How many NAND gates required to implement AB+CD+EF a) 1 b) 2 c) 3 d) 4 Ans: 4 Q. Transparent latch is seen in which type of flip flop a) SR FF b) D FF c) JK FF d) D FF Ans: D FF Q. Odd parity generator uses which logic? a) Digital b) Analog c) Sequential d) none Q. Which type of ADC is fastest? a) SARC

b) Counter type c) Intigrated type d) Flash ANS: Flash/Parallel Q. Which one of the following is fastest read/writable memory? a) PROM b) EEPROM c) Flash d) none Ans: Flash 8. In array programming which one is used a) SISD b) PISD c) MISD d) None Q.Which one of the following has high I/p impedance a) CC b) CB c) CE d) None Q. The maximum time allowed time for each flip flop for a mod 10 synchronous counter if each flip flop delay is 25ns. a) 25 ns b) 50 ns c) 100 ns d) none Q. The resolution for a DAC is given by 0.4% then no. of bits of DAC is a) 8- bits b) 16- bits c) 32- bits d) none Ans: 8- bits 41) The chip capacity is 256 bits, then the no.of chips required to build 1024 B memory Is a) 32 b) 16 c) 15 d) 4 Q. Which of the following are correct? 1)A flip-flop is used to store 1-bit of information

2)Race around condition occurs in JK flip flop when both the inputs are 1 3)Master slave flip flop is used to store 2 bits of information 4)A transparent latch consists of a D- flip flop a) 1,2,3 b) 1,3,4 c) 1,2,4 d) 2,3,4 Ans: 1,2,4 Q. output resistance of ideal OP AMP is a) 0 b) 1 c) infinite d) very high ANS: 0 Q. CMRR of an OP AMP is given as 80db and Ad is 20000.Value of Acm will be a) 4 b) 8 c) 2 d) 1 Ans: 2 Q.Si,Ge lie in ........block of periodic table a) III b) V c) IV A d) IV B Ans: IV A Q.to obtain 10 mV resolution on 5 V range how many bit DAC is to be used a) 4 b) 8 c) 16 d) 32 Q.% resolution of a 10 bit ADC a) 1.588% b) 0.392% c) 0.0978% d) 0.0244% Ans: 0.0978% Q.Efficiency of half wave rectifier

a) 45% b) 50% c) 86% d) 100

Digital electronics
1.The number of digits in octal system is a.8 b.7 c.10 d. none 2..The number of digits in Hexadecimal system is a.15 b.17 c.16 d. 8 3.The number of bits in a nibble is a.16 b.5 c.4 d.8 4.The digit F in Hexadecimal system is equivalent to ------ in decimal system a.16 b.15 c.17 d. 8 5.Which of the following binary numbers is equivalent to decimal 10 a.1000 b.1100 c.1010 d.1001 6.The number FF in Hexadecimal system is equivalent to ------ in decimal system a.256 b.255 c.240 d.239 7.IC s are a. analog b. digital c. both analog and digital

d. mostly analog 8.The rate of change of digital signals between High and Low Level is a. very fast b. fast c. slow d. very slow 9. Digital circuits mostly use a. Diodes b. Bipolar transistors c. Diode and Bipolar transistors d. Bipolar transistors and FETs 10.Logic pulser a. generates short duration pulses b. generate long duration pulses c. generates long and short duration d. none of above 11.What is the output state of an OR gate if the inputs are 0 and 1? a.0 b.1 c.3 d.2 12.What is the output state of an AND gate if the inputs are 0 and 1? a.0 b.1 c.3 d.2 13.A NOT gate has... a. Two inputs and one output b. One input and one output c. One input and two outputs d. none of above 14.An OR gate has... a. Two inputs and one output b. One input and one output c. One input and two outputs d. none of above 15.The output of a logic gate can be one of two _____? a. Inputs b. Gates c.States d. none

16.Logic states can only be ___ or 0. a. 3 b. 2 c.1 d.0 17.The output of a ____ gate is only 1 when all of its inputs are 1 a. NOR b. XOR c. AND d. NOT 18.A NAND gate is equivalent to an AND gate plus a .... gate put together. a. NOR b. NOT c. XOR d. none 19.Half adder circuit is ______? a. Half of an AND gate b. A circuit to add two bits together c. Half of a NAND gate d. none of above 20. Numbers are stored and transmitted inside a computer in a. binary form b. ASCII code form c. decimal form d. alphanumeric form 21.The decimal number 127 may be represented by a. 1111 1111B b. 1000 0000B c. EEH d. 0111 1111 22.. A byte corresponds to a. 4 bits b. 8 bits c. 16 bits d. 32 bits 23.A gigabyte represents a.1 billion bytes b. 1000 kilobytes c. 230 bytes d. 1024 bytes 24. A megabyte represents a. 1 million bytes

b. 1000 kilobytes c. 220 bytes d. 1024 bytes 25.. A Kb corresponds to a. 1024 bits b. 1000 bytes c.210 bytes d. 210 bits 26.A parity bit is a. used to indicate uppercase letters b. used to detect errors c. is the first bit in a byte d. is the last bit in a byte 27. Which of these devices are two state. a. lamp b. punched card c. magnetic tape d. all the above The output impedance of of a logic pulser is a. low b. high c. may be low or high d. none of above 28.The number of LED display indicators in logic probe are a.1 b.2 c.1 or 2 d.4 29.In hexadecimal number system,A is equal to decimal number a.10 b.11 c.17 d.18 30.Hexadecimal number F is equal to octal number a.15 b.16 c.17 d.18 31.Hexadecimal number E is equal to binary number a.1110 b.1101 c.1001

d.1111 32.Binary number 1101 is equal to octal number a.15 b.16 c.17 d.14 33.Octal number 12 is equal to decimal number a.8 b.11 c.9 d. none 34.Decimal number 10 is equal to binary number a.1110 b.1000 c.1001 d.1010 35.Binary number 110011011001 is equal to decimal number a.3289 b.2289 c.1289 d.289 36.1111+11111= a.101111 b.101110 c.111111 d.011111 37.Binary multiplication 1*0= a.1 b.0 c.10 d.11 38.110012 -100012= a.10000 b.01000 c.00100 d.00001 39.10112*1012= a.55 b.45 c.35 d.25

40.1110112*100012= a.111101101 b.111101100 c.111110 d.1100110 41.4 bits is equal to a. 1 nibble b.1 byte c. 2 byte d. none of above 42. which is non-volatile memory a. RAM b. ROM c. both d. none 43. The contents of these chips are lost when the computer is switched off? a. ROM chips b. RAM chips c. DRAM chips d. none of above 44.What are responsible for storing permanent data and instructions.? a. RAM chips b. ROM chips c. DRAM chips d. none of above 45. Which parts of the computer perform arithmetic calculations? a. ALU b. Registers c. Logic bus d. none of above 46.How many bits of information can each memory cell in a computer chip hold? a. 0 bits b. 1 bit c. 8 bits d. 2 bits 47.What type of computer chips are said to be volatile? a. RAM chips b. ROM chips c. DRAM d. none of above 48.Which generation of computer uses more than one microprocessor?

a. Second generation b. Fifth generation c.Third generation d .none of above 49.Which generation of computer developed using integrated circuits? a. Second generation b. Fifth generation c. Third generation d. none of above 50.Which generation of computer was developed from microchips? a. Second generation b. Third generation c. Fourth generation d. none of above 51.RAM can be expanded to a a. increase word size b. increase word number c. increase word size or increase word number d. none of above 52. Which memory is available in all technologies a. PROM b. EEPROM c. ROM d. EPROM 53. Which memory does not require programming equipment a. PROM b. EEPROM c. ROM d. EPROM 54. In CCD a. small charge is deposited for logical 1 b. small charge is deposited for logical 0 or 1 c. small charge is deposited for logical 0 and large charge for logical 1 d. none of above 55. The internal structure of PLA is similar to a. RAM b. ROM c. both RAM or ROM d. neither RAM nor RAM 56.An output of combinational ckt depends on a. present inputs b. previous inputs

c. both present and previous d .none of above 57.Which are combinational gates a. NAND & NOR b. NOT & AND c. X-OR & X-NOR d. none of above 58.. As access time is decreased, the cost of memory a. remains the same b. increases c. decreases d. may increase or decrease 59. Which is correct: a. A.A=0 b. A+1=A c. A+A=A' d. A'.A'=0 60.A counter is a a. Sequential ckt b. Combinational ckt c. both combinational and sequential ckt d. none of above 61.The parity bit is a. always 1 b. always 0 c.1 or 0 d.none of above 62.In 2 out of 5 code,decimal number 8 is a.11000 b.10100 c.1100 d.1010 63.In number of information bits is 11,the number of parity Bits in hamming code is a.5 b.4 c.3 d.2 64.For a 4096*8 EPROM ,the number of address lines is a.14 b.12 c.10

d.8 65. 23.6 10=.2 a.11111.10011 b.10111.10011 c.00111.101 d.10111.1 66.BCD number 0110011=.10 a.66 b.67 c.68 d.69 67.The total number of input states for 4 input or gate is a.20 b.16 c.12 d.8 68.In a 4 input OR gate,the total number of High outputs for the 16 input states are a.16 b.15 c.13 d. none of above 69.In a 4 input AND gate,the total number of High outputs for the 16 input states are a.16 b.8 c.4 d.1 70.a buffer is a. always non-inverting b.always inverting c. inverting or non-inverting d.none of above 71.An AND gate has two inputs A and B and ine inhibits input S.Output is 1 if a.A=1,B=1,S=1 b. A=1,B=1,S=0 c. A=1,B=0,S=1 d. A=1,B=0,S=0 72. An AND gate has two inputs A and B and ine inhibits input S.Out of total 8 input states,Output is 1 in a. 1 states b. 2 states

c. 3 states d. 4 states 73.In a 3 input NOR gate,the number of states in which output is 1 equals a. 1 b. 2 c. 3 d. 4 74.Which of these are universal gates a. only NOR b. only NAND c. both NOR and NAND d. NOT,AND,OR 75. In a 3 input NAND gate,the number of gates in which output in 1equals a.8 b.7 c.6 d..5 76. A XOR gate has inputs A and B and output Y.Then the output equation is a.Y=A+B b.Y=AB+AB c.AB+ AB d.AB+AB 77.A 14 pin NOT gate IC has..NOT gates a.8 b.6 c.5 d.4 78.A 14 pin AND gate IC has..AND gates a.8 b.6 c.4 d.2 79.The first contribution to logic was made by a. George Boole b. Copernicus c. Aristotle d. Shannon 80.Boolean Alzebra obeys a. commutative law b. associative law c. distributive law d. commutative, associative, distributive law

81. A+(B.C)= a. A.B+C b. A.B+A.C c. A d.(A+B).(A+C) 82.A.0= a. 1 b. A c. 0 d. A or 1 83.A+A.B= a. B b. A.B c. A d. A or B 84.Demorgans first theorem is a. A.A=0 b. A=A c. (A+B)=A.B d. (AB)=A+B 85. Demorgans second theorem is a. A.A=0 b. A=A c. (A+B)=A.B d. (AB)=A+B 86. Which of the following is true a. SOP is a two level logic b. POS is a two level logic c. both SOP and POS are two level logic d. Hybrid function is two level logic 87.The problem of logic race occurs in a. SOP functions b. Hybrod functions c. POS functions d. SOP and POS functions 88. In which function is each term known as min term a. SOP b. POS c. Hybrid d. both SOP and POS 89. In which function is each term known as max term a. SOP

b. POS c. Hybrid d. both SOP and Hybrid 90. In the expression A+BC, the total number of min terms will be a.2 b. 3 c.4 d. 5 91.The min term designation for ABCD is a.m0 b. m10 c. m14 d. m15 92. The function Y=AC+BD+EF is a. POS b. SOP c. Hybrid d. none of above 93. The expression Y=M(0,1,3,4) is a. POS b. SOP c. Hybrid d. none of above 94. AB+AB= a. B b. A c.1 d. 0 95. In a four variable Karnaugh map eight adjacent cells give a a. Two variable term b. single variable term c. Three variable term d. four variable term 96.A karnaugh map with 4 variables has a. 2 cells b. 4 cells c. 8 cells d.16 cells 97.In a karnaugh map for an expression having dont care terms the dont cares can be treated as a. 0

b. 1 c. 1 or 0 d. none of above 98. The term VLSI generally refers to a digital IC having a. more than 1000 gates b. more than 100 gates c. more than 1000 but less than 9999 gates d. more than 100 but less than 999 gates 99.Typical size of an IC is about a.1*1 b. 2*2 c. 0.1*0.1 d. 0.0001*0.0001 100.A digital clock uses..chip a. SSI b. LSI c. VLSI d. MSI 101. Digital technologies being used now-a-days are a. DTL and EMOS b. TTL, ECL, CMOS and RTL c. TTL, ECL and CMOS d. TTL, ECL, CMOS and DTL 102. A TTL circuit with totem pole output has a. high output impedance b. low output impedance c. very high output impedance d. any of above 103. TTL uses a. multi emitter transistors b. multi collector transistors c. multi base transistors d. multi emitter or collector transistors 104. Advanced schottky is a part of a. ECL family b. CMOS family c. TTL family d. none of above 105. For wired AND connection we should use a. TTL gates with active pull up b. TTL gates with open collector c. TTL gates without active pull up and with open collector

d. any of above 106. Time delay of a TTL family is about a. 180ns b. 50ns c. 18ns d. 3 ns 107. As compared to TTL, ECL has a. lower power dissipation b. lower propagation delay c. higher propagation delay d. higher noise margin 108. As compared to TTL, CMOS logic has a. higher speed of operation b. higher power dissipation c. smaller physical size d. all of above 109. 74HCT00 series is a.NAND IC b. interface between TTL and CMOS c. inverting IC d. NOR IC 110.CD 4010 is a a. inverting buffer b. non inverting hex buffer c. NOR IC d. NAND IC 111. Current requirement of a piezo buffer is about a. 100mA b. 20mA c. 4 mA d. 0.4 mA 112. TSL inverter has a. one input b. two inputs c. one or two inputs d. three inputs 113. Parallel adder is a. sequential circuits b. combinational circuits c. either sequential or combinational circuits d. none of above

114. The inputs to a 3 bit binary adder are 1112 and 1102. The output will be a.101 b.1101 c.1111 d.1110 115. A half adder can be used only for adding a. 1s b. 2s c. 4s d. 8s 116. A 3 bit binary adder should be a. 3 full adders b. 2 full adders and 1 half adder c. 1 full adder and 2 half adder d. 3 half adders 117. when two 4 bit parallel adders are cascaded we get a. 4 bit parallel adder b. 8 bit parallel adder c. 16 bit parallel adder d. none of above 118. The widely used binary multiplication method is a. repeated addition b. add and shift c. shift and add d. any of above 119.When microprocessor processes both positive and negative numbers, the representation used is a. 1s complement b. 2s complement c. signed binary d. any of above 120. Decimal -90 =.in 8 bit 2s complement a.1000 1000 b.1010 0110 c.1100 1100 d.0101 0101 121. In 2s complement addition, the carry generated in the last stage is a. added to LSB b. neglected c. added to bit next to MSB d. added to the bit next to LSB

122. The number of inputs and outputs in a full adder are a. 2 and 1 b. 2 and 2 c. 3 and 3 d. 3 and 2 123.In a 7 segment display the segments a,c,d,f,g are lit. The decimal number displayed will be a. 9 b. 5 c. 4 d. 2 124. In a 7 segment display the segments b and c are lit up. The decimal number displayed will be a. 9 b. 7 c. 3 d. 1 125 .A device which converts BCD to seven segments is called a. encoder b. decoder c. multiplexer d. none of these 126. Which device use the nematic fluid a. LED b. LCD c. VF display d. none of these 127. Which of these is the most recent device a. LED b. LCD c. VF display d. a and c 128. VF glows with . Colour when activated a. red b. orange c. bluish green d. none of these 129. Which display device resembles vacuum tube a. LED b. LCD c. VF

d. none of these 130.Which device changes parallel data to serial data a. decoder b. multiplexer c. demultiplexer d. flip flop 131.A 1 of 4 multiplexer requires data select line a. 1 b. 2 c. 3 d. 4 132. It is desired to route data from many registers to one register. The device needed is a. decoder b. multiplexer c. demultiplexer d. counter 133.Which device has one input and many outputs a. flip flop b. multiplexer c. demultiplexer d. counter 134.Two 16:1 and one 2:1 multiplexers can be connected to form a a. 16:1 multiplexer b. 32:1 multiplexer c. 64:1 multiplexer d. 8:1 multiplexer 135. A flip flop is a a. combinational circuit b. memory element c. arithmetic element d. memory or arithmetic 136. I n a D latch a. data bit D is fed to S input and D to R input b. data bit D is fed to R input and D to S input c. data bit D is fed to both R and S inputs d. data bit D is not fed to any input 137. I n a D latch a. a high D sets the latch and low D resets it b. a low D sets the latch and high D resets it c. race can occur d. none of above

138.In a positive edge triggered JK flip flop a. High J and High K produce inactive state b. Low J and High K produce inactive state c. High J and Low K produce inactive state d. Low J and Low K produce inactive state 139.In a positive edge triggered D flip flop a. D input is called direct set b.Preset is called direct reset c. present and clear are called direct set and reset respectively d. D input overrides other inputs 140. In a positive edge triggered JK flip flop J=1,K=0 and clock pulse is rising.Q will a. be 0 b. be 1 c. show no change d. toggle 141. For edge triggering in flip flops manufacturers use a. RC circuit b. direct coupled design c. either RC circuit or direct coupled design d. none of these 142. In a JK flip flop toggle means a. set Q=1 and Q=0 b. set Q=0 and Q=1 c. change the output to the opposite state d. no change in input 143. A mod 4 counter will count a. from 0 to 4 b. from 0 to 3 c. from any number n to n+4 d. none of above 144.A counter has N flip flops. The total number of states are a. N b. 2N c. 2N d. 4N 145.A counter has modulus of 10. The number of flip flops are a. 10 b. 5 c. 4 d. 3

146.In a ripple counter a. whenever a flip flop sets to 1,the next higher FF toggles b. whenever a flip flop sets to 0,the next higher FF remains unchanged c. whenever a flip flop sets to 1,the next higher FF faces race condition d. whenever a flip flop sets to 0,the next higher FF faces race cond 147.A counter has 4 flip flops.It divides the input frequency by a.4 b. 2 c. 8 d. 16 148. A decade counter skips a. binary states 1000 to 1111 b. binary states 0000 to 0011 c. binary states 1010 to 1111 d. binary states 1111 and higher 149.The number of flip flops needed for Mod 7 counter are a. 7 b. 5 c. 3 d. 1 150.A presettable counter with 4 flip flops start counting from a. 0000 b. 1000 c. any number from 0000 to 1111 d. any number from 0000 to 1000 151.A 4 bit down counter can count from a. 0000 to 1111 b. 1111 to 0000 c. 000 to 111 d. 111 to 000 152. A 3 bit up-down counter can count from a. 000 to 111 b. 111 to 000 c. 000 to 111 and also from 111 to 000 d. none of above 153.IC counters are a. synchronous only b. asynchronous only c. both synchronous and asynchronous d. none of above 154. Shifting digits from left to right and vice versa is needed in a. storing numbers b. arithmetic operations

c. counting d. storing and counting 155. The basic storage element in a digital system is a. flip flop b. counter c. multiplexer d. encoder 156. The simplest register is a. buffer register b. shift register c. controlled buffer register d. bidirectional register 157. The basic shift register operations are a. serial in serial out b. serial in parallel out c. parallel in serial out d. all of above 158. A universal shift register can shift a. from right to left b. from left to right c. both from right to left and left to right d. none of above 159. In a shift register, shifting a bit by one bit means a. division by 2 b. multiplication by 2 c. subtraction by 2 d. any of above 160. An 8 bit binary number is to be entered into an 8 bit serial shift register. The number of clock pulses required is a. 1 b. 2 c. 4 d. 8 LINEAR ELECTRONICS CIRCUITS QUESTION BANK

Multiple choice questions

1. A differential amplifier amplifies the ---------- between two input signals. a) addition b) subtraction c) multiplication 2. The differential amplifier can amplify ac as well as dc signals because it

employs ----------. a) b) 3. Noise of input signal in differential amplifier a) increases b) decreases c) remains the soul 4. Cascaded differential amplifier requires level translator because of d) impedance matching e) isolating each stage f) d.c.shift. 5. In case of constant current bias ,R1 is replaced by diodes D1 & D2 TO g) increase the input impedance h) improve thermal stability i) increase gain 6. If CMRR is high ,the wide variation of input within the tolerable limits of the equipment makes output j) high k) low l) the same 7. For a.c analysis of differential amplifier we use m) h-parameters n) r-parameters o) none of above 8. In all types of differential amplifier DC operating point p) is not equal q) is equal r) is dependent on application 9. A single supply operational amplifier is a) LM 318 b) MC 414 c) LM 324 10. The cascode amplifier is composed of direct coupled s) CE-CB configuration t) CC-CC configuration u) CC-CB configuration 11. Input bias current is always is ________. a) greater b) equal c) less than input offset current 12. If input frequency is exceed the slew rate the output will be________. a) distorted b) not distorted c) amplified 13. The operational amplifier can be nulled by _________.

a) using an offset voltage compensating network b) using an error minimizing resistance c) cutting off the power supplies 14. Open loop configuration of operational amplifier is not need for _________. a) linear operation b) nonlinear operation c) none of above 15. Slew rate is defined by________ a) dv/dt(max) b) di/dt(max c) none of the above 16. The slew rate has _______ a) positive temperature coefficient b) negative temperature coefficient c) none of the above 17. Operational amplifier offset voltage due to input bias circuit can be significantly reduced if we use a) offset compensatory network b) offset minimizing resistance 18. The standard supply voltage for an ordinary operational amplifier is _________ a) 15 volts b) 13 volts c) 12 volts 19. The input offset voltage _______ with negative feedback . a) increases b) decreases c) does not change 20. Specified value of CMRR for 741 opamp is ________. a) 30 dB b) 40 dB c) 90 dB 21. 741 opamp is a chip of type _________. a) industrial b) military c) commercial 22. voltage follower is a special case of __________. a) inverting configuration b) non-inverting configuration c) difference configuration 23. frequency response of differetiator is same as that of ______. a) high pass filter b) low pass filter c) band pass filter 24. frequency response of integrator is same as that of ______.

a) high pass filter b) low pass filter c) band pass filter 25. voltage shunt configuration is nothing but ________ a) inverting configuration b) non-inverting configuration c) difference configuration 26. voltage series configuration is nothing but ________ a) inverting configuration b) non-inverting configuration c) c) difference configuration 27. the type of feedback used for closed loop configuration is _______ a) positive feedback b) negative feedback c) none of the above 28. instrumentation amplifier is used to amplify the output of __________. a) speaker b) transducer 29. basic differentiator fails to work at ________. a) low frequency b) high frequency c) medium frequency 30. basic integrator fails to work at ________. a) low frequency b) high frequency c) medium frequency 31. In which of the following is an operational amplifier (op-amp) used? a) oscillators b) filters c) instrumentation circuits d) all of the above 32. What is the difference output voltage of any signals applied to the input terminals? a) the differential gain times the difference input voltage b) The common-mode gain times the common input voltage c) the sum of the differential gain times the difference input voltage and the common-mode gain times the common input voltage d) the difference of the differential gain times the difference input voltage and the common-mode gain times the common input voltage 33. What is the difference voltage if the inputs are an ideal inphase signal? a) the differential gain times twice the input signal b) the differential gain times the input signal c) the common-mode gain times twice the input

signal d) the common-mode gain times the input signal 34. The larger the value of CMRR, the closer the output voltage is to the difference input times the difference gain with the common-mode signal being rejected a) True b) False 35. What is the voltage gain of the unity follower? a) 0 b) 1 c) 1 d) infinity 36. What is the scale multiplier (factor) of a basic integrator? a) R/C b) C/R c) RC d) 1/RC 37. Which of the following is (are) the result of gain reduction by a feedback? a) The amplifier voltage gain is a more stable and precise value. b) The input impedance of the circuit is increased over that of the op-amp alone. c) The output impedance is reduced over that of the opamp alone. d) all of the above 38. third order Butterworth low pass filter has upper cut off frequency of 1KHz.The gain of the filter drops by -------- if frequency is increased to 2KHz. a) 6db b) 18 db c) 20 db d) 60 db. 39. For an Op-amp based wien Bridge Oscillator , if the oscillations stops after a few cycles, then the cause is ---------------. a) the amplifier gain is too high. b) The loop gain is less than 1. c) The loop gai is equal to 1. d) The loop gain is greater than 1. OBJECTIVE QUESTIONS 1. What are the Four types of differential amplifiers ? 2. What is the figure of merit of a differential amplifier? 3. What is the swamping resistor in differential amplifier? 4. The transfer curve of opamp is the graph of ________ versus differential input voltage.

5. Input impedance of DIBO-DA is________. 6). The gain reduces in case of ________ feedback. 7)The distortion increases in case of _______ feedback. 8. The specified value for slew rate of 741 opamp is ______. 9) The specified value for open loop gain of 741 opamp is ______. 10)The level translator is to shift _______ level down to ground. 11)For emitter coupled amplifier RE-> _, CMRR-> ----12)The second state of OP_AMP consists of dual input ------- output differential amplifier. 13)Differntial amplifier is ----------coupled amplifier As common mode gain decreases the value of CMRR ------------14)Current source is used as ----------element in amplifier 15)Biasing circuit provides ----------stabilization 16)Level shifter of op-amp should have ----------input impedance 17)Differntial amplifier is perfectly balanced if transistors are ----------18)Level shifter of op-amp shifts o/p dc level down to -----------19)CMRR is -----------proportional to RE 20)Offset voltage compensating network is connected in between pin number ----&----- of OPAMP 21)Output stage of opamp provides ------ o/p resistance 22)1DC voltage is well above the ground potential due to ------coupling. 23)To overcome noise problem in level shifter ------- is used 24)O/p DC level is always -------- than input dc level 25) When same voltage is applied to both the terminals of differential amplifier, it is said to operate in ------------ configuration. 26) Summing amplifier can be converted into summer by takin all the resistors of ___ equal value. 27)The gain of voltage follower is ____. 28) Photodiode is an example of _______to________ converter. 29) ______ to_______ has application in tansmission lines. 30) The input resistance of NI configuration is given by ________-. 31)Average rate of change of offset voltage per unit time is called as --32)OPAMP has standard slew rate of --------33)CMRR has standard value for 741 IC as ---------34)UGB mean gain of opamp at a frequency ----------35)Maximum rate of change of o/p voltage is ----36)Ideal OPAMP has ------ voltage gain 37)For ideal opamp when i/p voltage is zero then o/p voltage is ---38)The ideal value of SVRR for 741 opamp is -----------39)Algebric difference between two i/p currents of OPAMP is ----------

40).Input two-voltage range of for 741 IC is -------------41).The average of two-i/p bias current is called as ----------42)For DIP package of Operational amplifier DIP means ----------43)The input bias current value for 741IC is -------44)The input offset current value for 741IC is ------45)This is the last stage of OPAMP -----------------46)The circuit in which output current is forced to equal input current is said to be a -----47)What are the different types of adder circuit? 48)What do you mean by scalar adder? 49) Which type of frequency responce of integrator? 50) Which type of frequency response of differentiator? 51) What is difference between practical integrator and ideal integrator? 52)What is difference between practical differentiator and ideal differentiator? 53)What do you mean by average adder? 54)Draw the circuit diagram of subtractor 55) What is importance stability resistor? 56) What is importance of capacitor in integrator? 57) What is importance of resistor in differentiator? 58) What is the effect of noise integartig circuit? 59) What is the effect of noise differentiator circuit? 60)What are the application of integrating circuit? 61)What are the application of differentiating circuit? 62) which type of filter we get from integrator and differentiator 63)What are different application of adder circuit 64)What are different application of buffer circuit 65)What do you mean by quality factor? 66) What is the range of quality factor for band reject filter? 67)What is the range of quality factor for band pass filter? 68) What do you mean by order of filter? 69)What do you mean by roll over frequency? 70)What is the importance of higher order filter? 71) What do you mean by cut-off frequency? 72)Is it possible to design band pass filter by using one high pass and one low pass filter? 73)What is difference between active filters and passive filters? 74) What is difference between analog filters and digital filters? 75) Which filters are more useful analog or digital? 76) What are the disadvantages of analog filters? 77) What are the different steps for the designing of low pass filters? 78) What are the different steps for the designing of high pass filters? 79) What is the importance of major and minor lobes in filter response?

80)What happened if order of filter is not increased? 81)What are different application of low pass filter circuit 82)What are different application of high pass filter circuit 83) Define Oscillator &Explain Barkhausain criteria for oscillations ? 84) What are the advantages of Active filter over passive one ? 85) What is Butter worth Response? 86) What are the advantages of Higher order filters? 87) List the most commonly used filters? 88) What is an all pass filter ? Where and why it is needed? 89) How are the Oscillators Classified? 90). What is the difference between comparator & Schmitt trigger ? 91) Define Resolution, settling time, Conversion time for D/A Converter? 92) What is comparator? 93) What is Voltage limiting & why it is needed? 94) What is the difference between Clippers & Clampers? 95) What is Sample & hold Circuit? Why it is needed? 96) What is the basic difference between comparator & Schmitt trigger? 97) What is a Multiviberator circuit? 98) What is Phase Locked Loop? 100) What is the major difference between Analog & digital PLL? 101)List the applications of PLL? 102)What are the two basic modes of operation of IC 555? 103)List important features of IC 555? 104) What is a Regulator? List four different types of Regulators? 105)What is Switching Regulators? Network Filters Transmission Lines 1. Pick up wrong statement (a) A group of interconnected individual components known as circuit elements is called a network. (b) A humped network is an arrangement of physically separate resistors, inductors and capacitors. (c) Distributed network is one, which the resistive, inductive and capacitive effects are inseparable for network analyses. (d) A branch is a network having four elements. 2. Kirchoff's laws for networks are: (a) The algebraic sum of branch currents meeting at any node is zero.

(b) The algebric sum of voltage drops in any set of branches forming a closed circuit or loop must be equal to zero. (c) Both (a) and (b) (d) Neither (a) and (b) 3. Mutually coupled circuit is a circuit which is: (a) Bilateral (b) Unilateral (c) None of these (d) Either (a) or (b) 4. Duality is a (a) Transformation in which current and voltages are interchanged (b) Active sources become passive sources (c) Passive sources become active sources (d) Both (b) and (c) 5. Combined inductance of two inductors L1 and L2 connected and voltages are interchanged (a) L1 + L2 (b) (L1 + L2)/ L1 (c) (L1 + L2) / (L1 X L2) (d) (L1 X L2) / (L1 + L2) 6. Normal analysis techniques are based on (a) Thevenin's theorem (b) Tellegan's theorem (c) Superposition theorem (d) Kirchoff's Law 7. Two voltage sources can be connected in parallel when they are equal in

(a) Magnitude (b) Frequency (c) Phase (d) All the above 8. The kirchoff's law fail in (a) Linear circuits (b) Non-linear circuits (c) Lumped parameter circuits (d) Distributed parameter circuits 9. Which of the following is a nonreciprocal network ? (a) A network consisting of all resistances (b) A network consisting of all capacitances (c) A network consisting of all inductances (d) A transistor model 10. When two systems obey equations of the same form the systems are said to be (a) Similar system (b) Identical system (c) Analogous system (d) Digital system 11. For a highly selective circuit (a) It must have large value of Q (b) It must have high value of capacitance to produce resonance at fixed frequency (c) Either (a) or (b) (d) Neither (a) nor (b)

12. A network consisting of four terminals is called a (a) One port network (b) Two port network (c) Four port network (d) None of the above 13. Driving point of a network is (a) A port where voltage or current source is connected (b) A terminal where load is connected (c) A port where load is connected (d) None of the above 14. Ceramic filters are similar in construction to (a) Crystal filters (b) Crystal ladder filters (c) Crystal lattice (d) Mechanical filters 15. When two port networks are connected in parallel the resultant (a) Z parameters are the some of individual parameters (b) Y- parameters are the some of individual parameters (c) Both (a) and (b) (d) Neither (a) nor (b) 16. Electric wave filters (a) Allow electric signals with specified frequency range (b) Suppress signals outside a specified range (c) Both (a) and (b) occurs simultaneously (d) Either (a) or (b) occur at a time

17. A cascade connection of low pass filter and high pass filter is called (a) Band pass filter (b) Band elimination filter (c) Neither (a) nor (b) (d) Both (a) and (b) 18. The response of a network is decided by the location of (a) Its poles (b) Its zeros (c) Either (a) nor (b) (d) Both (a) and (b) 19. Example of two port network is (a) Transformer (b) Transmission line (c) Bridge circuit and transistor circuit (d) All of the above 20. The circuit whose properties are same in either direction is called (a) Universal circuit (b) Reversible circuit (c) Unilateral circuit (d) Bilateral circuit 21. Distortion in transmission line is due to (a) Delay distortion (b) Phase distortion (c) Frequency distortion (d) All the above

22. The general parameters distributed along a transmission line are (a) R&L only (b) L&C only (c) C&G only (d) R, L, C&G 23. Phase distortion is prominently caused by (a) circuit transients (b) non linear characteristics (c) linearity (d) none 24. The voltage or current from the receiving end towards the sending end, decreasing in amplitude with increasing distance from the load is called (a) incident wave (b) medium wave (c) reflected wave (d) none of above 25. E.M. Waves of UHF is propagated efficiently via (a) parallel wire transmission lines (b) open wire transmission lines (c) wave guides (d) coaxial cables 26. Norton theorem is valid for network containing only (a) linear elements (b) no linear elements (c) resistance

(d) reactance 27. The maximum power is absorbed by one network from other, joined to it at two terminals when the impedance of one is (a) complex conjugate of other (b) square root of other (c) same as other (d) none of above 28. The decrease in effective conductor cross section at high frequencies (a) decrease the conductor resistance (b) increase the conductor resistance (c) no change in conductor resistance (d) none of above 29. Voltage standing wave ratio lies in the range (a) 0 to 1 (b) 1 to infinity (c) 0 to infinity (d) -1 to +1 30. Attenuators have applications (a) in AC circuits only (b) in DC circuits only (c) in AC as well DC circuits (d) in low frequency circuits only 31. In an network (a) the number of tree branches is equal to the number of links (b) the number of tree branches cannot be equal to the number of links

(c) the number of tree branches has no relation with the number of links branches (d) none of these 32. In open line transmission systems, attenuation is more at (a) lower frequencies (b) medium frequencies (c) higher frequencies (d) remains constant 33. a power ratio 100 is equivalent to (a) 10 dB (b) 20 dB (c) 50 dB (d) 100 dB 34. The velocity factor for small widely spaced conductors such as open wire line in air is very nearly (a) 0.66 (b) 0.98 (c) 0.82 (d) 0.76 35. Transmission of power to a load over a transmission line achieves optimum value when standing wave ratio (SWR) becomes (a) 2 : 1 (b) 1 : 2 (c) 1 : 1 (d) 1 : 10 36. The VSWR in a short circuited loss less transmission line equals

(a) infinity (b) unity (c) zero (d) none of above 37. The velocity factor of a transmission line (a) is always greater than unity (b) depend upon the permittivity of the surrounding medium (c) is lease for air medium (d) is governed by skin effect 38. Which of the following is not correct (a) voltage source is an active element (b) current source is a passive element (c) resistance is a passive element (d) conductance is a passive element 39. A network is said to be nonlinear if it does not satisfy (a) superposition condition (b) homogeneity condition (c) both superposition and homogeneity conditions (d) associative condition 40. An capacitor with zero initial condition at t = 0+ act as a (a) short circuit (b) open circuit (c) current source (d) voltage source 41. An inductor stores energy in

(a) electrostatic field (b) electromagnetic field (c) magnetic field (d) core 42. In series LCR circuits, at resonance, (a) current is maximum, power factor is zero (b) current is maximum, power factor is unity (c) current is minimum, power factor is unity (d) none of above 43. In an RCL series circuit, during resonance, the impedance will be (a) zero (b) minimum (c) maximum (d) none of above 44. When a source is delivering maximum power to load, the efficiency of the circuit is always (a) 50% (b) 75% (c) 100% 45. In a linear network, when the ac input is doubled, the ac output becomes (a) two times (b) four times (c) half (d) one forth 46. A passive network has

(a) current sources but no voltage sources (b) voltage sources but no current sources (c) both current and voltage sources (d) no voltage or current sources 47. Two resistances are connected in parallel and each dissipates 50 waits. The total power supplied by the source is (a) 25 watts (b) 50 watts (c) 100 watts (d) 200 watts 48. Three bulbs of 60 watts each are connected is parallel across 220v, 50 Hz supply. If one bulb burns out (a) only remaining two will operate (b) remaining two will not operate (c) all of three will operate (d) there will be heavy current from the supply 49. The amplitude of an audio signal is 10 and that of carrier wave is 50. Percentage modulation is: (a) 0.2 (b) 20 (c) 5 (d) 60 50. The main advantage of PCM system is: (a) lower bandwidth (b) lower power (c) lower noise