Edp 70

EDP70 UNINTERRUPTIBLE POWER SYSTEM TECHNICAL HANDBOOK
The copyright of this handbook is the property of Chloride Power Electronics Limited. The information contained herein may not be copied, communicated to a third person nor stored in a data retrieval system without agreement in writing from Chloride Power Electronics Limited. In pursuing a policy of continuous product development we reserve the right to vary product design, specification or components without prior notice. Whilst every effort has been made to ensure the accuracy of the information in this handbook, Chloride Group PLC cannot be made liable for any errors, incidental or consequential damages.
This manual includes: the description of the software used up to FSB = 29 and the one used from FSB = 30
CHLORIDE
SILECTRON
Via Umbria, 6 I 40060 Osteria Grande BO ITALY Tel. (++39) (+51) 6959111 Fax. (++39) (+51) 945634
TECHNICAL MANUAL
PART NUMBER
10B52041PT1C rev. 5
EDP70 Technical Manual MI92/10015 Ed. 5 05/97
page 1 of 163
CONTENTS
1 SAFETY
1.1 General 1.2 Electric shock 1.3 Safety warning
MAINTENANCE PROCEDURES
2.1 Tools & Test equipment 2.2 Procedures 2.3 Fuse blowing 2.4 Fans replacement
POWER ASSEMBLY DESCRIPTION

3.1 Input choke / Input autotransformer 3.2 Rectifier Assembly 3.3 DC choke 3.4 DC capacitor 3.5 Inverter Assembly 3.6 Static Switch Assembly 3.7 Display pcb Assembly
CONTROL LOGIC DESCRIPTIONS

4.1 Rectifier control pcb 4.2 Inverter pcb 4.3 Static Switch pcb 4.4 Display pcb 4.5 Interface pcb 4.6 Base drive pcb 4.7 S.M.P.S. PCB
page 2 of 162
5a
SOFTWARE FUNCTIONAL DESCRIPTION (for UPS having FSB status < 30)
5a.1 General 5a.2 Accessing information 5a.3 Measurements 5a.4 Alarm Message and digital output 5a.5 Buzzer 5a.6 LEDs 5a.7 Inverter Stop/Start 5a.8 RAU & AS400 outputs 5a.9 POWER HISTORY 5a.10 Battery autonomy 5a.11 RS232 port 5a.12 Inverter Voltage control 5a.13 Display Board trip settings 5a.14 DIL Switch settings
page 3 of 163
5b. SOFTWARE FUNCTIONAL DESCRIPTION (for UPS having FSB status > = 30)
5b.1 5b.2 5b.3 5b.4 5b.5 5b.6 5b.7 5b.8 5b.9 5b.10 5b.11 5b.12 5b.13 5b.14 5b.15 5b.16 GENERAL ACCESSING INFORMATION MEASUREMENTS ALARM MESSAGE AND DIGITAL OUTPUT BUZZER LEDS INVERTER STOP/START DATA STORAGE METHOD DESCRIPTION RECTIFIER STARTUP CONTROL RAU & AS400 OUTPUTS POWER HISTORY BATTERY AUTONOMY RS232 PORT INVERTER VOLTAGE CONTROL DISPLAY BOARD TRIP SETTINGS DIL SWITCH SETTINGS
6. TROUBLE SHOOTING
6.1 TROUBLE SHOOTING (for UPS having FSB status < 30) 6.2 TROUBLE SHOOTING (for UPS having FSB status > = 30)
MAINTENANCE
7.1 Periodical maintenance 7.2 Float voltage settings
CIRCUIT DIAGRAMS
page 4 of 162
Chap 1 = SAFETY 1 SAFETY

1.1 General
The interior of an EDP70 cubicle, when it is installed has hazardous AC and DC voltages on exposed terminals and printed circuit boards, even when all the switches are OFF. The control logic, which is traditionally supplied by low voltage, has low power part of this type of equipment powered by 5V and +12V logic power supplies which are referenced to potentials other than earth zero volts so that high voltages with respect to earth exist on some circuit boards in the equipment. With all supplies isolated the battery (288V or 396V DC) is still live and appropriate precautions must be taken.
1.2 Electric Shock

Switch off the supply or use dry insulating material to protect yourself while pulling the casualty clear of any conductor.
DO NOT TOUCH THE CASUALTY WITH YOUR BARE HANDS UNTIL HE IS CLEAR OF ANY CONDUCTOR. SEND IMMEDIATELY FOR TRAINED, QUALIFIED HELP.
page 5 of 163
Chap 1 = SAFETY
1.3 Safety Warning
1) If either the AC supply or the batteries are connected, do not remove the access covers unless you have undergone a Chloride approved training course. 2) Arrange safety cover. Ensure somebody is available to isolate the electricity supply if necessary. 3) Stand on an approved rubber insulating mat when working on the equipment. WARNING ! : Some rubber mats contain a carbon based pigment and are not suitable! 4) Remove watches, rings earrings and other metal jewellers and any loose metal pens, tools or metal objects from pockets before working on the equipment. 5) Do not touch printed circuit boards, except in Bypass mode. High voltages exist, there is an electric shock hazard. 6) Use only insulated tools. 7) Batteries contain ACID, which is poisonous and corrosive. It can cause burns on contact with skin and eyes. If acid is spilt on clothes or gets into eyes, wash well with plenty of clean water. Batteries can give off EXPLOSIVE gases. Keep sparks, flames and lighted cigarettes away.
Batteries are ELECTRICALLY LIVE at all times.

Even if the case is damaged they are still capable of supplying high short circuit currents.
IN ALL CASES SEEK IMMEDIATE MEDICAL ATTENTION!
page 6 of 162
Chap 2 = MAINTENANCE PROCEDURES
MAINTENANCE PROCEDURES
2.1 Tools and Test Equipment
In addition to the usual hand tools, the following equipment is needed: 1) Oscilloscope. Dual beam, at least 15MHz band width. This should be a fully floating earth type because it will be used to measure signals with reference to potentials other than earth. 2) Digital multimeter. This must be accurately calibrated. 3) A fused inline wire link with adaptor. 4) Protective insertion and removal tools for handling CMOS integrated circuits which are susceptible damage from incorrect handling.
2.2 Procedures
When troubleshooting in this equipment remember that high voltages exist on printed circuit boards and on exposed terminals. Therefore do not touch any component until you have checked it is safe. When monitoring test points, always switch to BYPASS mode to fit the probe or meter, then switch to an operating mode to make the observation. Finally return to BYPASS to remove the measuring instrument. This will avoid inadvertent fuse blowing from spurious signals.
page 7 of 163
2.3 Fuse Blowing

NOTE ! The machines are equipped by circuit breakers only. No fuses are fitted as reliance is placed on the installation.
1) Switch to bypass mode. Wait 3 minutes. 2) Check all the switches, excepted ByPass, are OFF, and remove the battery fuse. 3) Use a multimeter to check all the power components in the inverter including snubbers, power transformer and filter circuits (refer to section 3 of manual). 4) When power components are verified, disconnect base drive (plugs PL1013) 5) Turn on main switch. Verify DC rail voltage, and that the control and drive logic is working correctly (refer to section 5 of manual). 6) Switch off main switch. Wait 3 minutes. 7) Refit battery fuse F2 and base drive connectors. If F2 was faulty replace it. 8) Start up the equipment.
page 8 of 162
2.4 Fans replacement Procedure for fans replacement on UPS ratings 30 or 40 kVA
Driver board
holes for Driver board
Fan support fixings screw
1 Remove the Driver following the arrow 2 Unscrew the fans support screw 3 Remove the fan following the arrow
page 9 of 163
Chap 3 = POWER ASSEMBLY DESCRIPTION
POWER ASSEMBLY DESCRIPTION

The UPS described here is a machine which guarantees uninterrupted power supply to the load both with or without the primary supply voltage, even when handling the most rigorous and sophisticated load. Therefore this system is used as an interface between the mains supply and users requiring an uninterrupted energy source. The UPS, is made up of the following functional subsets:
page 10 of 162
BATTERY CHARGERRECTIFIER
The rectifier converts the mains ac voltage into DC voltage in order to feed the inverter and the battery.
INVERTER
The inverter transforms the DC voltage supplied by the rectifier, or the battery into ac voltage for feeding the load.
STATIC CHANGEOVER SWITCH UNIT

The static changeover switch transfers the power supply to the load, without any loss of continuity, from the inverter to the reserve supply and viceversa every time the power supply characteristics stray beyond the tolerances accepted by the load. Essentially, the static changeover switch is composed of: a) an inverter static switch comprising 3 pairs of thyristors connected in antiparallel in the inverter output. b) a reserve static switch comprising 3 pairs of thyristors connected in antiparallel in the reserve line. c) Logic control and command which carries out the following functions: driving the thyristors of one of the static switches, according to the logic described below. checking the reserve and inhibiting the reserve static switch if the latter strays beyond the parameters permitted by the load. checking the inverter output, ordering the load to be transferred onto the reserve network when the latter is beyond the parameters permitted by the load, or when the current required by the load persists in exceeding the maximum value permitted by the inverter. Under normal working conditions the static changeover switch supplies the load from inverter output (privileged power source). If an anomaly occurs, fast sensors order the load to be switched over to reserve, if this is necessary. A short circuit in the output of the unit automatically causes the load to be switched over to reserve; if the latter is not available, or is unsuitable. the unit protects itself and guarantees correct supply to the load only if the short circuit is eliminated by fuses of a size sufficient to effect correct selection of the protection systems.
page 11 of 163
Power Assembly description:

The EDP70 comprises the following main assemblies: 1) Input Choke / Input Autotransformer 2) Rectifier Module 3) DC Choke 4) DC Smoothing Capacitors 5) Inverter Module, Inverter Transformer AC choke (not needed if integrated magnetics fitted.), Filter Capacitor 6) Static Switch Module 7) Display Module L2 CE L1 / AT1
T2,
C2
3.1 Input Choke / Input Autotransformer

These devices make a separation of the main supply from the distortion generated by the rectifier. The autotransformer, fitted on the rating up to 20kVA only, adapts the voltage level.
page 12 of 162
3.2 Rectifier Assembly

In a three phase system the rectifier is a fullwave phase controlled bridge utilizing 6 thyristors. This assembly converts the AC power into voltage regulated DC power. Regulation is accomplished by controlling the conduction angle of the thyristors. This function is controlled by the rectifier control board which samples the actual DC output via an isolation amplifier on the interface pcb, compares it with a reference to determine the error and adjusts the duration of the thyristor ON periods to attain the correct DC voltage. The battery current is sensed by a hall effect current transformer. This is used to limit battery current and monitors discharge. Rectifier control board (See also section 4.1), also produces the gate drive pulse via the interface pcb to turn on the 6 thyristors.
3.3 DC Choke
The choke L2, fitted on the rating up to 20kVA only, in conjunction with capacitor CE forms a lowpass filter circuit. On the ratings above 20kVA this is done by the AC choke L1. This provides the voltage smoothing and current ripple reduction on the DC supply which is necessary to ensure correct operation of the inverter. The current to the battery is smoothed again by the saturable choke L3, assuring then a trouble free battery charging.
3.4 DC Capacitor
A bank of electrolytic capacitors CE in conjunction with the DC choke form a filter as above described. Resistors in the inverter bridge are fitted across the bank to ensure safe discharge of these capacitors when the UPS is OFF (allow 3 minutes for discharge).
page 13 of 163
3.5 Inverter Assembly

The power AC waveform is constructed by pulsing chopped DC through the primary of transformer T2. The induced waveform in the secondary is an AC voltage at the inverter frequency 50 or 60Hz but superimposed on top of this are AC voltages at higher frequencies, giving a slight ripple. This ripple is attenuated by C2. The chopped DC waveform is generated using pulse width modulation. The sample of inverter output is compared with a synthesized waveform. An error amplifier closes the loop giving a full servo controlled system. The chopping frequency across the primary is 64 times the output frequency. i.e 50 x 64 = 3200Hz (for 50Hz output). Six power darlington transistors are configured around the primary winding of the inverter transformer in such a way that the current DC bus may be pulsed through the inverter primary in either direction by turning on the appropriate pair of these solid state switches. Each switch is turned on by current applied to the bases. Rapid turn off is ensured by the control logic negatively biasing both bases to drain away the charge stored in the transistor junction. The inverter pcb generates the inverter drive signals and the signals to levels suitable for driving power transistors. A switch mode power supply is used to derive a regulated logic power supply from the DC bus. This allows the inverter to be started whenever the DC bus is live without needing the rectifier to be on (during a power failure for instance).
3.6 Static Switch Assembly

The static switch is a makebeforebreak changeover switch which has no moving parts. It uses thyristors as the power switching elements, triggering by signals from the static switch control board. The control logic is configured such that normally it connects the inverter to load but in the event of an overload or malfunction, it can transfer the load to the reserve supply without interruption. In order to avoid phase jumps or reversals the inverter is synchronized and phase locked to the reserve.
3.7 Display Assembly

This assembly drives the front panel displays, the audible alarm remote alarm unit, RS232 and AS400 alarm interfaces. This pcb also monitors the state of the system, performs some control, logic and display functions.
page 14 of 162
Para 4.1 = Rectifier Control Pcb
CONTROL LOGIC DESCRIPTIONS

4.1 Rectifier Control Pcb
Refer to circuit diagram 04.11.240 become 15C90073 This circuit converts a 3 phase input supply to a stabilized D.C. rail. Achieved using a 6 pulse controlled rectifier.
Power Circuit:
The threephase AC main, through a high reactance star connected autotransformer or an AC choke, supplies a fully controlled 3 phase thyristor rectifier. The DC filter choke and the integrated AC chokes have been optimized to reduce harmonic distortion of the input current waveform. Isolated current feedback is derived from a hall effect current sensor in the battery lead. Voltage feedback is derived via impedance buffer amplifiers assuring electrical isolation > 300 k.
Control Circuit: The main functions of the control circuit are:

Provide firing pulses for the thyristor bridge giving a regulated DC rail, Battery current limited to values from 1.5 to 30A (selectable) Firing pulses inhibited under the following conditions: REMOTE SHUTDOWN facility activated, INCORRECT connection of input supply (PHASE ROTATION error), PHASE FAIL. Battery test facility, reducing the rectifier output voltage by 20%, Soft start ensures D.C. rail ramps up over a period of 10 seconds.
page 15 of 163
Para 4.1 = Rectifier Control Pcb Power Supply:

This is derived from the primary of the main three phase autotransformer via T6, T7 and T9 (mounted on the Transformers board and connected in star configuration). The transformer secondaries are fed into a full wave rectifier circuit formed by diodes D4 to D9. This provides an unregulated DC rail smoothed by C4. REG1 is a 5V regulator used to power all subsequent circuits. C5 decouples the output of REG1.
Firing Angle Generation:

The 3 phase input sample is taken from the secondaries of T6, T7 and T9 (mounted on the Transformers board) attenuated and put on a 2.45V level. The reduced signals are fed into 3 crossing detectors (IC1a, b & c), each detector compares two of the waveforms. The outputs of each of these is a square wave corresponding to the cross over of two of the phases (See Fig 1). The phase crossing square waves are then applied to 3 EXOR gates (IC 6), again each gate compares two of the signals. The resultant pulses correspond to the required firing ranges. The EXOR gates have open collector outputs which when activated provide a discharge path for a 100nF capacitor (C6, C7 & C8). With output deactivated the capacitor is allowed to charge through a 100K resistor (R35, R38 & R45). The time constant of the RC is much greater than the firing range pulse thus a ramp generator is formed. Ramp signals are fed into a further three comparators (IC2 a, b, c) together with a common demand signal resulting in an output pulse with width proportional to the demand signal and in the correct time slot. These pulses are fed into a custom logic array which steers them to the appropriate gate drive circuit. Figure 2 shows some of the outputs for firing angle less than 60 degrees. Figure 3 shows the outputs for a firing angle greater than 60 degrees. The isolated gate drive circuits are positioned on the interface board. At the heart of these circuits are optically isolated triacs. Resistors R59 to R64 set the drive current for the optotriacs to 10mA.
page 16 of 162

R Y B
Line to neutral Voltages
R>Y Zero Crossing Y>B Detectors B>R
R>Y XOR B>R
Firing
Y>B XOR R>Y
Ranges
B>R XOR Y>B
R OPs from Y Ramp Generators B
Voltage Demand
Firing Pulses for B input of Logic Array Fig. 1 Timing Diagram for Firing Angle Control
page 17 of 163

R Y B
Firing Pulse for G2
G1 : Pin 19
G2 : Pin 18
Output of Logic Array

G3: Pin 17
G4: Pin 16
Fig. 2 Firing Pulses for firing angle less than 60
page 18 of 162

R Y B
Firing Pulse for G2
G1: Pin 19
Output of Logic Array
G2:pin 18
G3: Pin 17
G4: Pin 16
Fig. 3 Firing Pulses for firing angle greater than 60
page 19 of 163
Para 4.1 = Rectifier Control Pcb Voltage Control Loop:

Voltage feedback is via a high impedance buffer amplifier on the interface PCB. The voltage feedback signal is scaled to 2.2V at nominal output voltage, and fed into the noninverting input of IC3d configured as a frequency compensated error amplifier comparing the feedback signal with a reference set by VR1. An increase in the output reduces the DC rail voltage.
Soft Start:
This circuit ensures that at switch on the DC rail ramps up slowly over a period of approximately 10 seconds. The circuit, formed round IC3c acts as a virtual capacitor exhibiting an equivalent capacitance 100 times that of C3 at the junction of R14 and R15. At switch on the virtual capacitor charges through R15 to the 2.45V reference level which is buffered to the output of IC3 suppling the voltage reference pot VR1.
Battery Test:
To test the batteries the DC voltage is reduced by 20%. This test is initiated by the microprocessor controlled display driver PCB. Under test conditions PL6/12 is pulled low causing the output of IC4a to change state connecting R17 to 0v forming a potential divider with R26 which reduces the reference voltage seen by the virtual capacitor circuit. Charge is taken out of C3 reducing the voltage across VR1 and hence the reference to the voltage feedback amplifier. When PL6/12 is released R17 is switched out and the charge on C3 increases, the output voltage ramps up to the nominal level.
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Para 4.1 = Rectifier Control Pcb Current Limit:

This circuit, which is built around IC3b, limits the battery charge current to values from 1.5A to 30A, depending on the status of SW1 (see table on schematic diagram). Working like the battery test by reducing the charge on C3. IC3b forms a frequency compensated error amplifier. The noninverting input is connected to a reference. Currentfeedback signal is connected to the inverting input, if it is higher than the reference level the output of the amplifier goes low rapidly discharging the virtual capacitor circuit via D1 and R11. When the current limit is released the output voltage again ramps up slowly.
Trips and inhibit:

Pin 8 of the custom logic array is configured as an active low inhibit input, it is also connected via an inverter (IC6d) to the gate of FT1. With the inhibit line low, FT1 is switched on discharging C3 resetting the soft start. The inhibit line can be pulled low by any one of the following trips:
Rectifier Shutdown:
This operates when PL6/13 is pulled low, it is connected to a simple comparator circuit which switches low inhibiting the system. This function is controlled directly from: the display control board the Interface board (EPO, VDC HIGH, RESERVE HIGH/LOW).
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Para 4.1 = Rectifier Control Pcb Phase Fail/Rotation:

This circuit ensures that the 3 phase supply has been correctly wired or if there has been a phase failure. An unbalanced star load is connected across the supply sample (R48, R49, R50 and C8). Under normal conditions an AC signal appears at the star point of the load. This signal is rectified and smoothed by D10 and C10. The smoothed level is attenuated by R51 and R52 and fed into the noninverting input of comparator IC1d. The inverting input is connected to a 2.75 reference level. Under fault conditions the signal at the star point reduces causing the voltage at the noninverting of IC1d below 2.75V which switches the output low setting the inhibit line low via the rectifier shutdown comparator.
Temperature Compensation:
A temperature sensor (IC7) provides temperature compensation in the feedback loop. It is designed so that the output voltage of the system is reduced as the temperature rises. This ensures maximum battery life is achieved.
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Para 4.2 = Inverter Drive Board
4.2 Inverter Drive board

Refer to circuit diagram 15C70512
4.2.1 Frequency generation:

The frequency generator uses a crystal QZ1, and pins 9 and 12 of IC17. These together generate a frequency of 2.4576 MHz which is fed into IC17 pin 1 as a clock. The output of IC17 pin 16 is the clock frequency divided by 6 (or divided by 5 if SW1.2 is OFF). This frequency is 409.6kHz (419.52kHz) and is fed into the binary divider IC18. The output at TP5 is 50Hz (60Hz) and is fed back into IC17 as a stable 50Hz reference frequency which is used if the reserve supply is out of limits. If the reserve is healthy then the reserve zero crossing detector output is used as the frequency for the inverter. In either case, the selected waveform appears at IC17 pin 15. The selection is made depending on the condition of the reserve. If RES FAIL input is active (HIGH) then the 50Hz reference at IC17 pin 2 is used. Otherwise, the reserve zero crossing detector output at IC17 pin 5 is used. In a system where the static switch board is not fitted, opening SW1.1 forces the signal at IC17 pin 2 to be used as no reserve zero crossing detector circuit is present. The signal out of IC17 pin 15 is used as the frequency reference for the phaselockedloop (P.L.L.). The feedback for the P.L.L. comes from IC17 pin 14, which represents the actual frequency of the inverter. If the inverter voltage is not low and the reserve static switch board is present (SW1.1 ON) then this signal is taken from the inverter zero crossing detector output connected to PL4 pin 17. Otherwise it is taken from the 50Hz output of the divider chain on page 2 of the diagram. Using the outputs of both zero crossing detectors enables the phaselockedloop to compensate for phase shifts through the output filter. However, when the inverter output voltage is low, the zero crossing detector output may not be reliable and therefore the signal at IC17 pin 6 is used. IC17 pin 13 output is a fixed 2.4576MHz frequency reference which is used by the PWM generation circuit as a timing reference.
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Para 4.2 = Inverter Drive Board 4.2.2 Phased Locked Loop:

IC10, IC11 and IC13 form the phase locked loop. Its function is to ensure that the inverter output remains phase locked to the reserve at all times. It uses the reference and feedback signals from IC17 pin 15 and 14 respectively. Phase comparator 2 output (IC10 pin 13) goes active when the signals are not in phase as shown in Fig 4. At all other times PC2 output is tristate. While PC2 output is active, PCP output (IC10 pin 1) is low.
Typical waveforms for PLL using phase comparator 2, loop locked at fo

FIG 4 Signals PC2 and PCP are fed into IC19. The output of IC19 at pin 19 is the inverse of PC2 but with its active period limited to a maximum of 1/20 of the cycle period (at 50Hz). The inversion compensates for the inversion in the integrator which follows. By limiting the maximum active pulse to such a low value, all active pulses which occur while the system is not phase locked will be the same width. This and the integrator IC13 enable a linear frequency slew rate to be obtained. The integrator uses a capacitance multiplier circuit in its feedback loop. This allows non electrolytic type capacitors to be used.
page 24 of 162

The output of the integrator is a d.c. level which is fed into the input of the voltage controlled oscillator part of IC10 via a potential divider R96, R88. As the voltage level varies, the output frequency of the VCO at IC10 pin 4 varies accordingly. The rate of change of d.c. voltage, which determines the VCO slew rate, is set by the combination of R84 and equivalent capacitance of C47 and capacitance multiplier IC13. With H1 the frequency slew rate can be changed from 0.3 to 3 Hz/Sec. The VCO input at IC10 pin 9 is buffered and appears at pin 10 (TP4). A higher level at this point causes a higher operating frequency for the VCO. P7 sets the operating range for the VCO for 50Hz. Setting of P7 is obtained by switching SW1.1 OFF and adjusting P7 until the voltage at TP4 settles to approximately 2.5V d.c. w.r.t 0V. P8 sets the operating range for the VCO for 60Hz. Setting of P8 is obtained, after P7 setting, by switching SW1.1 OFF and adjusting P8 until the voltage at TP4 settles to approximately 2.5V d.c. w.r.t 0V. This can be done with the inverter ON or OFF. Reset SW1.1 as required.
4.2.3 Waveform generation:

The 1.6MHz generated by the phaselockedloop is fed into a series of four internally synchronous four stage counters IC14 and IC10. Each divide by 2 output is available giving a total of 15 frequencies from 1.6384MHz to 50Hz. From this, two 8 stage counters are derived. The first one from 409.6kHz to 3.2kHz is used to generate a 3.2kHz triangle wave. The other, from 6.4kHz to 50Hz, generates 3 phase shifted sinewaves. IC11 and IC16 form an 8 bit multiplexer selecting which of the counters become the address lines A0 A7 of the EPROM IC15. The data required to generate the triangular wave and three sinewaves are stored in the EPROM with each waveform occupying a block of 256 bytes. Address lines A8 and A9 determine which block of memory is to be accessed. IC12 is a four channel digital to analog converter. Channel 1 generates the triangular wave with an amplitude set by the voltage difference between pin 5 (REF A) and pin 6. This is a proportion of the d.c. voltage. Channel 2, 3 and 4 generate the three sinewaves. The positive peak voltage is set by the voltages at pins 4, 21 and 20 respectively (REF B, REF C, REF D). FT1 is switched ON when the inverter is switched OFF, charging C41 from 6.2V to 0V, through D11. When FT1 is switched OFF C41 discharges slowly (t = R63 ? C41), providing a soft start at the inverter output. The input at PL4 pin 14 is a variable d.c. level from the display board. This level and hence, the output voltage is changed by a switch selection on the display board.
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REF B, REF C and REF D are output of the average voltage and current control loops. There is control in d.c. for each phase. The amplitude of the three sinewaves is determined by the setting of P1, P2 and P3. Trimmer P4, for the current loop, is set at 150% of the output nominal current. IC9B monitors the overcurrent > 150% and generates a current limit alarm signal at PL4 pin 15. When the output current of any phase is > 150% nominal one of the three regulators intervenes to decrease the reference for the respective output phase. Voltage and current feedback are derived from the UPS output current and inverter voltage, which appear, rectified, at PL4 pin 7, 8 and 9 for the inverter voltage and PL4 pin 10, 11 and 12 for the output current. Trimmer P5 is utilized for the inverter manual operation. Outputs of the DAC are shifted and buffered, to produce reference sinewaves at TP8, TP9 and TP10 centered on 0V for the A.C. voltage control loop (page 5). This control operates on each phase. The trianglewave from IC12 on sheet 2, is filtered to produce a trianglewave of 8Vpp centered 0V (TP17). The control for one phase is schematically described by the following figure, where the P.D. regulator for the phase R shown on figure is done by IC23B, C83, R110, R116D, R119 and C139.
Each error signal (Verr) is compared to the trianglewave by the three comparators IC40A, IC40B and IC38A. The three PWM signals at IC40 pins 1 and 7 and at IC38 pin 1 are fed into PWM control chips IC26, IC27 and IC28 which generate dead time of 10.4Sec. (15.2Sec. if H2 is not fitted) and generate complementary outputs for a single input. IC15 and IC19 provide a current protection by switching off the PWM when the IPK is active. Signal INV OFF forces the outputs into tristate when the inverter is switched off. The PWM at TP11 to TP16 is fed into the DRIVER board through the transistors T4 to T9.
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The desaturation signals from the BASE DRIVE boards are filtered and fed into IC35. When one of these signals is active then the inverter will be stopped. The outputs of IC35 send these information to the display board. The overtemperature input at PL5 pins 1 and 2 comes from a normally closed thermostat. This signal stops the inverter and is then passed to the display board. If the inverter is stopped by a desaturation or overtemperature condition, then it is latched off by IC35. This can be reset by the INV RESET signal from the display board. The inverter can then be restarted with the inverter start signal. Peak current limit is derived from the transducers on the inverter currents. The IPK signal active switches OFF the PWM. The trimmer P9 provides the setting of the level of the peak current. The outputs IC47 pins 1 and 7, which are proportional to the DC component of the inverter current, are fed into comparators IC40, producing dynamic adjustment of the offset.
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page 28 of 162
Para 4.3 = STATIC SWITCH PCB
4.3 Static Switch pcb

Refer to circuit 04.13.170 become 15C90074
Inverter Zero Crossing Detector:

The inverter output waveform is sensed using a transformer that is on the Transformers pcb. IC13A buffers the inverter zero crossing detector from the transformer and raises the zero crossing center point to VREF1. IC16A is a comparator that gives a square wave output that is phase related to the inverter output. VR1 is used to adjust the phase of the ZCD to bring the inverter and reserve exactly in phase. The ZCD output is then fed to the PLL on the inverter pcb and also to the out of sync detector.
Reserve Zero Crossing Detector:

This is the same principle as the inverter ZCD using IC13B and IC168, except there is no phase adjustment.
Reserve High/Low Trips:

The output from IC13B is also used for the reserve high low trips. IC17A and B form a precision rectifier and therefore the output of IC17B is a full wave rectified reserve signal. This is then smoothed to give a DC proportional to the reserve voltage. IC15A and B form a window comparator, so if the reserve voltage exceeds the limits either NRVL or NRVH go low. The reserve trips are set up for 220V operation. For 230V, SW2.1 is closed, this reduces the DC voltage into the reserve low/high trip comparators. For 240V, SW2.2 is used. The trip levels can be adjusted using VR2. SW2.3 must be always OFF, and SW2.4 always ON.
Static Switch Failure:

A logic signal (UPS LOW), coming from Interface board, enters on PL7 pin 28. If for any reason the static switch fails and half or all the output waveform is lost, UPS LOW goes low, then IC14 pin 1 goes high and IC15 pin 13 (NSSF) goes low.
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Para 4.3 = STATIC SWITCH PCB 5V Power Supply:

The 5V power supply is fed from the interface pcb, there supplied by the reserve input and by the chopper. This is also backed up from the reserve power supply so that +5V is supplied to the control circuit even in the event of a power supply failure. C12 and ZD1 protect the ICs from any overvoltage. Two references are used for the static switch pcb: VREF1 is a reference for the sense signals and VREF2 for the comparators.
Clock Generation:
IC6A in conjunction with crystal XL1 forms the main clock at 2.4576Mhz. The clock frequency is then divided by either 5 or 6 depending on SW1.3. Thus the clock frequency (IC6 pin 17) also used for synchronizing the rest of the control logic, is shown on the following table: SW1.3 ON OFF UPS Frequency 50Hz 60Hz f on IC16 pin 17 409.6 kHz 491.5 kHz
Reserve Frequency Detector:

FRDT1, FRDT2 act in conjunction with a 4020 counter to form a frequency detection circuit that can be externally programmed for specific limits using SW1.7 and SW1.6. SW1.6 SW1.7 Frequency Tolerance ON ON 0.75 % ON OFF 1.5 % OFF ON 2.5 % OFF OFF 6.0 % FPA and FPB are used to derive the start and stop signals for the frequency detector. Whenever the zero crossing detector goes high, FPA is generated, this is immediately followed by FPB. FPB resets the external counter, that then free runs. The counter outputs are read when the following FPA occurs ( at the next zero crossing). The values read on the counter outputs means the reserve frequency. If FPA occurs outside the time window, then it increments a 3 bit counter S1 to S3. After 8 consecutive times, NRFOL goes low. If the frequency returns within limits before the counter reaches 8, it is immediately reset.
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Para 4.3 = STATIC SWITCH PCB Input Latches IC18:

This synchronizes the digital inputs to the control logic circuitry.
Out of Sync Detector:

The latched versions of the ZCD outputs, FRESL and FINVL are exclusive ORed together giving a pulse with an on time equal to the phase difference of the reserve and inverter (pin 12). On the leading edge of this pulse an internal counter is triggered and halted on the falling edge. If the counter reaches a preset number (Set by SW1.5 and SW1.4), then the reserve and inverter are considered to be out of synchronization. This signal then ORed with the reserve voltage low and reserve voltage high to give NOOS (active low) if any of these three are true.: SW1.4 SW1.5 PHASE TOLERANCE OFF OFF 5 degrees OFF ON 10 degrees ON OFF 15 degrees ON ON 20 degrees
Static Switch Logic:

The status of the static switches is determined by pin 15 NOUT of IC5, low = inverter to load. A transfer to reserve is instantaneous unless an out of synchronization is detected, in which case the transfer will have a 20mSec break to prevent large voltage differentials appearing across the static switches (transfers are limited to critical alarms only when NOOS is low). IC7 generates the out of sync transfer pulse. A retransfer to inverter is delayed by 5 seconds by IC8 to prevent multiple switching of the static switches under load fault conditions. In general all the inputs to IC5 (pins 2 to 9) must be high for the inverter to supply the load and System Normal to be on. If either of the reserve trips NRVOL or NRFOL are low, then the inverter static switch will feed the load irrespective of the status of the inverter trips. If the inverter is supplying the load and either NFAULT, NININVHI, NOL go low, then providing the reserve alarms are all healthy, NOUT will switch high transferring the load to reserve. Then the alarm that forced the transfer has cleared, the load will retransfer to inverter after a further 5 seconds. NOL is a combination of either IPEAK or OL (overload) alarms. If NOOS is low and a transfer is requested, a short pulse is generated at pin 18, NOOST, which triggers the 20mSec timer (IC7). The output of IC7 is fed into the gate drive logic IC where it inhibits the gate drive signal.
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Para 4.3 = STATIC SWITCH PCB Output Control:

IC6 pin 8 governs the status of the static switch. The static switch control can be overridden by SW1.1 and SW1.2 as shown on the following table: SW1.1 SW1.2 Static Switch Output OFF OFF normal operation ON OFF reserve OFF ON inverter ON ON reserve
Static Switch Failure Logic:

If a static switch failure occurs (NSSF = 0), this is used to set the latch (IC19A) high. IC19 o/p remains high until reset. Also the state of the static switch is registered by IC19B, thus IC19 pin 13 (I) = 1 for inverter static switch failed or 0 for reserve static switch failed. The outputs of the two latches are fed to SSF and I or IC6 which in turn locks the static switch to reserve or inverter using LKOU and R.I. The reserve static switch failure circuit is overridden in the case of a reserve fault and the inverter static switch circuit is overridden in the event of an inverter fault (IC10, SSFAIL). If the opposite static switch power input is out of limits, a transfer is not initiated under SSF conditions, but IC10 pin 13 is set low so that static switch failure indication is latched. If there was a transfer to reserve from inverter and it was under these circumstances that the reserve static switch failure was detected, then the timer IC8 is overridden by RSSF to IC8 pin 8 going low. This causes an immediate transfer back to inverter.
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Para 4.3 = STATIC SWITCH PCB Output Buffers:

The digital output control lines are buffered by IC11 and IC12. These have open collector outputs. RTL and ITL are used to drive opto couplers on the interface pcb for the static switch thyristor gate drives.
STATIC SWITCH TRIP SETTINGS:

Nominal Voltage Reserve voltage Low Reserve voltage low (reset) Reserve voltage high Reserve voltage high (reset) 380V 342V 365V 419V 405V 400V 358V 380V 438V 422V 415V 374V 396V 457V 439V
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Para 4.4 = DISPLAY CONTROL BOARD
4.4 Display Control board

Refer to circuit diagram 04.14.670 become 15C90072
General:
The display control circuit is based around the Philips PCB80C552 singlechip 8bit microcontroller. This is based on the 80C51 CPU with 256 bytes of RAM, timers, AnalogtoDigital converter, PWM outputs, digital I/O ports and a full duplex UART on board. For detailed information on this component refer to the relevant data sheets. Although there are many 80C51 based microcontrollers with similar features to the 80C552 there is currently no direct second source for this component. To increase the capability of the 80C552 and to perform all of the functions required for the display control board, additional RAM, EPROM, EEPROM and digital input and output lines have been added.
Addressing and Data Bus:

The 80C552 can access up to 64K of program memory and additional 64K of data memory. When accessing external memory Port 0 and Port 2 of the 80C552 form the address and data buses. The lower order 8 bits of the address are output through Port 0 and latched by IC4 when ALE (Address Latch Enable, IC2 pin 48) goes high. The 8 bit data is then written or read through Port 0. Port 2 provides the higher order 8 bits of the address. When reading program memory (EPROM), data is read when PSEN (Program Store Enable, IC2 pin 47) goes low. Reading and writing to data memory is controlled by RD (Read IC2 Pin 7) and WR (Write IC2 Pin 6)
Data Memory:
The 64K data area is made up of RAM and digital input and output lines. 32K is allocated to the RAM, although only 8K is used (IC12 pin 26 tied to +5V by LK3D). IC5 and IC6 are the output data latches. When the address is 8006h or 8007h IC19 pulls the /CSOUT 0 or /CSOUT 1 low, respectively. When this line returns high the data appearing on the data bus is latched through to the output. IC8 and IC9 provide open collector outputs for these signals. IC10 is a series of darlington drivers used to drive the LEDs on the mimic board. Four outputs from IC6 and 2 outputs taken directly from IC2 are the signals for the LED drives.
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Para 4.4 = DISPLAY CONTROL BOARD

The enable pin (pin 1) of IC5 and IC6 is driven from Pin 18 of the 80C552. At power up and under reset conditions, this pin is held high. IC5 and IC6 outputs are then forced to tristate and the internal pull up resistor at the inputs to IC8 and IC9 can pull these lines high. The outputs of IC8 and IC9 are then off until the microcontroller generates the required enable signal. This prevents spurious output pulses at power up. The drive signal for the buzzer comes from the PWM 0 output (pin 4) of the 80C552. This is set to high or low to switch the buzzer on or off. (HIGH = ON)
Frequency Inputs:
The inverter and reserve zero crossing detector outputs are fed into pins 16 and 17 of the microcontroller via buffer IC3. Pins 16 and 17 are coupled to timer T2 of the 80C552 which is configured as a 16 bit counter, free running at 1MHZ. At each positive going edge of the signals at Pin 16 and 17, the contents of timer T2 is saved to a register. By reading this register following two consecutive edges, the period of the squarewave can be determined and hence its frequency can be calculated.
Analogue Inputs:
Port 5 of IC2 is used for the analogue inputs for the analogue to digital converter on board the 80C552. This is a 10 bit converter with eight multiplexed inputs. The inverter voltage and load current waveforms appear on pins 1 and 68 of IC2. These waveforms are sampled once every 250 microseconds during the sampling cycle and from this data R.M.S calculations are performed. For this reason only small noise filters can be used on these lines. The other four analogue inputs are DC levels which are read once every l00mSec. Each of these inputs has a filter comprising of a l00K resistor and a 1F capacitor. The analogue reference for the analogue to digital converter is derived from a 2.5 volt zener diode. This voltage represents the full scale voltage for all of the analogue inputs. The accuracy of this voltage is not critical as any error is compensated for in software by the self calibration routine.
Analogue Output:
Pin 5 of IC2 is a PWM output controlled by the 80C552. This is configured to operate at a frequency of 23.5kHz with a duty cycle variable from 0 to 100%. The squarewave output from pin 5 is filtered by R6 and G13 to give a d.c. level proportional to the duty cycle of the PWM at the base of TR2. TR2 acts as a buffer for this analogue voltage. The greater the duty cycle at pin 5, the higher the d.c level at PL8 pin 43. This d.c level is used to vary the inverter output voltage, by varying the reference level on the inverter drive board.
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Para 4.4 = DISPLAY CONTROL BOARD EEPROM:

IC1 is a 93C46 128 byte by 8 bit EEPROM. This device can also be configured as 64 x 16 by pulling pin 6 high. The clock, data in and data out pins of the EEPROM are connected to Port 4 of the microcontroller. The clock pin (pin 2 of IC1) is used to clock serial data into or out of the EEPROM and is only used when data is being written to or read from the device. Chip select for the EEPROM is derived from the GAL, IC7. This line (CSEE) is set active by writing a 1 to address 8008h. It is cleared by writing a 0 to this address.
Crystal Oscillator:
The oscillator for the microprocessor is built into the 80C552 device and requires only the crystal QZ1 and capacitor C10 and C11 to produce the necessary clock. The oscillator which is used for the RS232 baud rate is based around the GAL, IC7. This uses a 4.9152 MHz crystal frequency which is then divided by 16 to provide a frequency reference of 307.2 kHz. This is then fed into the timer1 input of the microprocessor. The 80C552 then performs the necessary division to provide a baud rate of 1200, 4800, 9600 or 19200 baud depending on the setting of the relevant DIL switches.
RS232C Interface:
The RS232C port uses the UART (Universal Asynchronous Receiver Transmitter) which is part of the 80C552. The data lines are TXD (IC2 pin 25) for data transmitted from the microcontroller and RXD (IC2 pin 24) for data received. Where necessary, data flow through external devices such as the RS232C to RS2422A converter can be controlled using the line DTR (from IC2 pin 23). These three lines are buffered by IC3 and leave the display control board in TTL format. Conversion into RS232C levels is performed on the interface board.
LCD Interface:
The LCD module is driven through the parallel ports on the 80C552. Port 4 is used for the data transfer and three lines from Port 1.
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Para 4.5 INTERFACE PCB
4.5 Interface board

Refer to circuit diagram 15C70516 This PCB performs the following functions: i) Supply section: provides a distribution of supply voltage for the boards.
ii) Acts as a distribution point for routing control signals. iii) provides a startpoint ground for all other PCBs. This startpoint is connected to chassis through the inductance L1. iv) Provides Opencollector drives for the rectifier and static switch phototriac. v) Provides isolation for RS232, AS400 and R.A.U. interfaces using relays. vi) Provides control logic and drive circuit for D.C.. vii) Provides the display pcb with two positive signals (charge/discharge current) derived from the halleffect current transducer. viii) Provides precision rectification of A.C. signals to feed the display pcb. ix) Provides Output Voltage, Reserve Voltage and Mains Voltage detectors. x) Provides rectifier current limit.
4.5.1 Precision Rectifier:

Inverter and Reserve Current As the microprocessor analog inputs can only accept positive signals within the range 0V to 2.5V, the inverter and reserve sample circuits are followed by precision rectifiers. The reserve and the inverter fullwave precision rectifiers have a gain of 0.66. Load Current A 1000 : 1 load current transformer is connected to burden resistors R170, R171 and R172. These resistors will change depending on the unit with J1 and J2. An A.C. voltage proportional to 1/1000 of the load current is produced across the burden resistors. This signal is fullwave precision rectified, with a gain of 1, by IC26, IC28 and IC31.
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Para 4.5 INTERFACE PCB 4.5.2 DC Rail Voltage Monitor:

This circuit provides a low voltage signal proportional to the DC rail voltage. To enable opamp IC25 and IC27 to run with a single supply rail, the centerpoint of the input attenuator is biased at 2V. The two inputs from R174 and R176 are buffered by two high impedance opamps IC25B and IC27A, and fed to the differential amplifier IC27B. The output through the trimmer P8 is fed to the microprocessor, while the signal on the commonpoint of resistors R268 and R269 is fed in the rectifier and inverter control.
4.5.3 Battery Current Conditioning:

A 1000 : 1 hall effect current transducer is used to provide an isolated signal proportional to the battery current. The current transducer burden resistor R194 or the parallel R294, R210 and R212 according if the current transducer has current or voltage output. The voltage across the burden resistor is positive for charge currents and negative for discharge currents. The charge current circuit, with output at TP14, has IC33A configured as a noninverting amplifier with a gain of 2. The diode, in its output, blocks negative voltage during battery discharge. The discharge current circuit, with output at TP15, has IC33B configured as an inverting amplifier with a gain of 0.332. The diode, in the output, blocks negative voltage during battery charge. The hall effect transducer is supplied with +/17V D.C. from the S.M.P.S. board.
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Para 4.5 INTERFACE PCB 4.5.4 DC Battery Contactor Drive Circuit:

A low level on pin 9 or pin 10 of IC40 will initiate the contactor to open. A low level on pin 9 means Bypass switch and Output switch simultaneously closed. The signal on pin 10 is low only when: PSFA = 1 and /INVSTAT = 1 and /BATTEST = 0 The circuit comprising of components IC34, R233, C88, R221 and R222 provides a 1 second time delay. This ensures that the inverter has stopped before the battery contactor is opened. Initially, at power up, the level at IC34 pin 1 is LOW until the VDC rail is ranged up over 288V (i.e. for 144 cells). This is done to synchronize the start of the timer, IC39, with the powering up of the contactor output drive stage. The HIGH level on the input of IC36 pin 5 is inverted and splits into two paths: 1) In one direction it starts the timer IC39; its pin 8 goes LOW for 10 seconds and then stays HIGH. This signal inverted by IC36 turn on IC30, providing full drive current for 10 seconds to the contactor, which is connected between PL11.7 and PL11.6. 2) Having pulled the contactor IC30A, a reduced level of current, limited by R199, can flow through IC30A when IC30B stops conducting. This allows saving current (energy) once the contactor has been supplied. The contactor will open under the following conditions: i) At the end of battery discharge. i.e. Low battery condition,
ii) When the bypass and output breakers are simultaneously ON, iii) When the emergency Power OFF is initiated, iv) When the main switch is opened, and the inverter is OFF.
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Para 4.5 INTERFACE PCB 4.5.5 RS232 Interface:

The RXDATA, DSR, CTS and DCD inputs to the UPS feed onto the IC19 and IC22, RS232 line driver IC. These signals, through the IC19, IC22 and the optocouplers go to the display pcb. The TXDATA, DTR and RTS lines from the display pcb drive the optocouplers. The signals pass through the optocouplers onto the RS232 line drive IC, which translate the TTL levels to the EIAstandardRS232. The supply for IC19 and IC22 (+5VRS) is isolated and derived from the main S.M.P.S. through the voltage regulator IC1. The use of optocouplers and an isolated RS232 supply enable the RS232 interface to be fully isolated avoiding sections damage to the UPS in the event of incorrect connections to the RS232 port.
4.5.6 AS400 Interface:

The AS400 socket on the rear of the UPS is connected to the interface pcb via PL21 flat cable. All AS400 outputs are derived by switching relays. The UPS ON and Supplying Load output is provided by RL5 driven by a rectifier circuit, and fed from the load output sample transformer. The Reserve to Load output is provided by RL4 which is driven by IC30. This signal feeding the IC30 comes straight from the display pcb. The Primary supply fail and Shutdown Imminent are driven by RL3 and RL2 respectively. When the bypass breaker is operated then these outputs are inhibited.
4.5.7 Remote Alarm Unit Interface (R.A.U.):

An unregulated A.C. power supply from the RAU is derived from an output voltage transformer. The RAU output signals for Load on Reserve, Mains failure, Shutdown Imminent, Inverter fault and Summary Alarm are derived by switching relays. The input signals to the relays drivers are derived from microprocessor outputs on the display pcb.
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Para 4.5 INTERFACE PCB 4.5.8 Inverter, Reserve and Rectifier Thyristor Drives:
The following figure shows the circuit which drives phototriacs (on the firing board) for SCR static switch.
When ITL is active (load on inverter) the output of IC14 is LOW, the current through the resistors A and C switches on the phototriac, and is limited to 10 mA. The resistor B and D limits the voltage in the diode of phototriac. The same currents are for the drivers for rectifiers SCRs.
4.5.9 V OUT Detector:

The circuit (IC11) senses the VOUT and generates an alarm signal /UPS when the output voltage is lower or higher than 17% of the nominal. The switch SW1 allows the selection of the nominal voltage as follows: VOUT SW1.1 SW1.2 380V OFF OFF 400V ON OFF 415V ON ON Such signal is sent to the reserve static switch board and generates an alarm of static switch failure.
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Para 4.5 INTERFACE PCB 4.5.10 V RES Detector:

This circuit senses the average value of the 3 voltage of the reserve which are summed by IC35. The output of the sum is a voltage about 2.05VDC (at 380V). In addition, when EPO or wrong phase rotation failure sensors are active, such increases, and signal allows to open the reserve static switch and therefore disconnecting the load. Such signal that goes into the reserve static switch board provides an alarm for LOW/HIGH reserve voltage.
4.5.11 V MAINS Detector:

As the V OUT detector, this sensor is based on the LOW/HIGH window and provides an alarm to the microprocessor and the rectifier (turning OFF it) when the input voltage to the rectifier is not within the range of +/20%.
4.5.12 Backfeed Protection:

OP1 is an optocoupler which receives a signal from the backfeed protection board and generates an alarm for the microprocessor (pin 9 of PL23).
4.5.13 Hydrogen Detector:

The output of the optocoupler is logic signal that goes to the rectifier control and reduces the voltage reference for the DC (e.g. from 327V DC nominal to about 288V) and generates an alarm on the display Battery Charge Inhibited when the input signal is active, for instance when there is hydrogen in the battery cabinet.
4.5.14 Emergency Power OFF (EPO):

When the EPO is active, the optocouplers OP12, OP13 and OP15 switch ON, then: the rectifier shutdown, the inverter is inhibited, static switch is open, battery contactor is open. In this situation, the load is not supplied.
4.5.15 Rectifier Current:

The rectifier current is buffered by IC37, and fed into the display board for the measurement and the rectifier control loop in the rectifier board.
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Para 4.5 INTERFACE PCB
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Para 4.6 = BASE DRIVE PCB
4.6 Base Driver board

(Ref. 15C70533) There are two distinct power driver stages on the driver board, one is used to drive the high switch of the power Hbridge (DC/ac converter), the other one to drive the low switch of the power Hbridge. These two stage are identical but are electrical insulated. The driver is supplied by the SMPS board (15C70514), receives the PWM signal from the inverter control board (15C70512), transmits desaturation signal to the inverter control board and drives the power switch of Hbridge through connector 2K. (Connector 2K is common to the two driver stages) Referring to the first section, the input pwm signal is optoisolated by optocoupler OP1, a on delay time of about 1.5s is added by a RCD network (R17,C15,D8) operating with a Schmitt inverter. This signal drives a current generator that sources current to the base of power transistor (power module), the current is selectable from 1 to 6A by J1 & J9, the source current is supplied by T7 a T0220 NPN darlington power transistor. The sink current, when the power module is driven off,is limited by the value of R3 plus R4, this current is sunk by T5 a T0220 PNP darlington power transistor. Desaturation is sensed by a fast precision comparator (U3) and sent to the inverter control board by a fast optocoupler OP2. This signal has a memory to achieve a more reliable protection action. During switching, the desaturation signal is masked to avoid false alarms.
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Para 4.7 = SMPS BOARD
4.7 SMPS BOARD

(Ref. 15C70514 ) DC input voltage: 230V to 550V AC input voltage: not allowed Output power: 110W maximum The SMPS supplies the following outputs: +8V 2.5A (isolated) control +8V 0.3A (isolated) interface +/ 17V 0.5A (isolated) control +7V/11V 3Apk (isolated) Hbridge driver +7V/11V 3Apk (isolated) Hbridge driver +7V/11V 3Apk (isolated) Hbridge driver +7V/11V 3Apk (isolated) Hbridge driver +7V/11V 3Apk (isolated) Hbridge driver +7V/11V 3Apk (isolated) Hbridge driver There are two distinct power stage converters: a Buck to supply a regulated unisolated voltage of 150V, a PushPull powered by 150V to obtain the above mentioned insulated output supplies.
The Buck stage:

The Buck converter is controlled by a Siemens TDA4919 (IC1), a PWM single ended controller operating in voltage mode, an internal undervoltage comparator with hysterisis is used to inhibit the output driver of IC1 when the DC rail falls down 165V. The operating frequency (about 50kHz) is set up by the value of C5 and R3 while the pwm ramp slope is determined by the value of C4, which has to be at least five times the value of C5, and by R39 and R40 that perform a feed forward control action. Resistor R24 senses the Buck current, and ratio of R5 and R8 sets the threshold level of the current limiter. A multiple RC network (R23,C15,R12,C11) is used to clean up the current signal. Soft start action is present to limit the current when the output capacitors are charged, the duration of the soft start can be programmed by the size of the capacitor C6. A voltage reference of 2.5V is available at pin 11, it provides a highly constant temperature characteristic and it is used as reference signal for undervoltage comparator, current limiter comparator and as setpoint in the control output voltage. The power switch (S5) is a T03P N channel power mosfet rated at 1000V Vds and 8A Id @ 25C, the free wheeling diode (D6) is a 1000V 12A very fast recovery epitaxial diode.
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Para 4.7 = SMPS BOARD

A voltage dependent resistor (VR1) protects the circuit against the risk of voltage spikes present on DC rail. An input RFI filter (C22,C23,C24) attenuates high frequency attenuations, C22 and C24 are metallized paper capacitors. At start up, IC1 is powered by a linear power supply (S4 T1 Z3) which is locked out when feedback from an auxiliary output of the Push Pull transformer(TR4) is present, when this action is performed a green led (DL1) lights up. The input rectifier voltage feedback is obtained from a voltage divider (R27,R28,R29,R30,R31), this signal is available at connector 2M. Toroidal inductor LS1 and polypropylene capacitor C27 form the output filter,the output voltage is sensed by a differential amplifier IC3, the feedback control network uses the internal opamp of TDA4919, variable resistor P1 sets the output voltage to 150V.
The PushPull stage:

The Push Pull converter is controlled by a Siemens TDA4918 (IC2), a PWM controller operating in voltage mode, an internal overvoltage comparator with hysterisis, is used to inhibit the output drivers of IC2 if the output of buck goes over 190V, due to a buck failure. The operating frequency (about 50kHz) is set up by the value of C35 and R51, while the pwm ramp slope is determined by the value of C34, which has to be at least five times the value of C35. No feed forward actions is performed in this stage and the duty cycle is fixed at 50%, the deadtime is generated inside the TDA4918 and can be externally modified. The resistor R72 senses the Push Pull current and the ratio of R56 and R59 sets up the threshold level of the current limiter, a multiple RC network (R58,C43,R71,C41) is used to clean up the current signal. A soft start action is present to limit the current when the output capacitors are charged, the duration of the soft start can be programmed by the size of the capacitor C36. A voltage reference of 2.5V is available at pin 11, it exhibits a highly constant temperature characteristic and it is used as reference signal for overvoltage comparator and current limiter. At startup IC2, is powered by a linear power supply (S3,T2,Z8) which is locked out when feedback from an auxiliary output of the Push Pull transformer (TR4). Four transformers (TR1,TR2,TR3,TR4) are paralleled together in Push Pull stage to deliver the supplies needed to power the circuits, each secondary has a rectifier with two capacitors. An electrolytic capacitor to smooth and a ceramic to remove high frequency noise. The outputs of the PWM controller ICs are active high and can deliver all the current needed to drive power mosfet transistors, the voltage supply of this stage is separated from the logic so noise in control circuits is avoid.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 )
5a
SOFTWARE FUNCTIONAL DESCRIPTION

(for UPS having FSB status < 30) 5a.1 General
The software for the microcontroller on the display control board reads all of the digital inputs, analog inputs and both frequency inputs. It generates alarms which cause messages to be displayed and outputs from the display control board to be driven. This document describes the conditions which need to be met in order to generate each of the messages and outputs. All digital inputs are read once every 100mSec. Analog and frequency measurements are also read every 100mSec. All digital inputs are not filtered in software as filtering is performed in hardware by capacitors mounted on the PCB. Analog measurements, including frequencies, are filtered. This filter takes the average of a given number of samples and is updated every time a new sample is taken.
5a.2 Accessing Information

All of the information can be accessed through the LCD Display by using the 3 arrow keys on the front panel of the UPS. The information is arranged in columns. The and keys allow movement up and down the selected column and the
key moves from one column to the top row of the next column.
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5a.2.1 The first column contains information relevant to the UPS as a whole. The first page will normally show the UPS rating on the first line with one of the following messages on the second: SYSTEM NORMAL TESTING BATTERY SYSTEM IN ALARM If the battery is discharging or the inverter is in overload operation then an additional page of information is inserted at the top of the first column. This will be in the form: BATTERY DISCHARGING AUT **min DIS **min or OVERLOAD INV STOP **m:**s If both conditions are true then both pages of information will be accessible. The top of the column will be the one showing the shortest time before inverter shutdown. If none of the arrow keys is pressed, then after 5 minutes the display will return to the top page of the first column of information. This top page will automatically change according to the UPS operating condition as described above. Following the UPS status, each of the measurements available in the UPS can be displayed. These are: D.C. Voltage and Rectifier Current D.C. Voltage and Battery Current Inverter Voltage and Frequency Reserve Voltage and Frequency Load Currents Load Peak Factor and Percentage Loading Total time on Inverter Total time on Reserve Number of mains failures and Total Duration Pressing the key moves down through this list. The key can be used to move back up. At the end of the measurements, the software revision and release date is displayed. Note that the revision and release date of the software is also displayed for 2 seconds when the machine is switched ON or if the retrofit option has been selected.
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5a.2.2 The second column contains information relevant to the Rectifier and Battery. The first line of the display will show: RECT/BATT ALARMS While the second line will show the first active message from the following: NO ALARM ACTIVE PRIMARY SUPPLY FAIL PHASE FREQUENCY ERROR BATTERY FAULT BATT CONTACTOR OPEN BATTERY DISCHARGING SHUTDOWN IMMINENT DC VOLTAGE HIGH DC VOLTAGE LOW HARMONIC FILTER OPEN BATT. CHARGE INHIBIT MAINS INPUT SWITCH OPEN If more than one of these alarms is ON, pressing the list of active messages. key will move through the
After the last active alarm, pressing the key will move through the following pages of measurements: D.C. Voltage and Rectifier Current D.C. Voltage and Battery Current
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5a.2.3 The third column contains information relevant to the Inverter. The first line of the display will show: INVERTER ALARMS While the second line will show the first active message from the following: NO ALARM ACTIVE INVERTER FAULT OUT OF SYNC OVER TEMPERATURE BYPASS SWITCH CLOSED SHUTDOWN IMMINENT DC VOLTAGE HIGH DC VOLTAGE LOW INVERTER NOT RUNNING INVERTER INHIBITED INVERTER BLOCKED INVERTER VOLTS HIGH INVERTER VOLTS LOW OVERLOAD STOP DUE TO OVERLOAD STATIC SWITCH FAULT CURRENT LIMIT SYSTEM TEST MODE If more than one of these alarms is ON, pressing the list of active messages. After the last active alarm, pressing the Frequency. key will move through the
key will display Inverter Voltage and
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5a.2.4 The fourth column contains information relevant to the Load and Reserve. The first line of the display will show: LOAD/RES ALARMS While the second line will show the first active message from the following: NO ALARM ACTIVE LOAD ON RESERVE LOAD NOT SUPPLIED INVERTER FAULT BYPASS SWITCH CLOSED RESERVE SUPPLY FAULT RESERVE FREQ FAULT RESERVE VOLTS HIGH RESERVE VOLTS LOW STATIC SWITCH FAULT OVERLOAD PHASE SEQUENCE FAULT BACKFEED PROT ACTIVE OUTPUT SWITCH OPEN RESERVE SWITCH OPEN If more than one of these alarms is ON, pressing the list of active messages. key will move through the
After the last active alarm, pressing the key will move through the following pages of measurements: Load Current Load Peak Factor and Percentage Loading Reserve Voltage and Frequency
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5a.2.5 The fifth column is normally used to select the language for LCD messages. and keys changes the language and pressing the key returns Using the to the first column with the messages displayed in the selected language. Once a language has been selected, this will remain in use until it is changed using the language selection column. If the UPS is switched OFF and then ON again it will power up in the selected language. If POWER HISTORY information is available the pressing the fourth column will cause the LCD to display: POWER HISTORY DOWN TO ACCESS key will now enter into the Power History information. Pressing the When the Power History is exited, the display will return to this entry message. Pressing the key from here will move on to the language selection column, key from the
and pressing again will return to the first column. If no key is pressed for 5 minutes, the display changes back to the top row of the first column of information.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.3 Measurements 5a.3.1 D.C. voltage
One sample is taken every 100mSec and the displayed reading is filtered over 10 consecutive samples. This reading is scaled so that an input signal of 2.215V will give a display reading of 326V.
5a.3.2 Rectifier Current

One sample is taken every 100mSec and the displayed reading is filtered over 10 consecutive samples. A current of 36.4A will give a sense voltage of 1V.
5a.3.3 Battery Current

One sample is taken every 100mSec and the displayed reading is filtered over 10 consecutive samples. Positive and negative battery currents are read as two separate readings. If: the battery is discharging, or the rectifier has been shutdown due to DC overvoltage, or the battery is being tested, then the negative current is displayed, otherwise the positive reading is used. A positive current of 12 Amps gives a sense voltage of 1V. A negative current of 40 Amps gives a sense voltage of 1V.
5a.3.4 Inverter Voltage and Frequency

The inverter voltage is full wave rectified and smoothed in hardware. This DC level is then read once every 100mSec. and the display reading is filtered over 10 consecutive samples. The sampling is synchronized to the inverter frequency to overcome aliasing effects caused by the ripple on the DC level. A DC level of 1.09V will give a displayed voltage of 240V. The inverter frequency is determined from the period of one complete cycle every 100mSec. The displayed reading is filtered over 10 consecutive samples. The period is the time between two consecutive positive going edges at pin 16 of the microcontroller.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.3.5 Reserve Voltage and Frequency
The reserve voltage is full wave rectified and smoothed in hardware. This DC level is then read once every 100mSec and the display reading is filtered over 10 consecutive samples. The sampling is synchronized to the reserve frequency to over come aliasing effects caused by ripple on the DC level, thus if the reserve frequency signal is not present, the displayed voltage will be zero. A DC level of 1.09V will give a displayed voltage of 240v. The reserve frequency is determined from the period of one complete cycle every 100mSec. This is taken from the output of the reserve zero crossing detector as the time between two consecutive positive going edges at pin 17 of the microcontroller. The displayed reading is filtered over 10 consecutive samples.
5a.3.6 Load Current

The load current waveform is sampled every 250 microseconds for one complete cycle. From these samples an RMS calculation is performed. This sampling is performed on one cycle every 100mSec and the displayed value is filtered over 16 consecutive RMS readings. The start and end points for the samplings are taken from the inverter zero crossing detector, which is the signal used to determine the frequency. If this frequency signal is not present, then the displayed current will be zero. A precision rectified 0.848V RMS signal at the sense input will give a displayed current of 40A.
5a.3.7 Load Peak Factor and Percentage

The peak factor of the load current is obtained by dividing the filtered value of the peak load current by the filtered value of the RMS load current. The filtered value of peak load current is taken over 10 consecutive samples. The percentage RMS load current is calculated from the filtered RMS load current divided by the max RMS load current in Appendix A. The percentage peak load current is also calculated from the filtered peak load current divided by the max peak current in Appendix A. The displayed value is the highest of these two values.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.4 ALARM MESSAGES AND DIGITAL OUTPUTS.
Alarm messages and digital outputs are set on the basis of conditions set at the digital inputs and also by conditions set by the level of the displayed analog readings. For trip settings of analog measurements, refer to Section 5a.13.
5a.4.1 Testing Battery and Battery Test Output

A battery test is automatically initiated every seven days minus 5 hours after the unit is switched on. To initiate the test the microcontroller sets the BATTERY TEST output low and the message ?TESTING BATTERY replaces the ?SYSTEM NORMAL message on the display. This automatic test is inhibited for two days following a primary supply to prevent the testing of a discharged battery. A battery test is also initiated following a DC voltage high condition to prevent overcharging of the batteries. This will also be inhibited for two days following a primary supply fail. A battery test can be manually initiated by pressing both and keys on the display simultaneously. This manual test is not inhibited following a mains failure. The next automatic test will occur one week after a manually requested test. The test lasts one minute during which time the battery voltage is continuously monitored. If the voltage falls below the Minimum Battery Test Voltage given in Sec. 5a.13 then the test is terminated and the alarm BATTERY FAULT is generated, otherwise the test is terminated after one minute and no alarm is generated. If the BATTERY FAULT alarm was active prior to the test, then the alarm is cancelled while the test is being made and may be set again depending on the test result. At the end of the test, the BATTERY TEST output is reset high and after 10 seconds the TESTING BATTERY message is cleared. This allows 10 seconds for the rectifier to phase up following the removal of the battery test signal.
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A second type of battery test can also be performed. This can only be manually and keys simultaneously for two seconds. This initiated by pressing the test shuts the rectifier down using the rectifier shutdown output so that the battery is discharged. At the end of discharge, the inverter stops, the rectifier is restored and as the rectifier phases up, the inverter restarts automatically, thus returning to system normal. The test is inhibited if the reserve is outside limits. During the test, the message TESTING BATTERY replaces the ?SYSTEM NORMAL message on the display and the battery autonomy can be read. At the end of the test, 15 seconds are allowed for the rectifier to restart before the TESTING BATTERY message is removed. The test can be manually terminated by pressing the simultaneously and holding for 2 seconds. and keys
5a.4.2 Rectifier Shutdown Output

If the DC voltage rises above the HIGH DC trip level given in Section 5a.13 and remains high for more than 2 seconds, the microprocessor generates a signal to shutdown the rectifier. When the DC level has fallen the rectifier is allowed to restart.
5a.4.3 Battery Discharging

This alarm is generated when the DC voltage falls below the VDC BATTERY DISCHARGING level given in Section 5a.13. The alarm is cleared either when the voltage rises above this level or when the positive current into the battery is above 0.8 Amps.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.4.4 Shutdown Imminent

This alarm is generated when the DC voltage falls below the VDC SHUTDOWN IMMINENT level given in Section 5a.13. The alarm is cleared when the BATTERY DISCHARGING alarm is cleared or when the DC VOLTAGE LOW alarm comes ON. The SHUTDOWN IMMINENT level increases for long discharges: for the first 60 minutes > it is fixed at 1.75 Vpc, from 60 minutes to 4 hours > it increases linearly from 1.75Vpc to 1.85Vpc, from 4 hours to 10 hours > it rises from 1.85Vpc to 1.9Vpc, from 10 hours onwards> it is fixed at 1.9Vpc.
5a.4.5 DC Voltage High

This alarm is generated when the DC voltage rises above the HIGH DC TRIP level given in Section 5a.13. It is cleared when the DC voltage falls below the HIGH DC TRIP RESET level.
5a.4.6 DC Voltage Low

This alarm is generated when the DC voltage falls below the LOW DC TRIP level given in Section 5a.13. It is cleared when the DC voltage rises above the LOW DC TRIP RESET level. It will also be cleared if the positive battery current into the battery is above 0.8 Amps. The LOW DC TRIP level increased for long discharges: for the first 60 minutes > it is fixed at 1.65 Vpc, from 60 minutes to 4 hours > it increases linearly from 1.65Vpc to 1.75Vpc, from 4 hours to 10 hours > it rises from 1.75Vpc to 1.8Vpc, from 10 hours onwards>it is fixed at 1.8Vpc.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.4.7 Out of Sync

This alarm is not generated in software. but is read from the system through one of the digital inputs. It can however be inhibited in software by any of the following conditions: Inverter Off Reserve Overloaded Causing Inverter to Current Limit Reserve Fault
5a.4.8 Inverter Volts High & Inverter Volts High Output

This alarm is set when the inverter voltage rises above the INVERTER VOLTAGE HIGH level given in Section 5a.13 and is then latched and causes the inverter to stop. The alarm is cleared when the inverter is restarted. The output is held HIGH while the alarm is active.
5a.4.9 Inverter Volts Low & Inverter Volts Low Output

This alarm and output (active high) are both set when the inverter voltage falls below the INVERTER VOLTAGE LOW level given in Section 5a.13. They are both cleared with the inverter voltage rises above this level by the specified Hysterisis for the inverter trips. The alarm is also inhibited when: the inverter is off, or the reserve is overloaded forcing the inverter to fold back under current limit. The output signal is not inhibited by these conditions.
5a.4.10 Overload and Overload Output

This alarm is set when the RMS load current rises above the OVERLOAD TRIP CURRENT given in Section 5a.13. It is cleared when the RMS load current falls below the OVERLOAD TRIP RESET CURRENT. If load is on inverter then this alarm appears in the page INVERTER ALARMS as well as in the LOAD/RES ALARMS page. This OVERLOAD OUTPUT is set HIGH whenever the alarm is active. The OVERLOAD OUTPUT is only set HIGH if load is on reserve, or if the inverter is stopped due to overload.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.4.11 Stop Due to Overload

The overload operation is allowed for a duration dependent on the overload percentage: An overload of 125% is allowed for 10 min., An overload of 150% is allowed for 10 sec., Above these values, the inverter is stopped, and automatically restarts after 10 min. If the overload duration doesnt reach the above values, the inverter isnt stopped, but its nominal overload duration decreases depending on the operation status before and after the overload. I.e.: after an overload of 150% during 9min and 59sec, the UPS reaches again its nominal overload duration after 1 hour if it works at 100% load, but after 10 min if it works without load. The overload capacity is based on two curves which represent the time T(in seconds) before overheating of the magnetics or heatsink occurs at a given per unit loading, K1. Whilst in overload, a proportion of the thermal capacity is used up as follows:
A1 = T1 x (K12 1) for the magnetics 2 A2 = T2 x (K1 1.25) for the heatsink where A1 max = 337.5 and A2 max = 0.625
Below 100% loading, another curve which relates the load percentage to the time, calculates the time required to obtain again the nominal overload capacity.
5a.4.12 Current Limit

This alarm is generated when either the mean current limit input or the peak current limit input go active (HIGH). The mean current limit input is masked if it is caused by an overload while the load is on reserve.
5a.4.13 Load not Supplied

This alarm is generated if neither load on reserve or load on inverter inputs are active (HIGH) and the bypass switch is not closed. It will also be generated if the load is on inverter but the inverter is off.
5a.4.14 Inverter Not Running

This alarm is generated if the inverter has been stopped by pressing the inverter off key, or if the inverter has not yet been started. It is not generated if the inverter is stopped due to a fault condition. The inverter can be started by pressing the inverter start key.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.4.15 Inverter Inhibited

The inverter may be inhibited by: an EPO request (See below), if the D.C. voltage is high for more than 2 seconds, if the D.C. voltage is low, if the bypass switch is closed and the output switch is NOT open, if the overload max. duration has been reached, The inverter will not be inhibited for D.C. voltage low if the system test mode switch (SW1.8) is ON. When all of these conditions are clear, the inverter will automatically restart.
5a.4.16 Inverter Blocked

The inverter will be blocked by: the inverter fail input going active (HIGH), overtemperature, inverter voltage high, inverter static switch fault It will not be blocked for inverter voltage high or overload time?out if in system test mode (SW1.8 ON). The alarm can be cleared and the inverter restarted by pressing the inverter start key provided that the fault condition does not still exist.
5a.4.17 System Test Mode

This message indicates that DIL switch SW1.8 is ON which puts the system into a TEST MODE. In this mode the software functionally changes as follows: Inverter can be stopped quickly by pressing the inverter off key. It is not necessary to hold it pressed for 2 seconds, Inverter wilt not be stopped for an overload timeout. Inverter will not be stopped for inverter overvoltage. Inverter will not be inhibited for d.c voltage low.
5a.4.18 EPO Request

An EPO request is generated by pulling the inverter reset line low. The software checks that this is not caused by the bypass breaker being closed and then stops the inverter and opens the battery contactor. The EPO function is latched in software. If the inverter reset line is released, the battery contactor will close and the inverter will restart.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.4.19 Bypass Switch Closed

This alarm is generated when the bypass switch closed input is pulled high. The external hardware stops the inverter and opens the battery contactor. To prevent battery charge current from causing arcing across the contactor terminals, the Software forces the rectifier to phase back by initiating a dummy battery test. Once the contactor is open, the battery test is cancelled.
5a.4.20 Backfeed protection

This alarm is generated if the backfeed protection input is pulled low. It is latched if the load on reserve input is active (high), and hence can only be cleared if the backfeed protection input goes high (inactive) whilst load is not on reserve.
5a.4.21 Static switch fault

This alarm, when displayed in the LOAD/RES ALARMS section is generated when the static switch fail input is active (HIGH). This alarm may also appear in the INVERTER ALARMS section. In this case it indicates that a voltage greater than 1/3rd of the nominal AC voltage is present at the inverter sense port when the inverter is not running. This shows a voltage being feed back from the reserve supply through a faulty static switch. If an attempt is made to start the inverter, it will not start and becomes blocked until the fault is cleared.
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Para 5a = SOFTWARE DESCRIPTION ( FSB < 30 ) 5a.4.22 The following list of alarms depend solely on the levels at
their respective inputs and are not conditioned in software other than the filtering during the reading of the inputs and the delays before the sounding of the buzzer. ALARM PRIMARY SUPPLY FAIL PHASE SEQUENCE ERROR OVER TEMPERATURE BATTERY CONTACTOR OPEN LOAD ON RESERVE INVERTER FAULT RESERVE SUPPLY FAULT RESERVE FREQ FAULT RESERVE VOLTS HIGH RESERVE VOLTS LOW STATIC SWITCH FAULT HARMONIC FILTER OPEN BATT. CHARGE INHIBIT INPUT Primary Supply Fail Input Primary Phase Fail Input Overtemperature Input Battery Contactor Open Input Load On Reserve Input Inverter Fail Input Reserve Fail Input Res F Out of Limits Input Reserve Voltage High Input Reserve Voltage Low Input Static switch Fail Input Harmonic Filter Open Input Battery Charge Inhibit Input ACTIVE HIGH LOW HIGH LOW HIGH HIGH HIGH HIGH HIGH HIGH HIGH HIGH LOW
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5a.5 BUZZER
The buzzer will sound when any alarm goes active. For some alarms there is a delay before the buzzer sounds. These delays are as follows: Primary Supply Fail 30 Seconds Primary Phase Fail 30 Seconds Battery Discharging 30 Seconds DC Voltage High 30 Seconds Out of Sync 30 Seconds Inverter Volts Low 10 Seconds Overload 10 Seconds Load On Reserve 30 Seconds Reserve Supply Fault 30 Seconds Reserve Volts High 30 Seconds Reserve Volts Low 30 Seconds Reserve Freq Fault 30 Seconds In each case, the LED mimic and LCD messages will be updated as soon as the alarm becomes active. Only the sounding of the buzzer is delayed. The buzzer will be cancelled when all alarms clear or can be manualIy cleared by pressing the buzzer mute key. If the mute key is pressed after an alarm goes active but before the above delay has passed, this will not prevent the buzzer sounding at the end of the delay.
5a.6 LEDS
There are six LEDs on the UPS mimic which show at a glance the operating condition of each block of the UPS. Five LEDs are green and are one for each block as indicated by the mimic line diagram: Rectifier, Battery, Inverter, Reserve, Load. A continuous green LED indicates that that block is operating normally. A flashing green LED indicates a fault or alarm condition in the corresponding block of the UPS. The following list shows which LEDs are affected by which alarms:
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RECTIFIER LED: PRIMARY FAIL PHASE SEQUENCE ERROR BATTERY DISCHARGING DC VOLTAGE HIGH DC VOLTAGE LOW HARMONIC FILTER OPEN BATTERY LED: BATTERY FAULT BATTERY CONTACTOR OPEN SHUTDOWN IMMINENT DC VOLTAGE HIGH DC VOLTAGE LOW BATT. CHARGE INHIBIT INVERTER LED: INVERTER FAULT INVERTER BLOCKED INVERTER INHIBITED OUT OF SYNC OVER TEMPERATURE BYPASS SWITCH CLOSED SHUTDOWN IMMINENT DC VOLTAGE HIGH DC VOLTAGE LOW INVERTER NOT RUNNING INVERTER VOLTS HIGH INVERTER VOLTS LOW OVERLOAD STOP DUE TO OVERLOAD DESATURATION CURRENT LIMIT
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RESERVE LED: RESERVE SUPPLY FAULT RESERVE VOLTS HIGH RESERVE VOLTS LOW RESERVE FREQ FAULT STATIC SWITCH FAULT BACKFEED PROT ACTIVE LOAD LED: LOAD ON RESERVE LOAD NOT SUPPLIED INVERTER FAULT BYPASS SWITCH CLOSED STATIC SWITCH FAULT OVERLOAD The sixth LED is red and is a summary alarm LED. This LED is normally off and comes on when any alarm goes active. If the buzzer is sounding, the red LED is on continuously. If the buzzer is muted, the red LED flashes to indicate that the fault condition has been accepted by the user. When all alarms clear, the red LED will return to its normal off condition.
5a.7 Inverter Stop/Start

The inverter start and stop keys on the front panel are monitored by the microprocessor. If the inverter is not running or if it is stopped due to a fault condition (Inverter Blocked), the inverter on key can be used to start the inverter. The system first resets any latched alarms. ExternalIy latched alarms are reset by pulsing the inverter reset line low. If any block condition still exists, the inverter remains blocked. If not, the system checks for an inhibit condition. If an inhibit condition exists, the inverter is now inhibited and will start when the inhibit condition clears. Pressing the inverter on key while the inverter is running or while it is inhibited has no effect. If the inverter is running, it can be stopped by pressing the inverter stop key. This key must be held pressed for two seconds before the inverter will stop, except in system test mode. While the key is held pressed and the inverter is still running, the buzzer will sound continuously as a warning that the inverter is about to stop. Pressing the inverter stop key while the inverter is blocked, or not running has no effect. Pressing it while inhibited will set the inverter to not running.
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If the unit is powered down, either by opening the main switch or at end of discharge, the software remembers the condition of the inverter before it powered down. If the inverter was running or it was inhibited then when the power is restored, the inverter will restart automatically. If the inverter was not running or was blocked. when the power is restored, the inverter will remain off.
5a.8 RAU and AS400 outputs

There are five outputs which are used to drive the RAU and AS400 interfaces, these are: System normal output: This is set when there are no active alarms. Load on Reserve Alarm Output: This is set according to the signal read at load on reserve input. Primary Supply Fail Alarm Output: This is set if either the primary supply fail input or primary phase fail input is active. Shutdown imminent Alarm Output: This output is set when the shutdown imminent alarm is active. Inverter Fail Alarm Output: This is set if any of the following conditions is active: Out of sync alarm, Over temperature alarm, Inverter fail input, Inverter voltage high, Inverter voltage low, Overload with load in inverter. Each output has a delay of 10 seconds before it goes active following its respective alarm being set. The outputs will go off as soon as the alarm clears. This is to prevent transients from unnecessarily alerting the user.
5a.9 POWER HISTORY

The POWER HISTORY function continuously records all information on alarms and measurements in a circular buffer. The buffer holds all of the alarms and measurements which are accessible through the display. If a fault occurs which causes an inverter block, the power history function continues recording information for a further one second and then freezes. At this point, all alarms and measurements are saved from up to 10 seconds before the inverter block to one second after it in 0.1 second steps.
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5a.9.1 Display Power History

To display the power history information when it has been made available due to an inverter block, it is necessary to move across the columns of information using the key until the power history entry message is displayed: POWER HISTORY DOWN TO ACCESS This message indicates that information is available and would not otherwise be displayed. Pressing the key at this point moves into the power history information. When power history information is displayed, the arrow keys are redefined. The and move backwards and forwards through time in 0.1 second steps. This takes it possible to determine the exact moment in which an alarm became active with respect to another alarm or measurement change, so the actual sequence of events leading up to the inverter block can be examined. The key moves from one alarm to the next. Only alarms which were active at some time during the eleven second history period will be displayed. This makes it easier to locate a particular alarm without the need to step through a long list of alarms which do not apply. When the power history information is first accessed, the display shows the first alarm which was active and its condition at time = 0.0 seconds, the instant at which the block occurred. The top line shows the time in seconds relative to the moment the block occurred The bottom line of the display shows the alarm message The top line shows on the right hand side, whether the alarm was on or off at this moment in time. Pressing the key moves through each of the active alarms. After the last alarm the option is given to exit from the power history information by pressing the key: POWER HISTORY UP TO EXIT Pressing returns to the history entry message and the columns of information as described in Section 2. then moves on through
Pressing the key when the exit message is displayed does not exit from the power history but moves on to display the measurements.
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Measurements are displayed on the bottom line of the LCD. The top line shows the Section of the UPS to which the readings refer and time, relative to the moment the block occurred, at which the readings were taken. Pressing the first alarm. key now moves through the measurements and then back to the
5a.9.2 Manual Power History Request

A power history block may be manually requested at any time by pressing the and keys simultaneously. From this moment in time, information is recorded up to 10 seconds before and one second after in 0.1 second steps. When all information has been saved, the display will automatically change to show the first activated alarm and its condition at the moment of the request (time = 0.0 seconds). If the power history had already been blocked before the manual request was made, power history information would still be displayed as described. However, the information displayed it that which was captured when the block occurred, and not when the manual request was made.
5a.9.3 Power History Restart

The power history function will automatically start to collect new information if the inverter is running and the power history data is not being displayed. Once new information has started to be collected, all old information is lost. Thus if the inverter is restarted following a block condition before the information has been reviewed, it will not be possible to access this information which is now lost. If, however, the inverter should be blocked again, then information will be captured about this new block. This information will remain available until the inverter is again restarted. If the information has been manually requested, and no inverter block has occurred, this information will be lost as soon as the exit power history option is selected.
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5a.10 Battery autonomy

This is the calculation of the remaining time before inverter stop due to DC VOLTAGE LOW. Battery autonomy and discharge time are only displayed when the battery is discharging. When it is displayed, it becomes the top row of the first column of information and hence will be displayed automatically if no arrow key has been pressed in the last five minutes. The top line of the LCD shows the UPS rating while the bottom line shows the autonomy time remaining and the discharge time already passed in minutes. The discharge time will not start counting unless the inverter is running, but once started will continue to count until the end of discharge is reached even if the inverter stops running before this. The autonomy is initially shown as in calculation although the software is not able to calculate the autonomy during the initial part of the discharge curve. When the battery voltage has fallen below 1.98 volts per cell and a further 30 seconds have passed, the software makes the first attempt at calculating the battery autonomy, and the result is displayed. The calculation is based on battery voltage and the change in battery voltage since the last calculation. If the fall in battery voltage since the last calculation is less than 17mV/Cell then no calculation is made. If it does not fall by this amount within one minute then a new calculation is forced each minute, until this voltage gap has passed, If the battery voltage rises slightly between readings, no new calculation is made. If this rise is greater than 5mV/Cell, the display shows AUTONOMY IN CALCULATION and the software then waits for the voltage to start falling again.
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5a.11 RS232 port

The RS232 port is handled by software. Its function depends on the setting of display board DIL switch SW2.1 If SW2.1 is ON, the serial port is used for the EASY option. If SW2.1 is OFF, a terminal can be connected to the serial port through which certain debugging and test facilities are made available. These facilities are intended for use by Engineering only and are not discussed in detail here. Indiscriminate use of these facilities may lead to malfunctioning of the UPS. The Baud rate for the serial port is set by DIL switches SW2.2 and SW2.3 (See Section 5a.14). These switches are only read once when the machine is switched on so if it is necessary to change them, the machine must be powered down. When using the EASY 10 or EASY 1000 options, DIL switches SW2.3 to SW2.7 must be set to select the UPS identifier number. For EASY 10 or EASY 1000 where only one UPS is connected to the P.C. all of these switches must be set OFF (UPS number 1). Where more than one UPS is connected to a single P.C. using the EASY 1000 option, each UPS must have a different UPS identifier. Commencing from one, each UPS Must be numbered consecutively. (See Section 5a.14). It is possible, in terminal mode, to change the UPS rating through the RS232 port. This requires a password to be entered. If the UPS rating is not altered in this way, then the DIL switch setting is used. Once set in this way, the DIL switches are ignored, unless the option to use the DIL switches is selected from the terminal.
5a.12 Inverter Voltage control

The microprocessor can automatically regulate on the inverter voltage.
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5a.13 EDP70 Display Board trip settings

The following is a list of voltage and current trip points which are controlled by the display control board.
INVERTER VOLTAGE
380V
400V
360.0V 440.0V 2.0V
415V
373.5V 456.5V 2.0V
Inverter Voltage LOW 342.0V Inverter Voltage HIGH 418.0V Hysterisis for Inverter Low Trip 2.0V
DC VOLTAGE 198 cells

Low DC Trip Low DC Trip Reset VDC Battery Discharging (for Alarm) VDC Shutdown Imminent * Minimum Battery Test Voltage High DC Trip High DC Trip Reset
144 cells
237.6V 309.6V 316.8V 252.0V 273.6V 345.6V 340.0V 326.7V 425.7V 435.6V 346.5V 376.2V 475.2V 467.5V
* = shutdown imminent is reset when battery is no longer discharging (i.e. > VDC battery Discharging).
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LOAD CURRENT @ 380V 10kVA 15kVA 20kVA 30kVA 40kVA 50kVA 60kVA Overload Trip Current 16.0A Overload Trip Reset Current 14.4A Max Peak Load Current * 38.0A Max RMS Load Current * 15.2A
23.9A 31.9A 47.9A 63.8A 79.8A 95.7A 21.7A 28.9A 43.3A 57.7A 72.2A 86.6A 57.0A 76.0A 114.0A 151.9A 189.9A 227.9A 22.8A 30.4A 45.6A 60.8A 76.0A 91.2A
LOAD CURRENT @ 400V 10kVA 15kVA 20kVA 30kVA 40kVA 50kVA 60kVA Overload Trip Current 15.2A Overload Trip Reset Current 13.7A Max Peak Load Current * 38.0A Max RMS Load Current * 14.4A
22.7A 30.3A 45.5A 60.6A 75.8A 90.9A 20.6A 27.4A 41.1A 54.8A 68.6A 82.3A 57.0A 76.0A 114.0A 151.9A 180.4A 216.5A 21.7A 28.9A 43.3A 57.7A 72.2A 86.6A
LOAD CURRENT @ 415V 10kVA 15kVA 20kVA 30kVA 40kVA 50kVA 60kVA Overload Trip Current 14.6A Overload Trip Reset Current 13.2A Max Peak Load Current* 38.0A Max RMS Load Current * 13.9A
21.9A 29.2A 43.8A 58.4A 73.0A 87.6A 19.8A 26.4A 39.6A 52.9A 66.1A 79.3A 57.0A 76.0A 114.0A 151.9A 173.9A 209A 20.9A 27.8A 41.7A 55a.6A 69.6A 83.5A
* = Used for percentage load calculation
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5a.14 DIL Switch definitions

OUTPUT VOLTAGE SW1.1 SW1.2 DC VOLTAGE SW1.3 SW3.2 UPS RATING 400V TEST OFF OFF 144 cells ON OFF 380V ON OFF 400V OFF ON 415V ON ON
198 cells ON OFF
10kVA 15kVA 20kVA 30kVA 40kVA 50kVA 60kVA ON OFF ON OFF ON OFF OFF ON OFF ON ON ON 10kVA but should not be used.
SW1.4 OFF ON OFF SW1.5 OFF OFF ON SW1.6 OFF OFF OFF Any non valid combination will result in System test Mode SW1.8 ON = System test Mode OFF = normal UPS operation
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Serial Port Function SW2.1 ON = EASY 10 OFF = test terminal 1200 OFF OFF 4800 ON OFF 9600 OFF ON 19200 ON ON
Port Baud Rate Setting SW2.2 SW2.3 (default setting = 9600 )
UPS Identifier for EASY1000 Software SW2.7 SW2.6 SW2.5 SW2.4 UPS n 1 OFF OFF OFF OFF (normal setting) UPS n 2 OFF OFF OFF ON UPS n 3 OFF OFF ON OFF UPS n 4 OFF OFF ON ON UPS n 5 OFF ON OFF OFF UPS n 6 OFF ON OFF ON UPS n 7 OFF ON ON OFF UPS n 8 OFF ON ON ON UPS n 9 ON OFF OFF OFF UPS n 10 ON OFF OFF ON UPS n 11 ON OFF ON OFF UPS n 12 ON OFF ON ON UPS n 13 ON ON OFF OFF UPS n 14 ON ON OFF ON UPS n 15 ON ON ON OFF UPS n 16 ON ON ON ON Where only one UPS is connected to a PC, set to UPS number = 1 (i.e. SW2.4 to Sw2.7 all OFF) Pcb Self Test SW2.8 OFF = ON = pcb self test procedure use only with self test rig. normal pcb operation.
UPS TYPE SW3.1 SW3.4 ON = EDP70 OFF = European Series
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 )
5b SOFTWARE FUNCTIONAL DESCRIPTION

(for UPS having FSB status > = 30) 5b.1 General
The software for the microcontroller on the display control board reads all of the digital inputs, analog inputs and both frequency inputs. It generates alarms which cause messages to be displayed and outputs from the display control board to be driven. This document describes the conditions which need to be met in order to generate each of the messages and outputs. On the appendix A is possible to find a multilanguage alarms list with an accurate generation description. All digital inputs are read once every 100mSec. Analog and frequency measurements are also read every 100mSec. All digital inputs are not filtered in software as filtering is performed in hardware by capacitors mounted on the PCB. Analog measurements, including frequencies, are filtered. This filter takes the average of a given number of samples and is updated every time a new sample is taken.
5b.2 Accessing Information

All of the information can be accessed through the LCD Display by using the 3 arrow keys on the front panel of the UPS. The information is arranged in columns. The up and down the selected column and the top row of the next column. and keys allow movement
key moves from one column to the
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5b.2.1 The first column contains information relevant to the UPS as a whole. The first page will normally show the UPS rating on the first line with one of the following messages on the second: SYSTEM NORMAL TESTING BATTERY TESTING AUTONOMY E.P.O. ACTIVE NOT CALIBRATED SYSTEM TEST MODE SYSTEM IN ALARM If the battery is discharging or the inverter is in overload operation then an additional page of information is inserted at the top of the first column. This will be in the form: BATTERY DISCHARGING AUT **min DIS **min or OVERLOAD INV STOP **m:**s If both conditions are true then both pages of information will be accessible. The top of the column will be the one showing the shortest time before inverter shutdown. If none of the arrow keys is pressed, then after 5 minutes the display will return to the top page of the first column of information. This top page will automatically change according to the UPS operating condition as described above.
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Following the UPS status, each of the measurements available in the UPS can be displayed. These are: D.C. Voltage and Rectifier Current D.C. Voltage and Battery Current Inverter Voltage and Frequency Reserve Voltage and Frequency Load Voltage and Frequency Load Currents Load Percentage Loading Load Peak Factor Total time on Inverter Total time on Reserve Number of mains failures and Total Duration Total number of mains failures and Total Duration Pressing the key moves down through this list. The key can be used to move back up. At the end of the measurements, the software code, revision and release date is displayed. Note that the revision and release date of the software is also displayed for 2 seconds when the machine is switched ON.
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5b.2.2 The second column contains information relevant to the Rectifier and Battery. The first line of the display will show: RECT/BATT ALARMS While the second line will show the first active message from the following: NO ALARM ACTIVE NOT CALIBRATED DC FEEDBACK FAULT VERIFY DC FEEDBACK PRIMARY SUPPLY FAIL PHASE SEQUENCE ERROR BATTERY FAULT PCB SUPPLY FAULT BATT CONTACTOR OPEN BATTERY DISCHARGING SHUTDOWN IMMINENT DC VOLTAGE HIGH DC VOLTAGE LOW INPUT SWITCH OPEN HARMONIC FILTER OPEN RECTIFIER ALARM RECTIFIER INHIBITED RECTIFIER BLOCKED BATT. CHARGE INHIBIT If more than one of these alarms is ON, pressing the list of active messages. key will move through the
After the last active alarm, pressing the key will move through the following pages of measurements: D.C. Voltage and Rectifier Current D.C. Voltage and Battery Current
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5b.2.3 The third column contains information relevant to the Inverter. The first line of the display will show: INVERTER ALARMS While the second line will show the first active message from the following: NO ALARM ACTIVE NOT CALIBRATED PCB SUPPLY FAULT OUT OF SYNC DESATURATION OVER TEMPERATURE BYPASS SWITCH CLOSED SHUTDOWN IMMINENT DC VOLTAGE HIGH DC VOLTAGE LOW INVERTER NOT RUNNING INVERTER INHIBITED INVERTER BLOCKED INVERTER VOLTS HIGH INVERTER VOLTS LOW OVERLOAD STOP DUE TO OVERLOAD CURRENT LIMIT INVERTER STATIC SWITCH FAULT INVERTER FREQUENCY OUT OF RANGE 8% INVERTER FEEDBACK FAULT VERIFYING INVERTER FREQUENCY VERIFYING BATTERY CONTACTOR INVERTER FREQUENCY OUT OF RANGE 1% If more than one of these alarms is ON, pressing the list of active messages. key will move through the
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After the last active alarm, pressing the pages of measurements: Inverter Voltage and Frequency. Inverter current key will move through the following
5b.2.4 The fourth column contains information relevant to the Load and Reserve. The first line of the display will show: LOAD/RES ALARMS While the second line will show the first active message from the following: NO ALARM ACTIVE NOT CALIBRATED LOAD ON RESERVE LOAD NOT SUPPLIED BYPASS SWITCH CLOSED RESERVE SUPPLY FAULT RESERVE FREQ FAULT RESERVE VOLTS HIGH RESERVE VOLTS LOW STATIC SWITCH BLOCKED ON INVERTER STATIC SWITCH BLOCKED ON RESERVE INVERTER STATIC SWITCH FAULT OVERLOAD OUTPUT SWITCH OPEN RESERVE SWITCH OPEN PHASE SEQUENCE FAULT RESERVE INHIBITED If more than one of these alarms is ON, pressing the list of active messages. key will move through the
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After the last active alarm, pressing the page of measurements: Load Voltage and Frequency Load Current Percentage Loading Load Peak Factor Reserve Voltage and Frequency key will move through the following
5b.2.5 The fifth column is normally used to select the language for LCD messages. Using the and keys changes the language and pressing the key returns to the first column with the messages displayed in the selected language. Once a language has been selected, this will remain in use until it is changed using the language selection column. If the UPS is switched OFF and then ON again it will power up in the selected language. If POWER HISTORY information is available the pressing the fourth column will cause the LCD to display: POWER HISTORY DOWN TO ACCESS Pressing the key will now enter into the Power History information. When the Power History is exited, the display will return to this entry message. Pressing the key from here will move on to the language selection column, key from the
will return to the first column. and pressing again If no key is pressed for 5 minutes, the display changes back to the top row of the first column of information.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.3 Measurements 5b.3.1 D.C. voltage
One sample is taken every 100mSec and the displayed reading is filtered over 8 consecutive samples. This reading is scaled related to the battery elements number as follow: Elements Sense Input Displayed readings 144 2.215 V 326.0 V 198 2.215 V 449.5 V 240 2.215 V 544.8 V
5b.3.2 Rectifier Current

One sample is taken every 100mSec and the displayed reading is filtered over 8 consecutive samples. A sense voltage of 1V corresponds to a current of 36.4A with 144 battery elements and to 72.8A with 198 or 240 battery elements.
5b.3.3 Battery Current

One sample is taken every 100mSec and the displayed reading is filtered over 8 consecutive samples. Positive and negative battery currents are read as two separate readings. If: the battery is discharging, or the rectifier has been shutdown due to DC overvoltage, or the battery is being tested, then the negative current is displayed, otherwise the positive reading is used. A positive current of 12.5 Amps gives a sense voltage of 1V. A negative current of 83.3 Amps gives a sense voltage of 1V.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.3.4 Inverter Voltage and Frequency
The inverter voltage is full wave rectified and smoothed in hardware. This DC level is then read once every 100mSec. and the display reading is filtered over 2 consecutive samples. The sampling is synchronized to the inverter frequency to overcome aliasing effects caused by the ripple on the DC level. A DC level of 1.6V will give a displayed voltage of 240V. The inverter frequency is determined from the period of one complete cycle every 100mSec. The displayed reading is filtered over 2 consecutive samples. The period is the time between two consecutive positive going edges at pin 16 of the microcontroller.
5b.3.5 Reserve Voltage and Frequency

The reserve voltage is full wave rectified and smoothed in hardware. This DC level is then read once every 100mSec and the display reading is filtered over 2 consecutive samples. The sampling is synchronized to the reserve frequency to over come aliasing effects caused by ripple on the DC level, thus if the reserve frequency signal is not present, the displayed voltage will be zero. A DC level of 1.11V will give a displayed voltage of 240v. The reserve frequency is determined from the period of one complete cycle every 100mSec. This is taken from the output of the reserve zero crossing detector as the time between two consecutive positive going edges at pin 17 of the microcontroller. The displayed reading is filtered over 2 consecutive samples.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.3.6 Load Current

The load current waveform is sampled every 250 microseconds for one complete cycle. From these samples an RMS calculation is performed. This sampling is performed on one cycle every 100mSec and the displayed value is filtered over 2 consecutive RMS readings. The start and end points for the samplings are taken from the inverter zero crossing detector, which is the signal used to determine the frequency. If this frequency signal is not present, then the displayed current will be zero. This readings is scaled related to the machine rating as follow: Machine rating Sense Input Displayed readings 101520 kVA 1V 37.2 A 3040 kVA 1V 73.0 A 5060 kVA 1V 109.2 A
5b.3.7 Load Peak Factor and Percentage

The peak factor of the load current is obtained by dividing the filtered value of the peak load current by the filtered value of the RMS load current. The filtered value of peak load current is taken over 2 consecutive samples. The percentage RMS load current is calculated from the filtered RMS load current divided by the max RMS load current. The percentage peak load current is also calculated from the filtered peak load current divided by the max peak current. The displayed value is the highest of these two values.
5b.3.8 Total time on inverter

This page shows the total time the load has been supplied by inverter since the last machine off.
5b.3.9 Total time on reserve

This page shows the total time the load has been supplied by reserve since the last machine off.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.3.10 Total mains fail number and duration
This page shows the total number of mains failure and the total duration since the machine installation. The value is recorded on a non volatile memory so it is not lost when the machine is off. It is possible to reset this values by setting and resetting the SW 1.8 on the display board.
5b.4 ALARM MESSAGES AND DIGITAL OUTPUTS.

Alarm messages and digital outputs are set on the basis of conditions set at the digital inputs and also by conditions set by the level of the displayed analog readings. For trip settings of analog measurements, refer to Section 5b.15.
5b.4.1 Not calibrated

There are two kinds of not calibration: primary not calibration and secondary not calibration. If the alarm NOT CALIBRATED appears on the first column it is a secondary not calibration. In this case the system works correctly but the language and the number of mains faults is lost. The alarm can be reset by selecting the language. If the alarm NOT CALIBRATED appears on all the other columns it is a primary not calibration. In this case the software has shutdown the rectifier, opened the battery contactor, blocked the inverter and all the leds will flash. See section 5b.8 Data storage method for other details.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.2 Testing Battery and Battery Test Output
A battery test is automatically initiated every seven days minus 5 hours after the unit is switched on. To initiate the test the microcontroller sets the BATTERY TEST output low and the message TESTING BATTERY replaces the SYSTEM NORMAL message on the display. This automatic test is inhibited for two days following one of the below condition to prevent the testing of a discharged battery: primary mains fault input breaker open batt discharging dc feedback fault A battery test is also initiated following a DC voltage high condition to prevent overcharging of the batteries. A battery test can be manually initiated by pressing both and keys on the display simultaneously. This manual test is not inhibited following a mains failure. The next automatic test will occur one week after a manually requested test. The test lasts one minute during which time the battery voltage is continuously monitored. If the voltage falls below the Minimum Battery Test Voltage given in Sec. 5b.15 then the test is terminated and the alarm BATTERY FAULT is generated, otherwise the test is terminated after one minute and no alarm is generated. If the BATTERY FAULT alarm was active prior to the test, then the alarm is cancelled while the test is being made and may be set again depending on the test result. At the end of the test, the BATTERY TEST output is reset high and after 10 seconds the TESTING BATTERY message is cleared. This allows 10 seconds for the rectifier to phase up following the removal of the battery test signal. A battery test is automatically initiated at the start up 5 sec. after the system is normal but only if the battery are not discharged (Ibatt.pos < 1 A). This gives the possibility to check the battery connection after the UPS installation.
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5b.4.2A Testing Autonomy

A second type of battery test can also be performed. This can be only manually initiated by pressing the and keys simultaneously for two seconds. This test shuts the rectifier down using the rectifier shutdown output so that the battery is discharged. At the end of discharge, the inverter stops, the rectifier is restored and as the rectifier phases up, the inverter restarts automatically, thus returning to system normal. The test is inhibited if the reserve is outside limits. During the test, the message TESTING AUTONOMY replaces the SYSTEM NORMAL message on the display and the battery autonomy can be read. At the end of the test, 15 seconds are allowed for the rectifier to restart before the TESTING AUTONOMY message is removed. The test can be manually terminated by pressing the simultaneously and holding for 2 seconds. and keys
5b.4.3 Rectifier Shutdown Output

There are several conditions that can set the rectifier shutdown output. These are split in conditions that inhibit the rectifier, if they are not permanent, or in conditions that block the rectifier if they are permanent.
5b.4.4 Rectifier Inhibited

The rectifier inhibited alarm is active if one of the following conditions is present: high dc EPO request not calibrated and not system test If the DC voltage rises above the HIGH DC trip level given in Section 5b.15 and remains high for more than 2 seconds, the microprocessor generates a signal to shutdown the rectifier. When the DC level has fallen the rectifier is allowed to restart. While an EPO REQUEST is present the software shutdown the rectifier. See section 5b.4.24 EPO request for other details. While the system is primary not calibration condition and not in test the rectifier is shutdown. See section 5b.8 Data storage method for other details.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.5 Rectifier blocked

The rectifier blocked alarm is active if the following action is present: dc feedback fault See section next section for other details.
5b.4.6 Dc feedback fault

This alarm is generated if the dc feedback signal is interrupted. The software executes 2 tests: the first, during the start up, checks that the dc voltage is in compliance with the rectifier start up control system (See the section 5b.9 Rectifier start up control for other detail.). The second, each 100 msec. during the normal status, checks that the dc voltage is in compliance with and the battery current. If the dc feedback is fault the dc voltage rise but the microcontroller sense input goes to 0v. So there will be the condition of vdc under the loss dc reaction trip voltage with the battery charging. If this condition is met the alarm is generated(See the section 5b.15 for threshold value). The alarm is latched by software and block the rectifier and inhibit the inverter: it is possible to reset the alarm and start the rectifier by pressing the simultaneously as for the autonomy test. and keys
5b.4.7 Verify dc feedback

This message appears while the dc voltage is rising but it has not reached the battery closure threshold. See the section 5b.9 Rectifier start up control for other detail.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.8 Rectifier alarm

There are many conditions that can shutdown the rectifier but the software cant be informed about them. So it has been generated this alarm that checks the rectifier status: it needs the following condition to be set: batt discharging AND (dc voltage < vdc 210 battery discharging) AND not primary mains fault AND not rectifier shutdown output AND not recharge inhibit AND not battery contactor open AND not inv overload The alarm is cleared if one of the following conditions are matched: not batt discharging OR (dc voltage > vdc 215 battery discharging) OR primary mains fault OR rectifier shutdown output OR recharge inhibit OR battery contactor open OR inv overload The alarm has no effect on the the hardware. See section 5b.15 for Vdc levels.
5b.4.9 Battery Discharging

This alarm is generated when the DC voltage falls below the VDC 215 BATTERY DISCHARGING level. The alarm is cleared either when the voltage rises above VDC 217 BATTERY DISCHARGING level or when the positive current into the battery is above 1 Amps. See section 5b.15 for Vdc levels.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.10 Shutdown Imminent

This alarm is generated when the DC voltage falls below the VDC SHUTDOWN IMMINENT level given in Section 5b.15. The alarm is cleared when the BATTERY DISCHARGING alarm is cleared or when the DC VOLTAGE LOW alarm comes ON. The SHUTDOWN IMMINENT level increases for long discharges. for the first 60 minutes > it is fixed at 1.75 Vpc, from 60 minutes to 4 hours > it increases linearly from 1.75Vpc to 1.85Vpc, from 4 hours to 10 hours > it rises from 1.85Vpc to 1.9Vpc, from 10 hours onwards> it is fixed at 1.9Vpc.
5b.4.11 DC Voltage High

This alarm is generated when the DC voltage rises above the HIGH DC TRIP level given in Section 5b.15. It is cleared when the DC voltage falls below the HIGH DC TRIP RESET level.
5b.4.12 DC Voltage Low

This alarm is generated when the DC voltage falls below the LOW DC TRIP level given in Section 5b.15. It is cleared when the DC voltage rises above the LOW DC TRIP RESET level. It will also be cleared if the positive battery current into the battery is above 1 Amps. The LOW DC TRIP level increased for long discharges for the first 60 minutes > it is fixed at 1.65 Vpc, from 60 minutes to 4 hours > it increases linearly from 1.65Vpc to 1.75Vpc, from 4 hours to 10 hours > it rises from 1.75Vpc to 1.8Vpc, from 10 hours onwards>it is fixed at 1.8Vpc.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.13 Out of Sync

This alarm is not generated in software, but is read from the system through one of the digital inputs. It can however be inhibited in software by any of the following conditions: Inverter Off Reserve Overloaded Causing Inverter to Current Limit Reserve Fault
5b.4.14 Inverter Volts High & Inverter Volts High Output

This alarm is set when the inverter voltage rises above the INVERTER VOLTAGE HIGH level given in Section 5b.15 and is then latched and causes the inverter to stop. The alarm is cleared when the inverter is restarted. The alarm is masked if a open battery contactor request is present to avoid false alarm generation. The output is held HIGH while the alarm is active.
5b.4.15 Inverter Volts Low & Inverter Volts Low Output

This alarm and output (active high) are both set when the inverter voltage falls below the INVERTER VOLTAGE LOW level given in Section 5b.15. They are both cleared with the inverter voltage rises above this level by the specified Hysterisis for the inverter trips. The alarm is also inhibited when the inverter is off or when the reserve is overloaded forcing the inverter to fold back under current limit. The output signal is not inhibited by these conditions.
5b.4.16 Overload and Overload Output

This alarm is set when the R.M.S load current rises above the OVERLOAD TRIP CURRENT given in Section 5b.15. It is cleared when the R.M.S load current falls below the NOMINAL RMS LOAD CURRENT. If load is on inverter then this alarm appears in the page INVERTER ALARMS as well as in the LOAD/RES ALARMS page. This OVERLOAD OUTPUT is only set HIGH if load is on reserve.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.17 Stop Due to Overload

The overload operation is allowed for a duration dependent on the overload percentage: An overload of 125% is allowed for 10 min., An overload of 150% is allowed for 10 sec., Above these values, the inverter is stopped, and automatically restarts after 10 min. If the overload duration doesnt reach the above values, the inverter isnt stopped, but its nominal overload duration decreases depending on the operation status before and after the overload. I.e.: after an overload of 125% during 9min and 59sec, the UPS reaches again its nominal overload duration after 1 hour if it works at 100% load, but after 10 min if it works without load. The overload capacity is based on two curves which represent the time T(in seconds) before overheating of the magnetics or heatsink occurs at a given per unit loading, K1. Whilst in overload, a proportion of the thermal capacity is used up as follows:
A1 = T1 x (K12 1) for the magnetics 2 A2 = T2 x (K1 1.25) for the heatsink where A1 max = 337.5 and A2 max = 0.625
Below 100% loading, another curve which relates the load percentage to the time, calculates the time required to obtain again the nominal overload capacity.
5b.4.18 Current Limit

This alarm is generated when either the mean current limit input or the peak current limit input go active (HIGH). The mean current limit input is masked if it is caused by an overload while the load is on reserve.
5b.4.19 Load not Supplied

This alarm is generated if neither load on reserve or load on inverter inputs are active (HIGH) and the bypass switch is not closed. It will also be generated if the load is on inverter but the inverter is off.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.20 Inverter Not Running

This alarm is generated if the inverter has been stopped by pressing the inverter off key, or if the inverter has not yet been started. It is not generated if the inverter is stopped due to a fault condition. The inverter can be started by pressing the inverter start key.
5b.4.21 Inverter Inhibited

The inverter may be inhibited by: EPO request (See below), D.C. voltage is high for more than 2 seconds, D.C. voltage is low, bypass switch is closed and the output switch is NOT open, overload timeout. dc feedback fault The inverter will not be inhibited for D.C. voltage low, for overload timeout and for dc feedback fault if the system test mode switch (SW1.8) is ON. When all of these conditions are clear, the inverter will automatically restart.
5b.4.22 Inverter Blocked

The inverter will be blocked: by the inverter fail input going active (HIGH), overtemperature, inverter voltage high, by an inverter static switch fault. first level not calibration inverter frequency out of range inverter backfeed fault It will not be blocked for inverter voltage high, for first level not calibration and for inverter backfeed fault if in system test mode (SW1.8 ON). The alarm can be cleared and the inverter restarted by pressing the inverter start key provided that the fault condition does not still exist.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.23 System Test Mode

This message indicates that DIL switch SW1.8 is ON which puts the system into a TEST MODE. In this mode the software functionally changes as follows: Inverter can be stopped quickly by pressing the inverter off key. It is not necessary to hold it pressed for 2 seconds. Inverter wilt not be inhibited for an overload timeout. Inverter will not be inhibited for D.C. voltage low. Inverter will not be inhibited for dc feedback fault. Inverter will not be blocked for inverter overvoltage. Inverter will not be blocked for primary not calibration. Inverter will not be blocked for inverter feedback fault. The buzzer does not sound but the alarm leds are on or flashing.
5b.4.24 EPO active

An EPO request is generated by pulling the inverter reset line low. The software checks that this is not caused by the bypass breaker being closed and then stops the inverter and opens the battery contactor and shutdown the rectifier. The software waits for the pcb supply off before consider the epo signal again: in this way the machine shutdown is correctly managed. If the inverter reset line is released, the battery contactor will close and the rectifier and inverter will restart. Due to the E.P.O. hardware on the interface board, the signal has to persist at least for 400 msec. to guarantee the recognizing.
5b.4.25 Bypass Switch Closed

This alarm is generated when the bypass switch closed input is pulled high. The external hardware stops the inverter and opens the battery contactor. To prevent battery charge current from causing arcing across the contactor terminals, the Software forces the rectifier to phase back by initiating a dummy battery test. Once the contactor is open, the battery test is cancelled.
5b.4.26 Inverter feedback fault

This alarm is generated if the inverter voltage feedback is interrupted. The software checks, every 100 msec., that the inverter voltage does not go under the 60 % of nominal voltage with the inverter in normal condition. The alarm blocks the inverter and it is not active with the machine in test mode SW 1.8 = ON.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.27 Inverter frequency out of range 1% and Verifying inverter freq.
The inv. freq. out range 1% alarm is generated if the inverter is start up with out the reserve and if the frequency does not reach the nominal value + 1% after 15 sec. During the 15 sec. if the frequency is out the 1% window the verifying inv. freq. alarm will appear on the INVERTER ALARMS column. The alarm will be reset when the frequency goes inside the + 1% window. The nominal frequency value is selected by the SW 3.6 (OFF = 50 Hz, ON = 60 Hz).
5b.4.28 Inverter frequency out of range 8%

This alarm is generated by a software inverter frequency test. If it goes out a window of + 8% of the nominal value for more than 5 sec. the alarm is generated and the inverter is blocked. The nominal value is selected by the SW 3.6 (ON = 60 Hz; OFF = 50 Hz)
5b.4.29 Pcb supply fault

This alarm is generated from a defect of the inverter control board supply. The cause could be the chopper fuse blown. The alarm has no effect on the hardware and is not latched. It appears both on the RECTIFIER/BATT ALARMS column and the INVERTER ALARMS column.
5b.4.30 Verifying battery contactor

This message appears on the INVERTER ALARMS column when the start inverter is active before the battery contactor has been closed. When the inverter starts the message disappears. See section 5b.7 Inverter start/stop for other details.
5b.4.31 Inverter static switch fault

This alarm appear both in the INVERTER ALARMS section and in the LOAD/RES ALARM section. It indicates that a voltage greater than 1/3rd of the nominal AC voltage is present at the inverter sense port when the inverter is not running. This shows a voltage being feed back from the reserve supply through a faulty static switch. If an attempt is made to start the inverter, it will not start and becomes blocked until the fault is cleared.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.32 Static switch blocked on inverter
This alarm is generated if the static switch fail input signal is active (HIGH) and if the load is on inverter.
5b.4.33 Static switch blocked on reserve

This alarm is generated if the static switch fail input signal is active (HIGH) and if the load is on reserve.
5b.4.34 Primary supply fail

The primary supply fail alarm is generated by the combination of primary supply fail input (active HIGH) and the primary phase fail input (active LOW ). Due to the hardware characteristic the recorded duration of a mains failure cant be less of 15 sec.
5b.4.35 Over temperature and Inverter fail (Desaturation)

The over temperature and the inverter fail alarms are generated respectively by the over temperature input (active HIGH) and the inverter fail input (active HIGH). The signals are masked when is present a battery contactor open request to avoid false alarms generation.
5b.4.36 Load on reserve, Reserve supply fault, Reserve freq. fault, Reserve voltage high, Reserve phase fail and Reserve voltage low.
All the above alarms are generated by the respective input signals (all active HIGH excepted for reserve phase fail active LOW). The signals are masked when is present an EPO request to avoid wrong alarms while the power supply is going down.
5b.4.37 Reserve Inhibited

This alarm is generated when is active an E.P.O. request.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.4.38 The following list of alarms depend solely on the levels at their
respective inputs and are not conditioned in software other than the filtering during the reading of the inputs and the delays before the sounding of the buzzer. ALARM PHASE SEQUENCE ERROR BATT. CONTACTOR OPEN HARMONIC FILTER OPEN BATT. CHARGE INHIBIT INPUT SWITCH OPEN OUTPUT SWITCH OPEN RESERVE SWITCH OPEN INPUT Primary Phase Fail Input Batt. Contactor Open Input Harmonic Filter Open Input Battery Charge Inhibit Input Input Switch open Output Switch open Reserve Switch open ACTIVE LOW LOW HIGH LOW HIGH HIGH HIGH
5b.5 BUZZER
The buzzer will sound when any alarm goes active. For some alarms there is a delay before the buzzer sounds. These delays are as follows: Primary Supply Fail 30 Seconds Primary Phase Fail 30 Seconds Battery Discharging 30 Seconds DC Voltage High 30 Seconds Out of Sync 30 Seconds Inverter Volts Low 10 Seconds Overload 10 Seconds Load On Reserve 30 Seconds Reserve Supply Fault 30 Seconds Reserve Volts High 30 Seconds Reserve Volts Low 30 Seconds Reserve Freq Fault 30 Seconds In each case, the LED mimic and LCD messages will be updated as soon as the alarm becomes active. Only the sounding of the buzzer is delayed. The buzzer will be cancelled when all alarms clear or can be manualIy cleared by pressing the buzzer mute key. If the mute key is pressed after an alarm goes active but before the above delay has passed, this will not prevent the buzzer sounding at the end of the delay.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.6 LEDS

There are six LEDs on the UPS mimic which show at a glance the operating condition of each block of the UPS. Five LEDs are green and are one for each block as indicated by the mimic line diagram: Rectifier, Battery, Inverter, Reserve, Load. A continuous green LED indicates that that block is operating normally. A flashing green LED indicates a fault or alarm condition in the corresponding block of the UPS. The following list shows which LEDs are affected by which alarms: RECTIFIER LED: PRIMARY NOT CALIBRATION PRIMARY FAIL PHASE SEQUENCE ERROR BATTERY DISCHARGING DC VOLTAGE HIGH DC VOLTAGE LOW INPUT BREAKER OPEN HARMONIC FILTER OPEN DC FEEDBACK FAULT RECTIFIER INHIBITED RECTIFIER BLOCKED BATTERY LED: PRIMARY NOT CALIBRATION PCB SUPPLY FAULT BATTERY FAULT BATTERY CONTACTOR OPEN SHUTDOWN IMMINENT DC VOLTAGE HIGH DC VOLTAGE LOW BATT. CHARGE INHIBIT
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INVERTER LED: PRIMARY NOT CALIBRATION DESATURATION INVERTER BLOCKED INVERTER INHIBITED OUT OF SYNC OVER TEMPERATURE BYPASS SWITCH CLOSED SHUTDOWN IMMINENT DC VOLTAGE HIGH DC VOLTAGE LOW INVERTER NOT RUNNING INVERTER VOLTS HIGH INVERTER VOLTS LOW INVERTER BACKFEED OVERLOAD STOP DUE TO OVERLOAD CURRENT LIMIT WAIT BATTERY CONTAC. CLOSE PCB SUPPLY FAULT INV. BACKFEED FAULT VERIFYING INV.FREQ. INV.FREQ. OUT RANGE 1% RESERVE LED: PRIMARY NOT CALIBRATION RESERVE SUPPLY FAULT RESERVE VOLTS HIGH RESERVE VOLTS LOW RESERVE FREQ FAULT RESERVE PHASE FAIL RESERVE BREAKER OPEN RESERVE INHIBITED STATIC SWITCH BLOCKED ON INVERTER STATIC SWITCH BLOCKED ON RESERVE
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LOAD LED: PRIMARY NOT CALIBRATION LOAD ON RESERVE LOAD NOT SUPPLIED INVERTER FAULT BYPASS SWITCH CLOSED STATIC SWITCH BLOCKED ON INVERTER STATIC SWITCH BLOCKED ON RESERVE OVERLOAD OUTPUT SWITCH OPEN The sixth LED is red and is a summary alarm LED. This LED is normally off and comes on when any alarm goes active. If the buzzer is sounding, the red LED is on continuously. If the buzzer is muted, the red LED flashes to indicate that the fault condition has been accepted by the user. When all alarms clear, the red LED will return to its normal off condition.
5b.7 INVERTER STOP/START

If the machine is primary not calibrated the software does not allow the inverter to start. As explained in the next section, for service purposes, it is possible to enable the inverter start by setting the SW 1.8 in ON (TEST MODE). See next section for other details. The inverter start and stop keys on the front panel are monitored by the microprocessor. If the inverter is not running or if it is stopped due to a fault condition (Inverter Blocked), the inverter on key can be used to start the inverter. The system first resets any latched alarms. Externally latched alarms are reset by pulsing the inverter reset line low. If any block condition still exists, the inverter remains blocked. If not, the system checks for an inhibit condition. If an inhibit condition exists, the inverter is now inhibited and will start when the inhibit condition clears. Pressing the inverter on key while the inverter is running or while it is inhibited has no effect. The inverter start is executed by the software only after that the battery contactor has been closed. If the battery contactor is open and the inverter is starting (both by push button or from inhibited condition), the message VERIFYING BATT. CONT. will appear and the inverter will not start.
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If the inverter start is executed without reserve, as the inverter frequency is generated by the internal quartz, the software checks that the frequency reaches the + 1% nominal frequency window before to give the inverter start. While the software checks the frequency the message VERIFYING INV. FREQUENCY appear on the display. See 5b.4.27 for other details. If the inverter is running, it can be stopped by pressing the inverter stop key. This key must be held pressed for two seconds before the inverter will stop, except in system test mode. While the key is held pressed and the inverter is still running, the buzzer will sound continuously as a warning that the inverter is about to stop. Pressing the inverter stop key while the inverter is blocked, or not running has no effect. Pressing it while inhibited will set the inverter to not running. If the unit is powered down, either by opening the main switch or at end of discharge, the software remembers the condition of the inverter before it powered down. If the inverter was running or it was inhibited then when the power is restored, the inverter will restart automatically. If the inverter was not running or was blocked. when the power is restored, the inverter will remain off.
5b.8 DATA STORAGE METHOD DESCRIPTION

With the software coded 10H00207.108 a new data storage method has been adopted. The whole configuration data recorded in the non volatile ram has been spilt in 2 parts with different priority levels: PRIMARY and SECONDARY level. Each structure includes a different number of data ended with a checksum value (2 bytes) that depends on the data recorded. The PRIMARY structure include the following data: VALUE DATA LENGTH CALIBRATION 2 bytes SELECTED RATING 1 byte PRIMARY CHECKSUM 2 bytes This is the most important data recorded: without this data the machine rating is lost and the analog measures are not calibrated. If the PRIMARY CHECKSUM is wrong the machine is PRIMARY NOT CALIBRATED.
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The SECONDARY structure includes the following data: VALUE DATA LENGTH INV_AUTO_START_ADDRESS 1 byte SELECTED_LANGUAGE_ADDRESS 1 byte MAINS_FAIL_COUNT_ADDRESS 2 bytes MAINS_FAIL_DAYS_ADDRESS 2 bytes MAINS_FAIL_HOUR_ADDRESS 1 byte MAINS_FAIL_MIN_ADDRESS 1 byte MAINS_FAIL_SEC_ADDRESS 1 byte SECONDARY_CHECKSUM_ADDRESS 2 bytes This is the less important data recorded: without this data the machine loses the language, the inverter auto start and the number of mains failures. If the SECONDARY CHECKSUM is wrong the machine is SECONDARY NOT CALIBRATED. To be compatible with the old data storage method, the above structure has been written in the non volatile ram after the old one: in this way if an old version of software is used it can read the right data from the same address. The first time that the new eprom reads the data from the non volatile ram, it builds the above structures and inserts a code to understand that the new structures has been built. In this way every time, after the first time, the machine is started up, the checksums are recalculated, compared with the recorded one and if there is a mismatch an alarm is generated related to the wrong structure. If a SECONDARY NOT CALIBRATED is recognized the alarm NOT CALIBRATED will appear on the first column: the machine works with data related to the secondary structure lost. It possible to reset the alarm condition by selecting the language. If a PRIMARY NOT CALIBRATION is recognized the alarm NOT CALIBRATED will appear on all the columns except the first: the software inhibits the rectifier, keeps the battery contactor open, the inverter off and the load on reserve. For service purposes it is possible to start the machine by setting the SW 1.8 ON (TEST MODE): in this way the rectifier will start, the battery contactor will close and the inverter will accept the start. As the rating is lost, the machine will display 10 kVA, the overload calculation and load percentage will be disabled. If the message NOT CALIBRATED appears on all the column it means that it is the first time this eprom is used and the old data structure is not correct: the machine works in PRIMARY NOT CALIBRATED condition.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.9 RECTIFIER STARTUP CONTROL

A Vdc control test has been implemented to checks the voltage rising during the rectifier start up. The test purpose is to check the rectifier feedback before closing the battery contactor and enabling the inverter start. Before the test starts, the software waits for the following alarm conditions related to the rectifier to be OFF: primary supply fail primary phase fail rectifier inhibited rectifier blocked epo request The test checks the dc voltage reaches the 50% of nominal voltage by 10 sec. and it reaches the 90% of nominal voltage after 10 sec. the 50% threshold exceeding. While the voltage is rising and before the 90% threshold exceeding the message VERIFY DC FEEDBACK appears on the RECTIFIER\BATT column. If the voltage rising is not in compliance with the test, the rectifier is shutdown, the battery contactor open and the message DC FEEDBACK FAULT appears in the RECTIFIER\BATT ALARM column. It is possible to restart the rectifier by pressing the and arrow for 2 seconds: in this way the above test will be executed again before the battery contactor closes and the inverter start is enabled. The battery contactor closure is executed when the Vdc reaches the RECTIFIER_90_PERCENT_TRIP (see section 5b.15 for values).
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.10 RAU and AS400 outputs
There are five outputs which are used to drive the RAU and AS400 interfaces, these are: System normal output: This is set when there are no active alarms. Load on Reserve Alarm Output: This is set according to the signal read at load on reserve input. Primary Supply Fail Alarm Output: This is set if either the primary supply fail input or primary phase fail input is active. Shutdown imminent Alarm Output: This output is set when the shutdown imminent alarm is active. Inverter Fail Alarm Output: This is set if any of the following conditions is active: Out of sync alarm, Over temperature alarm, Inverter fail input, Inverter voltage high, Inverter voltage low, Overload with load in inverter. Each output has a delay of 10 seconds before it goes active following its respective alarm being set. The outputs will go off as soon as the alarm clears. This is to prevent transients from unnecessarily alerting the user.
5b.11 POWER HISTORY

The POWER HISTORY function continuously records all information on alarms and measurements in a circular buffer. The buffer holds all of the alarms and measurements which are accessible through the display. If a fault occurs which causes an inverter block, the power history function continues recording information for a further one second and then freezes. At this point, all alarms and measurements are saved from up to 10 seconds before the inverter block to one second after it in 0.1 second steps.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.11.1 Display Power History

To display the power history information when it has been made available due to an inverter block, it is necessary to move across the columns of information using the key until the power history entry message is displayed: POWER HISTORY
DOWN TO ACCESS This message indicates that information is available and would not otherwise be displayed. Pressing the key at this point moves into the power history information. When power history information is displayed, the arrow keys are redefined. The and move backwards and forwards through time in 0.1 second steps. This takes it possible to determine the exact moment in which an alarm became active with respect to another alarm or measurement change, so the actual sequence of events leading up to the inverter block can be examined. The key moves from one alarm to the next. Only alarms which were active at some time during the eleven second history period will be displayed. This makes it easier to locate a particular alarm without the need to step through a long list of alarms which do not apply. When the power history information is first accessed, the display shows the first alarm which was active and its condition at time = 0.0 seconds, the instant at which the block occurred. The top line shows the time in seconds relative to the moment the block occurred The bottom line of the display shows the alarm message The top line shows on the right hand side, whether the alarm was on or off at this moment in time. Pressing the key moves through each of the active alarms. After the last alarm the option is given to exit from the power history information by pressing the key: POWER HISTORY UP TO EXIT returns to the history entry message and Pressing the columns of information as described in Section 2. then moves on through
Pressing the key when the exit message is displayed does not exit from the power history but moves on to display the measurements.
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Measurements are displayed on the bottom line of the LCD. The top line shows the Section of the UPS to which the readings refer and time, relative to the moment the block occurred, at which the readings were taken. Pressing the RIGHT key now moves through the measurements and then back to the first alarm.
5b.11.2 Manual Power History Request

A power history block may be manually requested at any time by pressing the and keys simultaneously. From this moment in time, information is recorded up to 10 seconds before and one second after in 0.1 second steps. When all information has been saved, the display will automatically change to show the first activated alarm and its condition at the moment of the request (time = 0.0 seconds). If the power history had already been blocked before the manual request was made, power history information would still be displayed as described. However, the information displayed it that which was captured when the block occurred, and not when the manual request was made.
5b.11.3 Power History Restart

The power history function will automatically start to collect new information if the inverter is running and the power history data is not being displayed. Once new information has started to be collected, all old information is lost. Thus if the inverter is restarted following a block condition before the information has been reviewed, it will not be possible to access this information which is now lost. If, however, the inverter should be blocked again, then information will be captured about this new block. This information will remain available until the inverter is again restarted. If the information has been manually requested, and no inverter block has occurred, this information will be lost as soon as the exit power history option is selected.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.12 Battery autonomy

This is the calculation of the remaining time before inverter stop due to DC VOLTAGE LOW. Battery autonomy and discharge time are only displayed when the battery is discharging. When it is displayed, it becomes the top row of the first column of information and hence will be displayed automatically if no arrow key has been pressed in the last five minutes. The top line of the LCD shows the UPS rating while the bottom line shows the autonomy time remaining and the discharge time already passed in minutes. The discharge time will not start counting unless the inverter is running, but once started will continue to count until the end of discharge is reached even if the inverter stops running before this. The autonomy is initially shown as in calculation although the software is not able to calculate the autonomy during the initial part of the discharge curve. When the battery voltage has fallen below 1.98 volts per cell and a further 30 seconds have passed, the software makes the first attempt at calculating the battery autonomy, and the result is displayed. The calculation is based on battery voltage and the change in battery voltage since the last calculation. If the fall in battery voltage since the last calculation is less than 17mV/Cell then no calculation is made. If it does not fall by this amount within one minute then a new calculation is forced each minute, until this voltage gap has passed, If the battery voltage rises slightly between readings, no new calculation is made. If this rise is greater than 5mV/Cell, the display shows AUTONOMY IN CALCULATION and the software then waits for the voltage to start falling again.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.13 RS232 PORT

The RS232 port is handled by software. Its function depends on the setting of display board DIL switches SW2.1 and SW3.5. With these switches is possible select the followings options: SW 2.1 SW 3.5 Option installed OFF OFF Test terminal ON OFF Easy OFF ON Life To have more details related to each option and to other switches on the display board make, reference to section 5b.16 and to user or installation manuals of Easy or Life.
5b.14 INVERTER VOLTAGE CONTROL

The microprocessor does not control with feedback loop the inverter voltage but it gives only an open loop offset to regulate the voltage level related to the output value selected by the SW 1.1 and SW 1.2.
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.15 EDP70 Display Board trip settings
The following is a list of voltage and current trip points which are controlled by the display control board.
INVERTER VOLTAGE
380V
400V
358.0V 438.0V 2.0V
415V
374.0V 457.2V 2.0V
Inverter Voltage LOW 342.0V Inverter Voltage HIGH 419.0V Hysterisis for Inverter Low Trip 2.0V
DC VOLTAGE
144 cells 198 cells 240 cells
Low DC Trip 237.6V 326.7V 396.0V Low DC Trip Reset 309.6V 425.7V 516.0V VDC 217 Battery Discharging 302.4V 415.8V 504.0V VDC 215 Battery Discharging 310.5V 425.7V 516.9V VDC 210 Battery Discharging 312.5V 429.7V 520.8V Rectifier 50 % trip 163.4V 224.7V 272.4V Rectifier 90 % trip 294.0V 404.6V 490.3V VDC Shutdown Imminent * 252.0V 346.5V 420.0V Minimum Battery Test Voltage 273.6V 376.2V 456.0V High DC Trip 345.6V 475.2V 576.0V High DC Trip Reset 340.0V 467.5V 566.7V Loss dc reaction trip 230.4V 316.8V 384.0V * = Shutdown imminent is reset when battery is no longer discharging (i.e. > VDC 217 Battery Discharging).
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LOAD CURRENT @ 380V 10kVA 15kVA 20kVA 30kVA 40kVA 50kVA 60kVA Overload Trip Current Max Peak Load Current * Max RMS Load Current *
15.9A 23.9A 31.8A 47.7A 63.6A 79.8A 95.7A 37.9A 56.8A 75.8A 113.6A 151.5A 189.9A 227.9A 15.2A 22.7A 30.3A 45.5A 60.6A 76.0A 91.2A
LOAD CURRENT @ 400V 10kVA 15kVA 20kVA 30kVA 40kVA 50kVA 60kVA Overload Trip Current Max Peak Load Current * Max RMS Load Current *
15.2A 22.8A 30.4A 45.7A 60.9A 75.8A 90.9A 36.2A 54.3A 72.5A 108.7A 144.9A 180.4A 216.5A 14.5A 21.7A 29.0A 43.5A 58.0A 72.2A 86.6A
LOAD CURRENT @ 415V 10kVA 15kVA 20kVA 30kVA 40kVA 50kVA 60kVA Overload Trip Current 14.6A 21.9A 29.2A 43.8A 58.3A 73.0A 87.6A Max Peak Load Current* 34.7A 52.1A 69.4A 104.2A 138.9A 173.9A 209A Max RMS Load Current * 13.9A 20.8A 27.8A 41.7A 55.5A 69.6A 83.5A * = Used for percentage load calculation
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Para 5b = SOFTWARE DESCRIPTION ( FSB >= 30 ) 5b.16 DIL Switch definitions

OUTPUT VOLTAGE SW1.1 SW1.2 DC VOLTAGE SW1.3 SW3.2 EDP50 UPS RATING 400V TEST OFF OFF 144 cells ON OFF 380V ON OFF 400V OFF ON 415V ON ON 240 cells ON ON
198 cells OFF ON
6kVA
7.5kVA 8kVA
10kVA 15kVA 20kVA
SW1.4 OFF ON OFF ON OFF ON SW1.5 OFF OFF ON ON OFF OFF SW1.6 OFF OFF OFF OFF ON ON Any non valid combination will result in 10kVA but should not be used. EDP70 UPS RATING
10kVA 15kVA 20kVA 30kVA 40kVA 50kVA 60kVA
SW1.4 OFF ON OFF ON OFF ON OFF SW1.5 OFF OFF ON ON OFF OFF ON SW1.6 OFF OFF OFF OFF ON ON ON Any non valid combination will result in 10kVA but should not be used. Auto voltage control SW1.7 ON = auto control voltage on OFF = no auto control voltage
System test Mode SW1.8 ON = System test Mode OFF = normal UPS operation Test terminal OFF OFF LIFE OFF ON EASY JBUS ON OFF ON ON
Serial Port Functions: SW2.1 SW3.5
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EASY + Test term. + JBUS Serial Port Baud Rate SW2.2 SW2.3 (default setting = 9600 ) LIFE Serial Port Baud Rate SW2.2 SW2.3 (default setting = 1200 )
1200 OFF OFF
4800 ON OFF
9600 OFF ON
19200 ON ON
300 OFF OFF
1200 ON OFF
1200 OFF ON
1200 ON ON
UPS Identifier for EASY1000 Software SW2.7 UPS No 1 OFF UPS No 2 OFF UPS No 3 OFF UPS No 4 OFF UPS No 5 OFF UPS No 6 OFF UPS No 7 OFF UPS No 8 OFF UPS No 9 ON UPS No 10 ON UPS No 11 ON UPS No 12 ON UPS No 13 ON UPS No 14 ON UPS No 15 ON UPS No 16 ON When only 1 UPS is connected switches OFF) SW2.8 NOT USED SW2.6 SW2.5 SW2.4 OFF OFF OFF (std setting) OFF OFF ON OFF ON OFF OFF ON ON ON OFF OFF ON OFF ON ON ON OFF ON ON ON OFF OFF OFF OFF OFF ON OFF ON OFF OFF ON ON ON OFF OFF ON OFF ON ON ON OFF ON ON ON to a PC, Identifier No 1 MUST be used (all
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UPS TYPE SW3.1 OFF = EDP50 ON = EDP70
EDP RETROFIT (EDP50 only) SW3.3 OFF = normal setting ON = early EDP50 (without Idc measurement)
EDP TYPE SW3.4 OFF = EDP EUR ON = EDP USA OFF = 50 Hz ON = 60 Hz
SW3.6
LIFE MANUAL CALL Press keys UPS IN SERVICE Press keys SETUP LIFE Press keys START RECTIFIER or AUTONOMY TEST Press keys BATTERY TEST Press keys POWER HISTORY Press keys DOWN + RIGHT for 2 seconds UP + DOWN for 2 seconds UP + RIGHT for 2 seconds RIGHT + BUZZER MUTE for 2 seconds DOWN + BUZZER MUTE for 2 seconds UP + BUZZER MUTE for 2 seconds
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Para 6.1 = TROUBLE SHOOTING ( FSB < 30 )
TROUBLE SHOOTING
6.1 TROUBLE SHOOTING (for UPS having FSB status < 30)
The following is a guide to troubleshooting, starting from ALARM MESSAGES appearing on UPS display. As some messages can be generated by other messages, in this case the action is referred to the originating message(s). ALARM MESSAGES are organized on display in pages and are here presented per page.
GENERAL INSTRUCTIONS
RISK OF ELECTRICAL SHOCK AND DAMAGE TO UPS AND LOAD Instruction hereinafter contained require to be performed by trained personnel, being fully aware of the more detailed information contained in the Technical Manual of which this is a section. UPSs are subject to continuous improvement, therefore before to proceed with following troubleshooting check that any upgrade FSB has been applied to the unit. This troubleshooting does not recall all the time that the fault can be due to bad connections. Check all connections before entering into a deeper investigation. In many cases the replacement of boards is suggested as a tentative, therefore it is suggested that, if replacement does not solve the problem, the old board is reinstalled before proceeding to next step in order to save spare boards. Replacement of most of the boards must be done following the procedure included with the spare board and not recalled here.
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Para 6.1 = TROUBLE SHOOTING ( FSB < 30 ) BATTERY/RECTIFIER

PRIMARY SUPPLY FAIL Is mains voltage present and within tolerance (230 V + 20%) at UPS terminals U, V, W versus N ? NO> Look for reason YES> Is mains voltage present downstream S1 (wires 5, 6, 7, versus 8) ? NO> Check integrity of S1 YES> Are fuses F1M, F2M, F3M on board SP10 blown ? YES> Replace fuses.(If they blow again, replace SP10) NO> Replace board SP5. Solved ? NO> Replace board SP1. PHASE SEQUENCE ERROR Have the upstream connections to UPS been modified ? YES> Correct the connections to UPS terminals NO> Is mains voltage present and within tolerance (230 V + 20%) at UPS terminals U, V, W versus N ? NO> Look for reason YES> Are fuses F1M, F2M, F3M on board SP10 blown ? YES> Replace fuses.(If they blow again, replace SP10) NO> Replace board SP3. Solved ? NO> Replace board SP5.
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BATTERY FAULT Is contactor RLA closed ? NO> Check for integrity of RLA, eventually replace SP1 (board driving RLA) YES> Warning !! (During following steps the load will be supplied from mains, therefore take needed precautions.) Go into Manual Maintenance Bypass mode following related instructions. With a DC DVM read battery voltage at terminals 1M, pins (+VE, VE in 10, 15, 20 kVA) (+, in 30, 40, 50, 60 kVA). Is it higher than 240 V for 1st case and higher than 330 V for 2nd case ? NO> Check for integrity of battery fuse and of all connections between UPS and batteries, and between all battery blocks YES> Return to Normal mode following related instruction. Wait for battery voltage to stabilize at float level. With a DC DVM read voltage across each battery block. It must be within following tolerance: Block voltage = (Total battery voltage /number of blocks ) + 3% Battery blocks outside above tolerance should be considered as faulty and replaced with same type and same manufacturer blocks. If the battery has been in operation longer than 50% of expected life, consideration should be given to the possibility to replace the complete battery: contact supplier. For more details see IN FIELD BATTERY REPLACEMENT PROCEDURE. BATT. CONTACTOR OPEN Is DC VOLTAGE HIGH present ? YES> See related instruction NO> Is DC VOLTAGE LOW present ? YES> See related instruction NO> Is BYPASS SWITCH CLOSED (Inverter page) present ? YES> See related instruction NO> Is green led DL1 on SP11 lit ? YES> Replace SP1 NO> Replace SP11
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BATTERY DISCHARGING Is PRIMARY SUPPLY FAIL present ? YES> See related instruction NO> Replace SP3. Solved ? NO> With a DC DVM read battery voltage and compare with reading on display. If display outside + 1% tolerance, adjust the reading by turning P8 on SP1. Solved ? NO> Replace SP1 SHUTDOWN IMMINENT This alarm appears near the end of battery discharge, to warn user before Inverter switching off. See BATTERY DISCHARGING instructions. DC VOLTAGE HIGH Replace SP3. Solved ? NO> With a DC DVM read battery voltage and compare with reading on display. If display outside + 1% tolerance, adjust the reading by turning P8 on SP1. Solved ? NO> Replace SP1 DC VOLTAGE LOW Is PRIMARY SUPPLY FAIL present ? YES> See related instruction NO> See DC VOLTAGE HIGH instruction INPUT BREAKER OPEN Is S1 open ? YES> Understand the reason and close it NO> Check for integrity of auxiliary contact of S1 and its connections BATTERY CHARGER INHIBITED This command is given from outside the UPS. Check connections and external contacts connected to terminal 1M, pins 34 (open contact = inhibit)
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Para 6.1 = TROUBLE SHOOTING ( FSB < 30 ) INVERTER

EPO This command is given from outside the UPS. Is an EPO (Emergency Power Off) command present ? YES> Understand the reason and switch off the external command NO> Check for external contact(s) and connections to terminal 1M, pins 12 (open = EPO). Solved ? NO> Replace SP1 OUT OF SYNC Occasional OUT OF SYNC are normal in case of disturbed mains or supply from generator. If the alarm is persisting: is RESERVE FREQ FAULT (load and reserve page) present ? YES> See related instruction NO> Replace SP2 OVERTEMPERATURE This alarm causes the inverter to stop and the load to be transferred to reserve: this condition remains locked until it is reset pushing Inverter START. Push Inverter START: does it start? YES> Check for reasons of alarm: ambient temperature too high, fans not well running, air inlets and outlets obstructed NO> Check on SP2, connector 5PL, pins 12: is DC voltage zero ? YES> Replace SP2 NO> Is excessive temperature still present on heatsinks and inside UPS ? YES> Wait for cooling and check for reasons: ambient temperature too high, fans not well running, air inlets and outlets obstructed NO> Check for integrity of thermoswitches and their connections BYPASS SWITCH CLOSED Is S3 closed ? YES> Understand reason and eventually return to Normal mode following related instruction NO> Check for integrity of auxiliary contact of S3 and its connections INVERTER NOT RUNNING Inverter STOP has been operated. Understand reason and operate START.
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INVERTER INHIBITED This alarm is generated by following: BYPASS SWITCH CLOSED DC VOLTAGE HIGH DC VOLTAGE LOW STOP DUE TO OVERLOAD EPO Check for presence of any of above alarms and see related instructions. INVERTER BLOCKED This alarm is generated by following: DESATURATION OVERTEMPERATURE DC VOLTAGE HIGH DC VOLTAGE LOW INVERTER FREQ. FAULT STATIC SWITCH FAULT (in Inverter page) Check for presence of any of above alarms and see related instructions. INVERTER VOLTS HIGH Operate Inverter START and the alarm is reset. Does it come back again after a while? YES> Note: this alarm causes the Inverter to be stopped, therefore following checks must be performed operating each time START in order to start temporarily the Inverter. With a DC DVM measure on SP1 the voltages at TP9, TP7, TP4 versus 0VA1 (anode of diodes D31,33,37). Operating START, are all 3 voltages overcoming 1 Volt before the alarm becomes active ? YES> Replace SP2 NO> Are F1I, F2I, F3I on SP10 blown ? YES> Replace fuses. If they blow again, replace SP10 NO> Replace SP1 INVERTER VOLTS LOW Operate Inverter START and the alarm is reset. Does it come back again after a while? YES> Replace SP2 OVERLOAD Check for load level and eventually reduce it or balance it better between phases. Note: when this alarm is persistent, it causes STOP DUE TO OVERLOAD and the load is transferred to reserve.
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STOP DUE TO OVERLOAD See OVERLOAD instructions CURRENT LIMIT Is OVERLOAD present ? YES> See related instruction NO> The alarm is due to a load drawing highly distorted current (with high Pk.F) from one or more phases. Check on display (Load Measures page) if one or more phases are loaded at high % with Pk.F higher than 3 and redistribute the loads to obtain lower and more balanced Pk.F on the 3 phases. STATIC SWITCH FAULT Check for integrity of Inverter Static Switch SCRs: with Inverter in STOP and load on reserve, using an AC DVM read the voltage at wires 19, 20, 21, versus 42 (neutral). If you read more than 70 Volts the SCRs of that phase are faulty. Replace with same type and same manufacturer. SYSTEM TEST MODE Switch 18 on SP5 is in ON position. This is a test condition that excludes following alarms: OVERLOAD DC VOLTAGE HIGH DC VOLTAGE LOW Is switch 18 in ON position ? YES> Understand reason and move it to OFF NO> Replace SP5
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DESATURATION Operate Inverter START. Does it start ? YES> Check for integrity of Static Switches and level of load for each phase. Investigate if any heavy step load can occur. NO> With Inverter in OFF, read with a DC DVM the voltage across the power transistors (Emitter to Collector). It must be around 50% of total DC BUS voltage. Is this correct ? NO> Replace power transistor showing low voltage, replace transistor on same branch (therefore showing high voltage), replace Driver board ( SP8 A or B or C) of same branch. YES> Check for correct supply voltages on Driver boards (+7.5, 11.5 Volt). Are these correct ? NO> If all Driver boards show wrong supply voltage, then replace SP11, otherwise replace the Driver board(s) showing the wrong supply voltage YES> Replace SP2. Solved ? NO> Replace one by one the Driver boards
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Para 6.1 = TROUBLE SHOOTING ( FSB < 30 ) LOAD AND RESERVE

LOAD ON RESERVE It is a temporary alarm, showing that load has been transferred to reserve due to an overload. Within 10 seconds load is transferred again to Inverter. If this is not true look for other alarms present and follow related instruction. LOAD NOT SUPPLIED Load has been switched off due to other alarms. Check for any of them present and follow related instruction. RESERVE FAULT Are any of following alarms present ? RESERVE FREQ. FAULT RESERVE VOLTS HIGH RESERVE VOLTS LOW YES> See related instruction NO> Replace SP4. Solved ? NO> Replace SP5 RESERVE FREQ. FAULT Frequency of Reserve mains is out of accepted tolerance. This can depend on mains disturbances or can happen when supplied from generator. Can the load accept wider frequency tolerance than that currently set on SP4 (user must be involved in such decision) ? NO> Reserve supply must be improved or a Reserve UPS can be suggested YES> Select new frequency tolerance on SP4 (SW 16, SW 17) RESERVE VOLTS HIGH or RESERVE VOLTS LOW Voltage of Reserve mains is out of accepted tolerance. This can depend on weak or poorly regulated supply network. Can the load accept wider tolerance than that currently set on SP4 (user must be involved in such decision) ? NO> Contact the responsible of local mains network and the Electricity Supplier to identify corrective actions YES> Select new voltage tolerance on SP4 (SW 21, SW 22)
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STATIC SWITCH FAULT Is the load on reserve ? YES> Check for integrity of SCRs of Inverter Static Switch NO> Check for integrity of SCRs of Reserve Static Switch. Solved ? NO> Replace SP4 OUTPUT BREAKER OPEN Is S4 open ? YES> Understand reason and close it NO> Check for integrity of its auxiliary contact and connections RESERVE BREAKER OPEN (not always present being an option) Is S2 open ? YES> Understand reason and close it NO> Check for integrity of its auxiliary contact and connections PHASE SEQUENCE ERROR Have the upstream connections to UPS been modified ? YES> Correct the connections to UPS terminals NO> Is mains voltage present and within tolerance (230 V + 20%) at UPS terminals U, V, W (or U1, V1, W1 in case of separate reserve input option) versus N ? NO> Look for reason YES> Are fuses F1R, F2R, F3R on board SP10 blown ? YES> Replace fuses.(If they blow again, replace SP10) NO> Replace board SP1. Solved ? NO> Replace board SP5.
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Para 6.2 = TROUBLE SHOOTING ( FSB > = 30 )
6.2 TROUBLE SHOOTING (for UPS having FSB status > = 30)
The following is a guide to troubleshooting, starting from ALARM MESSAGES appearing on UPS display. The target of this document is to describe how each alarm of this eprom is generated. The alarm list is divided in the same 4 groups that are present on the machine display: MAINS ALARMS RECTIFIER / BATTERY ALARMS INVERTER ALARMS LOAD / RESERVE ALARMS To help the users in the alarms recognizing, each item is reported in all the 5 languages present on the UPS. Legend: .. input with input are identified the display board digital inputs. Refer to DISPLAY CONTROL BOARD electrical drawing. .. output with output are identified the display board digital outputs. Refer to DISPLAY CONTROL BOARD electrical drawing. .. condition with condition are identified the machine status that could be a combination of digital and analog input. dc voltage, battery current, inverter voltage ph1, inverter voltage ph2, inverter voltage ph3, reserve voltage, load current ph1, load current ph2, load current ph3: all these are display board analog inputs. AND is a boolean operator. The expression is true if both the operands that are before and after the operator are true. OR is a boolean operator. The expression is true if at least one operator is true. not is a logical operator the invert the operand value. (PLXX.YY) this string identify connector (XX) and the pin (YY) related to the digital input or output
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MAIN ALARMS
1. SYSTEM TEST MODE SWITCH POSIT. TEST TESTBETRIEB SISTEMA IN VERIFICA TEST DEL SISTEMA The machine is in test mode if the SW 1.8 of the display board is set in ON. 2. TESTING BATTERY BATTERIE EN TEST BATTERIETEST PROVA DELLA BATTERIA PRUEBA DE BATERIAS This message is active while the UPS is testing the battery. 3. TESTING AUTONOMY AUTONOMIA EN TEST AUTONOMIETEST TEST AUTONOMIA PRUEBA DE AUTONOMIA This message is active while a autonomy test is executing. 4. E.P.O. ACTIVE ARRET URGENCE ACTIVE NOTAUS AKTIV E.P.O. ATTIVO E.P.O. ACTIVO This alarm is generated by the following condition: (inverter reset input) (PL8.26) AND (not inverter reset output) (PL8.26) AND (not bypass breaker closed input) (PL8.17) AND (not output breaker open input) (PL8.14)
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5. NOT CALIBRATED NON ETALONNE NICHT JUSTIERT NON CALIBRATO NO CALIBRADO This alarm is present in the main page means a secondary not calibration. 6. SYSTEM IN ALARM FONCTIONNEM. ANORMAL STOERBETRIEB SISTEMA IN ALLARME SISTEMA EN ALARMA This alarm is active when at least one alarm is present in the machine. 7. MODEM SETUP FAILED DEFAULT INIT. MODEM MODEM SETUP FAISCH PROG. MODEM FALLITA FALLO CONFIG. MODEM This message appears only when the Life option is enabled and indicates that the UPS is unable to programme the Modem. 8. LIFE SETTINGS LOST CONFIG. LIFE PERDUE LIFE SETUP FEHLT PERDITA PARAM. LIFE PERDIDA CONFIG.LIFE This alarm is displayed at UPS power up if Life is selected as serial option; it indicates that Life configuration has been reset to default values and needs to be set up again. Refer to Life Users Manual for further details.
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9. LIFE DATA LOST DONNEES LIFE PERDUES LIFE DATEN N. VERF. PERDITA DATI LIFE PERDIDA DATOS LIFE This alarm is displayed at UPS power up if Life is selected as serial option; it indicates that Life data has been deleted from the UPS memory and that data monitoring has configuration has been interrupted. Refer to Life Users Manual for further details.
RECTIFIER AND BATTERY ALARMS

1. NOT CALIBRATED NON ETALONNE NICHT JUSTIERT NON CALIBRATO NO CALIBRADO This alarm is present in the this page means a primary not calibration. 2. DC FEEDBACK FAULT PERTE DU RETOUR DC DC REGS. FEHLT PERDITA CONTR. PONTE FALLO REDLIMEN. REC This alarm is generated if, at the machine start up, the dc voltage does not reach the 50% of nominal voltage by 10 sec. or if it does not reach the 90% of nominal voltage after 10 sec. the 50% threshold exceeding. The alarm could be generated in the same way when a rectifier start up is executed by hand with the arrow keys. Vdc 50% nominal voltage = 81.7 V (72 el) 163.4 V (144 el) Vdc 90% nominal voltage = 147.0 V (72 el) 294.0 V (144 el) The same alarm could be generated after the start up if: (dc voltage < loss dc reaction trip voltage) AND (batt charging condition) AND (not system test condition) AND (not primary mains fault condition) AND (not epo request condition) AND (not rectifier shutdown output) (PL8.26)
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where: loss dc reaction trip voltage (230.4 V, 144 el) (316.8 V, 198 el) (384.0 V, 240 el) batt charging condition is true if: (battery current > i batt charging) AND (not battery contactor open input) (PL8.18) where: i batt charging = 1 A system test condition see point 1 of MAIN ALARMS primary mains fault condition see point 4 epo request condition see point 4 of MAIN ALARMS 3. VERIFY DC FEEDBACK VERIF. TENSION CC UEBERPRUEFUNG DC VERIF. CONTR. PONTE VERIF.REDLIM.REC. This message is active at the start up while the software is checking the dc voltage. It will be reset when the dc voltage exceeds the 90% of nominal voltage threshold. 4. PRIMARY SUPPLY FAIL ABSEN. RES. PRINCIP. NETZAUSFALL MANCANZA RETE FALLO DE RED This alarm is generated by the following input signals combination: (pri supply fail input) (PL8.8) OR ((pri phase fail input) (PL8.9) AND (not input breaker just closed)) where: input breaker just closed true since the input breaker is closed for 500 msec. 5. PHASE SEQUENCE ERROR DEFAUT ORDRE PHASES FALSCHES DREHFELD SENSO CICLICO ERRATO ERROR SECUENCIA FASE This alarm is generated by the following input signal: pri phase fail input (PL8.9)
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6. BATTERY FAULT DEFAUT BATTERIE BATTERIE DEFEKT GUASTO BATTERIA FALLO DE BATERIAS This alarm is generated if during the battery test: dc voltage < minimum battery test volt. (273.6 V, 144 el) (376.2 V, 198 el) (456.0 V, 240 el) 7. PCB SUPPLY FAULT DEFAUT ALIM.CARTES VERSORGUNGSFEHLER PL GUASTO ALIM. PCB FALLO ALIM.CONT. This alarm is active if the following equation is true: (inverter off condition) AND (peak limit input) (PL8.3) AND (current limit input) (PL8.2) AND ((batt charging condition) OR (not dc voltage under 90 condition)) AND (not rectifier shutdown output) (PL8.26) where: inverter off condition is true when the inverter has been stop by hand or when inhibited or blocked or at the machine start up. batt charging condition is true if: (battery current > i batt charging) AND (not battery contactor open input) (PL8.18) where: i batt charging = 1 A not dc voltage under 90 condition means that the dc voltage is greater than the 90% of nominal voltage.
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8. BATT CONTACTOR OPEN CONTACT.BATT. OUVERT BATTERIEKONT. OFFEN TELER. BATT. APERTO CONT. BAT. ABIERTO This message is generated by the digital input: batt contactor open input (PL8.18) 9. BATTERY DISCHARGING BATTERIE EN DECHARGE BATTERIEENTLADUNG BATTERIA IN SCARICA BATERIA EN DESCARGA This message is generated by the following condition: (not batt charging condition) AND (dc voltage < vdc 215 battery discharging) where: vdc 215 battery discharging (309.6 V, 144 el) (425.7 V, 198 el) (516.0 V, 240 el) batt charging condition is true if: (battery current > i batt charging) AND (not battery contactor open input) (PL8.18) where: i batt charging = 1 A 10. SHUTDOWN IMMINENT COUPURE IMMINENTE WARNUNG VERSORG.ENDE ARRESTO IMMINENTE PROXIMA DESCONEXION This alarm is generated if the dc voltage is less the shutdown imminent trip voltage. This is a software regulated threshold that increases with the battery discharging time. It starts from 1.75 V/el at the battery discharging beginning until to 1.9 V/el after 10 hours.
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11. DC VOLTAGE HIGH SURTENSION DC DCUEBERSPANNUNG TENS. CONTINUA ALTA TENS. BATERIA ALTA This alarm is generated if: dc voltage > high dc trip voltage (345.6 V, 144 el) (475.2 V, 198 el) (576.0 V, 240 el)
12. DC VOLTAGE LOW SOUSTENSION DC DCUNTERSPANNUNG TENS. CONTINUA BASSA TENS. BATERIA BAJA This alarm is generated if the dc voltage is less the low dc trip voltage. This is a software regulated threshold that increases with the battery discharging time. It starts from 1.65 V/el at the battery discharging beginning until to 1.8 V/el after 10 hours. 13. INPUT SWITCH OPEN INTER. ENTREE OUVERT HAUPTSCHALTER OFFEN SEZ. INGRESSO APERTO INT. ENTRADA ABIERTO This alarm is generated if is active the digital input: input breaker open input (PL8.13) 14. HARMONIC FILTER OPEN FILTRE HARMONIQ. OFF FILTER NICHT AKTIV FILTRO ARMONICA OFF FILTRO ARMONICOS OFF This alarm is generated if is active the digital input: harmonic filter open input (PL8.16)
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15. RECTIFIER ALARM REDRESSEUR EN ALARME GLEICHR.STOERUNG RADDRIZZ. IN ALLARME ALARMAS RECTIFICADOR This alarm is generated by the following condition: (batt discharging condition) AND (dc voltage < vdc 210 battery discharging) AND (not primary mains fault condition) AND (not rectifier shutdown output) (PL8.28) AND (not recharge inhibit input) (PL23.10) AND (not batt contactor open input) (PL8.18) AND (not inv overload condition) where: vdc 210 battery discharging (302.4 V, 144 el) (415.8 V, 198 el) (504.0 V, 240 el) batt discharging condition see point 9 primary mains fault condition see point 4 inv overload condition = overload_condition see point 15 AND load on inv input (PL8.4) The alarm is reset if: (not batt discharging condition) OR (dc voltage >= vdc 215 battery discharging) OR (primary mains fault condition) OR (rectifier shutdown output) OR (recharge inhibit input) (PL23.10) OR (battery contactor open input) (PL8.18) OR (inv overload condition) where vdc 215 battery discharging (310.5 V, 144 el) (425.7 V, 198 el) (516.0 V, 240 el) inv overload condition = overload_condition see point 15 AND load on inv input (PL8.4)
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16. RECTIFIER INHIBITED REDRESSEUR INHIBE GLEICHR. GESPERRT RADDRIZZ. INIBITO RECT.INHIBIDO This alarm is generated by the following condition: (dc high condition) OR (epo request condition) OR (not calib and not sys test ) where: epo request condition see point 4 of MAIN ALARMS not calib and not sys test means that the machine is primary not calibrated but not in test mode. 17. RECTIFIER BLOCKED REDRESSEUR BLOQUE GLEICHR. BLOCKIERT RADDRIZZ. BLOCCATO RECT. BLOQUEADO This alarm is generated by the following condition: (dc feedback fault condition) AND (not rectifier start request) where: dc feedback fault condition see point 2 rectifier start request set if a rectifier start by hand is requested 18. BATT. CHARGE INHIBIT CHARGE BATT. INHIBEE BATT.LADUNG GESTOPPT CARICA BATT. INIBITA CARGA BAT. INHIBIDA This alarm is generated by the digital input: recharge inhibit input (PL23.10)
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INVERTER ALARMS
1. NOT CALIBRATED NON ETALONNE NICHT JUSTIERT NON CALIBRATO NO CALIBRADO This alarm is present in the this page means a primary not calibration. 2. PCB SUPPLY FAULT DEFAUT ALIM.CARTES VERSORGUNGSFEHLER PL GUASTO ALIM. PCB FALLO ALIM.CONT. This alarm is active if the following equation is true: (inverter off condition) AND (peak limit input) (PL8.3) AND (current limit input) (PL8.2) AND ((batt charging condition) OR (not dc voltage under 90 condition)) AND (not rectifier shutdown output) (PL8.26) where: inverter off condition is true when the inverter has been stop by hand or when inhibited or blocked or at the machine start up. batt charging condition is true if: (battery current > i batt charging) AND (not battery contactor open input) (PL8.18) where: i batt charging = 1 A not dc voltage under 90 condition means that the dc voltage is greater than the 90% of nominal voltage.
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3. OUT OF SYNC NON SYNCHRONISE NICHT SYNCHRON MANCANZA SINCRONISMO FALTA DE SINCRONISMO This alarm is generated by the following equation: (out of sync input) (PL8.7) AND (not inverter off condition) AND not (load on reserve condition AND overload condition) AND (not reserve fail condition) where: inverter off condition is true when the inverter has been stop by hand or when inhibited or blocked or at the machine start up. load on reserve condition see point 2 of LOAD/RESERVE ALARMS overload condition see point 15 reserve fail condition see point 5 of LOAD/RESERVE ALARMS 4. DESATURATION DESATURATION ENTSATTIGUNG DESATURAZIONE DESATURACION This alarm is generated by the following equation: (inverter fail input) (PL8.10) AND (not over temperature input) (PL8.15) AND (not open battery contactor request) where: open battery contactor request means a software battery contactor opening
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5. OVER TEMPERATURE TEMPERAT. EXESSIVE UEBERTEMPERATUR SOVRATEMPERATURA SOBRETEMPERATURA This alarm is generated by the following equation: (over temperature input) (PL8.15) AND (not open battery contactor request) where: open battery contactor request means a software battery contactor opening 6. BYPASS SWITCH CLOSED COMMUT. SUR BYPASS BYPASSSCHAL. GESCHL. SEZ. BYPASS CHIUSO INT. BYPASS CERRADO This alarm is generated by the digital input: bypass breaker closed input (PL8.18) 7. SHUTDOWN IMMINENT COUPURE IMMINENTE WARNUNG VERSORG.ENDE ARRESTO IMMINENTE PROXIMA DESCONEXION This alarm is generated if the dc voltage is less the shutdown imminent trip voltage. This is a software regulated threshold that increases with the battery discharging time. It starts from 1.75 V/el at the battery discharging beginning until to 1.9 V/el after 10 hours. 8. DC VOLTAGE HIGH SURTENSION DC DCUEBERSPANNUNG TENS. CONTINUA ALTA TENS. BATERIA ALTA This alarm is generated if: dc voltage > high dc trip voltage (345.6 V, 144 el) (475.2 V, 198 el) (576.0 V, 240 el)
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9. DC VOLTAGE LOW SOUSTENSION DC DCUNTERSPANNUNG TENS. CONTINUA BASSA TENS. BATERIA BAJA This alarm is generated if the dc voltage is less the low dc trip voltage. This is a software regulated threshold that increases with the battery discharging time. It starts from 1.65 V/el at the battery discharging beginning until to 1.8 V/el after 10 hours. 10. INVERTER NOT RUNNING ONDULEUR ARRETE WECHSELR. AUS INVERTER SPENTO INVERSOR PARADO This alarm is generated by the following equation: (inverter off condition) AND (not wait inv freq condition) AND (not wait batt cont close condition) where: inverter off condition is true when the inverter has been stop by hand or when inhibited or blocked or at the machine start up. wait inv freq condition see point 21 wait batt cont close condition see point 22
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11. INVERTER INHIBITED ONDULEUR INHIBE WECHSELR. GESPERRT INVERTER INIBITO INVERSOR INHIBIDO This alarm is generated by the following equation: (epo request condition) OR (overload timeout condition AND not system test condition) OR (dc high condition) OR (dc feedback fault condition) OR (bypass output bkr closed condition) OR (dc low condition AND not system test condition) where: epo request condition see poin 4 of MAIN ALARMS overload timeout condition see point 16 system test condition see point 1 of MAIN ALARMS dc high condition see point 8 dc feedback fault condition see point 2 of RECTIFIER BATTERY ALARMS bypass output bkr closed cond = (bypass breaker closed input) (PL8.17) AND (not output switch open input) (PL8.14) dc low condition see point 9
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12. INVERTER BLOCKED ONDULEUR BLOQUE WECHSELR. ANGEHALTEN INVERTER BLOCCATO INVERSOR BLOQUEADO This alarm is generated by the following equation: (not calib and not sys test condition) OR (desaturation condition) OR (over temperature condition) OR (inv overvoltage condition AND not system test condition) OR (inv.st. switch fault condition) OR (inv frequency out range condition) OR (loss inv reaction condition) where: not calib and not sys test condition means that the machine is primary not calibrated but not in test mode. desaturation condition see point 4 over temperature condition see point 5 inv overvoltage condition see point 13 system test condition see point 1 of MAIN ALARMS inv.st. switch fault condition see point 18 inv frequency out range condition see point 19 loss inv reaction condition see point 20
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13. INVERTER VOLTS HIGH SURTENSION ONDULEUR WECHSELR. UEBERSPG. TENS. INVERTER ALTA TENS. INVERSOR ALTA This alarm is generated by the following equation: ((inverter voltage ph1 > high inverter trip voltage) OR (inverter voltage ph2 > high inverter trip voltage) OR (inverter voltage ph3 > high inverter trip voltage)) AND (not open battery contactor request) where: high inverter trip voltage = 242 V for 220 V inverter output 253 V for 230 V inverter output 264 V for 240 V inverter output open battery contactor request means a software battery contactor opening
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14. INVERTER VOLTS LOW SOUSTENSION ONDUL WECHSELR. UNTERSP. TENS. INVERTER BASSA TENS. INVERSOR BAJA This alarm is generated by the following equation: (inverter voltage low condition) AND (not loss inv reaction condition) AND (not inverter off condition) AND not (load on reserve condition AND overload condition) where: inverter voltage low condition is true if: ((inverter voltage ph1 < low inverter trip voltage) OR (inverter voltage ph2 < low inverter trip voltage) OR (inverter voltage ph3 < low inverter trip voltage)) low inverter trip voltage = 198 V for 220 V inverter output 207 V for 230 V inverter output 216 V for 240 V inverter output loss inv reaction condition see point 20 inverter off condition is true when the inverter has been stop by hand or when inhibited or blocked or at the machine start up. load on reserve condition see point 2 in LOAD RES ALARMS overload condition see point 15 15. OVERLOAD SURCHARGE UEBERLAST SOVRACCARICO SOBRECARGA This alarm is generated by the following equation: ((load current ph1 > overload trip current) OR (load current ph2 > overload trip current) OR (load current ph3 > overload trip current)) AND (load on inv input) (PL8.4) where: overload trip current 105% nominal current. See technical manual for other details
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16. STOP DUE TO OVERLOAD ARRET CAUSE SURCHAR. STOP WEGEN UEBERLAST STOP PER SOVRACCAR PARO POR SOBRECARGA This alarm is generated by a software algoritm when the overload condition duration reachs the maximum machine overload capacity. 17. CURRENT LIMIT LIMITAT. DE COURANT STROMBEGRENZUNG LIMITE DI CORRENTE LIMITE DE CORRIENTE This alarm is generated by the digital input: current limit input (PL8.2) 18. INV.ST. SWITCH FAULT DEFAUT CS ONDULEUR INV ST.SW. FEHLER COMM.STAT.INV.GUASTO FALLO CONM. ESTATICO This alarm is generated by the following equation: ((inverter voltage ph1 > (nominal ac voltage / 3) OR (inverter voltage ph2 > (nominal ac voltage / 3) OR (inverter voltage ph3 > (nominal ac voltage / 3)) OR (not inverter just stopped) AND (not handling epo) where: nominal ac voltage is 220 V or 230 V or 240 V. inverter just stopped this condition is true for 2 sec. after the inverter stop. handling epo this condition is true since an EPO is recognized until the inverter control board supply is OFF
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19. INV.FREQ.OUT RANG. 8% DEF. FREQ. ONDUL. 8% WECHS.FREQ.FALSCH 8% FREQ.INV.FUORI TO. 8% FALLO FREC.INVERS. 8% This alarm is generated by the following equation: ((inverter frequency < low inverter trip frequency) OR (inverter frequency > high inverter trip frequency)) AND (not inverter just run) where: low inverter trip frequency nominal freq. 8% high inverter trip frequency nominal freq. + 8% inverter just run this conditon is true since the inverter is start for 10 sec. 20. INV. FEEDBACK FAULT PERTE DU RET. ONDUL WECHSELR.REGS. FEHLT PERDITA CONTR. INV. FALLO REDLIMEN. INV This alarm is generated by the following equation: ((inverter voltage ph1 < inverter undervolt trip) OR (inverter voltage ph2 < inverter undervolt trip) OR (inverter voltage ph3 < inverter undervolt trip)) AND (not inverter off condition) AND (not system test condition) AND (not inverter just run) AND (not epo request condition) AND (not (current limit condition OR overload condition)) where: inverter undervolt trip 60% of inverter nominal output voltage inverter off condition is true when the inverter has been stop by hand or when inhibited or blocked or at the machine start up. system test condition see point 1 of MAIN ALARMS inverter just run this conditon is true since the inverter is start for 10 sec. epo request condition see point 4 of MAIN ALARMS current limit condition see point 17 overload condition see point 15
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21. VERIFYING INV. FREQ. VERIF. FREQ. ONDUL. UEBERPRUEFUNG FREQU VERIFICA FREQ. INV. VERIF. FREC. DE INV. This message is generated when an invereter start is executed if: (not res normal condition) AND (not system test condition)) It is reset when the inverter frequency goes inside the +1% nominal frequency window. where: res normal condition means that all the reserve alarms has to be OFF. system test condition see poin1 of MAIN ALARMS 22. VERIFYING BATT.CONT. VERIF CONTACTEUR BAT UEBERPRUEFUNG BATT. VERIFICA TELER.BATT. VERIF. CONT. BAT. This message is active when the inverter start is done with the battery contactor open. It disappear when the battery contactor is closed. 23. INV.FREQ.OUT RANG. 1% DEF. FREQ. ONDUL. 1% WECHS.FREQ.FALSCH 1% FREQ.INV.FUORI TO. 1% FALLO FREC.INVERS. 1% This alarm is generated when an inverter start is executed and if after 15 sec. the inverter frequency has not gone inside the +1% nominal frequency window. The alarm is reset when the frequency goes inside the +1% window.
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LOAD AND RESERVE ALARMS

1. NOT CALIBRATED NON ETALONNE NICHT JUSTIERT NON CALIBRATO NO CALIBRADO This alarm is present in the this page means a primary not calibration. 2. LOAD ON RESERVE CHARGE SUR SECOURS LAST AUF RESERVENETZ CARICO SU RISERVA CARGA SOBRE RESERVA This alarm is generated by the following equation: (load on res input) (PL8.5) AND (not reserve switch open input) (PL8.12) AND (not output breaker open input) (PL8.14) 3. LOAD NOT SUPPLIED CHARGE NON ALIMENTEE LAST NICHT VERSORGT CAR. NON ALIMENTATO CARGA NO ALIMENTADA This alarm is generated by the following equation: not (bypass breaker closed condition OR load on reserve condition OR ((load on inverter condition) AND (not inverter off condition) AND (not output breaker open input)) (PL8.14) where: bypass breaker closed condition see point 4 load on reserve condition see point 2 load on inverter condition means the load is supplied by inverter inverter off condition is true when the inverter has been stop by hand or when inhibited or blocked or at the machine start up.
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4. BYPASS SWITCH CLOSED COMMUT. SUR BYPASS BYPASSSCHAL. GESCHL. SEZ. BYPASS CHIUSO INT. BYPASS CERRADO This alarm is active if the is active the digital input: bypass breaker closed input (PL8.18) 5. RESERVE SUPPLY FAULT ABS. VOIE SECOURS RESERVENETZ STOERUNG MANCANZA RISERVA FALLO DE RED RESERVA This alarm is generated by the following equation: (reserve fail input) (PL8.22) AND (not epo request condition) AND (not reserve switch open input) (PL8.12) where: epo request condition see point 4 of MAIN ALARMS 6. RESERVE FREQ FAULT DEF. FREQ. VOIE SEC. RES.FREQUENZ FALSCH FREQ RIS FUORI TOLL FALLO FREC. RESERVA This alarm is generated by the following equation: (res freq error input) (PL8.6) AND (not epo request condition) AND (not reserve switch open input) (PL8.12) where: epo request condition see point 4 of MAIN ALARMS
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7. RESERVE VOLTS HIGH SURTENSION VOIE SEC. RES. UEBERSPANNUNG TENS. RISERVA ALTA TENS. RESERVA ALTA This alarm is generated by the following equation: (reserve volt high input) (PL8.19) AND (not epo request condition) AND (not res phase fail input) (PL23.8) AND (not reserve switch open input) (PL8.12) where: epo request condition see point 4 of MAIN ALARMS 8. RESERVE VOLTS LOW SOUSTENS. VOIE SEC. RES. UNTERSPANNUNG TENS. RISERVA BASSA TENS. RESERVA BAJA This alarm is generated by the following equation: (reserve voltage low input) (PL8.20) AND (not epo request condition) AND (not reserve switch open input) (PL8.12) where: epo request condition see point 4 of MAIN ALARMS 9. ST.SW.BLOCKED ON INV CS BLOQUEE SUR OND. INV ST.SW. BLOCK. COMM.ST.BLOCC.SU INV CONM.ST.BLOC.SBR.INV This alarm is generated by the following equation: (static switch fault input) (PL8.21) AND (not load on reserve condition) AND (not handling epo) where: load on reserve condition see point 2 handling epo this condition is true since an EPO is recognized until the inverter control board supply is OFF
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10. ST.SW.BLOCKED ON RES CS BLOQUEE SUR VS RES ST.SW. BLOCK. COMM.ST.BLOCC.SU RIS CONM.ST.BLOC.SBR.RES This alarm is generated by the following equation: (static switch fault input) (PL8.21) AND (load on reserve condition) AND (not handling epo) where: load on reserve condition see point 2 handling epo this condition is true since an EPO is recognized until the inverter control board supply is OFF 11. INV.ST. SWITCH FAULT DEFAUT CS ONDULEUR INV ST.SW. FEHLER COMM.STAT.INV.GUASTO FALLO CONM. ESTATICO This alarm is generated by the following equation: ((inverter voltage ph1 > (nominal ac voltage / 3) OR (inverter voltage ph2 > (nominal ac voltage / 3) OR (inverter voltage ph3 > (nominal ac voltage / 3)) OR (not inverter just stopped) AND (not handling epo) where: nominal ac voltage is 220 V or 230 V or 240 V. inverter just stopped this condition is true for 2 sec. after the inverter stop. handling epo this condition is true since an EPO is recognized until the inverter control board supply is OFF
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12. OVERLOAD SURCHARGE UEBERLAST SOVRACCARICO SOBRECARGA This alarm is generated by the following equation: ((load current ph1 > overload trip current) OR (load current ph2 > overload trip current) OR (load current ph3 > overload trip current)) where: overload trip current 105% nominal current. See the technical manual for other details 13. OUTPUT SWITCH OPEN INTER. SORTIE OUVERT AUSG.SCHALTER OFFEN SEZ. USCITA APERTO INT. SALIDA ABIERTO This alarm is generated by the digital input: output switch open input (PL8.14) 14. RESERVE SWITCH OPEN INTER. SEC. OUVERT RESN.SCHALTER OFFEN SEZ. RISERVA APERTO INT. RESERVA ABIERTO This alarm is generated by the digital input: res switch open input (PL8.12)
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15. PHASE SEQUENCE ERROR ABSENCE DUNE PHASE FALSCHES DREHFELD SENSO CICLICO ERRATO ERROR SECUENCIA FASE This alarm is generated by the following equation: (reserve phase fail input) (PL23.8) AND (not epo request condition) where: epo request condition see point 4 of MAIN ALARMS 16. RESERVE INHIBITED VOIE SECOURS INHIBE RESERVE GESPERRT RISERVA INIBITA RESERVA INHIBIDA This alarm is present while is active the E.P.O. condition. 17. BACKFEED PROT ACTIVE PROTECT. ANTIRETOUR RUECKSP.SPERR. AKTIV BACKFEED PROT ATTIVO PROT BACKFEED ACTIVA This alarm is generated by the digital input: backfeed protect input (PL23.9)
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POWER HISTORY CROSS REFERENCE TABLE

Due to the limited dimension of internal microprocessor ram, not all the above alarms are reported directly in the POWER HISTORY environment. This docoment gives the possibility to the user to understand the relationship between the alarm string that appears on the dispaly and the machine condition that has generated the alarm. 1. TESTING BATTERY BATTERIE EN TEST BATTERIETEST PROVA DELLA BATTERIA PRUEBA DE BATERIAS This alarm appear if the following condition is true: (battery test condition) OR (full battery test condition) where: battery test condition see point 2 of MAIN ALARMS full battery test condition see point 3 of MAIN ALARMS 2. PRIMARY SUPPLY FAIL ABSEN. RES. PRINCIP. NETZAUSFALL MANCANZA RETE FALLO DE RED This alarm iis generated by the digital input: primary supply fail input (PL8.8) 3. PHASE SEQUENCE ERROR DEFAUT ORDRE PHASES FALSCHES DREHFELD SENSO CICLICO ERRATO ERROR SECUENCIA FASE This alarm iis generated by the digital input: primary phase fail imput (PL8.9)
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4. BATTERY FAULT DEFAUT BATTERIE BATTERIE DEFEKT GUASTO BATTERIA FALLO DE BATERIAS See point 6 of RECTIFIER AND BATTERY ALARMS 5. BATT CONTACTOR OPEN CONTACT.BATT. OUVERT BATTERIEKONT. OFFEN TELER. BATT. APERTO CONT. BAT. ABIERTO See point 8 of RECTIFIER AND BATTERY ALARMS 6. BATTERY DISCHARGING BATTERIE EN DECHARGE BATTERIEENTLADUNG BATTERIA IN SCARICA BATERIA EN DESCARGA See point 9 of RECTIFIER AND BATTERY ALARMS 7. SHUTDOWN IMMINENT COUPURE IMMINENTE WARNUNG VERSORG.ENDE ARRESTO IMMINENTE PROXIMA DESCONEXION See point 10 of RECTIFIER AND BATTERY ALARMS 8. DC VOLTAGE HIGH SURTENSION DC DCUEBERSPANNUNG TENS. CONTINUA ALTA TENS. BATERIA ALTA See point 11 of RECTIFIER AND BATTERY ALARMS
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9. DC VOLTAGE LOW SOUSTENSION DC DCUNTERSPANNUNG TENS. CONTINUA BASSA TENS. BATERIA BAJA See point 12 of RECTIFIER AND BATTERY ALARMS 10. OUT OF SYNC NON SYNCHRONISE NICHT SYNCHRON MANCANZA SINCRONISMO FALTA DE SINCRONISMO See point 3 of INVERTER ALARMS 11. PHASE SEQUENCE ERROR ABSENCE DUNE PHASE FALSCHES DREHFELD SENSO CICLICO ERRATO ERROR SECUENCIA FASE See point 5 of RECTIFIER AND BATTERY ALARMS 12. RESERVE SWITCH OPEN INTER. SEC. OUVERT RESN.SCHALTER OFFEN SEZ. RISERVA APERTO INT. RESERVA ABIERTO See point 14 of LOAD AND RESERVE ALARMS 13. INPUT SWITCH OPEN INTER. ENTREE OUVERT HAUPTSCHALTER OFFEN SEZ. INGRESSO APERTO INT. ENTRADA ABIERTO See point 13 of RECTIFIER AND BATTERY ALARMS
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14. OUTPUT SWITCH OPEN INTER. SORTIE OUVERT AUSG.SCHALTER OFFEN SEZ. USCITA APERTO INT. SALIDA ABIERTO See point 13 of LOAD AND RESERVE ALARMS 15. OVER TEMPERATURE TEMPERAT. EXESSIVE UEBERTEMPERATUR SOVRATEMPERATURA SOBRETEMPERATURA See point 5 of INVERTER ALARMS 16. HARMONIC FILTER OPEN FILTRE HARMONIQ. OFF FILTER NICHT AKTIV FILTRO ARMONICA OFF FILTRO ARMONICOS OFF See point 14 of RECTIFIER AND BATTERY ALARMS 17. BYPASS SWITCH CLOSED COMMUT. SUR BYPASS BYPASSSCHAL. GESCHL. SEZ. BYPASS CHIUSO INT. BYPASS CERRADO See point 6 of INVERTER ALARMS 18. INVERTER VOLTS HIGH SURTENSION ONDULEUR WECHSELR. UEBERSPG. TENS. INVERTER ALTA TENS. INVERSOR ALTA See point 13 of INVERTER ALARMS
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19. INVERTER VOLTS LOW SOUSTENSION ONDUL WECHSELR. UNTERSP. TENS. INVERTER BASSA TENS. INVERSOR BAJA See point 14 of INVERTER ALARMS 20. OVERLOAD SURCHARGE UEBERLAST SOVRACCARICO SOBRECARGA See point 15 of INVERTER ALARMS 21. STOP DUE TO OVERLOAD ARRET CAUSE SURCHAR. STOP WEGEN UEBERLAST STOP PER SOVRACCAR PARO POR SOBRECARGA See point 16 of INVERTER ALARMS 22. DC FEEDBACK FAULT PERTE DU RETOUR DC DC REGS. FEHLT PERDITA CONTR. PONTE FALLO REDLIMEN. REC See point 2 of RECTIFIER AND BATTERY ALARMS 23. CURRENT LIMIT LIMITAT. DE COURANT STROMBEGRENZUNG LIMITE DI CORRENTE LIMITE DE CORRIENTE See point 17 of INVERTER ALARMS
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24. LOAD ON RESERVE CHARGE SUR SECOURS LAST AUF RESERVENETZ CARICO SU RISERVA CARGA SOBRE RESERVA See point 2 of LOAD AND RESERVE ALARMS 25. LOAD NOT SUPPLIED CHARGE NON ALIMENTEE LAST NICHT VERSORGT CAR. NON ALIMENTATO CARGA NO ALIMENTADA See point 3 of LOAD AND RESERVE ALARMS 26. INVERTER FAULT PANNE ONDULEUR WECHSELR. STOERUNG GUASTO SU INVERTER FALLO DE INVERSOR See point 4 of INVERTER ALARMS 27. RESERVE SUPPLY FAULT ABS. VOIE SECOURS RESERVENETZ STOERUNG MANCANZA RISERVA FALLO DE RED RESERVA See point 5 of LOAD AND RESERVE ALARMS 28. RESERVE FREQ FAULT DEF. FREQ. VOIE SEC. RES.FREQUENZ FALSCH FREQ RIS FUORI TOLL FALLO FREC. RESERVA See point 6 of LOAD AND RESERVE ALARMS
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29. RESERVE VOLTS HIGH SURTENSION VOIE SEC. RES. UEBERSPANNUNG TENS. RISERVA ALTA TENS. RESERVA ALTA See point 7 of LOAD AND RESERVE ALARMS 30. RESERVE VOLTS LOW SOUSTENS. VOIE SEC. RES. UNTERSPANNUNG TENS. RISERVA BASSA TENS. RESERVA BAJA See point 8 of LOAD AND RESERVE ALARMS 31. STATIC SWITCH FAULT DEF. COMMUT. STATIQ. STAT.SCHAL. GESTOERT COMM. STATICO GUASTO FALLO CONM. ESTATICO This message appears if the following condition is true: st sw blocked on inv condition OR st sw blocked on res condition OR inverter backfeed condition where: st sw blocked on inv condition see point 9 of LOAD AND RESERVE ALARMS st sw blocked on res condition see point 10 of LOAD AND RESERVE ALARMS inverter backfeed condition see point 18 of INVERTER ALARMS 32. INVERTER NOT RUNNING ONDULEUR ARRETE WECHSELR. AUS INVERTER SPENTO INVERSOR PARADO See point 10 of INVERTER ALARMS
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33. INVERTER INHIBITED ONDULEUR INHIBE WECHSELR. GESPERRT INVERTER INIBITO INVERSOR INHIBIDO See point 11 of INVERTER ALARMS 34. INVERTER BLOCKED ONDULEUR BLOQUE WECHSELR. ANGEHALTEN INVERTER BLOCCATO INVERSOR BLOQUEADO See point 12 of INVERTER ALARMS 35. INV.FREQ.OUT RANG. 8% DEF. FREQ. ONDUL. 8% WECHS.FREQ.FALSCH 8% FREQ.INV.FUORI TO. 8% FALLO FREC.INVERS. 8% See point 19 of INVERTER ALARMS 36. BATT. CHARGE INHIBIT CHARGE BATT. INHIBEE BATT.LADUNG GESTOPPT CARICA BATT. INIBITA CARGA BAT. INHIBIDA See point 18 of RECTIFIER AND BATTERY ALARMS 37. BACKFEED PROT ACTIVE PROTECT. ANTIRETOUR RUECKSP.SPERR. AKTIV BACKFEED PROT ATTIVO PROT BACKFEED ACTIVA See point 17 of LOAD AND RESERVE ALARMS
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38. E.P.O. ACTIVE ARRET URGENCE ACTIVE NOTAUS AKTIV E.P.O. ATTIVO E.P.O. ACTIVO See point 4 of MAIN ALARMS 39. INV. FEEDBACK FAULT PERTE DU RET. ONDUL WECHSELR.REGS. FEHLT PERDITA CONTR. INV. FALLO REDLIMEN. INV See point 20 of INVERTER ALARMS 40. PCB SUPPLY FAULT DEFAUT ALIM. CARTES VERSORGUNGSFEHLER PL GUASTO ALIM. PCB FALLO ALIM. CONT. See point 7 of RECTIFIER AND BATTERY ALARMS
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Chap. 7 = MAINTENANCE
MAINTENANCE
7.1 Periodical maintenance
To ensure continuous reliable service it is recommended that the equipment and battery are serviced twice a year by a qualified and competent electrical engineer who has the tools, test equipment and specialist knowledge and skills to work safely on this equipment. It is also recommended that the equipment be checked daily and monthly by a competent person and that an equipment log be kept detailing the results of the maintenance checks, any faults that occur, any modifications carried out and any time that the equipment has been used to maintain the load in the event of a mains power supply failure. WARNING !! HAZARDOUS VOLTAGES EXIST WITHIN THE UPS CUBICLE AND WITHIN THE BATTERY CUBICLE EVEN WHEN THE SWITCHES ARE IN THE OFF POSITION. MAINTENANCE MUST BE PERFORMED BY A COMPETENT PERSON USING ALL THE SAFETY PRECAUTIONS. Daily: Check all readings are within the specified tolerance. Monthly: Carry out a visual check to ensure that all connections are secure, there is no sign of overheating and all ventilation grills are free and clean. Maintain the battery cell electrolyte levels in accordance with the Battery Manufacturers instructions (not required for sealed recombination battery cells). Lightly grease the battery cell terminals with petroleum jelly for lead acid and komoline jelly for nickelcadmium battery cells (not required for sealed recombination battery cells). Check that the battery and its housing are clean and dry.
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Six monthly: Carry out the monthly checks Check that the battery is fully charged, simulate mains failure and ensure that the battery maintains the load for 25% of its rated period. Twelve monthly: Carry out a battery electrolyte specific gravity test and adjust as necessary (not required for sealed recombination battery cells). Carry out the six monthly checks. Three yearly: Support the load on the BYPASS supply, switch the equipment off and disconnect the battery. Carry out a detailed continuity and insulation test Carry out an earth bonding check Reconnect the battery and switch the equipment on. Carry out a battery electrolyte specific gravity test and adjust as necessary (not required for sealed recombination battery cells). Carry out the monthly checks Simulate a mains failure and ensure that the battery maintains the load for 100% of its rated period.
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7.2 Float Voltage settings

The float voltage setting for the EDP70 is temperature compensated. This should be set up according to the following table for different ambient temperatures. o set the float voltage, connect a 1A load to the DC bars, then, with the inverter stopped, by using a 4 figures DVM, operate on VR1 of the Rectifier Control Board. AMBIENT TEMPERATURE Float Voltage of BATTERY 144 cells 198 cells COMPARTMENT [C] 17 328.0 450.8 18 327.6 450.3 19 327.2 449.8 20 326.9 449.3 21 326.5 448.8 22 326.2 448.3 23 325.8 447.9 24 325.4 447.4 25 325.1 446.9 26 324.7 446.5 27 324.4 445.9 28 324.0 445.4 29 323.6 444.9 30 323.3 444.5 31 322.9 444.0 32 322.6 443.5 33 322.2 443.0 34 321.8 442.5 35 321.5 442.0 36 321.1 441.5 37 320.7 441.1 38 320.4 440.6 39 320.0 440.1 40 319.7 439.6
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Chap. 8 = CIRCUIT DIAGRAM LIST
CIRCUIT DIAGRAMS LIST

WARNING: the enclosed circuit diagrams are supplied only for information, and are at the revision level of the date of printing.
System Circuit: for UPS up to 20kVA for UPS above 20 & up to 40 kVA for UPS above 40kVA Rectifier Control Board: Inverter Control Board: Static Switch Control Board: Display Control Board: Interface Board : Base driver Board: Mimic PCB: St. Sw. Firing & Snubber Board: Rectifier Firing & Snubber Boar: R.F.I. Filter Board: S.M.P.S. Board: Transformer Board:
10C71148 10C71178 10C71245 15C90073 15C70512 15C90074 15C90072 15C70516 15C70533 15C90075 15C70517 15C70536 15B70559 15C70514 15C70515
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EDP70 UNINTERRUPTIBLE POWER SYSTEM TECHNICAL HANDBOOK

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

POWER ASSEMBLY DESCRIPTION

CONTROL LOGIC DESCRIPTIONS

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 1 = SAFETY 1 SAFETY

1.2 Electric Shock

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Batteries are ELECTRICALLY LIVE at all times.

IN ALL CASES SEEK IMMEDIATE MEDICAL ATTENTION!

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 2 = MAINTENANCE PROCEDURES

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 2 = MAINTENANCE PROCEDURES

2.3 Fuse Blowing

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 2 = MAINTENANCE PROCEDURES

holes for Driver board

Fan support fixings screw

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 3 = POWER ASSEMBLY DESCRIPTION

POWER ASSEMBLY DESCRIPTION

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 3 = POWER ASSEMBLY DESCRIPTION

STATIC CHANGEOVER SWITCH UNIT

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 3 = POWER ASSEMBLY DESCRIPTION

Power Assembly description:

3.1 Input Choke / Input Autotransformer

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 3 = POWER ASSEMBLY DESCRIPTION

3.2 Rectifier Assembly

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Chap 3 = POWER ASSEMBLY DESCRIPTION

3.5 Inverter Assembly

3.6 Static Switch Assembly

3.7 Display Assembly

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Para 4.1 = Rectifier Control Pcb

CONTROL LOGIC DESCRIPTIONS

Control Circuit: The main functions of the control circuit are:

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Para 4.1 = Rectifier Control Pcb Power Supply:

Firing Angle Generation:

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Para 4.1 = Rectifier Control Pcb

Line to neutral Voltages

R>Y Zero Crossing Y>B Detectors B>R

R>Y XOR B>R

R OPs from Y Ramp Generators B

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Para 4.1 = Rectifier Control Pcb

Firing Pulse for G2

Output of Logic Array

Fig. 2 Firing Pulses for firing angle less than 60

EDP70 Technical Manual MI92/10015 Ed. 5 05/97

Para 4.1 = Rectifier Control Pcb

Firing Pulse for G2

Output of Logic Array

Fig. 3 Firing Pulses for firing angle greater than 60