12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

UNIT 1: BASIC STRUCTURE OF COMPUTERS

Functional units of a computer Basic operational concepts Bus structures Software performance Memory locations and addresses Memory operations Instruction and instruction sequencing Addressing modes Assembly language

Page 1 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

1.1

FUNCTIONAL UNITS OF A COMPUTER

A computer has five functionally independent main parts: Input Unit Memory Unit Arithmetic and logic Unit Output Unit Control unit

Figure 1.1: Functional units of a computer system A) Input Unit:Computers accept coded information through input units, which read the data. The most wellknown input device is keyboard. Whenever a key is pressed, the corresponding letter or digit is automatically translated into its corresponding binary code and transmitted over a cable to either the memory or the processor. B) Memory Unit:The function of the memory unit is to store programs and data. There are two classes of storage, called Primary and Secondary. Page 2 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

Primary storage is a fast memory that operates at electronic speeds. Programs must be stored in the memory while they are being executed. Memory in which any location can be reached in a short and fixed amount of time after specifying its address is called Random Access Memory(RAM). The time required to access one word is called the Memory Access Time. Although Primary Storage is essential, it tends to be expensive. Thus additional, cheaper, secondary storage is used when large amounts of data and many programs have to be stored, particularly for information that is accessed infrequently. Ex:- magnetic disks and tapes and optical disks.

C) Arithmetic and Logic Unit:All the arithmetic or logic operation, is initiated by bringing the required operands into the processor, where the operation is performed by the ALU. D) Output Unit:The Output unit of the computer system is the unit through which the computer displays the result of the processed data called information. To do this, it makes use of Output devices. Its function is to send processed result to the outside world. Examples of Output devices are: The Monitor, also called Visual Display Unit or Cathode Ray Tube, Printer, Speakers, Plotters etc. E) Control Unit:The Control Unit is used to co-ordinate the operations of memory, ALU, input and output units. The Control Unit can be said as the nerve center that sends control signals to other units and senses their states. Basic functions of the control unit are i. It directs the sequence of operations,

ii. It interprets the instructions, of a program, in storage unit and produces signals the command circuits to execute the instructions.

iii. It directs the flow of all activities in the computer system. Page 3 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

1.2

BASIC OPERATIONAL CONCEPTS

The computer works based on some given instruction. Let us consider an example: Add LOCA, R0 -> This instruction adds the operands at memory location LOCA to the operand in the register R0 and places the sum into the register R0.It seems that this instruction is done in one step, but actually it internally performs several steps ->First, the instruction is fetched from the memory into the processor. Next, the operand at LOCA is fetched and added to the contents of R0. The above instruction can be written also asLoad LOCA, R1 Add R1,R0 Let us now analyze how the memory and processor are connected:The Processor contains a number of registers used for several purposes.

IR: The IR(Instruction Register) holds the instruction that is currently being executed. PC: The PC(Program Counter) is another specialized register which contains the memory address of next instruction to be fetched. MAR: This register facilitates communication with the memory. The MAR holds the address of the location to be accessed. MDR: This register facilitates communication with the memory. The MDR contains the data to be written into or read out of the addressed location. There are n general purpose registers R0 to Rn-1. The Program execution starts when the PC is set to point the 1 st instruction. The content of the PC is transferred to the MAR and Read control signal is sent to memory. Then the addressed word is read out of the memory and loaded into the MDR. Next the contents of the Page 4

Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013 MDR are transferred to the IR. Then the program is decoded, it is sent to the ALU if it has some arithmetic or logical calculations. The n general purpose registers are used during this calculations to store the result. Then the result is sent to the MDR, and its address of location where result is stored is sent to MAR. And then a write cycle is initiated. Then PC is incremented and the process continues.

Figure 1.2: Interconnection of Processor and Main Memory 1.3 BUS STRUCTURES

In computer architecture, a bus is a subsystem that transfers data between components inside a computer, or between computers. Early computer buses were literally parallel electrical wires with multiple connections, but Modern computer buses can use both parallel and bit serial connections.

A bus is a collection of wires that connect several devices within a computer system. When a word of data is transferred between units, all its bits are transferred in parallel. A computer must have some lines for addressing and control purposes. Page 5 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

Three main groupings of lines: 1. Data Bus. This is for the transmission of data. 2. Address Bus. This specifies the location of data in MM. 3. Control Bus. This indicates the direction of data transfer and coordinates the timing of events during the transfer.

Figure 1.3: Single Bus Structure The Bus is used to connect all the individual parts of a computer in an organized manner. The simplest way to interconnect functional units is to use a single bus. The main advantage of the single bus structure is its low cost and its flexibility. The multiple bus achieve more concurrency in operation by allowing two or more transfers to be carried at the same time.

Figure 1.4: I/O Memory Bus Single Bus Structure All units are connected to a single bus, so it provides the sole means of interconnection. Single bus structure has advantages of simplicity and low cost. Page 6 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

Single bus structure has disadvantages of limited speed since usually only two units can participate in a data transfer at any one time. This means that an arbitration system is required and that units will be forced to wait. Only two units can actively use the bus at any given time. Bus control lines are used to arbitrate multiple requests for the use of the bus. Buffer Registers are used to hold information during transfers.

Figure 1.5: Multiple Bus Configurations

Two Bus Structure In the first configuration, the processor is placed between the I/O unit and the memory unit. The processor is responsible for any data transfer between the I/O unit and the memory unit. The processor acts as a messenger. In this structure, the processor performance and capability is not Page 7 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013 being maximized. Most of the time, the processor is doing data transfer between these units instead of performing more complex applications. Also, the processor is idle most of the time waiting for these slow devices. In the second configuration, I/O transfers are made directly to or from the memory. A special purpose processor called peripheral processor or I/O channel is needed as part of the I/O equipment to control and facilitate such transfers. This special processor is the direct memory access (DMA) controller. It allows main memory to perform data transfer between I/O units. The devices connected to a bus vary widely in their speed of operation. Some electromechanical devices, such as keyboards and printers are relatively slow. Other devises like magnetic or optical disks, are considerably faster. Memory and processor units operate at electronic speeds, making them the fastest parts of a computer. Because all these devices must communicate with each other over a bus, an efficient transfer mechanism that is not constrained by the slow devices and that can be used to smooth out the differences in timing among processors, memories, and external devices is necessary.

Figure 1.6: Traditional bus configuration

Multiprocessors and Multicomputers:-

A large computer system which contains a number of processor units is called Multiprocessor System. This systems either execute a number of different application tasks in parallel, or they Page 8 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

execute subtasks of a single large task in parallel. The high performance of these systems comes with much increased complexity and cost. The Multicomputer System is formed by interconnecting a group of complete computers to achieve high total computational power. They can access only their own memory. They communicate data by exchanging messages over a communication network.

1.4

SOFTWARE PERFORMANCE

Computer software, or just software is a general term used to describe the role that computer programs, procedures and documentation play in a computer system. The term includes: 1. Application software, such as word processors which perform productive tasks for users. 2. Firmware, which is software programmed resident to electrically programmable memory devices on board main boards or other types of integrated hardware carriers. 3. Middleware, which controls and co-ordinates distributed systems. 4. System software such as operating systems, which interface with hardware to provide the necessary services for application software. Software Characteristics

Software is developed and engineered. Software doesn't "wear-out". Most software continues to be custom built.

Types of software The three major classified types of software are a) System software b) Programming software c) Application software

Page 9 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

Figure 1.6: Layered architecture of an OS and System Hardware and Users System software System software helps run the computer hardware and computer system. It includes a combination of the following:

device drivers operating systems servers utilities windowing systems

The purpose of systems software is to unburden the applications programmer from the often complex details of the particular computer being used, including such accessories as communications devices, printers, device readers, displays and keyboards, and also to partition the computer's resources such as memory and processor time in a safe and stable manner. Examples are- Windows XP, Linux and Mac. Programming software Programming software usually provides tools to assist a programmer in writing computer programs, and software using different programming languages in a more convenient way. The tools include:

compilers debuggers interpreters linkers text editors

Page 10 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013 Application software Application software allows end users to accomplish one or more specific (not directly computer development related) tasks. Typical applications include: 1. industrial automation 2. business software 3. computer games 4. quantum chemistry and solid state physics software 5. telecommunications (i.e., the internet and everything that flows on it) 6. databases 7. educational software 8. medical software 9. military software 10. molecular modeling software 11. image editing 12. spreadsheet 13. simulation software 14. Word processing 15. Decision making software Application software exists for and has impacted a wide variety of topics. Assembler Typically a modern assembler creates object code by translating assembly instruction mnemonics into op codes, and by resolving symbolic names for memory locations and other entities. The use of symbolic references is a key feature of assemblers, saving tedious calculations and manual address updates after program modifications. Most assemblers also include macro facilities for performing textual substitutione.g., to generate common short sequences of instructions to run inline, instead of in a subroutine. 1.4.1 PERFORMANCE AND METRICS

Important measure of performance of computer how quickly it can execute programs. Elapsed time-total time required to execute the program.-measure of performance of entire computer system. Processor time-sum of periods in which the processor is active. Depends on hardware involved in execution of individual instructions Page 11 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013 Start of execution, all program instructions & required data are stored in main memory. As execution proceeds-instructions are fetched one by one over bus into processor &copy is placed in cache. If any data is needed by an instruction in main memory, data are fetched & copy is placed in cache. If the same data or instruction is needed again, the data is read directly from cache. 1)

Processor clock Clock-processor circuits are controlled by timing signals. Clock cycles-clock defines regular time intervals. Cycles per second-hertz Inverse of clock cycle-clock rate R=1/P, P-length of 1 clock cycle. Basic performance equation

2)

Where

T-processor time to execute a program N-no of instruction executions S-basic number of steps to execute one instruction. R-clock rate.

3)

Pipelining & super scalar operation Over lapping the execution of successive instructions is called pipelining. Superscalar operation-different instructions can be executed in parallel. Clock rate

4)

2 possibilities to increase clock rate. Improving IC technology makes logic circuits faster. Reducing the amount of processing done in one basic step. Instruction set CISC & RISC

1. 2. 5)

RISC-Reduced instruction set computer-smaller number of steps to execute. CISC-complex instruction set computer-larger number of steps to execute.

6)

Compiler Translates high level language into sequence of machine instructions. Performance measurement

7)

Page 12 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

SPEC-system performance Evaluation Corporation.

1.5

MEMORY LOCATIONS AND ADDRESSES

Logical structure of a computers random-access memory (RAM) The generic term for the smallest unit of memory that the CPU can read or write is cell. In most modern computers, the size of a cell is 8 bits (1 byte). Hardware-accessible units of memory larger than one cell are called words. Currently (1998) the most common word sizes are 32 bits (4 bytes) and 64 bits (8 bytes). Every memory cell has a unique integer address. The CPU accesses a cell by giving its address. Addresses of logically adjacent cells di er by 1. The address space of a processor is the range of possible integer addresses, typically (0 : 2n1)

Page 13 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

In a byte-addressed memory, the addresses of successive words dier by the number of bytes in a word:

Page 14 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

Page 15 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013 1.6 MEMORY OPERATIONS

The MIPS ISA is a load-store architecture. This means that the only operations that interact with memory are load and store. load To load a value from memory, you copy the data from memory into a register. store To store a value to memory, you copy the data from a register to memory. CISC ISAs often have other kinds of instructions that interact with memory. For example, there may be an instruction that adds the contents of a register to the contents at a memory address and store that in a register. These kinds of instructions do not appear in MIPS ISA, nor in most RISC ISAs. Let's define what those terms mean:

load To "load" means to copy a value from memory at some memory address, to a register. The value might be a word (32 bits), halfword (16 bits) or byte (8 bits). If the value is any shorter than a word, then it may be loaded assigned (where the value is sign-extended to 32 bits) or unsigned (where the value is zero-extended to 32 bits). store Store is the opposite operation of load. Where load copies a value from memory to a register, store copies a value from register to memory.
INSTRUCTION AND INSTRUCTION SEQUENCING

1.7

Four types of operations 1. 2. 3. 4. 1) Data transfer between memory and processor registers. Arithmetic & logic operations on data Program sequencing & control I/O transfers. Register transfer notations (RTN) R3 [R1]+[R2]

Right hand side of RTN-denotes a value. Left hand side of RTN-name of a location. Assembly language notations (ALN) Add R1, R2, R3 Page 16

2)

Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

Adding contents of R1, R2 & place sum in R3. Basic instruction types-4 types

3)

Three address instructionsAdd A,B,C A, B-source operands C-destination operands

Two address instructions Add A,B B [A] + [B]

One address instructions Add A Add contents of A to accumulator & store sum back to accumulator.

Zero address instructions Instruction store operands in a structure called push down stack.

4)

Instruction execution & straight line sequencing The processor control circuits use information in PC to fetch & execute instructions one at a time in order of increasing address. This is called straight line sequencing. Executing an instruction-2 phase procedures. 1st phaseinstruction fetch-instruction is fetched from memory location whose address is in PC. This instruction is placed in instruction register in processor. 2nd phase-instruction execute-instruction in IR is examined to determine which operation to be performed. Branching

5)

Branch-type of instruction loads a new value into program counter. So processor fetches & executes instruction at this new address called branch target Conditional branch-causes a branch if a specified condition is satisfied. Page 17

Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

E.g. Branch>0 LOOP conditional branch instruction .it executes only if it satisfies condition. Condition codes

6)

Recording required information in individual bits called condition code flags. These flags are grouped together in a special processor register called condition code register or status register Individual condition code flags-1 or 0. 4 commonly used flags.

N Z V C

(negative)-set to 1 if result is ve or else 0. (zero)-set to 1 if result is 0, or else 0 . (overflow)-set to 1if arithmetic overflow occurs or else 0. (carry)-set to 1 if carry out results from operation or else 0

1.8

ADDRESSING MODES

The different ways in which location of an operand is specified in an instruction are referred as addressing modes. TYPES OF ADDRESSING MODES. Variable-represented by allocating a register or memory location to hold its value. 1. REGISTER MODE

The operand is the contents of processor register, name of register is given in instruction. Mov Loc, R2.

Processor registers are used as temporary storage locations where data in a register are accessed using register mode.

Page 18 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013 2. ABSOLUTE MODE(OR) DIRECT MODE

The operand is in a memory location, the address of this location is given explicitly in the instruction. Integer A, B

Absolute mode is used to access these variables. IMMEDIATE MODE

3.

Address and data constants-represented in assembly language using immediate mode. Operand is given explicitly in the instruction. Mov #200, R0

(#)-value is used as an immediate operand. Mainly used to specify value of a source operand. INDIRECT MODE

4.

Memory address of an operand can be determined by instruction. Address-called Effective Address (EA) of an operand. EA of an operand contents of a register. When absolute mode-not available, indirect addressing through registers use to access global variables. INDEX MODE

5.

Deals With lists and arrays. EA-generated by adding constant value to contents of register. Index registers one of set of general purpose registers in a processor. X(Ri)

X-constant value in instruction. Ri-name of the register involved. EA=X+[Ri]

Second register is used, index mode (Ri, Rj). EA = [Ri + Rj]

Second register-base register. Page 19

Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013 X(Ri,Rj) EA=X+[Ri]+[Rj]

Gives more flexibility. RELATIVE MODE

6.

EA-for index mode is given using program counter. This mode used to access data operands. Common use-specify target address in branch instruction. Branch>0 Loop.

Program execution got to branch target location identified by name loop if branch condition is satisfied. AUTO INCREMENT MODE.

7.

Useful for accessing data items in successive locations in memory. EA of an operand contents of register specified in instruction. After accessing operand contents of register is automatically incremented to point to next item in a list. (Ri)+ Increment amount 1 for byte specified operands. 2 for 16-bit operands. 4 for 32-bit operands. AUTODECREMENT MODE. Contents of register specified in instruction are first automatically decremented & used as a EA of the operand. (Ri)

8.

Minus sign indicate contents to be decremented before being used as EA. Operands are accessed in descending address order.

1.9

ASSEMBLY LANGUAGE Page 20

Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013

Any Assembly language consists of 3 types of instruction statements which are used to define the program operations:

Op code mnemonics Data sections Assembly directives

Opcode mnemonics Instructions (statements) in assembly language are generally very simple, unlike those in highlevel languages. Generally, an opcode is a symbolic name for a single executable machine language instruction, and there is at least one opcode mnemonic defined for each machine language instruction. Each instruction typically consists of an operation or opcode plus zero or more operands. Most instructions refer to a single value, or a pair of values. Operands can be either immediate (typically one byte values, coded in the instruction itself) or the addresses of data located elsewhere in storage. This is determined by the underlying processor architecture: the assembler merely reflects how this architecture works. Data sections There are instructions used to define data elements to hold data and variables. They define what type of data, length and alignment of data. These instructions can also define whether the data is available to outside programs (programs assembled separately) or only to the program in which the data section is defined. Einstein College of Engineering

Page 21 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE

12150H36- Computer Architecture and Organization / II Year / III Semester / June-Sep 2013 Assembly directives and pseudo-ops Assembly directives are instructions that are executed by the assembler at assembly time, not by the CPU at run time. They can make the assembly of the program dependent on parameters input by the programmer, so that one program can be assembled different ways, perhaps for different applications. They also can be used to manipulate presentation of the program to make it easier for the programmer to read and maintain. (For example, pseudo-ops would be used to reserve storage areas and optionally their initial contents.) The names of pseudo-ops often start with a dot to distinguish them from machine instructions. Some assemblers also support pseudo-instructions, which generate two or more machine instructions. Symbolic assemblers allow programmers to associate arbitrary names (labels or symbols) with memory locations. Usually, every constant and variable is given a name so instructions can reference those locations by name, thus promoting self-documenting code. In executable code, the name of each subroutine is associated with its entry point, so any calls to a subroutine can use its name. Inside subroutines, GOTO destinations are given labels. Some assemblers support local symbols which are lexically distinct from normal symbols (e.g., the use of "10$" as a GOTO destination). Most assemblers provide flexible symbol management, allowing programmers to manage different namespaces, automatically calculate offsets within data structures, and assign labels that refer to literal values or the result of simple computations performed by the assembler. Labels can also be used to initialize constants and variables with relocatable addresses. Assembly languages, like most other computer languages, allow comments to be added to assembly source code that are ignored by the assembler. Good use of comments is even more important with assembly code than with higher-level languages, as the meaning and purpose of a sequence of instructions is harder to decipher from the code itself. Wise use of these facilities can greatly simplify the problems of coding and maintaining lowlevel code. Raw assembly source code as generated by compilers or dis-assemblerscode without any comments, meaningful symbols, or data definitionsis quite difficult to read when changes must be made. ----------------------------------------------------End of Unit 1-------------------------------------------------------

Page 22 Prepared by Mrs. B.chitra B.E., M.Tech., / AP / CSE