KUMARAGURU

COLLEGE OF TECHNOLOGY
COIMBATORE-641006

MCT 408 MICROPROCESSOR AND MICRCONTROLLER LABORATORY

--------------------------------------------------

LABORATORY MANUAL

DEPARTMENT OF MECHATRONICS

CONTENTS
S.No Title of the Exercise Page No Mark Signature

1.PROGRAMMMING
1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 8-bit addition and 8- bit subtraction in 8085 Additional of two 16-bit numbers in 8085 8-bit multiplication in 8085 8-bit division in 8085 To arrange a series of numbers in ascending order in 8085 To arrange a series of numbers in descending order in 8085 Decimal to Hexadecimal conversion in 8085 Hexadecimal to Decimal conversion in 8085 8-bit addition and 8- bit subtraction in 8051 Additional of two 16-bit numbers in 8051 8-bit multiplication in 8051 8-bit division in 8051

2.INTERFACING
1. 2. 3. 4. Analog to Digital Conversion in 8085 Digital to Analog Conversion in 8085 Stepper Motor Controller in 8051 DC motor controller interface using 8051

FLOWCHART ADDITION OF TWO 8-BIT NUMBERS (WITH OUT CARRY)

START

INITIALISE A, B

STORE A

A=A+B

STOP

KUMARAGURU COLLEGE OF TECHNOLOGY

3

LABORATORY MANUAL Exercise/Experiment Number: 1

Lab Code / Lab Course / Branch

: Microprocessor and Microcontroller lab : B.E / Mechatronics

Title of the exercise/experiment: 8-BIT ADDITION ______________________________________________________________

STEP1: INTRODUCTION:
a) OBJECTIVE OF THE EXERCISE/EXPERIMENT To write assembly language program to add two 8 bit numbers with and without carry.

STEP2: ACQUISITION:
a) Facilities/material required to do the exercise/experiment S.No. 1. 2. b) ALGORITHM: Steps 1. 2. 3. 4. 5. 6. OUTPUT: Without carry ADDRESS INPUT OUTPUT Description (in full) Start the program Initialize accumulator A Initialize register B Add content of B register to accumulator Display the result Stop the program material required 8085 microprocessor kit Power guard Quantity 1 1

Addition without carry

With carry ADDRESS INPUT OUTPUT

C) PROGRAM: Address 4100 4101 4102 4103 4104 Label Mnemonics MVI A,04H MVI B,02H ADD B 5 Hex code Comments initialize accumulator with data 04H Initialize B register with data 02H Add B to A

4105 STA 4200H 4106 4107 4108 HLT

Store the contents of accumulator in the memory location 4110H (Lower order address byte first) (higher order address byte secondes) Stop program execution

Addition with carry

d) ALGORITHM:
Steps 1 2 3 4 5 6 7 8 Description (in full) Start the program Initialize accumulator A Initialize register B & C Add content of B register to A If there is no carry go to step 7 Increment C Display the result Stop the program

Flow Chart

e)Program:
Address Label Mnemonics Hex code 7 Comments

4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 LOOP:

MVI A,AAH MVI B, AAH MVI C, 00H ADD B JNC 420BH INR C STA 440BH

Initialize A with first data 75H Initialize B with seconds data 75H Initialize C with data 00H (clear) Add B to A Jump to loop: 410BH if no carry Increment C. Store the content of accumulator in the memory location with the address ----H

MOV A,C STA 4401H

Move the content C to A. Store the content of accumulator in the memory location ----H (Lower order address byte first) (Higher order address byte second) Stop program execution

HLT

f) Procedure for doing the exercise/experiment:: STEP 1: 1. connect the power cord 2. Reset the kit 3. Press reset sub starting address -next 4. Press reset go starting address 5. Press reset sub stored address d) INFERENCE AND ANALYSIS:

STEP3:PRACTICE/TESTING:
1.What is Microprocessor ? It is a program controlled semiconductor device (IC}, which fetches,decode and executes instructions. 2. What are the basic units of a microprocessor ? The basic units or blocks of a microprocessor are ALU, an array of registers and control unit. 3.what is Software and Hardware? The Software is a set of instructions or commands needed for performing a specific task by a programmable device or a computing machine. The Hardware refers to the components or devices used to form computing machine in which the software can be run and tested. Without software the Hardware is an idle machine.

FLOW CHART Without borrow

10

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL
11

Exercise/Experiment Number: 1.1

Lab Code / Lab Course / Branch

: Microprocessor and Microcontroller lab : B.E / Mechatronics

Title of the exercise/Experiment: 8BIT SUBRACTION using 8085 ___________________________________________________

STEP1: INTRODUCTION
a) OBJECTIVE OF THE EXERCISE/EXPERIMENT To write assembly language program to subtract two 8bit numbers with and without borrow.

STEP2 : ACQUISITION
a) Facilities/material required to do the exercise/experiment S.No. 1. 2. material required 8085 microprocessor kit Power guard Quantity 1 1

Subtraction without borrow

b) ALGORITHM:
Steps 1 2 3 4 5 6 Description (in full) Start the program Initialize accumulator A Initialize register B Subtract B from A Display the result Stop the program

Output: Without borrow:

ADDRESS INPUT OUTPUT

12

With borrow:
ADDRESS INPUT OUTPUT

c)

PROGRAM :
Label Mnemonics MVI A,06H MVI B, 05H SUB B STA 4565H 13 Hex code Comments Initialize A with first data H Initialize B with second data H Subtract B from A Store the contents of accumulator in the memory location with the

Address 4100 4101 4102 4103 4104 4105

4106 4107 4108

HLT

address ----H (Lower order address byte first) (Higher order address byte second) Stop the program execution

Subtraction with barrow

d) ALGORITHM:
Steps 1 2 3 4 5 6 7 8 Description (in full) Start the program Initialize accumulator A Initialize register B&C Subtract content of B from A If there is no carry go to step 7 Increment C Display the result Stop the program

Flow chart:

14

e) PROGRAM:
15

Address 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112

Label

Mnemonics MVI A, 03H MVI B, 07H MVI C, 00H SUB B JNC LOOP:410BH INR C

Hex code

Comments Initialize A with first data H Initialize b with second data H Initialize C with 00H (clear) SUBTRACT B FROM A Jump to Loop:----H: if no carry Increment C Store the content of accumulator in the memory location ----H Move content C to A Store the content of accumulator in the memory location ----H Stop program execution

LOOP:

STA 4363H MOV A, C STA 4464H HLT

f) Procedure for doing the exercise/experiment:: STEP 1: 1. connect the power cord 2. Reset the kit 3. Press reset sub starting address -next 4. Press reset go starting address 5. Press reset sub stored address d) INFERENCE AND ANALYSIS:

STEP3:PRACTICE/TESTING:
1. What is assembly language? 16

The language in which the mnemonics (short -hand form of instructions) are used to write a program is called assembly language. The manufacturers of microprocessor give the mnemonics. 2. What are machine language and assembly language programs? The software developed using 1's and 0's are called machine language, programs. The software developed using mnemonics are called assembly language programs. 3. What is the drawback in machine language and assembly language, programs? The machine language and assembly language programs are machine dependent. The programs developed using these languages for a particular machine cannot be directly run on another machine .

17

Flow chart

18

KUMARAGURU COLLEGE OF TECHNOLOGY

19

LABORATORY MANUAL Exercise/Experiment Number: 2

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics using 8085

Title of the exercise/experiment : ADDITION OF TWO 16-BIT NUMBERS

STEP 1: INTRODUCTION
a) OBJECTIVE OF THE EXERCISE/EXPERIMENT To write assembly language programs to add two 16 bit numbers with and without carry

STEP 2: ACQUISITION
(a) Facilities/material required to do the exercise/experiment
S.No. 1. 2. material required 8085 microprocessor kit Power guard Quantity 1 1

Addition of two 16 bit numbers without carry

b) ALGORITHM:
Steps 1 2 3 4 Description (in full) Start the program Load HL register pair with the 16 bit data directly from the memory location Exchange data with DE register pair Reload the register with another 16 bit data

20

Output : Without borrow

ADDRESS INPUT OUTPUT

With borrow
ADDRESS INPUT OUTPUT

5 6 7

Add the HL & DE register pairs Store the value in a memory location Stop the program

c) PROGRAM:
Address 4100 Label Mnemonics LHLD 4200H Hex code 21 Comments Load register pair HL 1st data ----H

4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B

XCHG LHLD 4202H DAD D SHLD 4300H HLT

Exchange HL with DE Load register pair HL with 2nd data ----H Add register DE to HL Store the value of HL in the address -----H Stop program exaction

Addition of two 16 bit numbers with carry

d)ALGORITHM
Steps 1 2 3 4 5 6 7 Description (in full) Start the program Load the register pair HL directly from the location Exchange value with DE register pair Reload register pair HL with the other data Clear register B Add HL & DE register pairs Check the condition for no carry

Flow chart
ADDITION OF TWO 16-BIT NUMBERS (WITH CARRY)

START

INTIALISE HL, B

EXCHANGE HL WITH DE

22

RELOAD HL

HL = HL+DE

NO

IS CARRY?

yes

INCREMENT B

STORE HL

MOVE B TO A

STORE HL

STOP

:8
9 10 11 12

If no carry then move ton step 10 Increment B Store value of HL Move B to A and in memory location Stop the program

d)
Address 4100 4101 4102 4103 4104 4105 4106

PROGRAM:
Label Mnemonics LHLD 4500H Hex code Comments Load HL reg pair with 1st data----H XCHG LHLD 4502H Exchange the data with DE Load HL reg pair with 2nd data----H

23

4107 4108 4109 410A 410B 410C 410D 410E LOOP: 410F 4110 4111

MVI B, 00 DAD D JNC LOOP: 410EH INRB SHLD ----H MOV A,B

Initialize B register with 00H Add the DE register pair with HL Check condition for no carry Increment B register Store result in HL reg pair with address -----H Move content of B to A

24

4112 STA ----H 4113 4114 4115 HLT

Store the contents of accumulator in the memory location with the address -----H Stop program execution

f) Procedure for doing the exercise/experiment: STEP 1: 1.connect the power cord 2.Reset the kit 3.Press reset sub starting address -next 4.Press reset go starting address 5.Press reset sub stored address g) INFERENCE AND ANALYSIS: Thus addition of 16 bit numbers with and without carry was performed using 8085 kit. STEP3:PRACTICE/TESTING:
1..what is Software and Hardware? The Software is a set of instructions or commands needed for performing a specific task by a programmable device or a computing machine.

25

The Hardware refers to the components or devices used to form computing machine in which the software can be run and tested. Without software the Hardware is an idle machine. 2.What are machine language and assembly language programs? The software developed using 1's and 0's are called machine language, programs. The software developed using mnemonics are called assembly language programs. 3.Define bit, byte and word. A digit of the binary number or code is called bit. Also, the bit is the fundamental storage unit of computer memory. The 8-bit (8-digit) binary number or code is called byte and 16-bit binary number or code is called word. (Some microprocessor manufactures refer the basic data size operated by the processor as word).

FLOW CHART
8-BIT MULTIPLICATION

START

INTIALISE A, B, C, D A=A+C NO YES IS CARRY NO

INCREMENT D

DECREMENT B

IS ZERO? 26 MOVE STORE STOR D TO A A A

STOP

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 3

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics

Title of the exercise/experiment : 8-bit multiplication using 8085 ______________________________________________________________

STEP 1: INTRODUCTION
a) OBJECTIVE OF THE EXERCISE/EXPERIMENT To write an assembly language program to multiply the given two 8-bit numbers

STEP 2: ACQUISITION
a)Facilities/material required to do the exercise/experiment S.No. material required 27 Quantity

1. 2.

8085 microprocessor kit Power guard Description (in full)

1 1

b)ALGORITHM:
Steps 1 2 3 4 5 6 Start the program Initialize B, C, D register to accumulator Add content of C register to accumulator Change the program sequence to step 6 it carry flag is reset Increment the content of D reg by 1 Decrement the content of B reg by 1

Output : Without Carry

ADDRESS INPUT OUTPUT

With carry
ADDRESS INPUT OUTPUT

28

7 8 9 10

Change the program sequence to step 3 if the zero flag is reset Copy the data byte from accumulator to memory location Move contents of D to content of accumulator and store it in memory location stop the program

b) PROGRAM:
Address 4100 4101 4102 4103 4104 4105 4106 4107 4108 LOOP L2 ADD C Add the content of C reg to accumulator Change the program sequence to L1 if no carry MVI D, 00H Copy the data 00H to D reg MVI A, 00H Initialize accumulator MVI C,21H Copy the 2nd data to C reg immediately Label Mnemonics MVI B, 10H Hex code Comments Initialize B reg with 1st data --H

4109 410A 410B

JNC L1:410DH

29

410C 410D LOOP L1

INR D DCR B

Increment the content of D reg by 1 Decrement the content of B reg by 1

30

410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118

Change the content program sequence JNZ L2:4108H to L2 if no zero Store the contents of accumulator in the memory location ----H Move the content of D to accumulator Store the content of accumulator in the memory location ----H Stop program execution

STA 4500H

MOV A, D STA ----H HLT

d) Procedure for doing the exercise/experiment:

1. Connect the power cord 2. Reset the kit 3. Press reset sub starting address -next 4. Press reset go starting address 5. Press reset sub stored address e) INFERENCE AND ANALYSIS: Thus multiplication of two numbers with and without carry was performed using 8085 kit and result was verified

31

32

f) STEP3: PRACTICE/TESTING:
1. What is the difference between CPU bus and system bus? The CPU bus has multiplexed lines but the system bus has separate lines for each signal. (The multiplexed CPU lines are demultiplexed by the CPU interface circuit to form system bus). 2.What does memory-mapping mean? The memory mapping is the process of interfacing memories to microprocessor and allocating addresses to each memory locations. 3.What is interrupt 1/0? If the 1/0 device initiate the data transfer through interrupt then the 1/0 is called interrupt driven 1/0.

33

Flow chart
8-BIT DIVISION

START

INTIALISE A, B

A=A-B NO INCREMENT C

COMPARE B WITH

IS CARRY?

YES

STORE A

MOVE C TO A

STORE A

STOP

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KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 4

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics

Title of the exercise/experiment : 8-BIT DIVISION using 8085 ______________________________________________________________

STEP 1: INTRODUCTION
a) OBJECTIVE OF THE EXERCISE/EXPERIMENT

To write an assembly language program that performs the division of two 8-bit numbers

STEP 2: ACQUISITION
a)Facilities/material required to do the exercise/experiment

S.No. 1. 2.

material required 8085 microprocessor kit Power guard Description (in full)

Quantity 1 1

b) ALGORITHM:
Steps 1 2 3 4 5 6 Start the program Initialize B, C register and accumulator Subtract content of reg B with accumulator Increment the content of C reg Compares the contents of B reg with accumulator Change the program sequence to step 3 if carry flag is set

35

Output : With quotient and Without Reminder

ADDRESS INPUT OUTPUT

With quoquent and With Reminder

ADDRESS INPUT OUTPUT

7 8 9 10

Store the contents in a memory location from accumulator Move the contents of C reg to accumulator Store the contents in a memory location from accumulator Stop the program

36

b) PROGRAM:
Address 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B Store the contents of 410C 410D STA 4500H accumulator in the memory location ----H LOOP: MVI B, 03H MVI C, OO SUB B INRC CMPB JNC LOOP:4106H Move the second data to B reg Copy the 00h to reg C Subtract the contents of reg B from accumulator Increment the contents of C reg Compares the content of B reg with accumulator Jump if no carry Label Mnemonics MVI A, 30H Hex code Comments Move the 1st data to accumulator

37

410E 410F 4110 4111 4112 4113 MOV A, C STA 4600H Move the contents of C reg with accumulator Store the contents of accumulator in the memory location ----H Stop the program

HLT

d) Procedure for doing the exercise/experiment:

1. Connect the power cord
38

2. Reset the kit 3. Press reset sub starting address -next 4. Press reset go starting address 5. Press reset sub stored address c) INFERENCE AND ANALYSIS: Thus he division of two numbers with and without reminder is performed using 8085 kit and the result was verified. f) STEP3 :PRACTICE/TESTING:
1.What is DMA? The direct data transfer between I/O device and memory is called DMA. 2. What is the need for Port? The I/O devices are generally slow devices and their timing characteristics do not match with processor timings. Hence the I/O devices are connected to system bus through the ports. 3.What is a port? The port is a buffered I/O, which is used to hold the data transmitted from the microprocessor to I/O device or vice-versa.

FLOW CHART
SORTING AN ARRAY OF NUMBERS IN ASCENDING ORDER START

LOAD HL REG PAIR

INTIALIZE B, C, D,

YES

MOV M TO A 39 IS INCREMENT HL BY 1 INCREMENT DECREMENT COMPARE MOVE MOVE MOV M 01 A B M TO TO HL WITH B M D BYA 1 CARRY? C

NO

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 5

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics ASCENDING ORDER using 8085 40

Title of the exercise/experiment: SORTING AN ARRAY OF NUMBERS IN

______________________________________________________________

STEP 1: INTRODUCTION
d) OBJECTIVE OF THE EXERCISE/EXPERIMENT To write assembly language program to arrange a series of numbers in ascending order

STEP 2: ACQUISITION
a)Facilities/material required to do the exercise/experiment
S.No. 1. 2. material required 8085 microprocessor kit Power guard Quantity 1 1

B)ALGORITHM:
Steps 1 2 3 Description (in full) Start the program Store the given values in register pair Initialize D and B register is 00,00 & C as numbers of values

C
DECREMENT C NO

YES IS ZERO?

YES

MOVE D TO A NO ROTATE RIGHT WITH CARRY 41 IS CARRY? STOP

4 5 6 7 8 9 10 11 12 13 14 15 16 17

Move memory location to accumulator Increment HL register pair by 1 Compare the content of memory and accumulator If carry jump to stop 14, else move memory location to b reg Move accumulator content to memory location Decrement HL register pair by 1 Move B register to memory location Increment HL register pair by 1 Move 01 to D register Decrement C register If no zero , jump to step 4 Move D register to accumulator If carry occurs, jump to step 2 Stop the program

b) PROGRAM:
Address 4100 Label L3 Mnemonics LXI H, 4200H Hex code 42 Comments Load HL register pair

4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D

MVI C, 03 MVI D, 00H MVI B, 00H L2 MOV A, M INX H CMP M JC L1 :4116H

Initialize c register with 04 Initialize D register as 00 Initialize B register as 00 Move memory to accumulator Increment HL register pair Compare accumulator with memory Jump on carry to L1:----H

Output: Address Input Data Output Data

43

410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D 411E 411F

MOV B, M MOV M, A DCX H MOV M, B INX H MVI D, O1 L1 DCR C JNZ L2:4109 MOV A,D RRC JC L3:4100 HLT

Move memory to B reg Move accumulator to memory Decrement H reg Move B register to memory Increment H reg Move 01 to D Decrement C reg Jump on no zero to L2:---Move D to A Rotate accumulator right Jump on carry to L3 Stop

d) Procedure for doing the exercise/experiment:

1. Connect the power cord 2. Reset the kit 3. Press reset sub starting address -next 4. Press reset go starting address 5. Press reset sub stored address e) INFERENCE AND ANALYSIS:

44

45

f) STEP3 :PRACTICE/TESTING What is Instruction cycle? The sequence of operations that a processor has to carry out while executing the instruction is called Instruction cycle. Each instruction cycle of a processor indium consists of a number of machine cycles. What is fetch and execute cycle? In general, the instruction cycle of an instruction can be divided into fetch and execute cycles. The fetch cycle is executed to fetch the opcode from memory. The execute cycle is executed to decode the instruction and to perform the work instructed by the instruction. What is Block and Demand transfer mode DMA? In Block transfer mode, the DMA controller will transfer a block of data and relieve the bus for processor. After sometime another block of data is transferred by DMA and so on. In Demand transfer mode the DMA controller will complete the entire .data transfer at a stretch and then relieve the bus to processor

46

FLOW CHART SORTING OF AN ARRAY OF NUMBERS IN DESCENDING ORDER START

LOAD HL REG PAIR

INTIALIZE B, C, D,

MOVE M TO A

INCREMENT HL BY 1

COMPARE M WITH A

IS CARRY? NO YES MOVE M TO B

MOVE A TO M

DECREMENT HL BY 1

MOVE B TO M

INCREMENT HL BY 1 47 TO D MOVE 01

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 6

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics Descending Order using 8085

Title of the exercise/experiment: Sorting An Array Of Numbers In

______________________________________________________________

STEP 1: INTRODUCTION
e) OBJECTIVE OF THE EXERCISE/EXPERIMENT

To write assembly language program to arrange a series of numbers in descending order

STEP 2: ACQUISITION
a)Facilities/material required to do the exercise/experiment
material required S.No. 1. 2. 8085 microprocessor kit Power guard Quantity 1 1

b) ALGORITHM:
Steps 1 2 Description (in full) Start the program Store the given values in RL register pair

48

DECREMENT C NO YES IS ZERO?

MOVE D TO A

ROTATE RIGHT WITH CARRY

YES

IS CARRY?

NO
STOP

49

3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Initialize D and B register as 00, 00 & C as number of values Move memory location to accumulator Increment HL register pair by 1 Compare the content of memory and accumulator If carry no jump to stop 14,else move memory location to B register Move accumulator content to memory location Decrement hl register pair by 1 Move B registers to memory location Increment HL register pair by 1 Move 01 to D register Decrement C register If no zero jump to step 4 Move D register to accumulator If carry occurs jump to step 2 Stop the program

c) PROGRAM:
Address 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A Label L3 Mnemonics LXI H, 4200H MVI C, 03H MVI D, 00 MVI B, 00 L2 MOV A, M INX H Hex code Load HL register pair Initialize c register with 04 Initialize D register as 00 Initialize B register as 00 Move memory to accumulator Increment HL register pair Comments

50

410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115

CMP M JC L1 :4116H MOV B, M MOV M, A DCX H MOV M, B INX H MVI D, O1 51

Compare accumulator with memory Jump on carry to L1:----H Move memory to B reg Move accumulator to memory Decrement H reg Move B register to memory Increment H reg Move 01 to D

4116 4117 4118 4119 411A 411B 411C 411D 411E 411F

L1

DCR C JNZ L2:4109 MOV A,D RRC JC L3:4100H HLT

Decrement C reg Jump on no zero to L2:---Move D to A Rotate accumulator right Jump on carry to L3 Stop

d) Procedure for doing the exercise/experiment:

1. Connect the power cord 2. Reset the kit 3. Press reset sub starting address -next 4. Press reset go starting address 5. Press reset sub stored address

52

e) INFERENCE AND ANALYSIS:

f) STEP3 :PRACTICE/TESTING
Define opcode and operand. Opcode (Operation code) is the part of an instruction / directive that Operand is a part of an instruction / directive that represents a value on which the instruction acts. 45. What is opcode fetch cycle? The opcode fetch cycle is a machine cycle executed to fetch the opcode of an instruction stored in memory. Every instruction starts with opcode fetch machine cycle. 46. What operation is performed during first T -state of every machine cycle in 8085 ? In 8085, during the first T -state of every machine cycle the low byte address is latched into an external latch using ALE signal. 53

47. Why status signals are provided in microprocessor? The status signals can be used by the system designer to track the internal operations of the processor. Also, it can be used for memory expansion (by providing separate memory banks for program & data and selecting the bank using status signals).

FLOWCHART DECIMAL TO HEXADECIMAL CONVERSION START INTIALIZE B REG

MOVE B TO A

AND ACC WITH 0FH

MOVE A TO C

MOVE B TO A

54D WITH 0AH INTIALIZE XOR DECREMENT MOVE ADD ACC A=A+C B01 WITH WITH TO BD REG A ACC STOP IS ZERO?

NO

YES

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 7

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics HEXADECIMAL TO DECIMAL CONVERSION

Title of the exercise/experiment: DECIMAL TO HEXADECIMAL AND

______________________________________________________________

STEP 1: INTRODUCTION
f) OBJECTIVE OF THE EXERCISE/EXPERIMENT 55

To write an assembly language program to convert the given decimal numbers to hexadecimal and vice versa

STEP 2: ACQUISITION
a)Facilities/material required to do the exercise/experiment
material required S.No. 1. 2. 8085 microprocessor kit Power guard Quantity 1 1

b)ALGORITHM:
Steps 1 2 3 4 Description (in full) Start the program Load B register with data Transfer it to accumulator AND accumulator with 0FH & transfer to C register

ADDRESS

Input

output

56

5 6 7 8 9 10 11 12 13 14

Copy B and A AND the accumulator with F0 Rotate left with carry for 4 times Copy A to B register Load D with data OAH Exclusively OR the accumulator with the content of accumulator Add B register with accumulator Decrement D register by 1 If no zero add B register with accumulator If zero add accumulator with C register

C) PROGRAM:
Address 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A Label Mnemonics MVI B, 10H Hex code Comments Move the decimal input to B register MOV A, B ANI OFH MOV C, A MOV A, B ANI F0 H RLC RLC 57 Copy content of B to accumulator AND accumulator with 0FH Copy content of C to accumulator Copy content of B to accumulator AND accumulator with F0 H Rotate accumulator left thro carry Rotate accumulator left thro carry

410B 410C 410D 410E

RLC RLC MOV B, A MVI D, OAH

Rotate accumulator left thro carry Rotate accumulator left thro carry Copy accumulator content to B register Move OAH to D register

58

410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A

LOOP:1

XRA A ADD B DCR D JNZ L1:4111H ADD C STA 4500H HLT

Exclusive OR the content of accumulator Add the content of B register with accumulator Decrement the content of D register by 1 Jump on no zero to Loop 1: ----H Add the content of C register with accumulator Store the result at ----H Stop program execution

Hexadecimal to decimal conversion

d) ALGORITHM:
Steps 1 2 3 4 5 6 7 Description (in full) Start the program Get the input data Divide the numbers by 0AH The quotient is obtained by rotating right the accumulator contents with carry 4 times Add the content of accumulator and remainder Store the result in a memory location stop the program

d) PROGRAM:
Address 4100 4101 Label Mnemonics MVI A, 0DH Hex code 3E Comments Initialize accumulator with data

59

4102 4103 4104

MOV B, OAH MOV C, 00H 60

Move 0AH to B register Initialize C register

4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116

L1:

SUB B INR C CMP B JNC L1:4106H MOV E, A MOV A, C RRC RRC RRC RRC ADD E STA 4500H HLT

Subtract B register content from acc Increment C register by 1 Compare B register with accumulator Jump on no carry to Loop1:----H Move the contents of acc. To E register Move the co0ntent of C register to acc Right rotate acc. with carry Right rotate acc. with carry Right rotate acc. with carry Right rotate acc. with carry Add the contents of E register with acc Store contents of acc in ----H Stop the program

d) Procedure for doing the exercise/experiment:

1. Connect the power cord 2. Reset the kit 3. Press reset sub starting address -next 4. Press reset go starting address 5. Press reset sub stored address

61

e) INFERENCE AND ANALYSIS:

f) STEP3 :PRACTICE/TESTING
62

How the 8085 processor differentiates a memory access (read/write) and 1/0 access (read/write)? The memory access and 1/0 access is differentiated using 10 I M signal. The 8085 processor asserts 10 I M low for memory read/write operation and 10 I M is asserted high for 1/0 read/write operation. 49. When the 8085 processor checks for an interrupt? In the second T -state of the last machine cycle of every instruction, the 8085 processor checks whether an interrupt request is made or not. 50. What is interrupt acknowledge cycle? The interrupt acknowledge cycle is a machine cycle executed by 8085 processor to get the address of the interrupt service routine in-order to service the interrupt device.

Start

Load the first data in accumulator Subtract the second data in accumulator

No c) Flowchart:

If Carry ?

ADDITION: Yes Increment R0

Store the result and borrow in memory 63 Stop

64

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 8

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics

Title of the exercise/experiment: 8-bit Addition & Subtraction using

8051

STEP 1: INTRODUCTION
a) OBJECTIVE OF THE EXERCISE/EXPERIMENT To perform addition and subtraction of two 8-bit numbers using immediate addressing mode.

STEP 2: ACQUISITION
a) Facilities/material required to do the exercise/experiment: S.NO 1 b) ADDITION: Step 1: Start the program. Step 2: Clear the carry flag and R0 registers. Step 3: Move the first data to accumulator. Step 4: Add the second data with accumulator content. Step 5: If carry is generated, increment R0, else goto step 6. Step 6: Store the result & carry in required location. Step 7: Stop the program. SUBTRACTION: 65 NAME 8051 Microcontroller Module QUANTITY 1

Algorithm

Step 1: Start the program.

66

Step 2: Clear the carry flag and R0 registers. Step 3: Move the first data to accumulator. Step 4: Subtract the second data with accumulator content. Step 5: If there is no borrow, increment R0, else goto step 6. Step 6: Store the result & carry in required location. Step 7: Stop the program. c) ADDITION: ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 HLT MOVX @DPTR, A MOV A, R0 INC DPTR MOVX @DPTR, A SJMP HLT 67 Move the accumulator content to address stored in Data pointer Move the content of R0 to accumulator Increment Data Pointer Move the accumulator content to address stored in Data Pointer Jump to HLT L1 INC R0 MOV DPTR, # 4200 Increment R0 Move memory address to Data pointer JNC L1 Jump to L1 if no carry ADDC A, # ___H Add ___H with accumulator content CLR C MOV A, # ___H Clear carry flag Move the first data to accumulator LABEL MNEMONICS MOV R0, # 00H OPCODE COMMENT Clear R0 register Program:

4112 d) SUBTRACTION :

Start

Load the first data in accumulator Subtract the second data in accumulator

No

If borrow ?

Yes Increment R0

Store the result and borrow in memory

Stop

68

SUBTRACTION: ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 HLT MOVX @DPTR, A MOV A, R0 INC DPTR MOVX @DPTR, A SJMP HLT Move the accumulator content to address stored in Data pointer Move the content of R0 to accumulator Increment Data Pointer Move the accumulator content to address stored in Data Pointer Jump to HLT L1 INC R0 MOV DPTR, # 4200 Increment R0 Move memory address to Data pointer JNC L1 Jump to L1 if no carry SUBB A, # ___H Add ___H with accumulator content CLR C MOV A, # ___H Clear carry flag Move the first data to accumulator LABEL MNEMONICS MOV R0, # 00H OPCODE COMMENT Clear R0 register

69

70

e) Steps 1 2 e)

Procedure for doing the exercise/experiment: Description Type the opcode in 8051 Microcontroller kit using the keyboard. View the result in the stored address and verify. Inference and analysis: Thus the 8-bit addition and subtraction were carried out and verified using 8051 Microcontroller.

STEP 3: PRACTICE/TESTING
Questions with answers: 1. What is direct addressing? The data to be stored is directly given along with the instruction. 2. Write the operation of ADDC instruction. To add the source and destination data along with carry and store the sum in destination address. 3. Write the operation of SUBB instruction. Subtract source from destination and store the difference in destination address.

71

MULTIPLICATION:

Start

Load the multiplicand in A register Load the multiplier in B register

Multiply A with B

Store the product and carry in memory

Stop

72

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 10

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics

Title of the exercise/experiment: 8-bit Multiplication & Division using

8051
________________________________________________________________

STEP 1: INTRODUCTION
a) OBJECTIVE OF THE EXERCISE/EXPERIMENT To perform Multiplication and Division of two 8-bit numbers using immediate addressing mode.

STEP 2: ACQUISITION
a) Facilities/material required to do the exercise/experiment: S.NO 1 b) ADDITION: Step 1: Start the program. Step 2: Load the multiplicand in A register. Step 3: Load the multiplier in B register. Step 4: Multiply A and B. Step 5: Store the product and carry in required memory location. Step 6: Stop the program. 73 NAME 8051 Microcontroller Module QUANTITY 1

Algorithm

DIVISION:

74

Step 1: Start the program. Step 2: Load the dividend in A register. Step 3: Load the divisor in B register. Step 4: Divide A by B. Step 5: Store the quotient and remainder in a memory location. Step 6: Stop the program. c) Program:

MULTIPLICATION: ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F HLT MOVX @DPTR, A SJMP Move the accumulator content to address stored in Data pointer End the program MOVX @DPTR, A INC DPTR MOV A, B Move the accumulator content to the address in data pointer Increment data pointer Move the B register content to A register MUL AB MOV DPTR, 4200H Multiply A and B Move memory location 4200 to data pointer MOV B, #____H Move the multiplier to B register LABEL MNEMONICS MOV A, # ___H OPCODE COMMENT Move the multiplicand to A register

75

DIVISION :

Start

Load the dividend in A register

Load the divisor in B register

Divide B by A

Store the Quotient and remainder in memory

Stop

76

DIVISION: ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F HLT MOVX @DPTR, A SJMP Move the accumulator content to address stored in Data pointer End the program MOVX @DPTR, A INC DPTR MOV A, B Move the accumulator content to the address in data pointer Increment data pointer Move the B register content to A register DIV AB MOV DPTR, 4200H Divide A by B Move memory location 4200 to data pointer MOV B, #____H Move the multiplier to B register LABEL MNEMONICS MOV A, # ___H OPCODE COMMENT Move the multiplicand to A register

77

78

d) Steps 1 2 e)

Procedure for doing the exercise/experiment: Description Type the opcode in 8051 Microcontroller kit using the keyboard. View the result in the stored address and verify. Inference and analysis: Thus the 8-bit multiplication and division were carried out and verified using 8051 Microcontroller.

STEP 3: PRACTICE/TESTING
Questions with answers: 1. Write the operation of MUL AB. 2. Write the operation of DIV AB. 3. What is a Stack Pointer?

79

80

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 11

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics

Title of the exercise/experiment : ANALOG TO DIGITAL CONVERSION ______________________________________________________________

STEP 1: INTRODUCTION
g) OBJECTIVE OF THE EXERCISE/EXPERIMENT To study the interfacing of ADC

STEP 2: ACQUISITION
a)Facilities/material required to do the exercise/experiment
material required S.No. 1. 2. 3. 4. 8085 microprocessor kit Power guard ADC Interfacing Kit Connecting bus Quantity 1 1 1 1

b) FUNCTIONAL DESCRIPTION FOR ADC 0809:

ADC 0809 is a monolithic CMOS device, with an 8 bit analog to digital converter, 8 channel multiplexer and microprocessor compatible control logic.

The main features of ADC 0809 are

i. ii. iii. iv. v. 8 bit resolution. 100s conversion time. 8 channel multiplexer with latched control logic. No need for external zero or full scale adjustment. Low power consumption 15mW.

81

vi.

Latched tri-state output. 82

The device contains an 8 channel signal ended analog signal multiplexer. A particular input channels is selected by using the address decoding. Table 1 shows the input states for the address lines to select any channels. The address is latched into the decoder of the letch address latch enable (ALE). The A/D converters successive approximation register is on the positive edge of the start of conversion pulse. The conversion is begun on the falling edge of the SOC pulse. End of conversion will go low between 0 and 8 clock pulse after the rising edge of start of conversion. Selected analog channel ADD C IN0 IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 Address line ADD B A ADD

0 0 0 0 1 1 1 1

0 0 1 1 0 0 1 1

0 1 0 1 0 1 0 1

CIRCUIT IMPLEMENTATION:
The channel select address pins ADD A (pins 25), ADD B (pin 24) and ADD C (pin 23) of both ICs are connected to the data through a latch 74LS174 (U2) The 8 data outputs of both the ADC 0809 ICs are connected to D0 D7 through a buffer 74LS244 (U1). Provision is also made to display the output by means of LEDs using a latch 74LS374. The combined END of conservation signal which is generated by ANDing the EOC signals of both the ADCs (U4, U4a) is used to clock the latch. Thus whenever one of the ADCs complete conversions the CEOC goes low and on the raising edge of the pulse data from the ADC is latched. The LEDs which are connected to the output pins of the display the digital data automatically. The combined ECO signal can be used to interrupt the CPU. So that the CPU can read the data output of the ADC. For this the combined EOC,

83

CEOC is given to the enable line of 74LS125 (U3b). The input of this buffer is tied to Vcc, so whenever an EOC signal from any of the ADC comes; a pulse is 84

generated at the output of 74LS125. By connecting jumper (j 4) to the

appropriate interrupt line we can interrupt the CPU.

1 1 0 1 0 x x x

The EOC signals form both the ADCs are connected to D0 line through tristate buffer U3c and U3A. Thus also by polling this line we read from ADCs There ere 3 ways of giving start of conversation (SOC) signal to the ADC. We can given the pulse manual by pressing a switch provide. Otherwise we can give the signal through a latch by means of software. Otherwise, we can start conversion straight away by conning SOC pin to ALE. Signal jumper J2 is provide for SOC1 and jumper J3 is provide for SOC2 to connect with appropriate signals.
PCLK (1.5 MHz) available at VXT bus is divided by with a D flip flop 74LS75 (U5B) to provide an input clock of 750 kHz to both the ADCs. The 8 channel inputs (INO IN7) are terminated at 2 connectors P2 and P3 respectively. This is our standard An-1 bus. A 1k trimpot is providing for demonstration purpose. It can be connected to channels 0, 3, 6,11,08,11 or 13 connecting shunts at approximate position in jumpers j 6 and j7. I/O DECODING: A 3 to 8 decoded 74LS138 (U8) is employed to generate I/O decoding logic. Pin1, pin2, and pin3 of 74LS138 are employed ti generate I/O decoding logic. Pin 1, pin2, and pin3 of 74LS138 are connected to address lines A3, A4 and A5 respectively. IOR AND LOW signals are NANDed together and the lines NAND gates output is connected to pin6 of 74LS138. similarly the address lines A6 and A7 are the NAND gate output lied to pin5 of the 3 to 8 decoder pin is grounded. Thus the buffer 74LS244 which transfer the converted data outputs to data bus is selected when A7 A6 A5 A4 A3 A2 A1 A0

1 85

86

The I/O address for the latch 74LS174 which lathes the data bus to ADD A, ADDB. ADD C and ALE 1 and ALE 2 is A7 A A5 A4 A3 A2 A1 A0

The start of conversion pulse can be given by means of software also. The flipflop 74LS74 which transfers the d0 lines status to the SOC pin of ADC 0809 is selected when

A7 1 1

A5 0

A4 1

A3 1

A2 x

A1 x

A0 x

The EOC output of ADC 1 and ADC 2 is transferred to D 0 line by means of two tri-state buffer. The EOC 1 is selected when

A7

A6

A5

A4

A3

A2

A1

A0

The EDC 2 is selected when A7 A6 A5 A4 A3 A2 A1 A0

87

OUTPUT:

ADDRESS

INPUT

OUTPUT

88

c) PROGRAM:
Address Label Mnemonics MVI A, 10; OUT 0C8H MVI A, 18 OUT 0C8H MVI A, 01 OUT 0D0H XRA A XRA A XRA A MVI A, 00 OUT 0DH0H IN 0D8H; ANI 01 CPI 01 JNZ LOOP;----H IN 0C0H; STA----H HLT Hex code Comments Select channel Initialize ADC Start of conversion ON Time delay for conversion

Check for EOC

Input data

89

90

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 12

Lab Code / Lab Course / Branch

: Microprocessor and microcontroller lab : B.E / Mechatronics : DIGITAL TO ANALOG CONVERSION using 8085

Title of the exercise/experiment

______________________________________________________________

STEP 1: INTRODUCTION
h) OBJECTIVE OF THE EXERCISE/EXPERIMENT To do the interfacing of DAC and write an assembly language program to generate 1. 2. 3. 4. square wave at the DAC2 output saw tooth wave at the DAC1 output triangular wave at the DAC2 output sine wave at the DAc1 output

STEP 2: ACQUISITION
a)Facilities/material required to do the exercise/experiment
Sl.no 1 2 3 4 Apparatus 8085 microprocessor kit power supply interfacing card manual quantity 1 1 1 1

CIRCUIT IMPLEMENTATION The basic microprocessor board, VBMB-002 incorporates two 8 bit digital to analog converter DAC 0800. DAC 0800 is a monolithic, high speed, current digital to analog converter. Its unique are Typical setting time of 100 Nano-seconds. 91

 Complementary current outputs

92

 Differential output voltage of 20V peak to peak with simple resister loads. 2 quadrant wide range multiplying capability the DAC interface section comprises of i. I/O decoding ii. D/A conversion circuit I/O DECODING: The ICs 74LS138 and 74LS00 from the address decoding logic in this interface board. The address lines A3, A4 and A5 are tied to pin1, pin2, and pin3 of 74LS138 respectively. The address lines A6 and A7 are NAND together and the NAND gate output is connected to pin 6 of 74LS138. Similarly IOR and IOW signals are NAND and the NAND gate output is connected to pin6 of 74LS138. Pin 4 is grounded. Thus with

1 A7

1 A6

0 A5

0 A4

0 A3

X A2

X A1

X A0

DAC 1 is selected, and with A7 A6 A5 A4 A3 A2 A1 A0

DAC 2 is selected D/A CONVERSION CIRCUIT: The design comprise of the latch 74LS273, DAC 0800 and the current to voltage converting circuitry using op-amp 741. DAC 0800 is configured for bipolar output operation. IC 74LS723 latches the 8 bit data on the bus. The data latched by 74LS273 is input to DAC 0800. The DAC 0800 convert the 8-bit input and gives equivalent complementary current outputs. 93

Current to voltage conversion circuit is designed using op-amp 741. This circuit converts the current output of DAC 0800 into equivalent analog voltage. Complementary current outputs I out, Iout are connected to inverting and non-inverting inputs of op-amp 741. In order to have the outputs voltage variation from 5V to +5V 2.2 k feed back resistor has been selected.

94

The DAC outputs are available at the 5 pin connector (P2). DAC1 and DAC2 A7 1 A6 1 A5 0 A4 1 A3 0 A2 0 A1 0 A0 0

outputs are terminated at pin5 respectively. Pin 1 is connected to the ground. A/D CONVERSION CIRCUIT: It is possible to construct an ADC using DAC if we have a register (Successive approximation register) or a counter and a comparator. It is also mentioned that in the software based A/D converter, microprocessor can act as a counter or a comparator LM 311 in our card VBMB 002. The output of DAC channel 1is given to one of the inputs of the comparator. We can give an analog voltage, between -5 and +5V to be converted to digital forms the other input. The comparators output goes high when DAC1 and the analog voltage is approximate equal. To check the output of the comparator, one tristate buffer (U10) the output of which is connected to D0 line is provided. The address 74LS125 is decoded as follows

PROGRAM:
To generate square wave at the dac2 output Address Label START: Mnemonics MVI A,00 OUT C8H CALL DALAY:----H MVI A, FF OUT C8H CALL DELAY:----H JMP START:----H MVI B, 05 MVI C, FF DCR C JNZ L2:----H DCR B JNZ L1:----H RET Hex code Comments

DELAY:

95

To create a saw tooth wave at the output of DAC1: 96

Address

Label START L1:

Mnemonics MVI A,00 OUT C0H INR A JNZ L1:----H JMP START:----H

Hex code

Comments

To generate triangular wave form at DAC2 output Address Label START L1: Mnemonics MVI L,00 MOV A, L OUT C8H INR L JNZ L1:----H MVI L, FFH MOV A.L OUT C8H DCR L JNZ L2:----H JMP START:----H Hex code Comments

Address

Label START: LOP:

To generate sine wave at DAC1 output Mnemonics LXI H, 4110H MVI C, 46 MOV A, M OUT C0H INX H DCR C

Hex code

97

98

JNZ LOP:----H JMP START6:----H LOOPUP TABLE

e) INFERENCE AND ANALYSIS:

Thus digital to analog conversion interfacing is done and assembly language program is written and executed for different wave forms. The graphs are drawn.

f) STEP3 :PRACTICE/TESTING
How the 8085 processor differentiates a memory access (read/write) and 1/0 access (read/write)? The memory access and 1/0 access is differentiated using 10 I M signal. The 8085 processor asserts 10 I M low for memory read/write operation and 10 I M is asserted high for 1/0 read/write operation. 99

100

49. When the 8085 processor checks for an interrupt? In the second T -state of the last machine cycle of every instruction, the 8085 processor checks whether an interrupt request is made or not. 50. What is interrupt acknowledge cycle? The interrupt acknowledge cycle is a machine cycle executed by 8085 processor to get the address of the interrupt service routine in-order to service the interrupt device.

101

KUMARAGURU
102

COLLEGE OF TECHNOLOGY
LABORATORY MANUAL Exercise/Experiment Number: 13

Lab Code / Lab Course / Branch

: Microprocessor lab : B.E / Mechatronics using 8051

Title of the exercise/experiment : Interfacing Of Stepper Motor Controller ______________________________________________________________

STEP 1: INTRODUCTION
a)OBJECTIVE OF THE EXERCISE/EXPERIMENT To study the interfacing of stepper motor and write an assembly language to run a stepper motor at different speed in two directions and also in forward and reverse direction with delay

STEP 2: ACQUISITION
a)Facilities/material required to do the exercise/experiment
Sl.no 1 2 3 4 5. Apparatus 8085 microprocessor kit power supply Interfacing board Stepper motor Interfacing bus quantity 1 1 1 1

STEPPER MOTOR: A motor in which the rotor is able to assume only discrete stationary angular position is a stepper motor. The rotary motion occurs in a stepwise manner from one equilibrium position to the next.

103

Output:

Address

Forward look

Reverse look

104

Stepper motor control is a very popular application of microprocessor in control area. They are widely used in (simple position control systems in the open and closed loop mode) a variety of application such as computer peripherals (printers, disk drive) and in the areas of process control machine tools, medicine numerically controlled machines and robotics. CONSTRUCTIONAL FEATURES: A stepper motor could be either of the reluctance type or of the permanent magnet type (PM). A PM stepper motor consists of multiphased stator and two part permanent magnet rotor. The VR stepper has un magnetized rotor. PM stepper motor is the most commonly used type. The basic two phase stepper motor consists of two pairs of stator poles. Each of the four poles has its own winding. The excitation of any one winding generates a north pole (N), a south pole (S) gets induced at the diametrically opposite side. As shown in the figure 1, the pole structure is continuous with the stator frame and the magnetic field passes through the cylindrical stator annular ring. The rotor magnetic field system has two end faces. The left face is permanently magnetized as South Pole and the right faces North Pole. The South Pole structure and the North Pole structure possess similar pole feces. The North Pole structure so that South Pole comes precisely between two north poles. The North Pole structure is offset with respect to the South Pole structure by one pole pitch. In an arrangement where there are four stator poles and three pairs of rotor poles, there exists 12 possible stable positions in which a south pole of the rotor can lock with north pole of the stator. From this it can be noted that the step size is. Where Ns is the no. of stator poles. Nr is the no. of pairs of rotor poles. Generally step size of the stepper motor depends upon Nr. These stable positions can be attained by simply energizing the winding on any one of the stator poles with a DC. There are three different schemes available forstepping a stepper motor. a. b. c. Wave scheme 2- phase scheme and Half stepping or mixed scheme

In wave scheme only one winding is energized at a time. The sequence for clockwise direction is A1, B2, and A2 & B1. For anticlockwise direction is A1, B1, A2 and B2 In 2-phase scheme the adjacent winding are energized at a time. The sequence for clockwise direction is A1B2, B2A2, A2B1, and B1A1. For anticlockwise direction is A1B1, B1A2, A2B2 and B2A1. In half stepping sequence or mixed scheme the above two methods are mixed. So the first time one coil is energized and the next time adjacent coils are energized. For clockwise rotation the sequence is A1, A1B2, B2, B2A2, A2, 105

106

A2B1, B1, B1A1, for anticlockwise direction the sequence is A1, A1B1, B1, B1A2, A2, A2B2, B2, B2A1, DRIVING CIRCUITRY: Stepper motor requires logic signals of relatively high power. In this board the silicon Darlington pair (JIP 122) transistor is used to generate supply that required power. The driving pulses are generated by the interface circuit. The inputs for the interface circuit are TTl pulses generated under software control using a microprocessor trainer kit. The TTL levels of pulse sequence from the data bus translate to high voltage pulses using a buffer 7407 with open collector. The Darlington pair transistor (T1P 122) drives the stepper motor as they withstand higher current. A 220 ohm resistor and an IN4148 diode are connected between the power supply and Darlington pair collector for supporting fly back current. The data lines D0-D3 and D4-D7 are used to drive the 8 TIP122 available on this board. The 4 collector points of each TIP122 are brought to two spin connectors P2 and P3 to connect two different stepper motor. With this board it is possible to connect stepper motor of torque ranging from 2kg to 20kg with operating voltage of 12V, 21V and 6V

PROGRAM:
To run a stepper motor at different speed in two directions Address Label Start: Mnemonics LXI H, LOOK UP:---H MVI B, 04 MOV A, M OUT C0H LXI D, 0303H NOP DCX D MOV A, E ORA D JNZ DELAY:----H LXI H, LOOK UP:---H MVI B, 04 Hex code Comments

Rept: delay

Start:

107

108

Rept: delay

Look up:

MOV A, M OUT C0H LXI D, 0303H NOP DCX D MOV A, E ORA D JNZ DELAY:----H INX H DCR B JNZ REPT:----H JMP START:----H 09 05 06 0A 0A 06 05 09 08 01 04 02 08 02 04 01

PROGRAM:
To Run Stepper Motor In Forward and Reverse Direction with Delay Address Label START: Mnemonics MVI C, 20H LXI H, FOR LOOK:----H CALL ROTATE:----H DCR C JNZ FORWORD:----H CALL STOP:----H MVI C, 20H LXI H, REV LOOK:----H CALL ROTATE:----H DCR C JNZ REVERS:----H Hex code Comments

REVERSE:

109

110

ROTATE: REPT: LOOP 1:

STOP: LOOP2:

FOR LOOK: REV LOOK:

CALL STOP:----H JMP START:----H MVI B, O4H MOV A, M OUT C0H LXI D, 0303H DCX D MOV A, E ORD D JNZ LOOP1:----H INX H DCR B JNZ REPT:----H RET LXI D, FFFF H DCX D MOV A, E ORA D JNZ LOOP2:----H RET DB 09H, 05H,06H,OAH DB OAH, O6H, 05H, 09H

e) INFERENCE AND ANALYSIS: f) STEP3 :PRACTICE/TESTING

111

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 14
112

Lab Code / Lab Course / Branch

: Microprocessor and microcontrollerlab : B.E / Mechatronics

Title of the exercise/experiment : DC Motor control using 8051 ________________________________________________________________

STEP 1: INTRODUCTION
a) OBJECTIVE OF THE EXERCISE/EXPERIMENT To perform interfacing of a DC motor and to perform controlling of speed.

STEP 2: ACQUISITION
a) Facilities/material required to do the exercise/experiment: S.NO 1 2 3 b) NAME 8051 Microcontroller Module DC Motor Control Board DC Motor QUANTITY 1 1

Algorithm

STEPPER MOTOR AT DIFFERENT SPEED: Step 1: Start the program. Step 2: Load FFH to A register. Step 3: Send it to the output port. Step 4: Wait. Step 5: Stop the Program Start

Load FFH in A register

Load FFC0H in Data Pointer c) Flow Chart Move the A register content to address stored in data pointer 113 Stop

c)

Program:

DC MOTOR AT DIFFERENT SPEED: ADDRESS 4100 4101 114 LABEL START MNEMONICS MOV A, FFH OPCODE COMMENT Move FFH to A register

4102 4103 4104 4105 4106 4107 HERE

MOV DPTR, #FFCOH

Move FFC0H to Data pointer

MOVX @DPTR, A SJMP HERE

Move A register content to the address stored in data pointer Jump to HERE

115

116

e) Steps 1 2 3 f)

Procedure for doing the exercise/experiment: Description Type the opcode in 8051 Microcontroller kit using the keyboard. Connect the DC motor control board and DC motor to the microcontroller kit. Execute the program and verify the DC motor rotation. Inference and analysis: Thus the DC motor was made to rotate at different speed using 8051 Microcontroller.

STEP 3: PRACTICE/TESTING
Questions with answers: 1. How the speed of the DC motor can be varied? 2. Write some logical instructions.

117

118

KUMARAGURU COLLEGE OF TECHNOLOGY

LABORATORY MANUAL Exercise/Experiment Number: 9

Lab Code / Lab Course / Branch

: Microprocessor and Microcontroller lab : B.E / Mechatronics

Title of the exercise/experiment: 16-BIT ADDITION using 8051 ______________________________________________________________

STEP1: INTRODUCTION:
e) OBJECTIVE OF THE EXERCISE/EXPERIMENT To write assembly language program to two 16 bit numbers

STEP2: ACQUISITION:
a) Facilities/material required to do the exercise/experiment S.No. 1. 2. f) ALGORITHM: Steps 1. 2. 3. Description (in full) material required 8051 microcontroller kit Power guard Quantity 1 1

Addition without carry

Start the program Get the first 8 bit data (MSB) of the 16 bit in accumulator Add another 8 bit data (MSB) with the accumulator conte

119

OUTPUT: Without carry ADDRESS INPUT OUTPUT

With carry ADDRESS INPUT OUTPUT

4. 5.

Move the address location to Data Pointer Store the added result (MSB) in the Data Pointer.
120

6. 7

Get the first 8 bit data (LSB) of the 16 bit in accumulator Add another 8 bit data (LSB) with the accumulator content

8 9 10 C) PROGRAM: Address 4100 4101 4102 4103 4104 4105 4106 4107 4108 Label

Increment the Data Pointer Store the added result (LSB) in the Data Pointer Stop the program

Mnemonics

Hex code

Comments

CLRC MOV A, #Data M1

Clear the content Move the data (MSB) 34 to accumulator.

ADD A, #Data M2

Add the content of acc and the second MSB 78 data

MOV DPTR, #4150.

Move the address location 4150 to DPTR

MOVX @DPTR,A

Move the content of accumulator to the address location (4150) in DPTR

121

4109 410A 410B 410C

INC DPTR MOV A, #Data L1 ADDC A, #Data L2

122

Increment the content of DPTR Move the data (LSB) 12 to accumulator Add the content of acc and the second (LSB) 56 data.

410D 410E

MOVX @DPTR,A

Move the content of accumulator to the address location (4151) in DPTR HERE

410F SJMP HERE 4110

f) Steps 1 2 f)

Procedure for doing the exercise/experiment: Description Type the opcode in 8051 Microcontroller kit using the keyboard. View the result in the stored address and verify. Inference and analysis: Thus the 16-bit addition were carried out and verified using 8051 Microcontroller.

STEP 3: PRACTICE/TESTING
Questions with answers: 1. What is the use of modem control unit in 8251?

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The modem control unit handles the modem handshake signals to coordinate the communication between the modem and the USART. 2. Explain the 16-bit registers DPTR and SP of 8051. DPTR:DPTR stands for data pointer. DPTR consists of a high byte (DPH) and alow byte (DPL). Its function is to hold a 16-bit address. It may be manipulated asa 16-bit data register or as two independent 8-bit registers. It serves as a base register in indirect jumps, lookup table instructions and external data transfer. SP:SP stands for stack pointer. SP is a 8- bit wide register. It is incremented before data is stored during PUSH and CALL instructions. The stack array can reside anywhere in on-chip RAM. The stack pointer is initialised to 07H after a reset. This causes the stack to begin at location 08H. 3. Name the special functions registers available in 8051. Accumulator B Register 124

 Program Status Word. Stack Pointer. Data Pointer. Port 0 Port 1 Port 2 Port 3 Interrupt priority control register. Interrupt enable control register.

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