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IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 26, NO.

2, JUNE 2011

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Direct Integration of Battery Energy Storage Systems in Distributed Power Generation


S. D. Gamini Jayasinghe, Student Member, IEEE, D. Mahinda Vilathgamuwa, Senior Member, IEEE, and Udaya K. Madawala, Senior Member, IEEE

AbstractIn this paper, a wind energy conversion system interfaced to the grid using a dual inverter is proposed. One of the two inverters in the dual inverter is connected to the rectied output of the wind generator while the other is directly connected to a battery energy storage system (BESS). This approach eliminates the need for an additional dcdc converter and thus reduces power losses, cost, and complexity. The main issue with this scheme is uncorrelated dynamic changes in dc-link voltages that results in unevenly distributed space vectors. A detailed analysis on the effects of these variations is presented in this paper. Furthermore, a modied modulation technique is proposed to produce undistorted currents even in the presence of unevenly distributed and dynamically changing space vectors. An analysis on the battery charging/discharging process and maximum power point tracking of the wind turbine generator is also presented. Simulation and experimental results are presented to verify the efcacy of the proposed modulation technique and battery charging/discharging process. Index TermsDual inverter, energy storage, non-integer voltage ratio, wind energy.

I. INTRODUCTION ITH the depletion of existing fossil fuel deposits, renewable resources such as solar, wind, and biomass are emerging as alternative energy sources. However, the probabilistic nature of these sources makes their grid integration and reliability improvement difcult. Recently, microgrids have been proposed to overcome this difculty [1]. In order to make such systems dispatchable, renewable sources should supply the demand, at least for a limited period, irrespective of the uctuations present in the primary source. Certain uctuations can also be expected in the power demand. These uctuations, irrespective of the origin, are the main reasons for instability and instantaneous power imbalance of microgrids [2], [3]. The most practical and effective manner in which these uctuations can be suppressed is by using an energy storage system [4][6]. Among all feasible energy storage technologies, battery systems can be regarded as the most developed and widely used energy storage device [7], [8]. The other technologies such as

Manuscript received August 19, 2010; revised November 30, 2010; accepted January 17, 2011. Date of publication April 7, 2011; date of current version May 18, 2011. Paper no. TEC-00314-2010. S. D. G. Jayasinghe and D. M. Vilathgamuwa are with the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798 (e-mail: shan0034@ntu.edu.sg; emahinda@ntu.edu.sg). U. K. Madawala is with the Department of Electrical and computer Engineering, University of Auckland, Auckland 1142, New Zealand (e-mail: u.madawala@auckland.ac.nz). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TEC.2011.2122262

ywheels, superconducting magnetic energy storage, and supercapacitors are still in the development stage and require further investigations [9], [10]. As a result, power quality enhancement using battery energy storage systems (BESS) is actively pursued in the eld of distributed generation as evident from the literature [11][21]. When it comes to system integration, the simplest way of adding a BESS is the direct connection to the dc link of the gridside inverter [11][14]. Even though this connection is simple, it suffers from several drawbacks such as uncontrolled voltage, xed current distribution governed by the internal resistance of the battery bank, and lack of control over the power ow. Effects of these issues can somewhat be reduced if an intermediate dc dc converter is placed between the battery and the dc link. This interfacing dcdc converter increases the system cost and power losses. In addition to that, the low-pass lter, comprising of an inductor and a capacitor, degrades the dynamic response. A 3level bidirectional dcdc converter has been proposed in [15] to reduce voltage stresses on switching devices and to improve the dynamic response with a reduced lter inductance. But it needs four switches and a ying capacitor. Therefore, the interfacing dcdc converter increases the system cost, power losses, and complexity, even if an optimized design is used. A direct integration method, which is free from the aforementioned drawbacks and benecial to both industry and academia, is yet to be reported. This paper, therefore, presents a new direct integration scheme for BESS with the use of grid-side inverter. It utilizes the popular dual inverter topology, as shown in Fig. 1, where two 2-level inverters are cascaded through a coupling transformer. The two inverters are named as the main inverter and the auxiliary inverter in line with their modes of operation. A battery bank is directly connected to the dc link of the auxiliary inverter without an interfacing dcdc converter. Unlike in the aforementioned simple direct connection topology, the proposed system facilitates full controllability over charging/discharging currents and voltage of the battery. The main inverter operates at the fundamental frequency producing square wave outputs. Harmonics of the square wave output are compensated by the high-speed auxiliary inverter. This particular frequency splitting arrangement can reduce switching losses as well as device ratings of the main inverter [34], [35]. Another advantage of the proposed system is its ability to produce up to 13 voltage levels in the phase voltage waveform whereas the traditional 2-level inverter can produce only ve levels. Redundancy and fault tolerance operation can be seen as additional features of the proposed system where the faulty

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sion system. Nevertheless, it can be used in the same way for other renewable energy sources as well. II. POWER SHARING AND MAXIMUM POWER POINT TRACKING The output voltage vector of the dual inverter shown in Fig. 1 is equivalent to the addition of the main inverter voltage vector and the auxiliary inverter voltage vector as in (1). Real power delivered to the load can be expressed as the dot product in (2) [28]. Furthermore, the load power is equivalent to the sum of the main inverter power and the auxiliary inverter power as expressed in (3). Equations (4) and (5) show the relationships between voltage vectors and corresponding switching states. With the help of these ve equations, an expression can be derived for the power of the auxiliary inverter, in other words battery power, as in (6). According to (6), it can be deduced that the battery power PA has a linear relationship with the main inverter dc-link voltage Vdc when the output power is constant (i.e., i and vr are constant): v r = v M + v A PL = PL = v M = v A = PA = 3 v r i 2 3 ( vM + v A ) i = PM + P A 2 2 Vdc SaM + SbM ej (2 / 3) + ScM ej (2 / 3) 3 2 Vdc x SaA + SbA ej (2 / 3) + ScA ej (2 / 3) 3 3 ( vr v M ) i 2 (1) (2) (3) (4) (5) (6)

Fig. 1.

Proposed grid-side inverter with a BESS interface.

inverter can simply be disconnected by short circuiting corresponding terminals of the transformer. In such situations, the healthy inverter continues to be operational, but with less voltage levels [33]. Moreover, the 2-level inverter technology is well matured and standard modules are readily available in the market. Therefore, the proposed system can easily be implemented using off-the-shelf components. In the proposed controller, charging/discharging currents of the battery bank are controlled through the main inverter dclink voltage and as such it varies with the available wind power. Furthermore, the auxiliary inverter dc-link voltage varies with the state of charge (SoC) of the battery bank. The end result of these uncorrelated variations is a noninteger dynamically changing dc-link voltage ratio, which leads to unevenly distributed space vectors. Conventional modulation methods fail to produce desired outputs under such situations [36], [37]. Therefore, the challenge here is the generation of undistorted current waveforms even in the presence of unevenly distributed space vectors. Extensive research has been done on modulation and control of the aforementioned dual inverter topology, especially for motor drive applications [22][28]. They all have considered cases where xed-integer dc-link voltage ratios are present. A space vector modulation (SVM) method with common mode rejection is presented in [26]. A pulse width modulation (PWM) scheme for this dual inverter is explained in [27] for 1:1 and 1:2 voltage ratios. Although a power sharing controller is proposed in [28] for dynamically varying dc-link voltages, it also assumes identical dc-link voltage variations thus making the ratio to be 1:1. A hierarchical modulation method is proposed in [29] to handle dynamic changes in the auxiliary inverter dc-link voltage. However, the authors have not found previous work addressing the issue of non-integer dynamically changing voltage ratio, for simultaneous variations in both main and auxiliary inverter dc-link voltages. Therefore, this paper presents an analysis on the effects of such variations. Furthermore, modied modulation and control techniques are presented to produce undistorted current and deliver a constant amount of power to the grid even in the presence of dynamic variations in both main and auxiliary inverter dc-link voltages. The viability of the proposed direct integration method is tested with a wind energy conver-

where vr is the output voltage vector, vM is the main inverter voltage vector, vA is the auxiliary inverter voltage vector, and i is the current vector. In order to verify this relationship, an experiment was carried out using the setup shown in Fig. 2(a). A gradually increasing dc voltage was applied to the main inverter while the battery voltage was kept constant at 25 V. These input voltages are plotted in Fig. 2(b). The controller was set to maintain constant power dissipation through the load, and thus, the load current was constant as shown in Fig. 2(d). Under this constant power condition, the battery current showed a linear relationship to the main inverter voltage with a negative slope as in Fig. 2(c). Since the battery voltage is constant, the battery current is proportional to the battery power. Therefore, these results conrm that the battery power can be controlled by controlling the main inverter dc-link voltage. The same argument can be extended to develop a maximum power point tracking (MPPT) method for the wind turbine generator (WTG) as follows. According to (3), for a given output power PL , the main inverter power solely depends on the battery power. Therefore, the maximum power point of the wind turbine can easily be tracked by changing the battery power. Furthermore, the aforementioned analysis reveals that the battery power can be controlled by controlling the main inverter dc-link voltage. The usual practice is to maintain this voltage at a constant level, with the help of a

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Fig. 2. (a) Experiment setup used to verify the linear relationship between main inverter dc-link voltage and battery power. (b) DC-link voltage variations. (c) Battery current. (d) Load current of the a phase.

Fig. 4. Space vector diagrams and output voltage waveforms at different voltage ratios. Fig. 3. MPPT controller block diagram.

III. EFFECTS OF VARIABLE DC-LINK VOLTAGE RATIO controlled rectier or a boost rectier placed between the main inverter and the WTG. The same controlled rectier or the boost rectier can be used here to vary the main inverter dc-link voltage and thus indirectly track the maximum power point of the WTG. The controller block diagram for this indirect MPPT is shown in Fig 3. In this controller, the WTG model generates a power reference based on the measured wind speed. Then, it is compared with the instantaneous power of the main inverter. The error is fed into a PI controller that generates a reference for the main inverter dc-link voltage. As explained in the previous section, the main inverter dc-link voltage needs to be changed to track the maximum power point of the WTG. This inevitably results in a non-integer dynamically changing dc-link voltage ratio between the main inverter and the auxiliary inverter. As the voltage ratio varies, space vectors of the combined inverter get distributed unevenly as shown in Fig. 4. The challenge here is to generate undistorted current waveforms even in the presence unevenly distributed space vectors. In the proposed system, it is carried out by using a modied SVM technique. A detailed analysis on the proposed modulation

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method is given in Section IV and the purpose of this section is to create the necessary background by analyzing effects of variable voltage ratio. All the space vector diagrams, shown in Fig. 4, contain seven main inverter vectors, called main vectors. They are marked with large dots. The hexagon formed by these main vector points is called the main hexagon. Auxiliary inverter vectors, named as auxiliary vectors, are denoted by attached subhexagons at each and every main vector point. From Fig. 4(a) to (c), only one subhexagon is marked to avoid the diagram being too complex. However, scattered dots in these three diagrams correspond to the edges of missing subhexagons. The size of these subhexagons depends on the battery voltage, which is assumed to be constant in the following simulations. The circles found in each space vector diagram represent the path of the reference voltage vector that remains unchanged for constant power dispatch. Fig. 4(a) shows the combined inverter space vector diagram for the dc-link voltage ratio of 0 (Vdc = 0). At this point, due to the absence of a power source in the main inverter dc-link, all the seven main vectors coincide at the origin turning the combined inverter system into a conventional two-level inverter. In this particular situation, the battery bank should supply the whole demand or part of it depending on the capacity. Corresponding inverter output voltage waveform is attached next to the space vector diagram. When the main inverter dc-link voltage starts to increase, corresponding main hexagon appears as in Fig. 4(b) (f). At the ratio of 0.25, subhexagons overlap with each other as shown in Fig. 4(b) producing four layers of hexagon rings. In other words, the resultant space vector diagram is equivalent to that of a 5-level inverter. But due to the uneven distribution of the hexagons and the low resolution, only few voltage levels can be seen in the attached waveform. At the ratio of 0.5, vectors get distributed evenly and three layers of hexagon rings are formed as shown in Fig. 4(c). Therefore, this particular state represents a 4-level inverter. Corresponding voltage levels can clearly be seen in the attached waveform in Fig. 4(c). At the ratio of 1, the combined inverter resembles a 3-level inverter (two layers of hexagon rings) with the space vector pattern shown in Fig. 4(d). Further increase of the main inverter voltage would expand the space vector diagram as shown in Fig. 4(e) and (f). At the ratio of 1.5, four layers of hexagons emerge again resulting in a 5-level inverter. But this time only outermost vectors are distributed unevenly. Furthermore, the resolution between voltage levels is high compared to that in Fig. 4(b). The space vector diagram at the ratio of 2 is equivalent to a 4-level inverter as evident from Fig. 4(f). The attached waveform shows only ve levels since the reference circle is inside the rst layer of hexagon. If the reference circle is enlarged to the next layer, more voltage levels would appear in the output voltage. The output voltage waveforms shown in Fig. 4 are in fact the snapshots taken at six discrete values of the dc-link voltage ratio. But as explained earlier, the voltage ratio can take any value between 0 and 2. Therefore, it is important to see how the output voltage waveform looks like at intermediate values. Hence, a simulation was carried using the voltage ratio as the

Fig. 5. (a) Inverter output voltage, va s , at different voltage ratios. (b) Fundamental component of va s .

Fig. 6. Square wave output of the main inverter and smoothing effect of the auxiliary inverter.

independent variable and the result is shown in Fig. 5(a). At the ratio of 0, the output voltage waveform is similar to that in Fig. 4(a). The same scenario can be seen near the ratio of 1.125 as well. In between these two points, a varying waveform can be seen and it gets optimized at the ratio of 0.5. Beyond this point, the inverter output voltage waveform gets distorted gradually until the ratio reaches 1. This is due to the decrease of available voltage levels. However, beyond the ratio of 1, the waveform again starts to show a continuous improvement as seen in the latter half of the waveform in Fig. 5(a). With this result, it can be deduced that the proposed dual inverter under a noninteger dynamically changing voltage ratio would produce variable voltage levels similar to that of 2-, 3-, 4-, and 5-level inverters. But with the proposed modulation technique, it still can synthesize the desired fundamental output voltage waveform as shown in Fig. 5(b), until the ratio reaches 1.75. Distortions can occur beyond this point. IV. MODULATION STRATEGY As mentioned in Section 1, the main inverter operates in the six-step mode producing square wave outputs. The auxiliary inverter is used to compensate harmonic power of the square wave output and to regulate the real power exchange with the grid. This combined operation is illustrated in Fig. 6 where the auxiliary inverter is purposely turned off until 20 ms. During this period, the only available output is the main inverter square wave output voltage as shown in the rst half of the waveform in Fig. 6. Harmonic distortion of the output voltage is signicant under this operation. After 20 ms, the auxiliary inverter is turned on, and consequently, the output voltage becomes smooth with

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TABLE I SWITCHING SIGNAL LOOKUP TABLE

Fig. 7. (a) Space vector diagram with the three-axis coordinate system. (b) Shaded triangle with dwell times.

as corresponding line-to-line voltages vab , vbc , and vca . According to (1), the difference between the reference vector and the main vector is the compensation vector that should be supplied by the auxiliary inverter, and thus, it becomes the reference for the auxiliary inverter. Projections of this new reference are calculated using (8) and subsequently normalized by (9) to obtain oor and ceiling values as oor(x) is the greatest integer x and ceiling(x) is the smallest integer x. Those oor and ceiling values of the normalized reference are then used to locate the triangle in the subhexagon, for example the shaded triangle in Fig. 7(a), where the reference vector falls [30], [31]. The ends of this triangle contain required auxiliary vectors V1 , V2 , and V3 . But still they are dened using three axis coordinates. In order to map three axis coordinates into gate signals, the transformation in (10) and the lookup table in Table I are used: [Vab Vbc Vdc Vca ]T = [Sab 3 Sbc Sca ]T

(7)

Fig. 8.

Block diagram showing the proposed modulation method.

Sab , Sbc , Sca = {1, 0, 1} [vabx vbcx vcax ]T = (Vab vab ) (Vbc vbc ) (Vca vca )]T (8) vbcx vcax ]T (9) (10)

low harmonic distortion as shown by the second half of the waveform in Fig. 6. A modied SVM method is proposed for the auxiliary inverter, and thus, the overall modulation can be considered as a combination of the six-step mode and SVM. The complexity of this combined modulation process gets further amplied by the dynamic variations present in dc-link voltages. To reduce most of the computational complexities, the three-axis coordinate system shown in Fig. 7(a) is used [30]. In this coordinate system, each and every vector point is represented by three coordinates that are projections on the axes of Vab , Vbc , and Vca . In fact, these three axes represent line-to-line voltages of a threephase system. If dc-link voltages are xed, these projections can be normalized to get discrete values such as 1, 0, and 1. But in the proposed system, dc-link voltages are not xed, and hence, projection can take any value within the operating range. As a solution to this issue, all the calculations are carried out using actual voltages instead of normalized values, which should be updated at every switching cycle. A simplied block diagram of the proposed modulator is shown in Fig. 8. Since the main inverter operates in the six-step mode, the main vector selection and gate signal generation units in the modulator would require only the angle information of the reference vector, i.e. r . Based on this angle, three normalized coordinates of the current main vector, Sab , Sbc , and Sca , are dened as temporary variables that are then used to calculate actual projections as expressed in (7). At the same time, three axis coordinates of the reference voltage vector vr are calculated

[ vabx

v bcx

v cax ]T =

3 [vabx Vdc x

Ssn = 4x + 2y + z + 3

where the three axis coordinates are assumed to be in the form of Vn (x,y,z), n = 1,2,3, and the resulting switching state number is denoted by Ssn . Once the three nearest vectors are identied, the next step is to nd corresponding dwell times for each and every vector. Usually, this part involves multiplications, divisions, and trigonometric operations that consume signicant amount of processing time. But in the SVM technique adopted in this paper, dwell time calculations are very simple and straightforward. It is proven in [30] that dwell times are proportional to the distance from the reference vector point to the opposite leg of the triangle. For example, for the vector V1 in Fig. 7(b), the dwell time is proportional to the distance d1 from the reference vector to V2 V3 leg of the triangle. In other words, it is proportional to the difference between vab component (projection on the Vab axis) of the reference and the corresponding oor value. The other two dwell times, d2 and d3 , can also be calculated in the same way. Therefore, to calculate dwell times only subtractions are needed. This yields fast operation and simple implementation in hardware level. After nding auxiliary vectors and dwell times, ve-segment switching is used in the auxiliary inverter as described in [32].

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Fig. 9. Voltage vector additions for different input power conditions at r = 60 : (a) case 1, (b) case 2, and (c) case 3.

V. ANALYSIS ON BATTERY CHARGING AND DISCHARGING Charging and discharging process of the battery can be explained under three different cases where the available wind power is less than the demand, equal to the demand, and higher than the demand. In the rst case, the battery bank should discharge to supply the decit and in the third case it should absorb the surplus of power. However, in the second case, the battery bank will not be affected. With the help of Figs. 2 and 4, a vague relationship between these three cases and the dc-link voltage ratio can be identied as follows. Case 1: corresponds to 0 < dc-link voltage ratio < 1. Case 2: corresponds to dc-link voltage ratio 1. Case 3: corresponds to 1 < dc-link voltage ratio < 2. To understand it further, voltage vector additions shown in Fig. 9 can be used. The vector additions shown in Fig. 9 correspond to r = 600 . At this angle, and its multiples, both the main vector and the auxiliary vector get aligned making the analysis easier. When the dc-link voltage ratio is less than 1, the circular path of the reference voltage vector lies outside the main hexagon as shown in Fig. 4(b) and (c). Hence, the magnitude of the main inverter vector vM is obviously less than that of the reference vector vr , as shown in Fig. 9(a). As a result, the auxiliary inverter voltage vector vA has to be used to ll the gap. Since the same current ows through both inverters, corresponding share of power depends only on the magnitude of the voltage vector. In certain cases, where both inverters should equally share the output power, the main and auxiliary inverter vectors are set to be equal [33]. But in the proposed system, the maximum possible power should be extracted from the main inverter, and thus, only the balance should be handled by the auxiliary inverter. This automatically happens when the main inverter is operating at the six-step mode, and hence, no special attention is required. When both the circle and main hexagon are at the same magnitude, the main inverter vector itself is sufcient to synthesize the reference vector as in Fig. 9(b). This roughly corresponds to the dc-link voltage ratio of 1, as in Fig. 4(d). However, it is noteworthy to mention that the size of the reference circle, and hence the dc-link voltage ratio, where the main hexagon meets the circle, can change with the power demand. When the dc-link voltage ratio is greater than 1, the main hexagon exceeds the reference circle as in Fig. 4(e) and (f). In this case, the direction

Fig. 10. (a) Wind speed. (b) Main inverter dc-link voltage Vd c and auxiliary inverter dc-link voltage Vd c x . (c) Wind power Pw and dispatch power Pd . (d) Battery current Ib . (e) Inverter output current ia s . (f) Inverter output voltage before ltering va s . (g) Inverter output voltage after ltering, va s , f .

of the auxiliary inverter vector becomes negative as shown in Fig. 9(c). This indicates that part of the available wind power ows into the battery bank. According to the abovementioned analysis, it can be deduced that as long as the circle lies outside the main hexagon the battery current is positive (discharge). When the reference circle and the main hexagon are equal in size, the battery current tends to be zero, which indicates that the available wind power is barely sufcient to supply the demand. Further increase of the main inverter dc-link voltage makes the main hexagon to exceed the voltage reference circle and changes the direction of the battery current. In other words, the battery bank absorbs part of the available wind power.

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TABLE II SYSTEM PARAMETERS OF THE SIMULATION SETUP

VI. SIMULATION RESULTS The proposed concept of ESS interfacing with the grid side inverter has been tested in a MATLAB/SIMULINK-PLECS digital simulation platform. The wind speed prole shown in Fig. 10(a) is used in the simulation, which in turn produces a dc-link voltage variation at the main inverter as shown in Fig. 10(b). Corresponding wind power variation Pw and dispatch power Pd are shown in Fig. 10(c). From this graph, it can be concluded that the proposed system has the ability to supply the demand amidst uctuations present in the input power. The surplus or decit of power is supplied or absorbed by the battery with a current prole as shown in Fig. 10(d). The output current and voltage of the inverter are shown in Fig. 10(e) and (f), respectively. Although the inverter output voltage shows some uctuations, once it is passed through a low-pass lter, a smooth waveform can be observed as shown in Fig. 10(g). The system parameters of the simulation setup are given in Table II. VII. EXPERIMENTAL RESULTS The schematic diagram and photographs of the laboratory prototype are shown in Fig. 11(a) and (b), respectively. A programmable ac source is used to emulate the WTG and its output was rectied using a bridge rectier. The ac source was programmed in a way that the rectier output voltage, in other words the main inverter dc-link voltage, varies as shown in the red graph (Vdc ) of Fig. 11(c). During the experiment, the battery voltage remained at 25 V as shown by the green line (Vdc x ) in Fig. 11(c). The two inverters were coupled through an RL load and their parameters are given in Table III. The controller was set to maintain constant power dissipation through the load as shown in Fig. 11(d) by the graph marked with PL . The input power and battery power variations are plotted in the same gure and are marked as PM and PA , respectively. The corresponding battery current variation is shown in Fig. 11(e). The shape of this graph is similar to that of the battery power diagram since the battery voltage remains constant. Furthermore, when the main inverter voltage is lower than the battery voltage, the battery current is positive and it is negative when the main inverter voltage exceeds the battery voltage. An enlarged view of the inverter output current is shown in Fig. 11(f). An enlarged view of the inverter output voltage is given in Fig. 11(g) to show the multilevel operation of the proposed dual inverter system.

Fig. 11. (a) Schematic of the experimental setup. (b) Photographs of the experimental setup. (c) DC-link voltages, Vd c and Vd c x . (d) Main inverter power PM , battery power PA , and output power PL . (e) Battery current Id c x. (f) Enlarged view of the output current. (g) Enlarged view of the inverter output voltage.

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TABLE III SYSTEM PARAMETERS OF THE EXPERIMENTAL SETUP

VIII. CONCLUSION Additional switches and converters required to integrate energy storage devices into distributed power systems can be avoided if the grid-side inverter itself can be used as the interface. Accordingly, a modied topology of the popular dual inverter system has been proposed to connect a battery bank directly to the auxiliary inverter dc link. The challenge with this topology is the uncorrelated and dynamic changes present in dc-link voltages, which results in unevenly distributed space vectors. A detailed analysis on the effects of such variations is presented in this paper. Furthermore, a modied SVM method is proposed to produce desired current waveforms even in the presence of unevenly distributed space vectors. The battery charging/discharging process with the proposed control method is presented in this paper. Experimental and simulation results are presented to verify the efcacy of the proposed modulation method and battery charging/discharging process.

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D. Mahinda Vilathgamuwa (S90M93SM99) received the B.Sc. and Ph.D. degrees in electrical engineering from the University of Moratuwa, Moratuwa, Sri Lanka, and Cambridge University, Cambridge, U. K., in 1985 and 1993, respectively. In 1993, he joined the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore, as a Lecturer where he is currently an Associate Professor. His current research interests include power electronic converters, electrical drives, and power quality. Dr. Vilathgamuwa is the Chairman of IEEE Section, Singapore, and a member of the Power Electronics Technical Committee for the Industrial Electronics Society.

S. D. Gamini Jayasinghe (S10) received the B.Sc. degree in electronics and telecommunication engineering from the University of Moratuwa, Moratuwa, Sri Lanka, in 2003. In 2004, he joined the Dialog UoM Mobile Communications Research Laboratory. He is currently working toward the Ph.D. degree in the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore.

Udaya K. Madawala (M94SM06) received the B.Sc. (Hons.) degree in electrical engineering from the University of Moratuwa, Moratuwa, Sri Lanka, in 1987, and the Ph.D. degree in power electronics from the University of Auckland, Auckland, New Zealand, in 1993. In 1997, he joined the Department of Electrical and Computer Engineering, University of Auckland, where he is currently a Senior Lecturer. His research interests include motor/generator design and control, power electronics, renewable energy, and super capacitor applications. Dr. Madawala is an active IEEE volunteer, and serves as an Associate Editor and a member of the Power Electronics Technical Committee for the IEEE Industrial Electronics Society.

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