76 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.

1, JANUARY 2014
Minimization of Grid Current Distortion
in Parallel-Connected Converters
Through Carrier Interleaving
J. S. Siva Prasad and G. Narayanan
AbstractIdentical parallel-connected converters with unequal
load sharing have unequal terminal voltages. The difference in
terminal voltages is more pronounced in case of back-to-back
connected converters, operated in power circulation mode for
the purpose of endurance tests. In this paper, a synchronous
reference-frame-based analysis is presented to estimate the grid
current distortion in interleaved grid-connected converters with
unequal terminal voltages. Inuence of carrier interleaving angle
on rms grid current ripple is studied theoretically as well as
experimentally. Optimum interleaving angle to minimize the rms
grid current ripple is investigated for different applications of
parallel converters. The applications include unity power factor
rectiers, inverters for renewable energy sources, reactive power
compensators, and circulating-power test setup used for thermal
testing of high-power converters. Optimum interleaving angle is
shown to be a strong function of the average of the modulation
indices of the two converters, irrespective of the application. The
ndings are veried experimentally on two parallel-connected
converters, with a circulating reactive power of up to 150 kVA
between them.
Index TermsCarrier interleaving, circulating-power setup,
grid-connected converter, harmonic analysis, parallel converters,
pulsewidth-modulated converter, space vector, synchronously re-
volving reference frame, waveform quality.
I. INTRODUCTION
I
NPUT waveform quality is an important issue in grid-
connected converters [1][3]. The quality of grid current
waveform can be improved by increasing the lter size or
switching frequency [2], [3]. In case of parallel-connected
converters shown in Fig. 1 [4][10], carrier interleaving is a
viable option for improving the waveform quality [9][14].
Carrier interleaving, i.e., use of phase-shifted carriers for the
two converters as illustrated in Fig. 2, leads to phase shifting of
the harmonics of the two converters and possible cancellation of
certain harmonics [9][11]. An interleaving angle of 180

leads
to cancellation of the rst-sideband harmonics [9], [10] which
are dominant at high modulation indices close to the maximum
modulation index when space vector modulation (SVPWM)
is used [15]. A phase shift of 90

between the two carriers

results in cancellation of the second-sideband harmonics [9],
[10] which are dominant at low modulation indices [15].
Manuscript received August 27, 2012; revised November 8, 2012; accepted
December 18, 2012. Date of publication February 6, 2013; date of current
version July 18, 2013.
The authors are with the Department of Electrical Engineering, Indian Insti-
tute of Science, Bangalore 560012, India (e-mail: sivaprasad.iisc@gmail.com;
gnar@ee.iisc.ernet.in).
Digital Object Identier 10.1109/TIE.2013.2245620
Fig. 1. Parallel-connected converters with common dc bus. (a) Schematic
diagram. (b) Phasor diagram for rectication with unequal dc load sharing.
(c) Phasor diagram for power circulation mode. (d) Phasor diagram for active
power circulation.
Grid-connected converters mostly operate in the interme-
diate range of modulation indices [19], where both the rst
and second sidebands are comparable. Hence, the problem of
0278-0046/$31.00 2013 IEEE
SIVA PRASAD AND NARAYANAN: GRID CURRENT DISTORTION IN PARALLEL-CONNECTED CONVERTERS 77
Fig. 2. Phase-shifted carrier waves of two parallel-connected converters.
improving the waveform quality does not readily boil down
to elimination of one specic sideband; the rst and second
sidebands both need to be reduced. In other words, the rms
current ripple should to be reduced.
The rms line current ripple in a voltage source converter
(VSC) is usually evaluated by rst obtaining the voltage har-
monic spectrum using double Fourier series [10], [11], [17],
[19]. Based on the voltage harmonics, the current harmonics
and the rms current ripple are then calculated [10]. A more
direct approach to calculate the rms current ripple would be to
integrate the error voltage vector in the space vector domain
[20][22]. This approach has been adopted extensively to eval-
uate line current ripple in motor drives [23][26]. A similar
approach has been used for evaluating the grid current ripple
in identical parallel-connected converters with equal terminal
voltages [9]. In this paper, this method of analysis is extended
to parallel-connected converters with unequal terminal voltages
since such converters are found widely in different applications
as discussed in the following.
Identical parallel-operated converters are commonly used in
unity power factor (upf) rectication [4][10]. The focus in the
literature has largely been on such rectiers with equal load
sharing, where the terminal voltages of the two converters are
equal [4][10]. However, when the load sharing is unequal, the
terminal voltages differ both in terms of amplitude as well as
phase, as shown by the phasor diagram in Fig. 1(b). Further-
more, the terminal voltages could differ more signicantly in
amplitude and/or phase when active and/or reactive power is
circulated between two high-power converters for the purpose
of heat-run test [27]. In such case, the two converter currents
are out of phase and so are their inductor voltage drops, as seen
from Fig. 1(c). A particular case of Fig. 1(c) is active power
circulation [27] [see Fig. 1(d)], where the terminal voltages
differ in phase, although of the same amplitude.
There are also applications of parallel-connected converters
with separate dc buses, as shown in Fig. 3. When two parallel
converters are injecting unequal amounts of reactive power
into the grid [28], [29], the terminal voltages are of unequal
amplitude, as shown in Fig. 3(b). When parallel converters,
connected to different dc sources (e.g., renewable energy ap-
plications), are feeding unequal amounts of active power into
the grid, the terminal voltages differ in terms of amplitude as
well as phase [29][31]. When reactive power is circulated
between the two converters [32], [33] to carry out thermal
tests on converters [32], the lter inductor drops are out of
phase, resulting in substantial difference in the amplitudes of
the converter terminal voltages [Fig. 3(c)].
Fig. 3. Parallel-connected converters with separate dc buses. (a) Schematic
diagram. (b) Phasor diagram for unequal reactive power sharing. (c) Phasor
diagram for reactive power circulation mode [32], [33].
Thus, the terminal voltages differ whenever 1) load sharing
between the two converters is unequal or 2) power is circulated
between the two converters. The difference in terminal voltages
is more pronounced in the power circulation mode than in case
of unequal sharing in the power-sharing mode.
When the terminal voltages of the converters are different,
their harmonic spectra also differ. The order of the domi-
nant harmonic in the two converters itself may differ. Hence,
cancellation of dominant sideband harmonics through carrier
interleaving is not a clear option. The choice of interleaving
angle could rather be based on minimization of rms grid current
ripple of the parallel-connected converters.
This paper investigates the inuence of carrier interleaving
angle on the rms grid current ripple and the optimal value of
to minimize the rms current ripple for parallel converters with
unequal terminal voltages.
Section II analyzes and reviews the optimal interleav-
ing angle for parallel-connected converters with equal ter-
minal voltages from a space vector perspective. Section III
presents a method to evaluate the rms grid current ripple in
78 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 1, JANUARY 2014
Fig. 4. Voltage vectors of a VSC. I to VI are sectors.
parallel-connected converters with unequal terminal voltages.
Section IV investigates optimal for different applications
of parallel-connected converters. The ndings are validated
through simulations and experiments, reported in Section V.
The conclusion is presented in Section VI.
II. PARALLEL-CONNECTED CONVERTERS
WITH EQUAL TERMINAL VOLTAGES
The total rms harmonic distortion in the grid current, drawn
by parallel-connected converters with equal terminal voltages,
is evaluated in a synchronously revolving dq reference frame.
The effect of interleaving on rms grid current ripple is studied
for such converters. Optimum interleaving angle, which mini-
mizes the rms grid current ripple, is obtained as a function of
the modulation index of the two converters.
A. Analysis of Grid Current Ripple in Synchronously
Revolving Reference Frame
The high-frequency ripple in the three-phase converter cur-
rents can be represented as a current ripple vector in a syn-
chronously revolving dq reference frame. The coordinate
axes are dened in Fig. 4. The q-axis is chosen to align with
the voltage vector V
S
, which represents the three-phase fun-
damental components of terminal voltages of either converter.
The modulation index of either converter can be dened as
V
ref
=
|V
S
|
V
dc
(1)
where V
dc
is the dc bus voltage.
The q-axis and d-axis components (

i
q1
and

i
d1
) of the current
ripple vector of converter-1 can be obtained by integrating
the corresponding error-voltage components ( v
q1
and v
d1
),
as detailed in [24] and [25]. The error-voltage components
( v
q1
, v
d1
) themselves can be obtained from the corresponding
components of the applied voltage vector, namely, (v
q1
, v
d1
)
[24], [25], as shown in the following:
v
q1
= v
q1
|V
S
|; v
d1
= v
d1
. (2)
Fig. 5. Trajectory of the tip of the current ripple vector of converter-1 (solid
lines) and of converter-2 when = 180

(dashed lines) for V

ref
= 0.655 and
= 15

[33].
The q- and d-axes components of the current ripple vector of
converter-2 (

i
q2
and

i
d2
) can be obtained in a similar fashion.
The current ripple of converter-1 gets added to that of
converter-2 to yield the grid current ripple, as indicated by

i
q
=

i
q1
+

i
q2
;

i
d
=

i
d1
+

i
d2
. (3)
The rms q-axis grid current ripple (

i
q,rms
), the rms d-axis
grid current ripple (

i
d,rms
), and the total rms grid current ripple
(

i
rms
) are computed as follows:

i
q,rms
=

6
T
T
6
_
0

i
2
q
dt

1/2

i
d,rms
=

6
T
T
6
_
0

i
2
d
dt

1/2

i
rms
=
_
_

i
2
q,rms
+

i
2
d,rms
_
(4)
where T is the fundamental period.
The rms grid current ripple, thus computed in the dq refer-
ence frame, can be converted into rms per-phase grid current
ripple (I
HF,rms
) as shown in the following:
I
HF,rms
=
_
2
3
__
1

2
_

i
rms
. (5)
B. Inuence of Interleaving Angle on RMS Current Ripple
The variation of the current ripple vector over a subcycle,
pertaining to converter-1, is illustrated in solid lines in Fig. 5.
The modulation index V
ref
is assumed to be 0.655. The terminal
voltage vector V
S
is considered to be at an angle = 15

,
measured from the starting boundary of the sector (see Fig. 4).
The current ripple vector of converter-2 is the same when the
same carrier is used for both converters, i.e., = 0

. However,
when the carriers are phase shifted by 180

, i.e., = 180

, the
current ripple vector of converter-2 is shown in dashed lines
in Fig. 5. Thus, the grid current ripple vector, being the sum
of the individual converter current ripple vectors, is strongly
inuenced by .
The inuence of on the rms values of the q-axis, d-axis, and
total grid current ripples is brought out by Fig. 6, considering
SIVA PRASAD AND NARAYANAN: GRID CURRENT DISTORTION IN PARALLEL-CONNECTED CONVERTERS 79
Fig. 6. Inuence of carrier interleaving angle on

i
q,rms
(dotted lines),

i
d,rms
(dashed lines), and

i
rms
(solid lines) of identical parallel converters with
equal modulation index (V
ref
) of 0.655.
V
ref
= 0.655. The gure presents the rms quantities, dened in
(4), normalized with respect to the following base quantity:
I
base
=
_
V
dc
T
S
L
_
(6)
where L is the effective series inductance per phase.
As can be observed from Fig. 6, the rms value of the d-axis
current ripple reduces monotonically and is lowest at = 180

.
The rms value of the q-axis ripple has a minimum at = 90

.
The total rms current ripple has a minimum at = 114

. This
represents the optimum interleaving angle (
opt
) to minimize
the rms grid current ripple, when both the converters have a
modulation index of 0.655.
Fig. 7(a)(c) shows the variations of rms q-axis current
ripple, rms d-axis current ripple, and total rms current ripple, re-
spectively, against V
ref
for selected values of . For = 0

, the
rms q-axis ripple dominates at low modulation indices, while
the rms d-axis ripple is high at high modulation indices.
Fig. 7(a) shows that = 90

results in substantial reduction

in rms q-axis ripple, compared to both = 0

and = 180

,
over the entire range of V
ref
. Fig. 7(b) shows that = 180

reduces the rms d-axis current ripple considerably over the

whole range of V
ref
, compared to = 0

and = 90

. The
total rms current ripple is low with = 90

in the lower range

of V
ref
and with = 180

at the higher range of V

ref
, as seen
from Fig. 7(c).
C. Variation of
opt
With Respect to V
ref
The optimal value of which minimizes the rms q-axis
current ripple (i.e.,
q,opt
) is investigated and is shown plotted
against V
ref
in Fig. 8(a). At low modulation indices,
q,opt
is
close to 90

, while it increases at high modulation indices to

reach 108

at V
ref
= 0.866. Optimal to minimize the rms
d-axis current ripple (i.e.,
d,opt
) is found to be close to 180

over a wide range of V

ref
, as shown in Fig. 8(b).
However, the rms q-axis current ripple with
q,opt
is very
close to that with = 90

in Fig. 7(a) and hence not shown

plotted. Similarly, the rms d-axis ripple with
d,opt
(not shown
plotted) is almost indistinguishable from that with = 180

,
shown in Fig. 7(b). Thus, = 90

and = 180

are good
approximations for
q,opt
and
d,opt
, respectively, to minimize
the rms values of the q-axis and d-axis current ripples. While it
Fig. 7. Variation of rms values of (a) q-axis, (b) d-axis, and (c) total grid
current ripples against V
ref
for different values of .
is obvious that any reduction in d-axis or q-axis current ripple
would reduce the grid current ripple, the decrease in q-axis
current ripple also results in reduced dc capacitor voltage ripple
in PWM rectiers [20].
The optimal interleaving angle
opt
, which minimizes the
total current ripple, is found to vary between 90

and 180

against V
ref
, as presented in Fig. 8(c). Understandably (since
the q-axis ripple dominates at low modulation indices),
opt
is close to 90

at low values of V
ref
, while it is equal to 180

at high values of V
ref
, close to 0.866 (where the d-axis ripple
dominates). In the range of V
ref
from 0.5 to 0.82,
opt
increases
from 90

to 180

(since the relative values of the d- and q-axis

ripples change with V
ref
).
Fig. 7(a)(c) also presents the rms values of the q-axis,
d-axis, and total grid current ripples with =
opt
. In terms
of the q-axis current ripple,
opt
is better than other values
of except = 90

in Fig. 7(a). Similarly, in terms of the

d-axis current ripple, it is worse only compared to = 180

in Fig. 7(b). However, it is the best in terms of total rms current

ripple as seen from Fig. 7(c). Compared to = 0

, substantial
80 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 1, JANUARY 2014
Fig. 8. Optimum interleaving angles for minimizing (a)

i
q,rms
, (b)

i
d,rms
,
and (c)

i
rms
as functions of modulation index V
ref
of the two converters.
reduction in rms grid current ripple is achieved by
opt
over the
entire range of V
ref
. The percentage reduction observed in total
rms current ripple at V
ref
= 0.4, 0.7, and 0.866 are 65, 47, and
70, respectively.
The results based on the analysis in the dq reference frame
presented in Fig. 8(c) agree with the ndings based on double
Fourier series in [10]. The analysis also gives an understanding
of the rms values of the d-axis and q-axis current ripples, and
their minimization using carrier interleaving. This is helpful
to correlate the frequency domain and synchronous reference-
frame-based analyses as will be brought out in the next section.
III. PARALLEL-CONNECTED CONVERTERS
WITH UNEQUAL TERMINAL VOLTAGES
In this section, the rms grid current ripple, drawn by identical
parallel-connected converters with unequal terminal voltages, is
evaluated. The inuence of carrier interleaving angle on the
rms value of the grid current ripple is studied.
Fig. 9. Synchronously revolving (d
1
, q
1
), (d
2
, q
2
), and (d, q) reference
frames, and the stationary (a, b) reference frame.
A. Estimation of Grid Current Ripple in Synchronously
Revolving Reference Frame
The fundamental components of the terminal voltages of the
two converters are represented by voltage vectors V
S1
and V
S2
in Fig. 9. These are separated by an angle . The magnitudes
of these two vectors, normalized with respect to V
dc
, give the
modulation indices of the two converters (V
ref1
and V
ref2
) as
shown in the following:
V
ref1
=
|V
S1
|
V
dc
=
3
2
V
R1N
V
dc
V
ref2
=
|V
S2
|
V
dc
=
3
2
V
R2N
V
dc
(7)
where V
R1N
and V
R2N
are the peak values of the R-phase
fundamental voltages of the two converters.
The current ripple of converter-1 can be estimated in the
synchronously revolving (d
1
, q
1
) reference frame (see Fig. 9)
using the procedure explained in the previous section, where
q
1
is aligned with V
S1
. Similarly, the line current ripple drawn
by converter-2 can be analyzed in the (d
2
, q
2
) reference frame,
where q
2
is aligned with V
S2
.
The components of the grid current ripple vector in the dq
reference frame (which is chosen to be the same as d
1
, q
1
frame
here) are calculated using (

i
q1
,

i
d1
) and (

i
q2
,

i
d2
) as shown in
the following:

q2
=(

i
q2
cos ) + (

i
d2
sin )

d2
=(

i
q2
sin ) + (

i
d2
cos )

i
q
=

i
q1
+

q2
;

i
d
=

i
d1
+

d2
. (8)
The orthogonal components of the current ripple vectors of
the two converters over a subcycle are illustrated in Fig. 10,
assuming both vectors V
S1
and V
S2
to be at an angle = 15

from the a-axis, i.e., in sector-I (see Fig. 4). For the purpose of
illustration, V
ref1
= 0.58, V
ref2
= 0.73, and = 0

are consid-
ered. These correspond to reactive power circulation, illustrated
in Fig. 3(c). The dc bus voltages and reactive drops of both
converters are 700 V and 11%, respectively. The mains voltage
(rms line to neutral) is assumed to be 216 V. Since = 0

,
the components of the grid current ripple vector are simply
algebraic sums of the respective components of the individual
converter current ripple vectors, as in (3).
Carrier interleaving phase shifts the ripple current of one
converter (dotted lines) with respect to the other (solid lines)
as illustrated in Fig. 10. When the carriers are not phase shifted
(i.e., = 0

), the q-axis and d-axis components of the ripple

current vectors of the two converters get added up to yield high
values of the q-axis and d-axis ripples in the grid current as
illustrated in Fig. 10(a).
SIVA PRASAD AND NARAYANAN: GRID CURRENT DISTORTION IN PARALLEL-CONNECTED CONVERTERS 81
Fig. 10. d- and q-axis components of the current ripple vectors over a
subcycle. (a) = 0

, (b) = 90

, and (c) = 180

for V
ref1
= 0.58,
V
ref2
= 0.73, and = 15

.
However, with =90

, the q-axis current ripples of the two

converters are of opposite signs for most part of the subcycle
as illustrated in Fig. 10(b). Similarly, with =180

, the d-axis
current ripples of the converters have opposite signs, as seen
from Fig. 10(c). Hence, the q-axis and d-axis grid current
ripples are low with =90

and =180

, respectively, in the
given subcycle.
In fact, = 90

reduces the q-axis current ripple over the

entire sector, compared to = 0

, as brought out by Fig. 11(a)

and (b). Similarly, = 180

leads to substantial reduction in

Fig. 11. Components of the grid current ripple vector for V
ref1
= 0.58 and
V
ref2
= 0.73. (a) = 0

. (b) = 90

. (c) = 180

.
the d-axis current ripple over the entire sector, as demonstrated
by Fig. 11(a) and (c).
Supporting evidence is also presented by the harmonic spec-
tra of the q-axis and d-axis ripple currents in Fig. 12. While
= 90

reduces the dominant second-sideband harmonics in

the q-axis current ripple, = 180

reduces the dominant rst-

sideband harmonics in the d-axis current ripple as shown by
Fig. 12(a)(c).
As seen from Fig. 10(a), the q-axis current ripple alternates
over a subcycle T
S
(i.e., half a switching cycle), while the
d-axis current ripple alternates over two subcycles (i.e., a
switching cycle). This can also be seen from Fig. 11(a). Hence,
the q-axis ripple has a dominant second sideband, while the
d-axis ripple has a dominant rst sideband as seen from
Fig. 12(a). = 90

reduces the q-axis current ripple and

the second sideband. Similarly, = 180

reduces the d-axis

current ripple and the rst sideband. Thus, the d-axis and
q-axis current ripples in the synchronous reference-frame-based
82 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 1, JANUARY 2014
Fig. 12. Harmonic spectra of grid current ripple vector for V
ref1
= 0.58 and
V
ref2
= 0.73. (a) = 0

. (b) = 90

. (c) = 180

.
Fig. 13. Variation of the rms values of the q-axis, d-axis, and total grid current
ripples against (V
ref1
= 0.58 and V
ref2
= 0.73).
Fig. 14. Harmonic spectra of the grid current ripple vector for V
ref1
= 0.58
and V
ref2
= 0.73 with =
opt
= 114

. (a) q-axis component. (b) d-axis

component.
analysis can be related to the rst and second sidebands, respec-
tively, in the frequency domain study.
B. Inuence of on Current Ripple
For V
ref1
= 0.58, V
ref2
= 0.73, and = 0

, the rms values of

the q-axis, d-axis, and total grid current ripples are calculated
for all values of . These are shown plotted in Fig. 13. It
is observed that the q-axis current ripple is minimum around
= 90

. The d-axis current ripple is lowest at = 180

. The
total rms current ripple is minimum at = 114

. This is the
optimum interleaving angle (
opt
) for V
ref1
= 0.58, V
ref2
=
0.73, and = 0

.
Fig. 14 shows the harmonic spectrum of the grid current
ripple for =
opt
. Figs. 14 and 12(a) show that
opt
reduces
the rst as well as second-sideband harmonics.
More analytical results are presented in Section V along
with experimental results for quick comparison with the latter.
SIVA PRASAD AND NARAYANAN: GRID CURRENT DISTORTION IN PARALLEL-CONNECTED CONVERTERS 83
Fig. 15. Effect of difference in lter inductances of the two converters on rms
grid current ripple (V
ref1
= 0.575 and V
ref2
= 0.72).
Fig. 16. Effect of difference in dc voltages of the two converters on rms
current ripple (V
ref1
= 0.61 and V
ref2
= 0.69).
The optimal values of for different applications of parallel-
connected converters with unequal terminal voltages are studied
in Section IV.
C. Variation of Filter Inductor and DC Bus Voltage
Fig. 13 assumes the per-phase inductances of the two con-
verters to be equal. However, while modular converters are
usually designed to have equal values of line inductance [9],
tolerance in inductance values of up to 10% is quite common.
If the lter inductances of converter-1 and converter-2 are
1.1L and 0.9L, respectively (where L represents 10% lter
inductance), the corresponding rms current ripple drawn by
the two converters is slightly higher than that of the equal
inductance case (Fig. 13), as shown by Fig. 15. However, the
optimum interleaving angle is not changed signicantly.
Once again, Fig. 13 assumes the dc voltages of the two
converters to be equal. However, in case of parallel converters
with separate dc buses, the dc bus voltages of the two could
be different. If the dc bus voltages of the two converters are in
the ratio 0.95 : 1.05, the corresponding rms grid current ripple is
quite close to that of the equal dc bus voltage case, as shown by
Fig. 16. Also,
opt
is almost unchanged as seen from Fig. 16.
Further study in this regard is presented in Section IV-G.
IV. OPTIMUM INTERLEAVING ANGLE FOR PARALLEL-
CONNECTED CONVERTERS WITH UNEQUAL
TERMINAL VOLTAGES
In case of converters with unequal terminal voltages, the
optimum interleaving (
opt
) depends on V
ref1
, V
ref2
, and ,
where is the phase angle between the converter terminal
voltages; V
ref1
and V
ref2
are the modulation indices of the two
converters, which can be redened as
V
ref1
=
3
2
V
1,pu
V
dc,pu
; V
ref2
=
3
2
V
2,pu
V
dc,pu
(9)
where the normalized converter terminal voltages V
1,pu
and
V
2,pu
and the normalized dc bus voltage V
dc,pu
are dened as
follows:
V
1,pu
=
V
R1N
V
RN
; V
2,pu
=
V
R2N
V
RN
; V
dc,pu
=
V
dc
V
RN
. (10)
Rather than investigating the optimal value of for each
set of (V
ref1
, V
ref2
, ),
opt
can be calculated only for sets of
values of (V
ref1
, V
ref2
, ) that are of practical relevance. For
example, low values of V
ref1
and V
ref2
are of no interest in
line-side converters. Furthermore, the value of cannot be very
high. The regions of practical importance in the (V
ref1
, V
ref2
, )
space can be understood from the various practical applications
of parallel-connected converters. Furthermore, V
ref1
, V
ref2
, and
are related in a specic manner in each application, as seen
from the phasor diagrams in Figs. 1 and 3. Hence, the optimal
value of is studied here by considering each application.
A. Real Power Circulation
During real power circulation between the converters, the
reactive power drops of both converters are proportional to P.
Furthermore, considering 10% line reactance, the p.u. reactive
drop is given by 0.1P. The reactive drops are added in quadra-
ture with the mains voltage [see Fig. 1(d)] to obtain V
1,pu
and
V
2,pu
. The modulation indices V
ref1
and V
ref2
are calculated
using (9) and (10). The angle is given by
= 2 tan
1
(0.1P). (11)
For a given (V
ref1
, V
ref2
, ), the rms grid current ripple is
evaluated for different values of as explained in Section III;

opt
, which minimizes the rms grid current ripple, is deter-
mined at each operating point. Fig. 15(a) presents
opt
for all
values of P between 0 and 1 p.u. at V
dc,pu
= 1.88, 2.14, and
2.5, in solid lines.
As seen from Fig. 17(a),
opt
is practically unchanged with
P at any given dc bus voltage. Any change in P at a given dc
bus voltage corresponds to only a change in from the forego-
ing discussion. Thus,
opt
is practically independent of within
the range of practical relevance of the latter. Furthermore, as
seen from the gure,
opt
increases with the decrease in V
dc,pu
.
Also, V
ref1
and V
ref2
increase with the decrease in V
dc,pu
, as
seen from (9) and (10). Hence, one can see that
opt
increases
with the increase in V
ref1
and V
ref2
.
B. Real Power Sharing
When the parallel-connected converters are operated as upf
rectiers, sharing a dc load unequally, their reactive drops are
proportional to their individual share of load. Assuming 10%
line reactance and unequal load sharing in the ratio 80 : 20, the
84 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 1, JANUARY 2014
Fig. 17. Variation of
opt
with respect to V
dc,pu
. (a) Real power circulation.
(b) Real power sharing. (c) Reactive power sharing. (d) Reactive power circulation.
reactive drops of the two converters are equal to 0.08 and 0.02,
respectively, for P = 1 p.u. The angle is given by
= tan
1
(0.08P) tan
1
(0.02P). (12)
As P varies between 0 and 1 p.u., varies over a shorter
range (0

3.43

) than in Section IV-A(where the corresponding

range is 0

11.42

). However, V
1,pu
and V
2,pu
are unchanged
as before. Also, V
ref1
and V
ref2
remain unchanged with P but
vary with V
dc
.
TABLE I
RANGE OF V
dc,pu
CONSIDERED FOR DIFFERENT APPLICATIONS
Fig. 17(b) shows
opt
plotted for a range of P between 0
and 1 p.u. and different dc bus voltages. As in previous case,

opt
is found to be practically unchanged against P, while it
increases with the decrease in V
dc,pu
. This conrms that
opt
is
practically independent of and that
opt
increases with V
ref1
and V
ref2
.
C. Reactive Power Sharing
When two parallel converters share the reactive power sup-
plied to the grid unequally, their reactive drops are proportional
to their share of reactive power. Assuming 10% inductance and
80 : 20 sharing as before, the reactive drops are 0.08 and 0.02
at Q = 1 p.u. As seen from the phasor diagram in Fig. 3(b), the
angle is always zero; the modulation index increases with Q.
Fig. 17(c) shows
opt
against the total reactive power (Q) for
various values of V
dc,pu
in solid lines. As seen,
opt
increases
with Q as well as V
dc,pu
. Once again, this indicates that
opt
increases with V
ref1
and V
ref2
.
D. Reactive Power Circulation
When reactive power is circulated between the converters,
the reactive drops are proportional to the amount of reactive
power circulated. As Q increases from 0 to 1 p.u., the reactive
drops of the two converters vary from 0% to 10%. While
the reactive drop of one converter is in phase with the mains
voltage, the reactive drop of the other is out of phase. Hence,
the terminal voltages of the two converters differ in amplitude
but not in phase, as seen from Fig. 3(c).
The values of
opt
, calculated at various operating con-
ditions, are shown plotted in solid lines in Fig. 17(d). As
before,
opt
is seen to increase with the decrease in V
dc,pu
.
This conrms that
opt
increases with the increase in V
ref1
and V
ref2
. Furthermore,
opt
is reasonably unchanged with Q,
which is equivalent to (V
ref1
V
ref2
), except when V
ref1
or
V
ref2
is close to 0.866. Hence, in other words,
opt
is reason-
ably independent of the difference between V
ref1
and V
ref2
,
except at high modulation indices. This suggests that
opt
is
a strong function of the average of V
ref1
and V
ref2
.
E. Optimum Interleaving Angle as a Function of the
DC Voltage
In Fig. 17(a)(d),
opt
is presented for specic values of the
dc bus voltage. These gures suggest that
opt
is a decreasing
function of the dc bus voltage. This is veried by investigating

opt
over a range of dc bus voltages, assuming P = 1 p.u.
or Q = 1 p.u., as the case may be. The range of V
dc,pu
for
each application is specied in Table I. The minimum V
dc,pu
considered is the minimum possible dc bus voltage for the given
application. In all cases, this is slightly higher than 1.732 p.u.,
SIVA PRASAD AND NARAYANAN: GRID CURRENT DISTORTION IN PARALLEL-CONNECTED CONVERTERS 85
Fig. 18. Variation of
opt
with respect to V
dc,pu
for different applications
(P = 1 p.u. or Q = 1 p.u.).
Fig. 19. Variation of
opt
with respect to 0.5 (V
ref1
+ V
ref2
) for different
applications (P = 1 p.u. or Q = 1 p.u.).
which corresponds to the peak lineline voltage. The maximum
V
dc,pu
is restricted to 3.75 p.u.
The optimal interleaving angle
opt
is found to be a
decreasing function of V
dc,pu
for all four applications, as
shown by Fig. 18. Furthermore, the
opt
versus V
dc,pu
curves
for all of the applications are close to one another. This shows
that
opt
is a strong function of the common dc bus voltage of
the two converters.
F. Optimum Interleaving Angle as a Function of the Average
Modulation Index
In Section IV-E,
opt
is studied as a function of the dc bus
voltage for various applications. In this section, effort is made
to relate
opt
to ac side quantities of the parallel converters. The
results in Section IV-D indicate that
opt
is a strong function
of the average modulation index of the two converters. In this
section, this is veried over wide ranges of V
ref1
and V
ref2
.
In Fig. 19,
opt
is plotted against 0.5 (V
ref1
+ V
ref2
) for
the aforementioned applications, assuming P = 1 p.u. or Q =
1 p.u. It can be observed that the curves corresponding to
various applications are close to one another. These curves
are close to one another even for other values of P and Q,
although not presented here. This conrms that
opt
(for all
of the applications) is a function of the average modulation
index except when one or both modulation indices are close
to 0.866. Hence,
opt
can be approximated as a function of a
single variable, namely, 0.5 (V
ref1
+ V
ref2
), instead of being
considered as a function of three variablesV
ref1
, V
ref2
, and .
Fig. 20. Inuence of difference in lter inductances of the two converters on

opt
for reactive power circulation (Q = 1 p.u.).
In parallel converters with equal terminal voltages, the aver-
age modulation index of the two converters is the same as the
modulation index of the individual converters. Hence, the
opt
versus V
ref
curve in Fig. 8(c) is represented in thick solid lines
in Fig. 19. As seen from the gure, this curve is quite close to
those of the four applications.
Hence,
opt
for the aforementioned applications cannot only
be approximated as a function of the average modulation index,
but this function is the same as that between
opt
and V
ref
in
the equal-terminal-voltage case.
In Fig. 17(a)(d),
opt
based on the aforementioned approxi-
mation is plotted in dashed lines for different applications for a
range of P or Q from 0 to 1 p.u. The dashed lines are very close
to the solid lines, indicating that the approximation is valid for
different amounts of P or Q circulated.
The aforementioned approximation simplies the evaluation
of
opt
for parallel converters operating with unequal terminal
voltages.
G. Effect of Unequal Filter Inductances and Unequal DC
Voltages on
opt
To study the effects of unequal line inductances and unequal
dc bus voltages of the two converters on
opt
, the two convert-
ers are rst assumed to operate in the reactive power circulation
mode. It may be recalled that the difference between the mod-
ulation indices of the two converters is most pronounced in this
application. Furthermore, the deviation of
opt
from the equal
terminal voltage case is also the highest in this case, as seen
from Figs. 18 and 19.
When the two converters have per-phase inductances of 1.1L
and 0.9L, respectively, as in Fig. 15, the optimum interleaving
angle
opt
varies with the average modulation index, as shown
in dashed lines in Fig. 20. This is found to be close to the
opt
curve for converters with equal inductances, which is shown in
solid lines in the same gure.
Similarly, when the dc bus voltages of the two converters are
in the ratio 0.95 : 1.05, as in Fig. 16,
opt
is again a function of
the average modulation index of the two converters, as shown
(in dashed lines) in Fig. 21. Once again, this
opt
curve is
reasonably close to that for the equal-dc-bus-voltage case.
Thus, the conclusion regarding
opt
in the previous sections
is reasonably valid even if there is considerable difference
between 1) the lter inductances of the two converters and
2) the dc voltages of the two converters.
86 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 1, JANUARY 2014
Fig. 21. Inuence of difference in dc bus voltages on
opt
for reactive power
circulation (Q = 1 p.u.).
Fig. 22. Variation of
opt
with respect to 0.5 (V
ref1
+ V
ref2
) for converters
rated for different values of kVA, sharing a dc load.
A more serious case of difference in lter inductances of the
two converters arises when converters of signicantly different
ratings are operated in parallel for sharing power. Fig. 22 illus-
trates the optimum interleaving angle for such a case, where
a common dc load is shared by two converters whose kVA
ratings are in the ratio 2 : 1. Furthermore, the lter inductances
are assumed to be 10% of their respective kVA base. Hence,
their lter inductors are in the ratio 1 : 2. For modulation indices
up to 0.6, this
opt
curve closely follows the
opt
curve corre-
sponding to identical converters with equal terminal voltages.
The two curves deviate signicantly at high modulation indices.
This deviation becomes more pronounced as the difference
between the lter inductances of the two converters increases.
V. SIMULATION AND EXPERIMENTAL RESULTS
In this section, simulation and experimental results, demon-
strating the inuence of carrier interleaving on grid current
distortion, are presented. The reduction in grid current ripple
with optimal carrier interleaving is shown through simulation
and actual measurements.
A. Simulation Results
Different congurations of parallel-connected converters in
Figs. 1 and 3 are simulated using MATLAB/Simulink in this
section. The converter details are shown in Table II. The dc bus
voltage is assumed to be 655 V. The semiconductor devices are
assumed to be ideal for the purpose of simulation.
When 150 kVA of reactive power is circulated between
the two converters [see Fig. 1(d)], the simulated grid current
TABLE II
DETAILS OF THE EXPERIMENTAL CONVERTERS
TABLE III
ANALYTICAL AND SIMULATED VALUES OF RMS GRID CURRENT
RIPPLE I
HF,rms
(A), FOR CASES 1 TO 5 WITH V
dc
= 655 V
waveforms for different values of are shown in Fig. 23(a)(d).
Carrier interleaving reduces the peak grid current ripple as can
be seen from Fig. 23.
The rms grid current ripple is evaluated analytically for
different applications at various operating conditions. From
the simulated grid current waveform, its rms current ripple is
calculated. Analytical and simulation results for the following
cases are tabulated in Table III:
1) 150 kW of power delivered to the dc load at upf with the
two converters sharing the power equally (50 : 50);
2) 150 kW of power delivered to the dc load at upf with the
two converters sharing power in the ratio 80 : 20;
3) 150 kW of active power circulated between the
converters;
4) 150 kVA of reactive power supplied to the grid with the
converters sharing the same in the ratio 80 : 20;
5) 150 kVA of reactive power circulated between the
converters.
The analytical and simulation results match closely. Inter-
leaving angles of 90

and 180

improve the grid current dis-

tortion over = 0

in all cases. Furthermore, =

opt
yields
the lowest rms grid current ripple in all of the cases, with a
reduction in the range of 44%55%, as compared with = 0

.
Compared to = 0

, the amplitudes of the dominant har-

monic current in the rst sideband and that in the second
sideband are both reduced with
opt
as brought out by Table IV.
The amplitudes of the dominant components in the rst and
second sidebands, obtained through simulations, are presented
in ordered pairs in the table. As seen, the dominant harmonic
current is signicantly reduced with
opt
in all ve cases.
Table V conrms the reduction in total harmonic distortion
in the grid current (I
THD
), which is the ratio of the rms current
SIVA PRASAD AND NARAYANAN: GRID CURRENT DISTORTION IN PARALLEL-CONNECTED CONVERTERS 87
Fig. 23. Simulated grid current waveform under 150-kVA reactive power
circulation at different values of (V
dc
= 655 V). (a) = 0

. (b) = 90

.
(c) = 180

. (d) =
opt
= 114

.
ripple to the fundamental current, with optimum interleaving
angle. The simulated values of I
THD
are obtained as follows:
I
THD
=
_
I
2
rms
I
2
1
I
1
(13)
TABLE IV
SIMULATED VALUES OF DOMINANT HARMONIC AMPLITUDES
IN THE FIRST AND SECOND SIDEBANDS OF GRID CURRENT
SPECTRA (A) FOR CASES 1 TO 5 WITH V
dc
= 655 V
TABLE V
SIMULATED VALUES OF % I
THD
FOR CASES 1,
2, AND 4 WITH V
dc
= 655 V
Fig. 24. Measured grid voltage under switching action.
where I
rms
is the rms grid current and I
1
is the rms value of
fundamental component of the grid current. The fundamental
currents, corresponding to power circulation, i.e., cases 3 and 5,
are quite lowand are difcult to be obtained through simulation.
Hence, I
THD
values corresponding to cases 1, 2, and 4 only
are presented in Table V. Measured I
THD
values pertaining to
reactive power circulation are presented in Section V.
Considering that the fundamental grid current is close to
655 A (peak) for the cases of power sharing, one can clearly see
from Table IV that the high-frequency grid current harmonics
are very low. Furthermore, I
THD
is also low as seen from
Table V. Thus, in such case, the requirements of IEEE-519-
1992 are adequately complied with [34].
B. Estimation of Grid Inductance
In case of line-side high-power converters, the value of grid
inductance is comparable to that of lter inductance [31], [35].
While the grid inductance is considerable, a switching wave-
form can be seen superimposed over the sinusoidal grid voltage
waveform. A zoomed version of the measured grid voltage,
when a single converter is operating, is shown in Fig. 24.
The step change (v
RN
) in this waveform is due to the
corresponding step change (v
RIN
) in the converter terminal
voltage at the switching instants of the converter. When the
converter switches fromzero state 0 to active state 1 (see Fig. 4),
v
RIN
is equal to (2/3) V
dc
i.e., 467 V. The corresponding
v
RN
measured is 44 V, as seen from Fig. 24. The grid
88 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 1, JANUARY 2014
Fig. 25. Single-phase equivalent circuit of a PWM converter at switching
frequency.
Fig. 26. Supply voltage (v
RN
) and line currents of the two converters at
150-kVA reactive power circulation (V
dc
= 700 V) (experimental results).
Ch1-i
R1
and Ch2-i
R2
, 250 A/div.; Ch3: v
RN
, 240 V/div [32].
inductance can be estimated from these two values, based on
the per-phase equivalent circuit shown in Fig. 25, as shown in
the following:
v
RN
= v
R1N
L
grid
L
f
+ L
grid
. (14)
With the lter inductance being 330 H, as indicated in
Table II, the estimated value of L
grid
is 34 H.
C. Measured Grid Waveforms and Harmonic Spectra
The experimental setup consists of two parallel-connected
converters with specications as mentioned in Table II. Fig. 26
shows the measured current and supply voltage waveforms
under 150-kVA reactive power circulation, with V
dc
= 700 V.
As can be observed, i
R1
lags the supply voltage by 90

, while
i
R2
leads the voltage by 90

. Fig. 27 shows the grid current

waveforms under 150-kVAreactive power circulation for differ-
ent values of . The corresponding measured harmonic spectra
are presented in Fig. 28. It can be observed from Fig. 28 that
the fundamental grid current magnitude is approximately 13 A,
which corresponds to the losses in the semiconductor devices
as well as other passive components.
The harmonic spectra conrm that = 90

and = 180

,
respectively, reduce the second- and rst-sideband harmonics
considerably, compared to = 0

. Furthermore,
opt
reduces
both the rst and second sidebands such that the rms current
ripple is minimized.
The experimental results in Figs. 27 and 28 show that low-
order harmonics are present in the grid current for all values
of . These can be attributed to the harmonic distortion in the
grid voltage, which is brought out by the spectrum of the mains
voltage in Fig. 29, which is captured when the converters are
nonfunctional.
Fig. 27. Experimental grid current (i
R
) at 150-kVA reactive power circula-
tion for different values of (f
sw
= 5 kHz and V
dc
= 700 V). (a) = 0

.
(b) = 90

. (c) = 180

. (d) = 114

. Scale: 50 A/div.
The optimum interleaving angle brings down the amplitude
of the dominant harmonic in the grid current from 10 to 7 A as
seen from Fig. 28. Furthermore, this also reduces the THD in
grid current (I
THD
), as indicated in Fig. 28. Thus, the ability of
optimal carrier interleaving to reduce the dominant harmonic
as well as THD in grid current makes it a useful step toward
compliance with grid standards.
With the individual converters handling a power of 150 kVA,
if the converters are operated in power-sharing mode, the
peak fundamental grid current would be 655 A as opposed
to 13 A in power circulation mode. Hence, the grid stan-
dards would be readily complied with, as already shown by
the simulation results in Section V-A. In case of the power
circulation mode, additional ltering may be required to meet
the standards. However, the current rating of such lter would
be very small, compared to the size and ratings of individual
converters.
D. Measured RMS Grid Current Ripple
The rms grid current ripple drawn by two parallel converters,
operated in the reactive-power circulation mode, is estimated
analytically using the procedure discussed in Section III. The
normalized rms current ripple is converted into its natural
units using (10), where L = (L
grid
+ L
f
). The variation of the
analytically evaluated rms current ripple against is shown in
Fig. 30 for different values of the dc bus voltage.
SIVA PRASAD AND NARAYANAN: GRID CURRENT DISTORTION IN PARALLEL-CONNECTED CONVERTERS 89
Fig. 28. Measured harmonic spectrum of grid current at 150-kVA reactive
power circulation with f
sw
= 5 kHz(V
dc
= 700 V). (a) = 0

. (b) = 90

.
(c) = 180

. (d) = 114

(x-axis: 2.5 kHz/div.; y-axis: 5 A/div.).

The measured %I
THD
values are (a) 163, (b) 137, (c) 129, and (d) 125.
Fig. 29. Measured harmonic spectrum of grid voltage (v
RN
) when the
converters are nonfunctional (x-axis: 200 Hz/div.; y-axis: 2.5 V/div.).
High-frequency rms current ripple (I
HF,rms
) is considered
to be the total rms harmonic content of the rst four sidebands
(ignoring higher sidebands). This is obtained by considering
the harmonic components between 0.5f
sw
and 4.5f
sw
in the
measured current harmonic spectra (as in Fig. 28) as shown in
the following:
I
HF,rms
=

_
4.5f
sw

0.5f
sw
I
2
h
. (15)
These results are presented in Fig. 30 for various operating
conditions in the form of dots. As seen from Fig. 30(a)(d),
there is a reasonably good agreement between the analytical
and experimental results.
Fig. 30. Comparison between analytically evaluated and experimentally mea-
sured distortion factors of grid current, mains voltage = 216 V phase-neutral
rms. (a) V
dc
= 700 V and f
sw
= 5 kHz. (b) V
dc
= 650 V and f
sw
= 5 kHz.
(c) V
dc
= 625 V and f
sw
= 5 kHz. (d) V
dc
= 700 V and f
sw
= 3.75 kHz.
Fig. 30 clearly shows the inuence of on the rms grid
current ripple. The theoretically estimated
opt
is validated
experimentally. In all of the presented cases, the rms value of
the grid current ripple is reduced approximately by 44%50%
(analytically), with
opt
, compared to = 0

. Experimentally,
90 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 1, JANUARY 2014
although the reduction is slightly less (38%47%), the improve-
ment is still very much signicant.
As can be observed, at a given dc bus voltage, the rms grid
current ripple, as well as
opt
, is almost unchanged with kVA
loading on the converters. This is in line with the analytical
results in Fig. 17(d).
In Fig. 30(a)(c), the rms grid current ripple is plotted for
different values of V
dc
. As V
dc
decreases, the average V
ref
and
hence
opt
increase.
In Fig. 30(d), the rms grid current ripple is presented for
V
dc
= 700 V at a switching frequency of 3.75 kHz. Compared
to Fig. 30(a), the rms current ripple is increased as the switching
frequency is reduced, as should be expected. However,
opt
remains the same, which shows that
opt
is independent of
switching frequency.
If the system is to be operated as in Fig. 1, with a common dc
bus, the resulting circulating currents have to be mitigated either
by using an isolation transformer [36] or by using common-
mode chokes [27] or interphase chokes [10], [11]. This will
signicantly add to the cost of the system at higher kVA rating.
Hence, such results are not presented in this paper. In case of
separate dc buses, the circulating currents are absent. Further-
more, as voltage inequalities are higher in power circulation
mode than those in power-sharing mode, results pertaining to
reactive power circulation alone are presented here.
Higher order LCL lters are increasingly employed in grid-
connected converters [2], [3]. The procedure for determining
the optimal interleaving angle, presented for converters with L
lters in this paper, can certainly be extended to converters with
LCL lters. Needless to say, the value of optimum interleaving
angle for the LCL case should be expected to differ signi-
cantly from that for the L lter case.
VI. CONCLUSION
It is convenient to evaluate the rms grid current ripple of
parallel-connected converters with equal/unequal terminal volt-
ages in a synchronously revolving dq reference frame.
This paper has established a correlation between the d-axis
and q-axis ripple currents in the dq reference frame and the
rst- and second-sideband harmonics in the frequency domain.
The effect of interleaving angle on the rms values of the
d-axis, q-axis, and total current ripples is presented. Optimum
interleaving angles which minimize the q-axis, d-axis, and
total current ripples in parallel converters with equal terminal
voltages are presented. These are expressed as functions of
converter terminal voltage.
Optimum interleaving angle (
opt
) is investigated for paral-
lel converters with unequal terminal voltages.
opt
is presented
for parallel converters under upf rectication with unequal load
sharing, real power circulation, unequal reactive power sharing,
and reactive power circulation.
opt
is reasonably independent
of the phase angle between the two converter terminal voltages
and the difference in their modulation depths. However,
opt
is shown to be a strong function of the average of the two
modulation depths.
It is further shown that
opt
with unequal terminal voltages
(e.g., V
ref1
and V
ref2
) can be approximated by
opt
corre-
sponding to the average of the converter voltage amplitudes
[0.5 (V
ref1
+ V
ref2
)] in the equal converter terminal voltage
case.
It is shown theoretically as well as experimentally that
opt
results in substantial reduction in grid current ripple as com-
pared to = 0

(i.e., no interleaving).
Carrier interleaving is a cost-effective option for improving
the input waveform quality of parallel-connected converters,
particularly with separate dc buses.
REFERENCES
[1] F. G. Espin, E. Figueres, and G. Garcera, An adaptive synchronous-
reference-frame phase-locked loop for power quality improvement in a
polluted grid, IEEE Trans. Ind. Electron., vol. 59, no. 6, pp. 27182731,
Jun. 2012.
[2] P. Channegowda and V. John, Filter optimization for grid interactive
voltage source inverters, IEEE Trans. Ind. Electron., vol. 57, no. 12,
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J. S. Siva Prasad received the B.Tech. degree from
the S.V.H. College of Engineering, Nagarjuna Uni-
versity, Guntur, India, in 2000 and the M.E. degree
from the PSG College of Technology, Coimatore,
India, in 2002. He is currently working toward the
Ph.D. degree at the Indian Institute of Science,
Bangalore, India.
Since October 2012, he has been with Delta Power
Solutions, Bangalore. He was with the Department
of Energy Systems, Indian Institute of Technology,
Bombay, India, from 2002 to 2005 and was with
Vellore Institute of Technology, Vellore, India, from 2005 to 2006. His research
interests are ac drives, pulsewidth modulation, and design of solar converters.
G. Narayanan received the B.E. degree from Anna
University, Chennai, India, in 1992, the M.Tech.
degree from the Indian Institute of Technology,
Kharagpur, India, in 1994, and the Ph.D. degree from
the Indian Institute of Science, Bangalore, India, in
2000.
He is currently an Associate Professor with the
Department of Electrical Engineering, Indian Insti-
tute of Science, Bangalore. His research interests
include ac drives, pulsewidth modulation, multilevel
inverters, and protection of power devices.
Dr. Narayanan received the Innovative Student Project Award for his Ph.D.
work from the Indian National Academy of Engineering in 2000 and the Young
Scientist Award from the Indian National Science Academy in 2003.