IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO.

2, APRIL 2007

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Zero-Steady-State-Error Input-Current Controller for Regenerative Multilevel Converters Based on Single-Phase Cells
Pablo Lezana, Member, IEEE, Csar A. Silva, Member, IEEE, Jos Rodrguez, Senior Member, IEEE, and Marcelo A. Prez, Member, IEEE

AbstractMulticell converters are one of the alternative topologies for medium-voltage industrial drives. For an application requiring regenerative capability, each power cell must be constructed with a three- or single-phase pulsewidth-modulation (PWM) rectier as front end. The choice of single-phase PWM rectiers for the input of the cells results in a reduced number of power switches and a simpler input transformer than the threephase equivalent. However, its control is not as straightforward. This paper proposes the use of higher order resonant controllers in the classical control structure of the single-phase PWM rectier. This ensures zero steady-state tracking error of the reference current at fundamental frequency. A detailed description of the design criteria for the position of the zeros and poles of the controller is given. Experimental results showing the good performance of the single-phase input cells and its proposed control are included. Index TermsMultilevel converter, pulsewidth-modulation (PWM) rectiers, resonant controller.

I. I NTRODUCTION HE use of medium-voltage variable-speed drives based on voltage-source converters has become increasingly widespread in the last ten years. A wealth of multilevel topologies has been developed to achieve the medium-voltage range using available semiconductors [principally, the insulated-gate bipolar transistor (IGBT)] [1]. These topologies also allow for lower distortion of the output ac voltage of the converter. One of the alternatives of multilevel topologies is known as a multicell converter [2] and is based on the series connection of several single-phase inverters per output phase. The classical multicell converter [2], using diodes to obtain a dc-link voltage of each output inverter, is not able to regenerate power from the load. To achieve regeneration, the use of threeand single-phase pulsewidth-modulation (PWM) rectiers has been proposed [3], [4]. These PWM rectiers produce good-

Manuscript received January 21, 2006; revised December 18, 2006. Abstract published on the Internet January 14, 2007. This work was supported in part by the Universidad Tcnica Federico Santa Mara, in part by the Chilean Research Council (Conicyt) under Grant Fondecyt 1050357, in part by the Millennium Nucleus on Industrial Electronics and Mechatronics P04048-F (MIDEPLAN), and in part by the postgraduate support program of the Fundacin Andes under Grant C-14055. The authors are with the Departamento de Electrnica, Universidad Tcnica Federico Santa Mara, 239-0123 Valparaso, Chile (e-mail: pablo.lezana@ usm.cl; cesar.silva@usm.cl; jrp@elo.utfsm.cl; marcelo.perez@usm.cl). Digital Object Identier 10.1109/TIE.2007.891994

quality input-current waveforms in addition to their regenerative capability; this allows operation at high power factor (very near unity). The use of the three-phase PWM rectier as the front end of the cells has some operational advantages but requires more semiconductors, sensors, and a more complex input transformer than the single-phase alternative. Another important difference between the three- and singlephase front-end alternatives is the way in which the current control is implemented. In three-phase PWM rectiers, the current control is normally performed in a synchronous rotating frame, converting measured ac currents into dc values. This allows the use of conventional proportionalintegral (PI) controllers for the current control, achieving zero stationary error [5]. This technique is not directly applicable in single-phase systems, resulting in steady-state reference tracking error if PI current controllers are used. This tracking error affects the current amplitude and phase, deteriorating the power factor. The use of resonant controllers in stationary frames have been proposed for the control of ac currents with zero steadystate tracking error [6][8]. In [6], a proportional + pure resonant element is proposed for current control of three- and single-phase PWM rectiers. In [7], the derivation of a resonant controller through the frequency transformation of a standard PI controller is proposed for current control of inverters. Both techniques result in innite controller gain at the resonant frequency, hence achieving zero steady-state current tracking error at this frequency without coordinate rotations. Nevertheless, in both cases, the proposed resonant controllers are somehow derived from PI structures, resulting in restrictions on the zero locations, and fail to take full advantage of the design exibility of resonant biproper controllers. This paper proposes new controller designs for the singlephase voltage PWM rectiers of a multicell inverter for the classical cascade control structure. These controller designs consist of a resonant biproper controller for the inner current loop with unrestricted zero locations and an external voltage loop closed with a modied PI. The voltage controller includes the dc-link voltage lter to give a clean sinusoidal reference for the inner current loop. This conguration ensures a goodquality input-current waveform and, hence, high-power-factor operation. A detailed discussion of the controller design criteria and experimental results that shows their good performance is presented.

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because the input current can be freely handled by proper control of switches S1 , . . . , S4 , for any condition of vs , provided s [9]. This allows any combination of active and that vDC > v reactive power at the input side, even regenerative operation. The simple construction and the smaller part count of the multicell converter built with single-phase PWM rectiers come at the cost of losing the previously mentioned operational advantages of the three-phase implementation. In other words, the synchronous rotating frame cannot be directly used, and the rectiers draw pulsating power from the mains, resulting in a dc-link voltage ripple at 2fs . In the following section, a solution to the aforementioned difculties based on the use of resonant controllers is presented.
Fig. 1. Multicell converter.

III. P ROPOSED C ONTROLLER D ESIGN A. Cascade Control Scheme The typical cascade control scheme for the single-phase active rectier is shown in Fig. 4. A slow voltage control loop is used to keep the dc-link voltage constant at a value vDC above v s . The output of the voltage controller Cv is the value of the dc current is required by the dc-link capacitor to keep . To obtain the reference its voltage at reference value vDC for is , is is multiplied by the desired waveform, which is typically a sinusoid of the same frequency and phase as vs . A fast control loop is used for the input current (Ci ), obtaining the commanded value for vAFE . This commanded voltage is converted into drive pulses for S1 S4 by a PWM modulator. If the input current is successfully controlled to a sinusoidal waveform that is in phase with the input voltage, the input power drawn by the cell is Pin (t) = is sin(s t) vs sin(s t) = is vs [1 cos(2s t)] . 2 (2)

II. M ULTICELL C ONVERTER The multicell converter is based on the series connection of the output of multiple cells. Each cell is composed of an inverter H-bridge fed by an isolated dc supply, as shown in Fig. 1. With this conguration, the per-phase output voltage of the converter is
k

vxN =
y =1

vxy ,

x = a, b, c

(1)

where vay is the output voltage of the y th cell connected to phase a. The classical multicell converter [2] uses a diode bridge rectier as the front end of each cell [Fig. 2(a)]. By using a complex shifted input transformer, this conguration achieves cancellation of the lower frequency input-current harmonics. For an application that requires regeneration, PWM rectiers must be used to feed the dc-link of each cell. This additionally improves the quality of the waveforms of the input current, allowing operation at a high power factor (very near unity). There are two main alternatives for the implementation of the cell PWM rectiers, namely, three- or single-phase rectiers, as proposed in [3] and [4], respectively. Both alternatives are shown in Fig. 2(b) and (c). The three-phase front end has some operational advantages: First, it allows the implementation of the current control in a synchronous (dq ) frame, achieving zero steady-state current tracking error with simple PI controllers [5]. Second, when operating with a sinusoidal input current, it draws constant power from the mains, producing low voltage ripple in the dc link. On the other hand, the single-phase front end has advantageous constructive characteristics: It requires less power semiconductors, less current sensors, and a simpler input transformer. This makes it an attractive alternative for regenerative multicell converters where the savings in part count are multiplied by the number of cells of the converter. For these reasons, this is the topology considered in this paper. As shown in Fig. 3, the single-phase PWM voltage-source rectier uses four controlled switches in bridge connection in order to produce a controlled dc-link voltage vDC in capacitor C , by means of controlling sinusoidal input current is in inductor Ls . This is achieved

From (2), it is noted that the input power has a pulsating component 2fs . This results in a dc-link voltage ripple at this frequency. If this ripple is fed back into the control system, is will also have a harmonic component at 2fs . This results in i s having harmonics at fs and 3fs due to the multiplication of is by sin(2fs t). To avoid this harmonic distortion in the input-current reference (and, hence, in the actual value of the input current), a power lter in the dc link, a dc-link voltage measurement lter, or a low cutoff frequency for the voltage control loop must be used. For high-power-factor operation, a resonant controller is used as Ci in the control scheme of Fig. 4. Additionally, a modied PI controller for Cv , with additional ltering capability, is proposed to avoid the detrimental inuence of the 2fs voltage harmonic in the current reference. B. Resonant Current Controller The tuning of this controller is made considering the circuit shown in Fig. 5 as the plant. Then, the plant transfer function is is (s) = 1 (vs (s) vAFE (s)) . Ls s + Rs (3)

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Fig. 2.

Cells for multicell converter: (a) nonregenerative cell and regenerative cell with (b) three-phase PWM rectier and (c) single-phase PWM rectier.

for the plant (3) and use a transformation to obtain the resonant controller, i.e., PIi = Kp + In [6], the transformation used is
Fig. 3. Single-phase PWM rectier in bridge connection.

Ki . s

(5)

1 s leading to Ci (s) = Kp

s 2 s2 + s

(6)

2 1+ s2 + s 2 s2 + s

Ki Kp

(7)

Fig. 4.

Control scheme for a PWM rectier.

This forces the open-loop zeros of the controller to be placed on the imaginary axis of s plane, as shown in Fig. 6(a), leading to a poor phase margin of the closed-loop system. Better results are obtained in [7] using the transformation 1 s
Fig. 5. Input-current plant.

s2

2s . 2 + s

(8)

The controller obtained with this transformation is Ci (s) = Kp

Ki 2 s2 + 2 K s + s p 2 s2 + s

In this system, the mains voltage vs appear as a disturbance in the control loop, while the actuation variable is the input voltage of the cell vAFE . As discussed in Section III-A, the reference for the currentcontrol loop i s is sinusoidal with frequency fs . For perfect reference tracking at this frequency, the controller must have innite gain at fs , meaning that the controller transfer function must have two resonant poles at js , where s = 2fs . These poles are equivalent to the pole in s = 0 on PI controllers for tracking of a continuous reference. In addition, in order to get a fast response, the controller must have a proportional gain, i.e., the controller transfer function must be biproper. Therefore, the generalized second-order resonant controller has the following structure: s2 + as + b (4) Ci (s) = Kp 2 2 s + s where a, b, and Kp are the controller parameters to be designed. One approach [6], [7] is to design a standard PI controller (5)

(9)

Although, the response of the closed loop using (9) is improved, with respect to that obtained using (7), this technique also restricts the location of the open-loop zeros, as shown in Fig. 6(b). This is a consequence of using the two degrees of freedom of a PI (Kp and Ki ) to adjust the three degrees of freedom of the resonant structure of (4). The unrestricted allocation of the zeros of the resonant controller is proposed in this paper, making full use of the degrees of freedom of (4) to obtain good closed-loop performance, i.e., high close-loop bandwidth and good phase margin. The design of the controller is made directly in z plane in order to obtain an expression that can be implemented directly in a digital signal processor (DSP), so (4) is transformed in Ci (z ) = Kp z2 z 2 + 2ai z + bi 2 cos(s h)z + 1 (10)

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Fig. 6. Location of open-loop controller zeros (a) according to transformation (6) and (b) according to transformation (8).

Fig. 9. Fig. 7. Root locus of the current controller.

Closed-loop Bode diagram for a plant input disturbance.

Fig. 10.

DC-link voltage plant.

disturbance Bode diagram of Fig. 9, which exhibits very high attenuation at frequency fs . For this reason, there is no need for a feedforward term to cancel vs in the control loop. C. Voltage Controller
is conDue to the fact that the dc-link voltage reference vDC stant regardless of the current-control method, the PI controller is the obvious choice for the voltage control loop. The tuning of this controller can be done assuming fast response of the inner current loop. In this way, plant Gv can be considered as a pure capacitor C in parallel with two current sources, as shown in Fig. 10. The current value iDC is determined by the input current of the cell and corresponds to the actuation variable. On the other hand, the current source io is determined by the controlled output current of the inverter H-bridge (output section of the cell); therefore, it acts as an independent disturbance. Thus, the transfer function of the plant is

Fig. 8. Closed-loop Bode diagram.

where h is the sample period and s is the desired resonant frequency. The values of the current-controller gain Kp and the zero locations (determined by constants ai and bi ) are obtained through root-locus analysis, as shown in Fig. 7. In addition, it can be noted that a pure delay has been included, in order to model the sample processing time required by the DSP. As expected, due to the resonance, the closed-loop Bode diagram presents perfect reference tracking at fs = 50 Hz, as shown in Fig. 8. The controller resonance also completely eliminates the effect of the input disturbance produced by the fundamental mains voltage vs . This can be seen on the input-

vDC (s) =

1 (iDC io )(s). Cs

(11)

In Section III-A, the limit on the bandwidth of the voltage loop or the ltering of the dc-link measured voltage has been established as a way to avoid the undesired effects of the dc-link pulsating voltage, i.e., harmonic distortion and fundamental

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Fig. 13. Antiwindup structure.

addition, Fig. 12 shows an important attenuation at 2fs ; this is caused by the lter zeros of the controller at this frequency. As a result, the actuation is will be ltered, avoiding the undesired harmonic distortion on the input-current reference i s.
Fig. 11. Root locus of the voltage controller.

D. Antiwindup Scheme As in any real plant, the actuation vAFE and is are limited and can saturate, producing windup of the controllers. Solutions for this problem are well known for PI controllers. Nevertheless, for the more complex control structures presented in this paper, the classical PI antiwindup techniques cannot be used. An antiwindup technique for any minimum-phase biproper controller, as control rules (12) and (10), is described in [10] and will be used for their implementation. The block diagram of Fig. 13 shows the implementation of this antiwindup scheme, where C (z ) is a minimum-phase biproper controller and c = C (z )| is its dc gain. (t) < umax , the saturation is not active, so the If umin < u transfer function for the scheme is c U (z ) = 1 E (z ) 1 + c [C 1 (z ) c ] c = 1 + c C 1 (z ) 1 = C (z ).

Fig. 12. Closed-loop Bode diagram.

(13)

phase shift on the input current of the cell. In this section, the use of a controller that includes the lter characteristic in its structure is proposed. Although this technique is similar to the conventional use of an independent lter in the voltage measurement, the inclusion of the lter poles and zeros as part of the controller structure increases the design exibility, allowing to obtain better performance of the control loop. The nal controller structure is Cv (z ) = Kv z av z 2 2 cos(2s h)z + 2 z1 z 2 + bv z + cv (12)

Otherwise, when saturation occurs, the states of the controller are always driven by its real output, achieving protection against windup. IV. S IMULATION R ESULTS To verify correct operation of the proposed control scheme and to contrast its performance against that of more classical control structures, a single cell has been simulated using the software PSIM. The control scheme corresponds to that shown in Fig. 4 and has been discussed in extenso in Section III-A. The circuit parameters are those of the experimental prototype described in the following section and are summarized in Table I. The value of the cells single-phase input voltage used for the simulation is 50 V peak. For comparison purposes, two variations on this control structure were simulated: The rst one consists of standard PI controllers for dc-link voltage and input current. The second alternative is the resonant structure proposed in this paper. In this case, a controller with resonant poles at the mains frequency is used in the inner current-control loop, and a PI-controller + lter is used for the voltage loop. The current resonant controller is tuned with the same direct gain Kp as the standard current PI and its zeros are located to achieve the same closed-loop bandwidth of 300 Hz, as shown in Fig. 14. The 0-dB gain and the 0 phase shift of the resonant controller at the mains frequency is an improvement with respect to the

where Kv and av are the gain and the zero location of the PI controller, respectively. 2s is the central frequency of the band-stop lter, bv and cv determine the location of the lter poles, and 1 is a coefcient used to limit the Q-factor of the lter. The design of the PI-controller + lter is illustrated in the z -domain root-locus diagram of Fig. 11. The zeros of the lter, which are placed near the unit circle to reject the 2fs frequency, are clearly identiable. The complex poles are placed near the lter zeros in order to obtain a narrow-enough lter response. Finally, the PI zero and gain are chosen with no further consideration than to obtain a sufciently large bandwidth and adequate damping factor. As shown in Fig. 12, the closed-loop Bode diagram presents perfect tracking at dc and a bandwidth of just below 100 Hz. In

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TABLE I PARAMETERS OF THE POWER CIRCUIT

Fig. 15. Simulated steady-state response of both control structures: (a) standard PI and (b) resonant controller.

Fig. 14. Closed-loop Bode diagram of the simulated current loop using both alternative controllers, namely, standard PI and resonant controller.

amplication (0.59 dB) and lagging phase shift (5 ) introduced by the standard PI. Additionally, for voltage control, the same PI tuned for a closed-loop bandwidth of 80 Hz was used for both alternative implementations, although a secondorder band-stop lter was included for the resonant structure voltage PI. The time response of both alternative controllers, under the same dc-link voltage reference and load, is shown in Fig. 15. For the control structure using only standard PI, the current reference is not perfectly sinusoidal and contains some small harmonic distortion, as shown in Fig. 15(a). Additionally, this distorted reference is tracked with the phase lag and a small amplication as expected from the closed-loop Bode plot of Fig. 14. On the other hand, the use of the lter in the dc-link voltage controller avoids the distortion on the current reference, as shown in Fig. 15(b). Furthermore, the resonant current controller follows this reference without any tracking error, obtaining the desired high-power-factor operation shown in this gure. The effect of the 2fs ripple on the dc-link voltage in both schemes is better appreciated in the spectral analysis of the steady-state response shown as the percentage of respective fundamental reference current in Fig. 16. In the case of the standard PI, the current reference has a clear third-harmonic component, which is expected from the partial compensation of this dc-link voltage variation. This reference is followed by the current-control loop, causing a 3% third harmonic in the actual input current [Fig. 16(b)]. In the case of the resonant

Fig. 16. Spectral analysis of the simulated response of the (a) standard PI reference current, (b) standard PI actual current, (c) resonant controller reference current, and (d) resonant controller actual current.

solution, the lter in the voltage prevents the voltage controller to react to the 2fs dc-link voltage component, producing a purely sinusoidal current reference and the actual cell input current, as shown in Fig. 16(c) and (d), respectively. V. E XPERIMENTAL R ESULTS The proposed control scheme was implemented on a xedpoint TMS320F2812 DSP and tested on a laboratory prototype. The schematic diagram of the power circuit is shown in Fig. 17 and corresponds to a seven-level single-phase output multicell converter. The hardware implementation of the described converter is shown in Fig. 18. Each board shown in this gure is built around a PM20CSJ060 Mitsubishi power module. We use 20-A/600-V rated three-phase IGBT bridges, out of

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Fig. 17. Single-phase output prototype multicell converter.

Fig. 19. Steady-state operation of the multicell converter.

Fig. 18. Hardware implementation of the seven-level single-phase multicell converter.

which only two output phases are used to form the converter H-bridges. Each board also includes dc-link capacitors, gate drive circuits, and current and voltage measurements. The boards are connected back to back in pairs to build a single cell, and the three cells are series connected to form the converter. The transformers at the bottom of Fig. 18 are multiple output transformers used for isolated power supplies for the gate drives and measurement circuits on each board. This converter is connected to the network through a Yy0 380/140-V 2.1-kVA three-phase transformer. The single-phase secondary windings are connected independently to each cell, and the input voltage is adjusted by a variable autotransformer to obtain approximately 55 V peak at the cells input. The main parameters of the power circuit, including the equivalent impedance seen at the connection point of cells Rs and Ls , are listed in Table I. Finally, the PWM frequency for both the rectier and the inverter H-bridge of each cell was set at 4 kHz with a dead time of 2 s. The steady-state operation of the multicell converter is shown in Fig. 19. The characteristic seven-level output voltage and the resulting sinusoidal load current are shown in Fig. 19(b). The steady-state input current of the cell is shown in Fig. 19(c). The good phase relation between this current and the input voltage is clear from this gure, while the current waveform is highly sinusoidal, leading to a high-power-factor operation. Finally, the stationary response of the dc-link voltage [Fig. 19(a)] shows a signicant spurious 2fs component; nevertheless, this

Fig. 20. Transient from loading to regeneration. (a) DC-link voltage. (b) Input current and voltage.

is expected due to the ltering characteristic of the voltage controller that avoids reacting to this component. Furthermore, due to this ltering characteristic, the voltage distortion has no effect in the phase and harmonic content of isu , achieving the high-power-factor operation of Fig. 19(c). The response to a large load impact, such that the rectier goes from consuming power from the mains to regenerating, is presented in Fig. 20. During operation in rectication mode, an almost sinusoidal current waveform in phase with the mains voltage can be observed. When the load impact is applied, the dc-link voltage, as shown in Fig. 20(a), responds with a short

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transient, after which it continues regulating at its reference value. This is achieved by an inversion of the input-current reference, which is followed by the current loop without phase error [Fig. 20(b)]. This result shows the inherent regenerative characteristic of the converter, the fast response of the proposed voltage control, and the high-power-factor operation obtained with the resonant current controllers for both loading and regenerative operation. VI. C ONCLUSION In this paper, a multicell converter built by the connection of regenerative cells with single-phase PWM rectiers has been made to work with very high power factor. This improved power factor is achieved by the use of higher order controllers, i.e., a biproper resonant current controller and a modied PI for the outer voltage loop. This means that the problems normally associated with the use of single-phase PWM rectiers have been solved purely by careful control design and without any hardware changes. The structure of the proposed controllers have been theoretically justied. The design criteria for the high number of controller parameters have been given based on root-locus analysis using computational aided tools. However, it would be possible to determinate them through recursive methods as genetics algorithms. The proposed control strategy, including antiwindup, has been programmed in a xed-point DSP and tested experimentally, demonstrating the feasibility of such controllers in practical implementations. R EFERENCES
[1] J. Rodrguez, J. S. Lai, and F. Z. Peng, Multilevel inverters: A survey of topologies, controls, and applications, IEEE Trans. Ind. Electron., vol. 49, no. 49, pp. 724738, Aug. 2002. [2] P. W. Hammond, A new approach to enhance power quality for medium voltage drives, IEEE Trans. Ind. Appl., vol. 33, no. 1, pp. 202208, Jan./Feb. 1997. [3] J. Espinoza, M. Prez, J. Rodrguez, and P. Lezana, Regenerative medium-voltage AC drive based on a multi-cell arrangement with minimum energy storage requirements, IEEE Trans. Ind. Electron., vol. 52, no. 1, pp. 171180, Feb. 2005. [4] J. Rodrguez, L. Morn, J. Pontt, J. L. Hernndez, L. Silva, C. Silva, and P. Lezana, High-voltage multilevel converter with regeneration capability, IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 839846, Aug. 2002. [5] N. Zargari and G. Joz, Performance investigation of a current-controlled voltage-regulated PWM rectier in rotating and stationary frames, IEEE Trans. Ind. Electron., vol. 42, no. 4, pp. 396401, Aug. 1995. [6] Y. Sato, T. Ishizuka, K. Nezu, and T. Kataoka, A new control strategy for voltage-type PWM rectiers to realize zero steady-state control error in input current, IEEE Trans. Ind. Appl., vol. 34, no. 3, pp. 480486, May/Jun. 1998. [7] D. N. Zmood and D. G. Holmes, Stationary frame current regulation of PWM inverters with zero steady-state error, IEEE Trans. Power Electron., vol. 18, no. 3, pp. 814822, May 2003. [8] X. Yuan, W. Merk, and J. Allmeling, Stationary-frame generalized integrators for current control of active power lters with zero steady-state error for current harmonics of concern under unbalanced and distorted operating conditions, IEEE Trans. Ind. Appl., vol. 38, no. 2, pp. 523 532, Mar./Apr. 2002. [9] J. Rodrguez, P. Lezana, J. Espinoza, M. Prez, and J. Pontt, Input current harmonics in a regenerative multi-cell inverter with single phase active rectiers, in Proc. IEEE IECON, Seville, Espaa, Nov. 58, 2002, pp. 932937. [10] G. Goodwing, S. Graebe, and M. Salgado, Control System Design. Englewood Cliffs, NJ: Prentice-Hall, 2000.

Pablo Lezana (S06M07) was born in Temuco, Chile, in 1977. He received the M.Sc. and Doctor degrees from the Universidad Tcnica Federico Santa Mara (UTFSM), Valparaso, Chile, in 2005 and 2006, respectively. Since 2006, he has been an Assistant Researcher in the Departamento de Electrnica, UTFSM. His research interests include power converters and modern digital control devices (DSPs and FPGAs).

Csar A. Silva (S01M02) was born in Temuco, Chile, in 1972. He received the Civil Electronic Engineer degree from the Universidad Tcnica Federico Santa Mara, Valparaso, Chile, in 1998, and the Ph.D. degree from the University of Nottingham, Nottingham, U.K., in 2003. He presented his doctoral thesis on Sensorless Vector Control of Surface Mounted Permanent Magnet Machines Without Restriction of Zero Frequency. Since 2003, he has been a Lecturer in the Department of Electronic Engineering, Universidad Tcnica Federico Santa Mara, where he teaches courses on electric machines, power electronics, and ac machine dives. His research interests include sensorless vector control of ac machines and control of static converters. Dr. Silva was granted the Overseas Research Students Awards Scheme to join the Power Electronics Machines and Control Group at the University of Nottingham, as a Postgraduate Research Student, in 1999.

Jos Rodrguez (M81S83SM94) received the Engineer degree from the Universidad Tcnica Federico Santa Mara, Valparaso, Chile, in 1977, and the Dr.-Ing. degree from the University of Erlangen, Nuremberg, Germany, in 1985, both in electrical engineering. Since 1977, he has been with the Departamento de Electrnica, Universidad Tcnica Federico Santa Mara, where he is currently a Professor and the President. During his sabbatical leave in 1996, he was responsible for the Mining Division, Siemens Corporation, Providencia, Chile. He has extensive consulting experience in the mining industry, especially in the application of large drives such as cycloconverter-fed synchronous motors for SAG mills, high-power conveyors, controlled drives for shovels, and power quality issues. He has authored or coauthored more than 130 refereed journal and conference papers and contributed to one chapter in the Power Electronics Handbook (Academic, 2006). His research interests include power electronics and electrical drives. In past years, his research interests have included multilevel inverters and new converter topologies.

Marcelo A. Prez (M07) was born in Concepcin, Chile, in 1976. He received the Engineer degree in electronic engineering, the M.Sc. degree in electrical engineering, and the D.Sc. degree in electrical engineering from the University of Concepcin, Concepcin, Chile, in 2000, 2003, and 2006, respectively. He is currently a Postdoctoral Researcher in the Departamento de Electrnica, Universidad Tcnica Federico Santa Mara, Valparaso, Chile, conducting research in the area of power converters.