Freescale Semiconductor Application Note

Document Number: AN4717 Rev. 2.0, 5/2013

Schematic Guidelines for the MMPF0100

Introduction

Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . 1 2 Pin Connection Guidelines . . . . . . . . . . . 1 3 References . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Revision History. . . . . . . . . . . . . . . . . . . . 6

This application note provides guidelines for schematic entry using the MMPF0100. For an example Bill of Materials, refer to the MMPF0100 datasheet. Freescale analog ICs are manufactured using the SMARTMOS process, a combinational BiCMOS manufacturing flow that integrates precision analog, power functions and dense CMOS logic together on a single cost-effective die.

Pin Connection Guidelines

This section provides recommended pin connections in Table 1. These guidelines help ensure that the MMPF0100 functions properly.

Freescale Semiconductor, Inc., 2013. All rights reserved.

Pin Connection Guidelines

Table 1. MMPF0100 Pin Connection Guidelines

Pin
1 2

Pin Name
INTB SDWNB

Pin Function

Recommended Connection

Recommended connection when not used

Open drain interrupt signal to Pull-up via 68 k- 100 k to VSNVS or other rail Leave floating processor at voltage less than or equal to VIN Open drain signal to indicate Pull-up via 68 k- 100 k to VSNVS or other rail Leave floating an imminent system at voltage less than or equal to VIN shutdown Open drain reset output to processor Standby input signal from processor Reserved Pin Output voltage feedback for SW1AB regulator Pull-up via 68 k- 100 k to VSNVS or other rail Leave floating at voltage less than or equal to VIN Connect to PMIC_STBY_REQ signal from processor Connect to ground Connect to ground Connect to ground

3 4 5 6

RESETBMCU STANDBY ICTEST SW1FB

Connect to SW1AB output voltage rail near load. Leave floating Leave floating if SW1 is used in SW1ABC Single Phase mode

7 8

SW1AIN SW1ALX

Input to SW1A MOSFETs for Connect to VIN and bypass with 0.1 F + 4.7 F Connect to VIN SW1AB regulator to ground SW1A switching node Connect to SW1AB inductor when used in Leave floating SW1AB Single Phase mode. Connect to SW1ABC inductor when used in SW1ABC Single Phase mode. Connect to SW1A inductor when used in SW1AB Dual Phase mode Connect to SW1AB inductor when used in Leave floating SW1AB Single Phase mode. Connect to SW1ABC inductor when used in SW1ABC Single Phase mode. Connect to SW1B inductor when used in SW1AB Dual Phase mode

SW1BLX

SW1B switching node

10 11

SW1BIN SW1CLX

Input to SW1B MOSFETs for Connect to VIN and bypass with 0.1 F + 4.7 F Connect to VIN SW1AB regulator to ground Regulator SW1C switching node Connect to SW1C Inductor when SW1C is used Leave floating as an independent regulator. Connect SW1ALX, SW1BLX, and SW1CLX together when SW1 is used in SW1ABC Single Phase mode Connect to VIN and bypass with 0.1 F + 4.7 F Connect to VIN to ground Connect to SW1C output voltage rail near load. Connect to SW1ABC output voltage rail if SW1ABC Single Phase configuration is used Leave floating

12 13

SW1CIN SW1CFB

Input to SW1C regulator Output voltage feedback for SW1C Independent and SW1ABC Single Phase configurations Ground reference for SW1 regulator(s) Ground reference for regulators SW2 and SW4 VGEN1 regulator output VGEN1 and VGEN2 LDO regulators input supply

14 15 16 17

SW1VSSSNS GNDREF1 VGEN1 VIN1

Connect to ground. Keep away from high current N/A ground return paths. Connect to ground. Keep away from high current N/A ground return paths. Bypass with 2.2 F to ground Bypass with 1.0 F capacitor to ground Leave floating Connect to output of a regulator with voltage <3.4 V

AN4717 Application Note Rev. 2.0 5/2013 2 Freescale Semiconductor

Pin Connection Guidelines Table 1. MMPF0100 Pin Connection Guidelines

Pin
18 19 20 21 22 23 24 25 26 27

Pin Name
VGEN2 SW4FB SW4IN SW4LX SW2LX SW2IN SW2IN SW2FB VGEN3 VIN2

Pin Function
VGEN2 regulator output Output voltage feedback for SW4 Input to SW4 regulator SW4 switching node SW2 switching node Input to SW2 regulator Input to SW2 regulator Output voltage feedback for SW2 VGEN3 regulator output VGEN3 and VGEN4 LDO regulators input VGEN4 regulator output Half supply reference for VREFDDR VREFDDR regulator input

Recommended Connection
Bypass with 4.7 F to ground Connect to SW4 output voltage rail near load

Recommended connection when not used

Leave floating Leave floating

Connect to VIN and bypass with 0.1 F + 4.7 F Connect to VIN to ground Connect to SW4 inductor Connect to SW2 inductor Leave floating Leave floating

Connect to VIN and bypass with 0.1 F + 4.7 F Connect to VIN to ground. Connect pins 23 and 24 together. Connect to pin 23 Connect to SW2 output voltage rail near load Bypass with 2.2 F to ground Bypass with 1.0 F capacitor to ground Leave floating Leave floating Connect to regulator with output voltage <3.6 V Leave floating Leave floating

28 29 30

VGEN4 VHALF VINREFDDR

Bypass with 4.7 F to ground Bypass with 0.1 F to ground

Connect 0.1.0 F to VHALF pin. Ensure there is Leave floating at least 1.0 F net capacitance from VINREFDDR to ground Bypass with 1.0 F to ground Leave floating Connect to ground. Keep away from high current N/A ground return paths. Leave floating when SW3 is used in SW3AB Single Phase mode. Connect to SW3B output voltage rail near load if SW3 is used in independent mode Leave floating

31 32 33

VREFDDR SW3VSSSNS SW3BFB

VREFDDR regulator output Ground reference for SW3 regulator(s) Output voltage feedback for SW3B regulator

34 35

SW3BIN SW3BLX

Input to SW3B regulator SW3B switching node

Connect to VIN and bypass with 0.1 F + 4.7 F Connect to VIN to ground Connect to SW3AB inductor if SW3 is used in Leave floating Single Phase mode. Connect to SW3B inductor if SW3 is used in independent mode. Connect to SW3AB inductor if SW3 is used in Leave floating Single Phase mode. Connect to SW3A inductor if SW3 is used in independent mode. Connect to VIN and bypass with 0.1 F + 4.7 F Connect to VIN to ground

36

SW3ALX

SW3A switching node

37 38 39 40 41

SW3AIN SW3AFB VGEN5 VIN3 VGEN6

Input to SW3A regulator

Output voltage feedback for Connect to SW3A(B) output voltage rail near load Leave floating SW3A or SW3AB regulators VGEN5 regulator output VGEN5 and VGEN6 LDO regulators' input VGEN6 regulator output Bypass with 2.2 F to ground Bypass with 1.0 F capacitor to ground Bypass with 2.2 F to ground Leave floating Connect to VIN Leave floating

AN4717 Application Note Rev. 2.0 5/2013 Freescale Semiconductor 3

Pin Connection Guidelines Table 1. MMPF0100 Pin Connection Guidelines

Pin
42 43 44 45 46 47

Pin Name
LICELL VSNVS SWBSTFB SWBSTIN SWBSTLX VDDOTP

Pin Function

Recommended Connection

Recommended connection when not used

Coin cell supply input/output Bypass with 0.1 F capacitor. Connect to optional Bypass with 0.1 F coin cell. VSNVS regulator/switch output SWBST regulator output voltage feedback Input to SWBST regulator SWBST switch node connection Supply to program OTP fuses Bypass with 0.47 F to ground Bypass with 0.47 F to ground

Connect to SWBST output voltage rail near load Leave floating Connect to VIN and bypass with 0.1 F + 10 F to ground Connect to VIN

Connect to SWBST inductor and Schottky diode Leave floating Connect to VCOREDIG through a 100 k resistor if PF0100 is used in the default mode. Connect to ground if PF0100 is used in the fuse mode. If on-board programming is desired, give provision to apply 8.0 V programming voltage to the pin with bypass of 2x10 F capacitors N/A

48 49 50 51 52 53 54 55

GNDREF1 VCORE VIN VCOREDIG VCOREREF SDA SCL VDDIO

Ground reference for the main band gap regulator. Analog Core supply Main chip supply Digital Core supply Main band gap reference I
2C

Connect to ground. Keep away from high current N/A ground return paths. Bypass with 1.0 F to ground Bypass with 1.0 F to ground Bypass with 1.0 F to ground Bypass with 0.22 F to ground Pull-up to VDDIO Pull-up to VDDIO Connect to 1.7 to 3.6 V supply. Bypass with 0.1 F to ground. Ensure that VDDIO is always lesser than or equal to VIN. N/A N/A N/A N/A Leave floating Leave floating Leave floating

data line

I2C clock line Supply for I2C bus

56 -

PWRON EP

Power On/off from processor Connect to PMIC_ON_REQ from processor. Pull N/A up via 8 k- 100 k to VSNVS if required Expose pad. Functions as ground return for buck and boost regulators Ground. Connect this pad to the inner and external ground planes through multiple vias to allow effective thermal dissipation. N/A

AN4717 Application Note Rev. 2.0 5/2013 4 Freescale Semiconductor

References

References
Document Number and Description URL
http://cache.freescale.com/files/analog/doc/data_sheet/MMPF0100.pdf http://cache.freescale.com/files/sensors/doc/app_note/AN4530.pdf http://cache.freescale.com/files/analog/doc/app_note/AN4622.pdf

MMPF0100 AN4530 AN4622

Data Sheet QFN (Quad Flat Pack No-Lead) Application Note MMPF0100 Layout Guidelines

Freescale.com Support Pages

MMPF0100 Product Summary Page Power Management Home Page Analog Home Page

URL
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MMPF0100 http://www.freescale.com/webapp/sps/site/homepage.jsp?code=POWERMGTHOME http://www.freescale.com/analog

AN4717 Application Note Rev. 2.0 5/2013 Freescale Semiconductor 5

Revision History

4
2.0

Revision History
Date
5/2013

Revision

Description of Changes Initial release

AN4717 Application Note Rev. 2.0 5/2013 6 Freescale Semiconductor

Revision History

AN4717 Application Note Rev. 2.0 5/2013 Freescale Semiconductor 7

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Document Number: AN4717 Rev. 2.0 5/2013