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INTRODUCTION OF

MICROPRPCESSOR

Elements of a computer, Microprocessor, Microcontroller- Instruction sets Instruction format, addressing modes Microcontroller software development process, Realtime programming requirements, interfacing C and assembly language.

Introduction

A computer is a programmable machine that receives input, stores and manipulates data//information, and provides output in a useful format.

1.1 DIAGRAM OF A COMPUTER SYSTEM A computer is a programmable machine that receives input, stores and
manipulates data//information, and provides output in a useful format.

Diagram Of A Computer System

1.1 BLOCK DIAGRAM OF A BASIC COMPUTER SYSTEM


Basic computer system consist of a Central processing unit (CPU), memory (RAM and ROM), input/output (I/O) unit.

Address bus

ROM CPU

RAM

I/O interface

I/O devices

Data bus

Control bus
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Block diagram of a basic computer system

BASIC COMPONENT OF MICROCOMPUTER


1.

CPU - Central Processing Unit


the portion of a computer system that carries out the instructions of a computer program the primary element carrying out the computer's functions. It is the unit that reads and executes program instructions. The data in the instruction tells the processor what to do.

Pentium D dual core processors


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2.

Memory
physical devices used to store data or programs (sequences of instructions) on a temporary or permanent basis for use in an electronic digital computer. Computer main memory comes in two principal varieties: random-access memory (RAM) and read-only memory (ROM). RAM can be read and written to anytime the CPU commands it, but ROM is pre-loaded with data and software that never changes, so the CPU can only read from it. ROM is typically used to store the computer's initial start-up instructions. In general, the contents of RAM are erased when the power to the computer is turned off, but ROM retains its data indefinitely. In a PC, the ROM contains a specialized program called the BIOS that orchestrates loading the computer's operating system from the hard disk drive into RAM whenever the computer is turned on or reset.

3. I/O Unit
Input/output (I/O), refers to the communication between an information processing system (such as a computer), and the outside world possibly a human, or another information processing system. Inputs are the signals or data received by the system, and outputs are the signals or data sent from it Devices that provide input or output to the computer are called peripherals On a typical personal computer, peripherals include input devices like the keyboard and mouse, and output devices such as the display and printer. Hard disk drives, floppy disk drives and optical disc drives serve as both input and output devices. Computer networking is another form of I/O.

EVOLUTION OF MICROPROCESSOR

DATA SIZE
Nibble 4 bit

Byte

8 bit

Word

16 bit

Long word

32 bit

INTERNAL STRUCTURE AND BASIC


OPERATION OF MICROPROCESSOR

ALU

Register Section

Address bus Data bus

Control and timing section

Control bus

Block diagram of a microprocessor

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ARITHMETIC AND LOGIC UNIT (ALU)


The component that performs the arithmetic and logical operations the most important components in a microprocessor, and is typically the part of the processor that is designed first. able to perform the basic logical operations (AND, OR), including the addition operation. The inclusion of inverters on the inputs enables the same ALU hardware to perform the subtraction operation (adding an inverted operand), and the operations NAND and NOR.

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INTERNAL STRUCTURE OF ALU

2 bits of ALU

4 bits of ALU

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CONTROL UNIT
The circuitry that controls the flow of information through the processor, and coordinates the activities of the other units within it. In a way, it is the "brain within the brain", as it controls what happens inside the processor, which in turn controls the rest of the PC. On a regular processor, the control unit performs the tasks of fetching, decoding, managing execution and then storing results.

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INTERNAL STRUCTURE OF CONTROL UNIT

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REGISTER SETS

The register section/array consists completely of circuitry used to temporarily store data or program codes until they are sent to the ALU or to the control section or to memory. The number of registers are different for any particular CPU and the more register a CPU have will result in easier programming tasks. Registers are normally measured by the number of bits they can hold, for example, an "8-bit register" or a "32-bit register".

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REGISTER IN MOTOROLA 68000


MICROPROCESSOR
31 16 15 8 7 0 D0 D1 D2 D3 D4 D5 D6 D7 31 16 15 8 7 0 A0 A1 A2 A3 A4 A5 A6 A7
USER STACK POINTER SUPERVISOR STACK POINTER

DATA REGISTERS

ADDRESS REGISTERS

A7 PC

STACK POINTER PROGRAM CONTER STATUS REGISTER


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15

8 7
USER VYTE

SYSTEM BYTE

SR

ACCUMULATOR a register in which intermediate arithmetic and logic results are stored. example for accumulator use is summing a list of numbers.

The accumulator is initially set to zero, then each number in turn is added to the value in the accumulator. Only when all numbers have been added is the result held in the accumulator written to main memory or to another, non-accumulator, CPU register.

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CONDITION CODE REGISTER (CCR)

an 8 bit register used to store the status of CPU, such as carry, zero, overflow and half carry.

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Flag
Z

Name
Zero flag

Description
Indicates that the result of a mathematical or logical operation was zero.

Carry flag

Indicates that the result of an operation produced an answer greater than the number of available bits. (This flag may also be set before a mathematical operation as an extra operand to certain instructions, e.g. "add with carry".)

Extend flag

Masks the XIRQ request when set. It is set by the hardware and cleared by the software as well is set by unmaskable XIRQ.

Negative/ Sign flag

Indicates that the result of a mathematical operation is negative. In some processors, the N and S flags have different meanings: the S flag indicates whether a subtraction or addition has taken place, whereas the N flag indicates whether the last operation result is positive or negative.

Overflow Flag

Indicates that the result of an operation has overflowed according to the CPU's word representation, similar to the carry flag but for signed operations. Interrupts can be enabled or disabled by respectively setting or clearing this flag. Modifying this flag may be restricted to programs 19 executing in supervisor mode

interrupts

PROGRAM COUNTER (PC)


a

16 bit register, used to store the next address of the operation code to be fetched by the CPU. Not much use in programming, but as an indicator to user only. Purpose of PC in a Microprocessor to store address of tos (top of stack) to store address of next instruction to be executed. count the number of instructions. to store base address of the stack.

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STACK POINTER (SP)


The

stack is configured as a data structure that grows downward from high memory to low memory. At any given time, the SP holds the 16-bit address of the next free location in the stack. The stack acts like any other stack when there is a subroutine call or on an interrupt. ie. pushing the return address on a jump, and retrieving it after the operation is complete to come back to its original location.

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BUS SYSTEM

a subsystem that transfers data between computer components inside a computer or between computers.

4 PCI Express bus card slots (from top to bottom: x4, x16, x1 and x16), compared to a traditional 32-bit PCI bus card slot (very bottom).

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BUS SYSTEM CONNECTION

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DATA BUS
The

data bus is 'bi-directional'

data or instruction codes from memory or input/output.are transferred into the microprocessor the result of an operation or computation is sent out from the microprocessor to the memory or input/output.

Depending

on the particular microprocessor, the data bus can handle 8 bit or 16 bit data.
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ADDRESS BUS
The address bus is 'unidirectional', over which the microprocessor sends an address code to the memory or input/output. The size (width) of the address bus is specified by the number of bits it can handle. The more bits there are in the address bus, the more memory locations a microprocessor can access. A 16 bit address bus is capable of addressing 65,536 (64K) addresses.

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CONTROL BUS

The control bus is used by the microprocessor to send out or receive timing and control signals in order to coordinate and regulate its operation and to communicate with other devices, i.e. memory or input/output.

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MICRO PROCESSOR CLOCK

Also called clock rate, the speed at which a microprocessor executes instructions. Every computer contains an internal clock that regulates the rate at which instructions are executed and synchronizes all the various computer components. The CPU requires a fixed number of clock ticks (or clock cycles) to execute each instruction. The faster the clock, the more instructions the CPU can execute per second. Clock speeds are expressed in megahertz (MHz) or gigahertz ((GHz). Some microprocessors are superscalar, which means that they can execute more than one instruction per clock cycle. Like CPUs, expansion buses also have clock speeds. Ideally, the CPU clock speed and the bus clock speed should be the same so that neither component slows down the other. In practice, the bus clock speed is often slower than the CPU clock speed, which creates a bottleneck. This is why new local buses, such as AGP, have been developed.

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Von Neumann Architecture:

The computer has single storage system(memory) for storing data as well as program to be executed. Processor needs two clock cycles to complete an instruction. Pipelining the instructions is not possible with this architecture. In the first clock cycle the processor gets the instruction from memory and decodes it. In the next clock cycle the required data is taken from memory. For each instruction this cycle repeats and hence needs two cycles to complete an instruction. This is a relatively older architecture and was replaced by Harvard architecture.

Harvard Architecture:

The computer has two separate memories for storing data and program. Processor can complete an instruction in one cycle if appropriate pipelining strategies are implemented. In the first stage of pipeline the instruction to be executed can be taken from program memory. In the second stage of pipeline data is taken from the data memory using the decoded instruction or address. Most of the modern computing architectures are based on Harvard architecture. 28 But the number of stages in the pipeline varies from system to system.

EXAMPLES OF MICRO PROCESSOR


Intel 8085 Intel 8086

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8086

The 8086 is a 16-bit microprocessor chip designed by Intel, which gave rise to the x86 architecture; development work on the 8086 design started in the spring of 1976 and the chip was introduced to the market in the summer of 1978. The Intel 8088, released in 1979, was a slightly modified chip with an external 8-bit data bus (allowing the use of cheaper and fewer supporting logic chips and is notable as the processor used in the original IBM PC.

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8085
The Intel 8085 is an 8-bit microprocessor introduced by Intel in 1977. It was binary-compatible with the more-famous Intel 8080 but required less supporting hardware, thus allowing simpler and less expensive microcomputer systems to be built.

An Intel 8085AH processor. From 1977 to 1990s

Produced

Common manufacturer(s)

Intel and several others

Max. CPU clock rate

3,5 and 6 MHz

Instruction set Package(s)

pre x86 40 pin DIP

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MICROPROCESSOR VS MICROCONTROLLER

Microcontrollers are generally associated with the embedded applications Microprocessors are associated with the desktop computers Microcontrollers will have simpler memory hierarchy i.e. the RAM and ROM may exist on the same chip and generally the cache memory will be absent. The power consumption and temperature rise of microcontroller is restricted because of the constraints on the physical dimensions. 8-bit and 16-bit microcontrollers are very popular with a simpler design as compared to large bit-length (32-bit, 64-bit) complex general purpose processors. However, recently, the market for 32-bit embedded processors has been growing
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INSTRUCTION SET
o The complete collection of instructions that are understood by a CPU

o Can be considered as a functional spec for a CPU Implementing the CPU in large part is implementing the machine instruction set.

o Machine Code is rarely used by humans Binary numbers / bits Machine code is usually represented by human readable assembly codes In general, one assembler instruction equals one machine .instruction

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ELEMENTS OF AN INSTRUCTION
Operation code (Op code) - Species the operation to be performed (e.g.. ADD, I/O) Source Operand reference - The operation may involve one or more source operands, that is, operands that are inputs for the operation. Result Operand reference - The operation may produce a result. Next Instruction Reference - This tells the CPU where to fetch the next instruction after the execution of this instruction is complete. - Next instruction reference often implicit (sequential execution) Operands may be available in Main memory (or virtual memory or cache), CPU register, I/O device and Sometimes it is implicit
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INSTRUCTION CYCLE STATE DIAGRAM

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INSTRUCTION FORMAT

Opcodes are represented by abbreviations, called mnemonics, that indicate the operation. Common examples include : ADD Add SUB Subtract MPY Multiply DIV Divide LOAD Load data from memory STOR Store data to memory
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INSTRUCTION TYPES
Data processing Arithmetic and logical instructions Data storage (main memory) Data movement (I/O) Program flow control Conditional and unconditional branches Call and Return
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NUMBER OF ADDRESSES
Maximum no. of address that is used in an instruction 3 addresses Operand 1, Operand 2, Result a = b + c; add ax, bx, cx 3 address format rarely used, Instructions are long because 3 or more operands have to be specified 2 addresses One address doubles as operand and result a=a+b add ax, bx Reduces length of instruction over 3-address format Requires some extra work by processor, Temporary storage to hold some results 1 address Implicit second address, Usually a register (accumulator), Common on early machines Used in some Intel x86 instructions with implied operands mul ax idiv ebx 41 Zero addresses Zero-address instructions are applicable to a special memory organization, called a Stack. A stack is a last-in-rst-out set of locations.

HOW MANY ADDRESSES?


More addresses More complex instructions More registers Inter-register operations are quicker Fewer instructions per program More complexity in processor Fewer addresses Less complex instructions More instructions per program Faster fetch/execution of instructions Less complexity in processor One address format however limits you to one register
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TYPES OF OPERANDS
Addresses Numbers Integer/floating point Binary / BCD integer representations Characters ASCII etc. Logical Data Bits or flags

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DESIGN ISSUES
Operation Repertoire How many operations and how complex should they be? Few operations = simple silicon; many ops makes it easier to program Data types Instruction Format and Encoding Fixed or variable length? How many bits? How many addresses? This has some bearing on data types Registers How many can be addressed and how are they used? Addressing Modes Many of the same issues as Operation Repertoire
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DESIRABLE CHARACTERISTICS OF INSTRUCTION SET


Completeness: Any computable function can be implemented Efficiency: Often used instruction can be executed rapidly and not occupy much memory storage. Regularity: Expected opcodes should be included. There should be very few exceptions to a consistent use. Orthogonality: All addressing modes should be available for all instructions. Condition codes: Sufficient conditions should be set by the results of the execution of all instruction and they should be testable for effective conditional branching. Appropriateness: The instruction should be tailored to the specific task the computer is asked to do.
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ADDRESSING MODES
Addressing modes are the ways how architectures specify the address of an object they want to access. In GPR machines, an addressing mode can specify a constant, a register or a location in memory. The most commonly used addressing modes are: Immediate Addressing: The operand is actually present in the instruction: e.g. ADD 5

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DIRECT ADDRESSING
Address field contains address of operand Effective address (EA) = address field (A) e.g. ADD A ;Add contents of cell A to accumulator

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INDIRECT ADDRESSING
With direct addressing, the length of the address field is usually less than the word length, thus limiting the address range. One solution is to have the address field refer to the address of a word in memory, which in turn contains a full-length address of the operand.

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REGISTER ADDRESSING
Register addressing is similar to direct addressing. The only difference is that the address field refers to a register rather than a main memory address. Advantage is faster instruction fetch. Disadvantage is address space is very limited.

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REGISTER INDIRECT ADDRESSING


Register addressing is analogous to direct addressing, register indirect addressing is analogous to indirect addressing. In both cases, the only difference is whether the address field refers to a memory location or a register. Thus, for register indirect address: Operand is in memory cell pointed to by contents of register.

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DISPLACEMENT ADDRESSING
A very powerful mode of addressing that combines the capabilities of direct addressing and register indirect addressing. It is known by a variety of names depending on the context of its use but the basic mechanism is the same. We will refer to this as displacement addressing, address field hold two values: A = base value R = register that holds displacement

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CISC
Complex Instruction Set Computer Large number of complex instructions Variable Iength instructions Facilitate the extensive manipulation of low-level computational elements and events such as memory, binary arithmetic, and addressing. Ex: Motorola 68000 family, Intel x86 architecture based processors. Adv: Emphasis on hardware Includes multi-clock complex instructions Memory-to-memory: "LOAD" and "STORE incorporated in instructions Small code sizes, high cycles per second Transistors used for storing complex instructions . Dis Adv: Older instruction sets into new generations of processors tended to force growing complexity. Many specialized CISC instructions were not used frequently. Because each CISC command must be translated by the processor into tens or even hundreds of lines of microcode, it tends to run slower 52

RISC
Reduced Instruction Set Computer Small number of instructions instruction size constant bans the indirect addressing mode retains only those instructions that can be overlapped and made to execute in one machine cycle or less. Ex: ARM processors Adv: Emphasis on software Single-clock, reduced instruction only Register to register: "LOAD" and "STORE are independent instructions Low cycles per second, large code sizes Spends more transistors on memory registers

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RISC VS CISC
The performance or speed of the computer can be measured by,

Two ways to reduce the execution time Reduce the no of instructions that must be executed--- This can be done by using CISC Reduce the individual instruction execution time RISC alternative. The longer instructions used in CISC may require a multiple memory fetches, The alternative for the above is instruction cache and pipeline execution. But still this cannot obviate the advantages of RISC. If the program consists of difficult operations that can be expressed easily using CISC, then a RISC may need more no of instructions. This is the tradeoff between CISC and RISC, because they are data (program) dependant. But still current trend is RISC
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