COURSE OUTLINE

Department & Faculty: Electrical Engineering Department Full Time Program, UTMSPACE UTM International Campus Course Code: Digital Electronics I ( DDE 1313) Total Contact Hours: 56 hours Page : 1 of 6

Semester: 2 Academic Session: 2011 / 2012

Lecturer Room No. Telephone No. E-mail Synopsis

: Rosli Ibrahim : CW103 : 012-6282768 / 03-26154393 : rosli@ic.utm.my : Electronic Digital I consist of topics covered the introductory of digital concept, numbers system, operations and codes, logic gates, Boolean algebra and combinational logic circuit, logic simplification and designing combinational logic circuit, combinational circuits building blocks, programmable logic devices, integrated circuit technologies and simulation using Electronic Workbench

LEARNING OUTCOMES By the end of the course, students should be able to: Programme Learning Outcome(s) Addressed Taxonomy and Generic Skill Levels

No. 1

Course Learning Outcome Define, differentiate and describe various electronic terms in digital and analogue systems as well as in number and logic systems, digital codes and Boolean expression.

Assessment Methods

PO1

C4

Identify and describe various combinational building blocks and implement digital circuitry using the MSI ICs by making use of the data sheet. PO1 C1 Test, Quiz, Assignment , Final Exam

Classify and describe the architecture of SPLDs and perform and implement logic function generation using PROM, PLA and PAL method. PO1 C2

Describe the digital IC terminology and differentiate between TTL and CMOS characteristics. PO1 C3

Prepared by: Name: En. Mohamad Zulkefli Adam Signature: Date: 22 February 2010

Certified by: (Course Panel Head) Name: Pn. Umi Salmah Mihad Signature: Date:

COURSE OUTLINE
Department & Faculty:
Electrical Engineering Department Full Time Program, UTMSPACE UTM International Campus

Page : 2 of 6

Course Code: Digital Electronics I ( DDE 1313)

Total Contact Hours: 56 hours

Semester: 2 Academic Session: 2011 / 2012

Perform and explain various problems, logic circuits and digital arithmetic using alternative logic symbol method, Boolean algebra, Karnaugh Map and EWB. PO3 CTPS3

Manage and acknowledge current information related with digital electronics industries from various sources.

PO6

A2 LL2

Assignment

STUDENT LEARNING TIME No. A. Teaching and Learning Activities Face-to-face Learning 1. Lectures 2. Labs / Tutorial 3. Student Centred Learning (SCL) Activities Self Directed Learning 1. Non Face-to-Face Learning 2. Revision 3. Preparation for formal assessments Formal Assessments 1. Test 2. Final Examination - Project Presentation Viva Voce Total Student Learning Time (hours) 42 14 33 16.5 8 4 2.5 120

B.

C.

COURSE OUTLINE
Department & Faculty:
Electrical Engineering Department Full Time Program, UTMSPACE UTM International Campus

Page : 3 of 6

Course Code: Digital Electronics I ( DDE 1313)

Total Contact Hours: 56 hours

Semester: 2 Academic Session: 2011 / 2012

TEACHING METHODOLOGY Lecture and Discussion, Active and Co-operative Learning. WEEKLY SCHEDULE Week 1 LECTURE 4 hr 1 Digital and analogue systems. Advantages and limitations of Digital techniques. Representing binary quantities. Logic level (VL (min), VL (max), VH (min), VH (max) ). Digital signal and timing diagram. Digital circuit/logic circuit Decimal numbers, counting in decimal, weighting structure. Binary numbers, counting in binary, weighting structure, simple binary arithmetic addition/subtraction operation. Octal numbers, counting in hex, addition, weighting structure. Hexadecimal numbers, counting in hex, addition, weighting structure. Conversion between numbers. Binary codes, Weighted codes, unweighted codes, Alphanumeric code. Weighted codes, BCD 8421, BCD 8421 addition, BCD 842-1. Unweighted codes, Excess 3 and Gray code. Conversion between codes, conversion between codes and numbers. Alphanumeric codes, ASCII, Extended ASII, EBDIC. Parity code for error detection. Logic gates: Inverter, AND, OR, NAND, NOR, standard logic symbol, rectangular outline symbols/IEEE ANSI Std., Boolean expression, truth table, timing diagrams, application examples, data sheet and pin configurations. EX-OR and EX-NOR circuit, standard logic symbol, rectangular outline symbols/IEEE ANSI Std., Boolean expression, truth table, Internal logic circuit of EX-OR and EX-NOR, timing diagrams, application examples, data sheet and pin configurations.

Week 2 LECTURE TUTORIAL 1 QUIZ 1

4 hr

Week 3 LECTURE

4 hr

2 3

COURSE OUTLINE
Department & Faculty:
Electrical Engineering Department Full Time Program, UTMSPACE UTM International Campus

Page : 4 of 6

Course Code: Digital Electronics I ( DDE 1313)

Total Contact Hours: 56 hours

Semester: 2 Academic Session: 2011 / 2012

Week 4 LECTURE TUTORIAL 2

4 hr

Alternative logic symbol and logic symbol interpretation, standard and alternative symbol for various logic gates and inverter, truth table for alternative logic gates. Boolean algebra, Boolean theorems, multivariable theorems, De-Morgon theorems, Negative-OR and Negative-AND gate, Universality of NAND and NOR gates, alternative logic symbol and Boolean algebra, analysis of combinational logic circuit using alternative logic symbol. Forms of Boolean expressions, SOP (Sum of minterms), POS (Product of maxterm), standard form of SOP and POS expression, conversion of Boolean expression to standard form. Boolean Expressions and Truth Tables. Analysis of logic circuits with Boolean. Analysis of logic circuits operation with pulse waveform. Implementing logic circuits from Boolean expression and truth table. Simplification of Boolean expressions. Simplification of logic circuits using Boolean Algebra. Karnaugh Map, K-Map format, mapping and looping procedure. Simplification of logic circuit using K-Map, K-Map SOP and POS minimization, K-Map with dont care conditions. Universality of NAND and NOR gates (implementation), combinational logic circuit using minimum number of NAND and NOR gates. Designing combinational logic circuits, design procedure. SEMESTER BREAK ( 1 WEEK )

Week 5 LECTURE TUTORIAL 3 TEST 1

4 hr

Week 6 LECTURE QUIZ 2

4 hr

Week 7 LECTURE TUTORIAL 4

4 hr

Week 8 Week 9 LECTURE QUIZ 3 4 hr 6

Signed numbers, sign-magnitude, 1s and 2s complement, negations, arithmetic operations addition and subtraction, overflow in 1s and 2s complement system. Adder, half adder, full adder, propagation carry vs. Look ahead-carry (l.a.c). Parallel adders, adder operation, IC7483/74283, adders expansion, implementation of parallel adder, addition the binary numbers, addition and subtractions the

Week 10 LECTURE

4 hr

COURSE OUTLINE
Department & Faculty:
Electrical Engineering Department Full Time Program, UTMSPACE UTM International Campus

Page : 5 of 6

Course Code: Digital Electronics I ( DDE 1313)

Total Contact Hours: 56 hours

Semester: 2 Academic Session: 2011 / 2012

TUTORIAL 5

numbers in 1s and 2s complement systems. Comparators, 4-bit magnitude comparator IC 7485. Decoders, functional descriptions, basic 2-bits binary decoder active HIGH and LOW output with gated equivalent circuit. 4 hr 6 Decoder IC 74138, IC 74154, IC 7442, seven segment display common anode and common cathode, IC 7447, IC 7448 and example of decoder application. Encoders, functional descriptions, basic 4-bits encoders active HIGH/LOW inputs and outputs with gated equivalent circuit, priority encoder IC 74147 and example of encoder application. Multiplexers/data selector, functional descriptions, basic 2bits and 4-bits mux with gated equivalent circuit, IC 74157, IC 74151 and example of multiplexer application. Demultiplexers/data distributors, functional description,1 to 8 line demultiplxer, IC 74138 and example of demultiplexer application. Definitions, fundamentals of PLD circuitry, PLD symbology, classifications of SPLDs and architectures, PROM, PLA, PAL and GAL. Logic function generation manually by using PROM, PAL and PLA. Programming a PLD, PLD development cycle flow chart. Digital IC Terminology, current and voltage parameters, fan-out, propagation delays, power requirements, speedpower product, noise immunity, invalid voltage levels, current-sourcing and current-sinking action, TTL loading and Fan-Out. TTL series characteristics, comparison of TTL series characteristics. CMOS series characteristics, comparison of CMOS series characteristics, comparison of TTL and CMOS series characteristics. Unused Inputs. Revision and Exam Preparation

Week 11 LECTURE TEST 2

Week 12 LECTURE TUTORIAL 6 QUIZ 4 Week 13 LECTURE TUTORIAL 7 Week 14 LECTURE TEST 3

4 hr

4 hr

4 hr

7 8

Week 15 LECTURE TUTORIAL 8 QUIZ 5 Week 16

4 hr

COURSE OUTLINE
Department & Faculty:
Electrical Engineering Department Full Time Program, UTMSPACE UTM International Campus

Page : 6 of 6

Course Code: Digital Electronics I ( DDE 1313)

Total Contact Hours: 56 hours

Semester: 2 Academic Session: 2011 / 2012

MAIN TEXT : 1. Digital System Principles and Application, Tocci & Widmer, 9th Edition, 2005, Prentice Hall. (TKT868DST62)

REFERENCES : 2. 3. Digital Fundamental, Floyd, 10th Edition, 2006, Prentice-Hall. (TKT868D5F56) Digital Logic: Analysis, Application & Design, Garrod & Borns, IntI Edition, 1991, Sounders College Publishing. GRADING: Item 1. 2. Assessment Method Assignment Test Test 1 Test 2 Test 3 Quiz Final Exam Number 4 2 CTPS 1 CTPS 2 CTPS 2 4 1 Total 10% 50% 100% Each assessment % C2 LL2 Overall % 5% 35% Week 5 Week 11 Week 14 Implementation Date Weeks 3,6,10,13

3. 5.