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HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241

Data Sheet September 26, 2008 FN3138.16

+5V Powered RS-232 Transmitters/Receivers


The HIN232-HIN241 family of RS-232 transmitters/receivers interface circuits meet all ElA RS-232E and V.28 specifications, and are particularly suited for those applications where 12V is not available. They require a single +5V power supply (except HIN239) and feature onboard charge pump voltage converters which generate +10V and -10V supplies from the 5V supply. The family of devices offer a wide variety of RS-232 transmitter/receiver combinations to accommodate various applications (see Selection Table on page 1). The drivers feature true TTL/CMOS input compatibility, slew-rate-limited output, and 300 power-off source impedance. The receivers can handle up to 30V, and have a 3k to 7k input impedance. The receivers also feature hysteresis to greatly improve noise rejection.

Features
Meets All RS-232E and V.28 Specifications Requires Only Single +5V Power Supply - (+5V and +12V - HIN239) High Data Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . 120kbps Onboard Voltage Doubler/Inverter Low Power Consumption Low Power Shutdown Function Three-State TTL/CMOS Receiver Outputs Multiple Drivers - 10V Output Swing for 5V lnput - 300 Power-Off Source Impedance - Output Current Limiting - TTL/CMOS Compatible - 30V/s Maximum Slew Rate Multiple Receivers - 30V Input Voltage Range - 3k to 7k Input Impedance - 0.5V Hysteresis to Improve Noise Rejection Pb-free Available (RoHS compliant)

Applications
Any System Requiring RS-232 Communication Ports - Computer - Portable, Mainframe, Laptop - Peripheral - Printers and Terminals - Instrumentation - Modems

Selection Table
PART NUMBER HIN232 HIN236 HIN237 HIN238 HIN239 HIN240 HIN241 POWER SUPPLY VOLTAGE +5V +5V +5V +5V +5V and +7.5V to 13.2V +5V +5V NUMBER OF RS-232 DRIVERS 2 4 5 4 3 5 4 NUMBER OF RS-232 RECEIVERS 2 3 3 4 5 5 5 EXTERNAL COMPONENTS 4 Capacitors 4 Capacitors 4 Capacitors 4 Capacitors 2 Capacitors 4 Capacitors 4 Capacitors LOW POWER SHUTDOWN/TTL THREE-STATE No/No Yes/Yes No/No No/No No/Yes Yes/Yes Yes/Yes NUMBER OF LEADS 16 24 24 24 24 44 28

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2005, 2008. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pin Descriptions


PIN VCC V+ VGND C1+ C1C2+ C2TIN TOUT RIN ROUT EN Power Supply Input 5V 10%. Internally generated positive supply (+10V nominal), HIN239 requires +7.5V to +13.2V. Internally generated negative supply (-10V nominal). Ground lead. Connect to 0V. External capacitor (+ terminal) is connected to this lead. External capacitor (- terminal) is connected to this lead. External capacitor (+ terminal) is connected to this lead. External capacitor (- terminal) is connected to this lead. Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400k pull-up resistor to VCC is connected to each lead. Transmitter Outputs. These are RS-232 levels (nominally 10V). Receiver Inputs. These inputs accept RS-232 input levels. An internal 5k pull-down resistor to GND is connected to each input. Receiver Outputs. These are TTL/CMOS levels. Enable input. This is an active low input which enables the receiver outputs. With EN = 5V, the receiver outputs are placed in a high impedance state. Shutdown Input. With SD = 5V, the charge pump is disabled, the receiver outputs are in a high impedance state and the transmitters are shut off. No Connect. No connections are made to these leads. FUNCTION

SD

NC

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Ordering Information


PART NUMBER HIN232CB* HIN232CBZ* (Note) HIN232CP HIN232CPZ (Note) HIN232IB* HIN232IBZ* (Note) HIN232IP HIN232IPZ (Note) HIN236CB HIN236CBZ (Note) HIN237CB* HIN237CBZ* (Note) HIN238CB* HIN238CBZ*(Note) HIN238CP HIN238IB HIN238IBZ (Note) HIN239CB* HIN239CBZ* (Note) HIN239CP HIN239CPZ (Note) HIN240CN HIN240CNZ* (Note) HIN241CA HIN241CAZ (Note) HIN241CB* HIN241CBZ* (Note) HIN241IB HIN241IBZ (Note) 232CB HIN232CBZ HIN232CP HIN232CPZ HIN232IB HIN232IBZ HIN232IP HIN232IPZ HIN236CB HIN236CBZ HIN237CB HIN237CBZ HIN238CB HIN238CBZ HIN238CP HIN238IB HIN238IBZ HIN239CB HIN239CBZ HIN239CP HIN239CPZ HIN240CN HIN240CNZ HIN241CA HIN241CAZ HIN241CB HIN241CBZ HIN241IB HIN241IBZ PART MARKING TEMP. RANGE (C) 0 to +70 0 to +70 0 to +70 0 to +70 -40 to +85 -40 to +85 -40 to +85 -40 to +85 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 -40 to +85 -40 to +85 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 0 to +70 -40 to +85 -40 to +85 PACKAGE 16 Ld SOIC 16 Ld SOIC (Pb-free) 16 Ld PDIP 16 Ld PDIP** (Pb-free) 16 Ld SOIC 16 Ld SOIC (Pb-free) 16 Ld PDIP 16 Ld PDIP** (Pb-free) 24 Ld SOIC 24 Ld SOIC (Pb-free) 24 Ld SOIC 24 Ld SOIC (Pb-free) 24 Ld SOIC 24 Ld SOIC (Pb-free) 24 Ld PDIP 24 Ld SOIC 24 Ld SOIC (Pb-free) 24 Ld SOIC 24 Ld SOIC (Pb-free) 24 Ld PDIP 24 Ld PDIP** (Pb-free) 44 Ld MQFP 44 Ld MQFP (Pb-free) 28 Ld SSOP 28 Ld SSOP (Pb-free) 28 Ld SOIC 28 Ld SOIC (Pb-free) 28 Ld SOIC 28 Ld SOIC (Pb-free) M16.3 M16.3 E16.3 E16.3 M16.3 M16.3 E16.3 E16.3 M24.3 M24.3 M24.3 M24.3 M24.3 M24.3 E24.3 M24.3 M24.3 M24.3 M24.3 E24.3 E24.3 Q44.10X10 Q44.10X10 M28.209 M28.209 M28.3 M28.3 M28.3 M28.3 PKG. DWG. #

*Add -T suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts


HIN232 (16 LD PDIP, SOIC) TOP VIEW
T3OUT T1OUT T2OUT R1IN R1OUT T2IN T1IN GND VCC 1 2 3 4 5 6 7 8 9

HIN236 (24 LD SOIC) TOP VIEW


24 T4OUT 23 R2IN 22 R2OUT 21 SD 20 EN 19 T4IN 18 T3IN 17 R3OUT 16 R3IN 15 V14 C213 C2+

C1+ 1 V+ 2 C1- 3 C2+ 4 C2- 5 V6

16 VCC 15 GND 14 T1OUT 13 R1IN 12 R1OUT 11 T1IN 10 T2IN 9 R2OUT

T2OUT 7 R2IN 8

C1+ 10 V+ 11 C1- 12

+5V 1 F + 16 1 F 1 NOTE 1 + 3 4 NOTE 1 + 5 VCC C1+ C1C2+ C2+5V TO 10V VOLTAGE DOUBLER V+ 2 + NOTE 1

+5V 9 10 VCC C1+ + +5V TO 10V 12 C1- VOLTAGE DOUBLER 13 C2+ + +10V TO -10V 14 VOLTAGE INVERTER C2+5V 400k 7 +5V 400k +5V 400k +5V 400k T1 + 1 F

V+

11

1 F

V- 15 + 2 1 F T1OUT T2OUT

+10V TO -10V VOLTAGE INVERTER T1

V- 6 + 14 NOTE 1

T1IN T2IN T1OUT T3IN

T2

T1IN

11

+5V 400k +5V 400k

18 19 5

T3 T4

1 24 4

T3OUT T4OUT R1IN

T2IN R1OUT

10 12

T2

7 13

T2OUT R1IN

T4IN R1OUT

R1 9 R2

5k 8 5k R3OUT 15 EN 17 20 R2OUT 22

R1

5k 23 R2IN

R2OUT

R2IN

R2

5k 16

R3IN SD

R3

5k

21

NOTE: 1. Either 0.1F or 1F capacitors may be used.

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts


(Continued) HIN237 (24 LD SOIC) TOP VIEW
T3OUT 1 T1OUT 2 T2OUT 3 R1IN T2IN T1IN GND VCC 4 R1OUT 5 6 7 8 9 24 T4OUT 23 R2IN 22 R2OUT 21 T5IN 20 T5OUT 19 T4IN 18 T3IN 17 R3OUT 16 R3IN 15 V14 C213 C2+

HIN238 (24 LD PDIP, SOIC) TOP VIEW


T2OUT 1 T1OUT 2 R2IN 3 24 T3OUT 23 R3IN 22 R3OUT 21 T4IN 20 T4OUT 19 T3IN 18 T2IN 17 R4OUT 16 R4IN 15 V14 C213 C2+

R2OUT 4 T1IN 5

R1OUT 6 R1IN GND VCC 7 8 9

C1+ 10 V+ 11 C1- 12

C1+ 10 V+ 11 C1- 12

+5V 9 1F 10 C1+ + 12 C113 C2+ + 14 C2VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1 V+ 11 + 1F 1F 10 C1+ + 12 C113 C2+ + 14 C2-

+5V 9 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER T1 V+ 11 + 1F

1F

V- 15 1F + 2 T1OUT

1F

V- 15 + 2 1F T1OUT

T1IN

+5V 400k 7 +5V 400k 6 +5V 400k

T1IN

+5V 400k 5 +5V 400k +5V 400k +5V 400k

T2 3 T3 T2OUT T2IN 18

T2 1 T3 T2OUT

T2IN

T3IN T4IN T5IN R1OUT

18

T3OUT T4OUT T5OUT R1IN

T3IN T4IN R1OUT

19

24

T3OUT T4OUT R1IN

+5V 400k 19 +5V 400k

T4 24 T5 20 4 R1 5k 23 R2IN R2 5k 16 R3IN R3 5k 17 R4OUT R3OUT 22 4 R2OUT 21 6

T4 20 7 R1 5k 3 R2IN R2 5k 23 R3IN R3 5k 16 R4IN R4 5k

21 5

22 R2OUT

17 R3OUT

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts


(Continued) HIN239 (24 LD PDIP, SOIC) TOP VIEW
NC SD R1OUT 1 R1IN 2 GND 3 VCC 4 V+ 5 C1+ 6 C1- 7 V- 8 R5IN 9 R5OUT 10 R4OUT 11 R4IN 12 24 T1IN 23 T2IN 22 R2OUT 21 R2IN 20 T2OUT 19 T1OUT 18 R3IN 17 R3OUT 16 T3IN 15 NC 14 EN 13 T3OUT NC T5IN R3OUT R3IN T4OUT T3OUT T1OUT T2OUT NC R2IN NC 1 44 43 42 41 40 39 38 37 36 35 34 33 2 32 3 4 5 6 7 8 9 31 30 29 28 27 26 25 NC NC NC VC2C2+ C1V+ C1+ NC NC EN

HIN240 (44 LD MQFP) TOP VIEW


R4OUT R5OUT NC T5OUT R4IN R5IN NC T4IN T3IN NC NC
FN3138.16 September 26, 2008

24 10 11 23 12 13 14 15 16 17 18 19 20 21 22

R2OUT

R1OUT

T2IN

T1IN

R1IN

GND

VCC

NC

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts


(Continued)
+5V

+5V 4 6 1 F (NOTE) + 7 C1+ C1VCC

+7.5V TO +13.2V (NOTE) 1 F V+ 5 1 F T1OUT 1 F V- 8 + 19

+10V TO -10V VOLTAGE INVERTER T1

T1IN T2IN

+5V 400k 24 +5V 400k +5V 400k

T1IN T2IN T3IN T4IN T5IN R1OUT

19 25 V CC C1+ + +5V TO 10V 27 C1- VOLTAGE DOUBLER 28 C2+ +10V TO -10V + 29 VOLTAGE INVERTER C2+5V T1 400k 15 +5V 400k 14 +5V 400k T2

V+

26

1 F

V-

30 1 F 7 T1OUT T2OUT T3OUT T4OUT T5OUT R1IN

23

T2

20

T2OUT

T3IN R1OUT

16 1

T3

13 2

37

T3 T4 T5

6 5 41 17

T3OUT R1IN

+5V 400k 38 +5V 400k 2 16

R1 R2OUT 22 R2 R3OUT 17 R3 R4OUT 11 R4 R5OUT EN 10 14 R5

5k 21 5k 18 5k 12 5k 9 5k R5IN R4IN R3IN R2IN

R1 R2OUT 13 R2 R3OUT 3 R3 R4OUT 39 R4 R5OUT 36 42 R5 18

5k 10 5k 4 5k 40 5k 35 5k 43 R5IN SD R4IN R3IN R2IN

3 EN

NOTE: For V+ > 11V, use C1 0.1F. HIN241 (28 SOIC, SSOP) TOP VIEW
T3OUT 1 T1OUT 2 T2OUT 3 R2IN 4 R2OUT 5 T2IN 6 T1IN 7 R1OUT 8 R1IN 9 GND 10 VCC 11 C1+ 12 V+ 13 C1- 14 28 T4OUT 27 R3IN 26 R3OUT 25 SD 24 EN 23 R4IN 22 R4OUT 21 T4IN 20 T3IN 19 R5OUT 18 R5IN 17 V16 C215 C2+

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Pinouts


(Continued)

+5V 11 12 VCC C1+ + +5V TO 10V 14 C1- VOLTAGE DOUBLER 15 C2+ + +10V TO -10V 16 VOLTAGE INVERTER C2+5V 400k 7 6 +5V 400k +5V 400k +5V 400k T1 T2 13 + 1 F

1 F

V+

1 F

V- 17 + 1 F 2 T1OUT T2OUT T3OUT T4OUT R1IN

T1IN T2IN T3IN T4IN R1OUT

20

T3

21 8

T4

28 9

R1 R2OUT 5 R2 R3OUT 26 R3 R4OUT 22 R4 R5OUT EN 19 24 R5

5k 4 5k 27 5k 23 5k 18 5k 25 R5IN SD R4IN R3IN R2IN

10

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241


Absolute Maximum Ratings
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V V+ to Ground (Note 2. . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 13.2V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V) V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V Input Voltages TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < VIN < (V+ +0.3V) RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VTXOUT < (V+ +0.3V) ROUT . . . . . . . . . . . . . . . . . (GND -0.3V) < VRXOUT < (V+ +0.3V) Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous

Thermal Information
Thermal Resistance (Typical, Note 3) 16 Ld PDIP Package* JC (C/W) 90

24 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 70 16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 100 24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 95 44 Ld MQFP Package . . . . . . . . . . . . . . . . . . . . . . . 80 Maximum Junction Temperature (Plastic Package) . . . . . . . +150C Maximum Storage Temperature Range . . . . . . . . . .-65C to +150C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.

Operating Conditions
Temperature Range HIN2xxcx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C HIN2xxIx. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.

NOTE: 2. Only HIN239. For V+ > 11V, C1 must be 0.1F. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

Electrical Specifications
PARAMETER SUPPLY CURRENTS Power Supply Current, ICC

Test Conditions: VCC = +5V 10%, TA = Operating Temperature Range TEST CONDITIONS MIN (Note 5) TYP MAX (Note 5) UNITS

No Load, TA = +25C

HIN232 HIN236-HIN238, HIN240-HIN241 HIN239

5 7 0.4 5.0 1

10 15 1 15 10

mA mA mA mA A

V+ Power Supply Current, ICC No Load, TA = +25C Shutdown Supply Current, ICC(SD)

No Load, TA = +25C TA = +25C

HIN239

LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS Input Logic Low, VlL Input Logic High, VlH TIN, EN, Shutdown TIN EN, Shutdown Transmitter Input Pull-up Current, IP TTL/CMOS Receiver Output Voltage Low, VOL TTL/CMOS Receiver Output Voltage High, VOH RECEIVER INPUTS RS-232 Input Voltage Range VIN Receiver Input Impedance RIN Receiver Input Low Threshold, VlN (H-L) Receiver Input High Threshold, VIN (L-H) Receiver Input Hysteresis VHYST VIN = 3V VCC = 5V, TA = +25C VCC = 5V, TA = +25C -30 3.0 0.8 0.2 5.0 1.2 1.7 0.5 +30 7.0 2.4 1.0 V k V V V TIN = 0V IOUT = 1.6mA IOUT = -1.0mA 2.0 2.4 3.5 15 0.1 4.6 0.8 200 0.4 V V V A V V

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241


Electrical Specifications
PARAMETER TIMING CHARACTERISTICS Baud Rate (1 Transmitter Switching) Output Enable Time, tEN Output Disable Time, tDIS Propagation Delay, tPD Instantaneous Slew Rate SR Transition Region Slew Rate, SRT TRANSMITTER OUTPUTS Output Voltage Swing, TOUT Output Resistance, TOUT RS-232 Output Short Circuit Current, ISC NOTE: 4. Limits established by characterization and are not production tested. 5. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Transmitter Outputs, 3k to Ground VCC = V+ = V- = 0V, VOUT = 2V TOUT shorted to GND 5 300 9 10 10 V mA RL = 3k HIN236, HIN239, HIN240, HIN241 HIN236, HIN239, HIN240, HIN241 RS-232 to TTL CL = 10pF, RL = 3k, TA = +25C (Note 4) RL = 3k, CL = 2500pF Measured from +3V to -3V or -3V to +3V, 1 Transmitter Switching 120 400 250 0.5 3 30 kbps ns ns s V/s V/s Test Conditions: VCC = +5V 10%, TA = Operating Temperature Range (Continued) TEST CONDITIONS MIN (Note 5) TYP MAX (Note 5) UNITS

VOLTAGE DOUBLER S1 VCC + GND S3 C1C1 S4 + C3 VCC GND S7 C1+ S2 V+ = 2VCC S5

VOLTAGE INVERTER C2+ S6 GND + C2C2 + S8 C4 V- = -(V+)

RC OSCILLATOR

FIGURE 1. CHARGE PUMP

Detailed Description
The HIN232 thru HIN241 family of RS-232 transmitters/receivers are powered by a single +5V power supply (except HIN239), feature low power consumption, and meet all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, transmitter, and receiver.

Charge Pump
An equivalent circuit of the charge pump is illustrated in Figure 1. The charge pump contains two sections: the voltage doubler and the voltage inverter. Each section is driven by a two-phase, internally generated clock to generate +10V and -10V. The nominal clock frequency is 16kHz. During phase one of the clock, capacitor C1 is charged to VCC . During phase two, the voltage on C1 is added to VCC , producing a signal across C3 equal to twice VCC . During phase one, C2 is also charged to 2VCC , and then during phase two, it is 10

inverted with respect to ground to produce a signal across C4 equal to -2VCC . The charge pump accepts input voltages up to 5.5V. The output impedance of the voltage doubler section (V+) is approximately 200, and the output impedance of the voltage inverter section (V-) is approximately 450. A typical application uses 1F capacitors for C1-C4, however, the value is not critical. Increasing the values of C1 and C2 will lower the output impedance of the voltage doubler and inverter, increasing the values of the reservoir capacitors, C3 and C4, lowers the ripple on the V+ and V- supplies. During shutdown mode (HIN236, HIN240 and HIN241), SHUTDOWN control line set to logic 1, the charge pump is turned off, V+ is pulled down to VCC , V- is pulled up to GND, and the supply current is reduced to less than 10A. The transmitter outputs are disabled and the receiver outputs are placed in the high impedance state.

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241


Transmitters
The transmitters are TTL/CMOS compatible inverters which translate the inputs to RS-232 outputs. The input logic threshold is about 26% of VCC , or 1.3V for VCC = 5V. A logic 1 at the input results in a voltage of between -5V and V- at the output, and a logic 0 results in a voltage between +5V and (V+ -0.6V). Each transmitter input has an internal 400k pullup resistor so any unused input can be left unconnected and its output remains in its low state. The output voltage swing meets the RS-232C specifications of 5V minimum with the worst case conditions of: all transmitters driving 3k minimum load impedance, VCC = 4.5V, and maximum allowable operating temperature. The transmitters have an internally limited output slew rate which is less than 30V/s. The outputs are short circuit protected and can be shorted to ground indefinitely. The powered down output impedance is a minimum of 300 with 2V applied to the outputs and VCC = 0V.
V+ VCC 400k TXIN GND < TXIN < VCC V300 TOUT V- < VTOUT < V+ VCC RXIN -30V < RXIN < +30V GND 5k ROUT GND < VROUT < VCC

Receivers
The receiver inputs accept up to 30V while presenting the required 3k to 7k input impedance even if the power is off (VCC = 0V). The receivers have a typical input threshold of 1.3V which is within the 3V limits, known as the transition region, of the RS-232 specifications. The receiver output is 0V to VCC . The output will be low whenever the input is greater than 2.4V and high whenever the input is floating or driven between +0.8V and -30V. The receivers feature 0.5V hysteresis to improve noise rejection. The receiver Enable line EN, when set to logic 1, (HIN236, HIN239, HIN240, and HIN241) disables the receiver outputs, placing them in the high impedance mode. The receiver outputs are also placed in the high impedance state when in shutdown mode.

FIGURE 2. TRANSMITTER

FIGURE 3. RECEIVER

TIN OR RIN TOUT OR ROUT VOL VOL tPHL tPLH

AVERAGE PROPAGATION DELAY =

tPHL + tPLH 2

FIGURE 4. PROPAGATION DELAY DEFINITION

11

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Typical Performance Curves

12 SUPPLY VOLTAGE (|V|) V- SUPPLY VOLTAGE 1F 10 0.47F 8 6 4 2 0 3.0 0.10F

12 10 8 6 4 2 0 3.5 4.0 4.5 VCC 5.0 5.5 6.0 0

TA = +25C TRANSMITTER OUTPUTS OPEN CIRCUIT

V+ (VCC = 5V) V+ (VCC = 4.5V) V- (VCC = 4.5V) V- (VCC = 5V)

10

15

20

25

30

35

|ILOAD| (mA)

FIGURE 5. V- SUPPLY VOLTAGE vs VCC , VARYING CAPACITORS

FIGURE 6. V+, V- OUTPUT VOLTAGE vs LOAD (HIN232)

Test Circuits (HIN232)


+4.5V TO +5.5V INPUT 1F C3 1F C1 +

+ 1 C1+ 2 V+ 3 C14 C2+ 5 C2VCC 16 GND 15 T1OUT 14 R1IN 13 R1OUT 12 T1IN 11 T2IN 10 R2OUT 9 3k T1 OUTPUT RS-232 30V INPUT TTL/CMOS OUTPUT TTL/CMOS INPUT TTL/CMOS INPUT TTL/CMOS OUTPUT

1 C1+ 2 V+ 3 C14 C2+ 5 C26 V7 T2OUT 8 R2IN

VCC 16 GND 15 T1OUT 14 R1IN 13 R1OUT 12 T1IN 11 T2IN 10 R2OUT 9

1F + C2 1F C4

3k

T2 OUTPUT RS-232 30V INPUT

FIGURE 7. GENERAL TEST CIRCUIT

6 V7 T2OUT 8 R2IN

ROUT = VIN/1 T2OUT T1OUT VIN = 2V A

FIGURE 8. POWER-OFF SOURCE RESISTANCE CONFIGURATION

12

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Applications


The HIN2xx may be used for all RS-232 data terminal and communication links. It is particularly useful in applications where 12V power supplies are not available for conventional RS-232 interface circuits. The applications presented represent typical interface configurations. A simple duplex RS-232 port with CTS/RTS handshaking is illustrated in Figure 9. Fixed output signals such as DTR (data terminal ready) and DSRS (data signaling rate select) is generated by driving them through a 5k resistor connected to V+. In applications requiring four RS-232 inputs and outputs (Figure 10), note that each circuit requires two charge pump capacitors (C1 and C2) but can share common reservoir capacitors (C3 and C4). The benefit of sharing common reservoir capacitors is the elimination of two capacitors and the reduction of the charge pump source impedance which effectively increases the output swing of the transmitters.
+5V

+ 1 16 2 3 HIN232 4 6 DTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT RS-232 INPUTS AND OUTPUTS TD (2) TRANSMIT DATA RTS (4) REQUEST TO SEND RD (3) RECEIVE DATA CTS (5) CLEAR TO SEND SIGNAL GROUND (7)

C1 + 1F C2 + 1F TD

5 11 10 T1 T2 14 7 13 R1 8

TTL/CMOS RTS INPUTS AND 12 RD OUTPUTS R2 9 CTS 15

FIGURE 9. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING

1 C1 + 1F TD TTL/CMOS INPUTS AND OUTPUTS RTS RD CTS 9 R2 R1 3 11 10 12 HIN232 T1 T2

4 5 14 7 13 8 15 16

+ C2 1F TD (2) TRANSMIT DATA RTS (4) REQUEST TO SEND RD (3) RECEIVE DATA CTS (5) CLEAR TO SEND

V- V+ 6 2 16 HIN232 1 4 5 T1 T2 14 7 13 R2 R1 8

C4

C3

+5V RS-232 INPUTS AND OUTPUTS

2F

2F

C1 + 1F DTR TTL/CMOS INPUTS AND OUTPUTS DSRS DCD R1

3 11 10 12 9

+ C2 1F DTR (20) DATA TERMINAL READY DSRS (24) DATA SIGNALING RATE SELECT DCD (8) DATA CARRIER DETECT R1 (22) RING INDICATOR SIGNAL GROUND (7)

15

FIGURE 10. COMBINING TWO HIN232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS

13

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Die Characteristics


SUBSTRATE POTENTIAL V+ TRANSISTOR COUNT 238

Metallization Mask Layout


HIN240
T2OUT T1OUT R2IN T3OUT T4OUT R3IN R3OUT T5IN

SHUTDOWN

R2OUT EN T2IN T1IN R1OUT T5OUT R4IN

R1IN

R4OUT T4IN T3IN R5OUT

GND

VCC

R5IN

C1+

V+

C1-

C2+

C2-

V-

14

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 1 2 3 N/2 -B-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A2 L A C L E

E16.3 (JEDEC MS-001-BB ISSUE D)


16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL A A1 MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240 MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280 MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93

-C-

A2 B B1 C D D1 E E1 e eA eB L N

eA eC
C

C A B S

eB

NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).

0.100 BSC 0.300 BSC 0.115 16 0.430 0.150

2.54 BSC 7.62 BSC 2.93 16 10.92 3.81

15

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 1 2 3 N/2 -B-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1 A2 L A C L E

E24.3 (JEDEC MS-001-AF ISSUE D)


24 LEAD NARROW BODY DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 eA eC
C

MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 31.24 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 32.51 8.25 7.11 NOTES 4 4 8 5 5 6 5 6 7 4 9 Rev. 0 12/93

MIN 0.015 0.115 0.014 0.045 0.008 1.230 0.005 0.300 0.240

MAX 0.210 0.195 0.022 0.070 0.014 1.280 0.325 0.280

-C-

B B1 C D D1 E E1 e eA eB L N

C A B S

eB

NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).

0.100 BSC 0.300 BSC 0.115 24 0.430 0.150 -

2.54 BSC 7.62 BSC 10.92 3.81 24 2.93

16

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45 H 0.25(0.010) M B M

M16.3 (JEDEC MS-013-AA ISSUE C)


16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L

MILLIMETERS MIN 2.35 0.10 0.33 0.23 10.10 7.40 MAX 2.65 0.30 0.51 0.32 10.50 7.60 NOTES 9 3 4 5 6 7 8 Rev. 1 6/05

MIN 0.0926 0.0040 0.013 0.0091 0.3977 0.2914

MAX 0.1043 0.0118 0.0200 0.0125 0.4133 0.2992

A1 B C D E

A1 0.10(0.004) C

e H h L N

0.050 BSC 0.394 0.010 0.016 16 0 8 0.419 0.029 0.050

1.27 BSC 10.00 0.25 0.40 16 0 10.65 0.75 1.27

e
B 0.25(0.010) M C A M B S

NOTES: 1. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. L is the length of terminal for soldering to a substrate. 7. N is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width B, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.

17

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45 H 0.25(0.010) M B M

M24.3 (JEDEC MS-013-AD ISSUE C)


24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L

MILLIMETERS MIN 2.35 0.10 0.33 0.23 15.20 7.40 MAX 2.65 0.30 0.51 0.32 15.60 7.60 NOTES 9 3 4 5 6 7 8 Rev. 1 4/06

MIN 0.0926 0.0040 0.013 0.0091 0.5985 0.2914

MAX 0.1043 0.0118 0.020 0.0125 0.6141 0.2992

A1 B C D E

A1 0.10(0.004) C

e H h L N

0.05 BSC 0.394 0.010 0.016 24 0 8 0.419 0.029 0.050

1.27 BSC 10.00 0.25 0.40 24 0 10.65 0.75 1.27

e
B 0.25(0.010) M C A M B S

NOTES: 1. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. L is the length of terminal for soldering to a substrate. 7. N is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width B, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.

18

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M B M

M28.3 (JEDEC MS-013-AE ISSUE C)


28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1
L

MILLIMETERS MIN 2.35 0.10 0.33 0.23 17.70 7.40 10.00 0.25 0.40 28 0o MAX 2.65 0.30 0.51 0.32 18.10 7.60 10.65 0.75 1.27 8o NOTES 9 3 4 5 6 7 Rev. 0 12/93

MIN 0.0926 0.0040 0.013 0.0091 0.6969 0.2914 0.394 0.01 0.016 28 0o

MAX 0.1043 0.0118 0.0200 0.0125 0.7125 0.2992 0.419 0.029 0.050 8o

B C D E


A1 0.10(0.004) C

e H h L N

0.05 BSC

1.27 BSC

e
B 0.25(0.010) M C A M B S

NOTES: 1. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. L is the length of terminal for soldering to a substrate. 7. N is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width B, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.

19

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Shrink Small Outline Plastic Packages (SSOP)
N INDEX AREA E -B1 2 3 L SEATING PLANE -AD -CA 0.25 0.010 GAUGE PLANE H 0.25(0.010) M B M

M28.209 (JEDEC MO-150-AH ISSUE B)


28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 B C D MIN 0.002 0.065 0.009 0.004 0.390 0.197 MAX 0.078 0.072 0.014 0.009 0.413 0.220 MILLIMETERS MIN 0.05 1.65 0.22 0.09 9.90 5.00 MAX 2.00 1.85 0.38 0.25 10.50 5.60 NOTES 9 3 4 6 7 8 Rev. 2 6/05

A1 0.10(0.004) A2 C

E e H L N

e
B 0.25(0.010) M C A M B S

0.026 BSC 0.292 0.022 28 0 8 0.322 0.037

0.65 BSC 7.40 0.55 28 0 8.20 0.95

NOTES: 1. Symbols are defined in the MO Series Symbol List in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension E does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. L is the length of terminal for soldering to a substrate. 7. N is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension B does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of B dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.

20

FN3138.16 September 26, 2008

HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 Metric Plastic Quad Flatpack Packages (MQFP)
D D1 -D-

Q44.10x10 (JEDEC MS-022AB ISSUE B) 44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE
INCHES SYMBOL A A1 MIN 0.004 0.077 0.012 0.012 0.515 0.389 0.516 0.390 0.029 44 0.032 BSC MAX 0.096 0.010 0.083 0.018 0.016 0.524 0.399 0.523 0.398 0.040 MILLIMETERS MIN 0.10 1.95 0.30 0.30 13.08 9.88 13.10 9.90 0.73 44 0.80 BSC MAX 2.45 0.25 2.10 0.45 0.40 13.32 10.12 13.30 10.10 1.03 NOTES 6 3 4, 5 3 4, 5 7 Rev. 2 4/99 NOTES: 1. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 2. All dimensions and tolerances per ANSI Y14.5M-1982. 3. Dimensions D and E to be determined at seating plane -C- . 4. Dimensions D1 and E1 to be determined at datum plane -H- . 5. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm (0.010 inch) per side. 6. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total. 7. N is the number of terminal positions.
0.13/0.23 0.005/0.009

-AE E1

-B-

A2 b b1 D D1 E

e
PIN 1 SEATING A PLANE 0.076 0.003 12o-16o 0.40 0.016 MIN 0o MIN 0o-7o A2 A1 0.20 M 0.008 C A-B S -CD S b b1 0.13/0.17 0.005/0.007 BASE METAL WITH PLATING

E1 L N e

-H-

12o-16o

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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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FN3138.16 September 26, 2008