Research of Crosstalk Reduction between Microstri

p
Lines Based on High-S
p
eed PCBs
Huan-Huan Li
#!
,Chen-Jiang GUO
#2
, Yu Zhang
#3
College o
f
Electronic in
f
or
m
ation, Northwester Poly technical Universit, Xi/an Shaani, 710129, China
'huanzi789@126.com
'
cjguo@nwpu.edu.cn
3qingkongtian2618@163.com
b5lr0Cl A new routing method is proposed to reduce the
peak far-end crosstalk voltage and the crosstalk induced timing
jitter of parallel microstrip lines on printed circuit boards. The
stub uniformly distributed along one of parallel double
microstrip lines in the proposed routing method increase the
mutual capacitance without much changing the mutual
inductance between the aggressor and victim lines. This reduces
the diference between the capacitive and inductive couplings
and hence the far-end crosstalk. The structure of parallel
double microstrip lines is treated as a symmetrical network
with 4 ports, simulation on the b parameters is processed.
Comparison with the no guard, the serpentine guard, and the
via-stitch guard shows the proposed routing method gives the
smallest values in the peak far-end crosstalk voltage and has a
relatively simpler structure.
Ndm 0rm microstrip lines; printed cicuit boards; far-end
crosstalk; near-end crosstalk;
I. INTRODUCTION
As modem technology progress, the design of digital
devices and chip packages tends toward high-speed, high
density, and low-voltage operation. This makes the
interconnection of multiple traces within a printed circuited
boad (PCB) and among chips much difcult. Since high
speed operations will cause more noise of the side effect,
poor designs of interconnection traces ad the coupling
effect of multiple traces afect signal integrity (SI). SI is a
critical factor in the design of a high-speed PCB. Crosstalk is
one noise source in PCBs and is of particular concer in
high-density and high-speed circuits, is one major source of
noise to interfere with SI. Moreover, since crosstalk occus
due to the coupling efects of the mutual capacitance and
inductance of two adjacent traces when trasient signals in
one trasfer energy to the other, then, this ca disrupt noral
sigal operation. Nowadays, attention has increasingly
focused on the SI design and layout within ad PCBs.
Microstrip lines, which is typically used for paallel links
on PCB, cause near-end crosstalk NEXT) and far-end
crosstalk (FEXT) by electromagnetic coupling. In a parallel
terminated interface, the FEXT is more problematic than
NEXT since it seriously afects the signal integrity at the
receiver side. This far-end crosstalk voltage reduces the eye
opening and eventually decreases the maximum data rate that
can be transmitted through te microstrip lines. The far-end
crosstalk voltage is induced by the diference between the
capacitive and inductive coupling ratios of two microstrip
978-1-4244-6908-6/10/$26.00 2010 IEEE
991
lines. The capacitive coupling ratio C
m
/ C

of te two
microstrip lines is slightly smaller than the inductive
coupling ratio L /L , because the dielectric constant of

surrounding air is smaller than tat of the PCB dielectric
material. C , CT ' L and L represent the mutual
m m
s
capacitance, the sum of self capacitance and mutual
capacitance, the mutual inductance and the self inductance
per unit length, respectively.
The crosstalk noise can be reduced by increasing the
spacing, decreasing dielectric thickness, using differential
signaling, minimizing paallel D length, etc., but affecting
the system cost as tradeoffs. To reduce the far-end crosstalk
in the microstrip lines, the extra dielectric material can be
deposited over the microstrip lines [1]. However, this extra
material deposition is a cost-adding process. To reduce the
far-end crosstalk, a guard tace can be placed between te
two signal lines. However, te guard trace ted out to be
not effective. Also, the via-stitch guad was proposed, where
ground vias were placed uniformly on the guard trace [2].
This via-stitch guard imposes the restriction on te PCB
backside routing due to via holes. A serpentine guard trace
was proposed to reduce the far-end crosstalk by about 40%
[3], but NEXT becomes larger and some extra space is
needed for fabrication, which seems not attractive in dense
interconnects. Stub-alterated microstrip lines were proposed
to eliminate the far-end crosstalk almost completely [4],
where te vertical stubs ae attached alterately to the
parallel microstrip lines. In this work, a new routing method
is proposed, which eliminates far-end crosstalk more
effectively tha any routing method mentioned above ad
has a relatively simpler structure.
II. THEORETICA AAYSIS
Crosstalk occurs due to the coupling efects caused by the
mutual capacitance (C ) and mutual inductance (L ) of
m m
the victim and aggressor, driven by the transient signals in
the aggressor. A isolated transmission line can be modelled
by the uniforly distributed self capacitance (C
s
) and self
inductance (L ).A pair of coupled trasmission lines can be
s
modelled by the uniforly distributed mutual capacitance
( C
m
) and mutual inductance (L
m
) in addition to the self
capacitance (C ) and the self inductace (L ), as shown in
s
s
Fig.l. In the coupled transmission lines, the active
transmission line to which the signal is applied is called the
aggressor line and the passive transmission line to which no
signal is applied is called the victim line. The far-end
crosstalk voltage is the voltage induced at te receiving end
of the victim line. The far-end crosstalk voltage waveform in
the lossless case can be represented by (1) [5]
V ( )
_
1
(
C
m L
)
T
V d1
n
{t-
T
D)
f
x
t
t - *"^ ^
2 C
T
LS dt
(1)
where TD is the propagation time through the transmission
line,
f
n
(t) is the applied voltage at the aggressor line.
Because the inductive coupling L /L is larger than the m
s
capacitive coupling C
m
/ CT in the microstrip line with one
side exposed to air, V
f
e
x
t
(t) has the negative pulse at the
rising edge of
f
n
(t) .
Ls
..
--]OO
lH
I
es
\
m

O 1 O
I
es
Fig. I Model of a section coupled transmission line
In this letter, a new routing method is proposed to
eliminate FEXT by increasing Cm / CT with little change in
Lm / L
s
.Fig.2 shows structure model of the proposed
routing method. Stubs are uniformly distributed along one of
parallel double trasmission lines. Te length of the unit
structure is g and the length of each stub is p. Te width of
each stub is equal to that of microstrip line for preventing
refection.
The increase in electric feld aound edges of the stubs
induces larger capacitive coupling, while the inductive
coupling is affected little since the stubs are perpendicular to
the curent fow. Te increase in the self and the mutual
capacitances due to the addition of the stubs also
increases C , but the ratio C / C
T
increases frther and
s
m
can be eventually equal to L m / L
s
' resulting in zero FEXT.
However, NEXT increases a little due to increase of the
coupling ratio C m / C T .If te propagation delay through the
99b
unit stucture with the length of g is suffciently small
compared with the signal transition time, structure
uniformity is valid and the line with alterated stubs can be
regarded as a trasmission line.
AO

Fig. 2 The proposed routing method

III. SIMLATION AND VERIFICATION
. Si
m
ulation Models
Fig. 3 shows the cross-sectional view ad top view of
paallel double microstrip lines on PCB. Tey are placed on
FR4 PCB with the dielectic thickness of O.2mm (8mil). The
width of each microstrip line is 0.36mm (14mil), which
characteristic impedace is 500hms. Te thickness of copper
is negligible. The tickness of reference ground is O.036mm
(1.4mil). Te spacing between the aggressor line ad the
victim line is 1.07mm (42mil) that is three times the
microstip line width. When tasient signal is applied to port
naed pI as shown fg.3 (b), there will generate nea-end
crosstalk and far-end crosstalk respectively in ports named p2
and p4. Therefore, S(2,1) ad S(4,1) of scattering parameters
can represent the crosstalk strength of NEXT and FEXT.
4
||+
`r =
1usl,
l:re
+!
(a)
\1t1n l!re
(b)
4
ruaa1
l.4
Fig. 3 Paallel double microstrip lines on PCB (a) cross-sectional view (b)
top view
Fig.4(a)-c) shows simulation models of a pair of
microstrip lines, a serpentine guard and a via-stitch guard
added between the two microstrip lines. The spacing between
the aggressor and victim lines are maintained to be the same
value of 1.07mm (42mil) for fair comparison. The distance x
and y is respectively O.15mm (6mil) and O.76mm (30mil)
therein. The width of the serpentine guad is O.15mm (6mil),
which characteristic impedance is 800hms. For preventing
refection, each port of all above mentioned models is
matched.

(a)
L
(b)
C
0 0 0 0 0


(c)
Fig. 4 Simulation models (a) no guard (b) serpentine guard (c) via-stitch
guard
B. Si
m
ulation Res ults and Verication
I High Frequency Structure Simulator (HSS), all
simulation models of fg.2 ad fgA ae established. Trough
multiple optimizations, the optimum results ca be foud on
the condition that te length of horizontal section in
serentine guad is 2.54mm (100mil), d the length of sb
and te unit structure is 0.89mm (35mIl) ad 2mm (80mIl)
respectively in the proposed routing method. If te disace
between the adjacent vias is not shorter tha ,/2 of the sIgnal
in via-stitch guad, resonace will occur at some fequencies
in noise voltage of FEXT [3], which should be avoided.
3.8mm (l50mil) is considered as the best spacing between
adjacent vias.
Fig.5 shows te optimum simulation results of FEXT
.
ad
NEXT in the above mentioned diferent cases. Table I gIves
the maximum values of FEXT ad NEXT in coresponding
cases.
From the simulation results, comparing with no guard, the
via-stitch guard reduces both FEXT and NEXT, but not
signifcatly; the serpentine guard trace ca reduce FEXT by
more than 40%, but NEXT becomes larger in some
fequency, in addition, some extra space is needed for
fabrication; the proposed routing method reduces FEXT
under -45 dB, that is it can eliminate FEXT almost
completely, with a small increase in NEXT. In comparison
with oter methods, the effect of the new proposed routing
method to suppress FEXT is prominent especially in high
fequency. Because FEXT is more problematic than NEXT,
the proposed routing method is prefered in high-speed ad
high-density PCBs.
99b
-20
.30
-40

.50

~
> -60

.70
-80
.@0
-100
-110
-30
-40
-50

-60
>
.70

-80
.@0
.100
serpentine guard
via-stitch guard
-proposed routing method
no guard
frequency(GHz)
(a)
serpentine guard
via-stitch guard
proposed rouling method
no!'ard
5 6
frequency(GHz)
(b)
10
10
Fig. 5 Optimum simulation results in different cases (a) FEXT (b) NEXT
1ABIE I
MIMAINAIUESOFFEXT ANDNEXT INOIFFERENTLASES
Mu Va-llch bcrpcnlnc Frupucd
Uuard Uuard Uuard Huulng
Mclhud
FEXT -21.48 -24.93 -30.48 -45.04
(dB)
NEXT -35.51 -38.73 -37.16 -30.07
(dB)
IV. CONCLUSIONS
In tis paper, a new routing method is proposed to reduce
the peak far-end crosstalk voltage of parallel microstrip lines
on printed circuit boads. Comparison with the no guard, te
serentine guard, and te via-stitch guard shows the
proposed routing method gives the smallest values in the
peak far-end crosstalk voltage and has a relatively simpler
structure. Te proposed routing method can be usefl for
large high-speed ad high-density digital electronic
equipment.
ACKNOWLEDGMNT
Thanks for my tutor P. Guo to give me some good
suggestions for writing this paper. Also, to discuss with my
classmate Zhang Limin was ver helpfl for me.
REFERENCES
[I] Yung-Shou Cheng, Wei-Da Guo, Chih-Pin Hung, et all, "Enhanced
microstrip guad trace for ringing noise suppression using a dielectric
superstrae", IEEE trans. adanced packaging, VoI.32,No.4 ,pp.I-7,
2010.
[2] Li Zhi, Wang Qiang, Shi Chagsheng, "Application of guard traces
with vias in the K PCB layout", in the 3rd interational symposium
on electromagnetic compatibility, Beijing, 2002,pp.771- 774.
991
[3] Kyoungho Lee, Hyun-Bae Lee, Hae-Kang lung, et all, "Serpentine
guard trace to reduce far-end crosstalk ad even-odd mode velocity
mismatch of micros trip lines by more tha 40%",in Proc.of the 57th
IEEE electronic components and technolog conference, Reno,
NV.,USA,2007,pp.329-332.
[4] S.-K. Lee, K. Lee, H.-J. Pak and J.-Y. Sim,"FEXT-eliminated stub
alternated microstrip line for multi-gigabitsecond parallel links",
Electronics letters, VoI.44,No.4,pp.272-273,2008.
[5] Kyoungho Lee, Hyun-Bae Lee,Hae-Kang lung, etc all, "A serpentine
guad trace to reduce the far-end crosstalk voltage and the crosstalk
induced timing jitter of paallel microstrip lines", IEEE trans.
advanced packging, Vol.3l,No.4,pp. 809- 812, 2008.