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Implementation of Binary to Floating Point Converter using HDL AIM: The main aim of the project is to design Implementation

of Binary to Floating Point Converter using HDL. AB !"AC!: Computation with floating point arithmetic is an indispensable task in many VLSI applications and accounts for almost half of the scientific operation. Also adder is the core element of comple arithmetic circuits! in which inputs should be gi"en in standard I### $%& format. The main objecti"e of the work is to design and implement a binary to I### $%& floating point con"erter for representing '( bit single precision floating point "alues. The con"erter at the input side of the e isting floating point adder)subtractor module helps to impro"e the o"erall design. The modules are written using Very *igh Speed Integrated Circuit +V*SIC, *ardware -escription Language +V*-L,!and are then synthesi.ed for /ilin Virte # 012A using /ilin Integrated Software #n"ironment+IS#, design suite 34.3.

V.Mallikarjuna (Project manager)

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Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &

BL#C$ DIA%"AM:

0ig5 6lock -iagram of 6inary to 0loating 1oint Con"erter.

!##L : /ilin 7.(IS#! 8odelsim9.&c. APPLICA!I#& AD'A&!A%( : The demand for floating point arithmetic operations in most of the commercial! financial and internet based applications is increasing day by day. *ence it becomes essential to find out an option to feed binary numbers directly as input for these applications.
V.Mallikarjuna (Project manager) Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &

ISO: 9001- 2008 CERTIFIED COMPANY


Na'()r

"(F("(&C( : Charles 0arnum! :Compiler Support for 0loating;1oint Computation< Software 1ractices and # perience!< pp. $43;7 "ol. 3=. -. 2oldberg! :>hat e"ery computer scientist should know about floating; point Arithmetic!< pp. %;&= in AC8 Computing Sur"eys "ol.(';3. 2uillermo 8arcus! 1atricia *inojosa! Alfonso A"ila and ?uan @ola.co; 0lores : A 0ully Synthesi.able Single;1recision! 0loating 1oint Adder)Substractor and 8ultiplier in V*-L for 2eneral and #ducational Ase!< 1roceedings of the 0ifth I### International Caracas Conference on -e"ices! Circuits and Systems! -ominican Bepublic! @o".';%. I### Computer Society +37=%,! I### Standard for 6inary 0loating; 1oint Arithmetic! I### Std $%&. ?im *offC DA 0ull Custom *igh Speed 0loating 1oint AdderD 0ermi @ational Accelerator Lab.

V.Mallikarjuna (Project manager)

ISO: 9001- 2008 CERTIFIED COMPANY


Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &

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