ESc201:IntroductiontoElectronics

Diodes

Dr. K D K. V V. S Srivastava i t Dept. of Electrical Engineering IIT Kanpur

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Diode
Anode Cat ode Cathode

PN Junction Diode
P N

Inside a PN junction at equilibrium (zero applied voltage), there i b is built-in ilt i voltage lt with ith N region i b being i positive iti and dP P-region i negative.

+ + + + + +
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The built-in voltage (also called potential barrier) prevents electrons and holes to give rise to current.

Simplified Picture

Extrinsic Semiconductors Adding small amounts of suitable impurity atom can drastically alter number of electrons l t and dh holes l i in a semiconductor i d t !

Addition of a group V element impurity to Silicon should increase electrons while addition of group III element impurity should increase number of holes
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Doping

N and P-type Semiconductors

N-type :

n>p

A Semiconductor such as Silicon doped with a donor impurity such as Phosphorous or Arsenic from group V of periodic table. The donor impurity donates an electron to conduction band thereby increasing their concentration

P-type :

p>n

A Semiconductor such as Silicon doped with a Acceptor impurity such as Boron from g group p III of p periodic table. The acceptor p impurity p y increases number of holes in valence band.

No. of silicon atoms per unit volume

4 10
17

22

cm

Impurity concentration :

N A = 10 cm

1i in 400,000 400 000 Silicon Sili atoms t i is replaced l db by B Boron

Very small amounts of impurity atoms can cause a drastic change in electrical property of a semiconductor.

PN Junction Diode
P N

Inside a PN junction at equilibrium (zero applied voltage), there i b is built-in ilt i voltage lt with ith N region i b being i positive iti and dP P-region i negative.

+ + + + + +
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The built-in voltage (also called potential barrier) prevents electrons and holes to give rise to current.

Forward and Reverse Bias

P N

vd

Forward Bias: P is biased at a higher voltage compared to N. It lowers the built-in potential and allows current to flow.

P
V

vd
Reverse Bias: N is biased at a higher voltage compared to P. This increases built-in potential and very little current flows. 11

0 20 0.20 0.15 0.10

Diode : 1N4001

Current t (A)

0.05 0.00 -0.05 -0.10 -0.15 -0.20 -2.0 -1.5

Reverse Bias

Forward Bias

-1.0

-0.5

0.0

0.5

1.0

1.5

2.0

Voltage (V)

The p-n junction only conducts significant current in the forward-bias region.

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Breakdown

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Diode : I-V Characteristics

Vd

iD

= IS

vd {exp( ) n VT

1}

Is : Reverse Saturation Current id:diode current; vd: applied voltage

VT

= kT / q

26m V

at T

= 300K
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n is called ideality factor and is equal to 1 for ideal diodes

Forward Bias
P N

vd > > VT = 2 6 m V
vd

iD iD

= IS IS

vd {exp( ) VT vd exp( ) VT

1}

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Reverse Bias
P N

vd

iD

= IS

vd {exp( ) VT

1}

vd = vR
iD = IS vR {exp( ) VT 1} I S

vR > > VT
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17

18

Analysis using non-linear diode model is not easy

R VO = ?
I

VS = I R + VO (1)

VS

VO I = I S {exp( ) 1} (2 ) n VT

I VO = nVT ln( + 1) (3) IS

I VS = IR + nVT ln( + 1) (4) IS

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Iterative Method:

VS = IR + VO (1)
Ass me Assume Calculate Re-calculate Convergence:

I VO = nVT ln( + 1) (3) IS

VO = 0.6V 0 6V
VS VO I = R
VO = nVT ln(I IS + 1)

I I

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1K VO = ?

iD

V = I S {exp( ) 1} VT
15

2V

I S = 2 10

A 26m V at T = 300K
VO = 0.707 0 707

VT = k T / q

A Assume VO
VS VO I = R

VO = 0.5 05

VO = 0.711 0 711

I = 1.5 x 10-3 I = 1.289 x 10-3 I = 1.293 x 10-3 VO = 0.711 VO = 0.707 VO = 0.707

VO = nVT ln(I IS + 1)
CONVERGENCE
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1K VO = ?

iD = I S { e x p ( I S = 2 1 0 15 A VT = k T / q

V ) 1} VT at T = 300K

2V

26m V

A Assume VO
VS VO I = R

VO = 1.0 10

VO = 0.7 07

VO = 0.707 0 707

I = 1.0 x 10-3 VO = 0.7

I = 1.3 x 10-3 I = 1.293 x 10-3 VO = 0.707 VO = 0.707

VO = nVT ln(I IS + 1)
CONVERGENCE to the same Result
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Graphical Method: Method of Load Line

R VO
I VS/R

VS

solution

V S = I R + VO V S VO I = R
VS VO

VO I = I S {exp( ) 1} n VT
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H How about b t something thi that th t is i simple & easy to work with

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Role of simple model in design cycle

Simple Models

Design meets Specs.

DESIGN

I l Implement t

SIMULATE

Accurate but complex Models

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Analysis using a non-linear diode model is relatively difficult and time consuming. It also does not give a symbolic expression that can provide insight sg ta and d help e p in t the e des design g o of t the ec circuit. cu t Need SIMPLER and LINEAR Device Models

rf V > V V < V

open circuit
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Piece-Wise Linear Model

I 0 1 = rf V = V + I r f V V

Slope = 1/rf

V
rf

V
V > V V < V

V is called cut cut-in in or turn turn-on on voltage and depends on nature of diode and range of current considered For most of our analysis, we will take V = 0.7V and rf ~10 27

open circuit

Even Simpler Diode Models

rf V > V

V < V open circuit

V V

Constant voltage drop model

V V > V V < V open circuit

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Even Simpler Diode Models

Ideal diode model

V>0 V<0 open circuit

I

V=0 0
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Diode Models
iD
I + vd V

= IS

{exp(

vd ) VT

1}

rf V > V

Simplicity

V < V open circuit

V V > V V < V open circuit

Accuracy

V>0 V<0 open circuit

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Analysis using ideal diode model

1K
V>0 V<0

10V

open circuit

1K

10V

10 I= = 10mA 1k

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Analysis with a constant voltage diode model

1K
0 7V 0.7V V > 0.7 V<0 0.7 7

10V

D
1K

open circuit

10V

0.7V

10 0.7 I= = 9.3mA 1k

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Analysis with a constant voltage plus resistor diode model

1K

rf V > V

10V

V < V open circuit

10 0.7 I= = 9.208mA 1000 + 10

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Example
Find Fi d th the current t through the diode using g ideal diode model

10V

2mA

5K

5K

Is the diode forward biased? Not Sure!! Assume that it is forward biased Carry out analysis and then check if current through the diode is in appropriate direction. If not, diode is reverse biased and we carry out the analysis 34 again!!

Example Assume forward bias

5K

10V

2mA

5K

10V

10 2mA + + iD = 0 5K
iD

iD = 4 m A
Current is positive, so our assumption is correct 35

2mA

5K

Example

Find the current through the 5K resistor using ideal diode model
10V

A Assume f forward d bias bi

2mA
5K 4K

5K

10V

2mA

4K 5K

D
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5K

10V

2mA

4K 5K

iD

10 2m A + iD = 0 5K

iD = 4

mA

10V

This is not possible. possible Therefore, our assumption i incorrect is i t

4K 5K D
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2mA

5K

10V

2mA

4K 5K

5K

V1 V1 + 10 2mA A+ + =0 5k 5k V1 = 0 V2 = 10V
2mA

Assume reverse bias

10V

V1
5K 4K

V2
5K
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