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Current Control Strategy for Power Conditioners Using Sinusoidal Signal Integrators in Synchronous Reference Frame
Radu Iustin Bojoi, Giovanni Griva, Valeriu Bostan, Maurizio Guerriero, Francesco Farina, and Francesco Profumo, Senior Member, IEEE

AbstractIn this paper, a current control scheme, based on proportional-integral regulators using sinusoidal signal integrators (SSIs), is proposed for shunt type power conditioners. The aim is to simplify the implementation of SSI-based current harmonic compensation for industrial implementations where strict limitations on the harmonic distortion of the mains currents are required. To compensate current harmonics, the SSIs are implemented to operate both on positive and negative sequence signals. One regulator, for the fundamental current component, is implemented in the stationary reference frame. The other regulators, for the current harmonics, are all implemented in a synchronous reference frame rotating at the fundamental frequency. This allows the simultaneous compensation of two current harmonics with just one regulator, yielding a signicant reduction of the computational effort compared with other current control methods employing sinusoidal signal integrators implemented in stationary reference frame. A simple and robust voltage lter is also proposed by the authors to obtain a smooth and accurate position estimation of the voltage vector at the point of common coupling (PCC) under distorted mains voltages. The whole control algorithm has been implemented on a 16-b, xed-point digital signal processor (DSP) platform controlling a 20-kVA power conditioner prototype. The experimental results presented in this paper for inductive and capacitive loads show the validity of the proposed solutions. Index TermsDigital signal processor (DSP), shunt type power conditioner, sinusoidal signal integrators (SSIs).

Fig. 1. Basic current harmonic compensation scheme of a nonlinear load using a shunt APF.

I. INTRODUCTION

HE WIDE use of nonlinear loads, such as diode or thyristor front-end rectiers, cycloconverters, switching power supplies, etc., causes the injection of high amounts of current harmonics in todays distribution networks. These harmonics cause voltage distortion, depending on the line impedance, additional losses in transformers and in line capacitors, and malfunction of sensitive electronic equipment. For this reason, harmonic restriction standards, such as IEEE 519, have been recommended to limit the harmonic currents injected into the mains by nonlinear loads depending on their rated power and on the source impedance.
Manuscript received July 28, 2004; revised March 8, 2005. This paper was presented at the 35th IEEE Power Electronics Specialists Conference (PESC04). Recommended by Associate Editor V. Staudt. R. I. Bojoi, G. Griva, M. Guerriero, F. Farina, and F. Profumo are with the Dipartimento di Ingegneria Elettrica, Politecnico di Torino, Torino 10129, Italy (e-mail: giovanni.griva@polito.it). V. Bostan is with the Faculty of Electrotechnics, Politehnica University, Bucharest, Romania. Digital Object Identier 10.1109/TPEL.2005.857558

Shunt passive lters, often called harmonic trap lters, have traditionally been used to avoid the ow of the harmonic currents into the mains. These solutions are very simple, low cost, and with high efciency, but their performance strongly depends on the source impedance and can lead to unwanted parallel resonance with the network [1]. During the last decade, the cost reduction and the increased reliability of power electronics allowed an increased interest for active ltering. Among various power conditioner topologies, the shunt active power lter (APF) is considered as an effective solution for low to medium power applications to reduce the current harmonics to acceptable limits [1][4], featuring capabilities of compensating load unbalance and reactive currents as well [5], [6]. Active ltering is advantageous where a fast response to dynamic load changes is required. In addition, a digitally controlled APF represents a versatile power conditioning tool since the different compensation tasks can be modied by changing the software of the digital controller. The basic compensation scheme using a shunt APF to compensate the current harmonics generated by a nonlinear load is shown in Fig. 1. The APF is basically a three-phase inverter having only a large capacitor on its dc-link. The inverter is connected to the load at the point of common coupling (PCC) through an input inductor. To have sinusoidal currents from the mains, the APF must operate as a controlled current source generating the load (Fig. 1). For this reason, the inverter harmonic currents to will need an active fundamental current component

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keep its dc-link capacitor charged at a voltage higher than the peak line-to-line voltage. To guarantee good performance in current harmonics elimination, the key issues in APF control are the current reference generation and the current control strategy. Coming to the current control, the APF reference current is far from a sinusoidal signal and for this reason obtaining zero steady-state error is a challenging task. Furthermore, the APF and its current control must deal with very high slope variations values of of the current reference, corresponding to high the distorted load currents. The most general criterion to evaluate the performance of different current control schemes is the total harmonic distortion (THD) of the mains line current, together with its spectrum and including the ripple generated by the pulsewidth modulation (PWM) operation of the APF [7]. The use of nonlinear regulators, such as hysteresis controllers [7], gives a robust and simple solution having as major drawback a variable switching frequency. For this reason, the APF input lter is more difcult to design to avoid unwanted resonance effects on the utility grid. A constant switching frequency can be achieved by using the dead-beat control techniques, which exploit the advantages of digital control. These solutions have been implemented with good results either in stationary reference frame [7] or in synchronous reference frame [8]. The main drawback of these methods is related to the accuracy of the system parameters. In addition, the inverter nonlinear operation, due to the dead-time effects, must be taken into account. To overcome these aspects, a custom-mixed analog and digital current control solution based on a predictive regulator with charge error control has been presented in [9]. Combined with an analog PWM modulator, this solution allows a high sampling frequency and consequently high current bandwidth. For some nonlinear loads, such as front-end rectiers, the (Fig. 1) harmonic spectrum of the distortion current drawn by the load consists of a sum of well-known harmonics of different sequence [6]. Based on this feature, a frequency selective compensation algorithm has been presented in [6] and [10]. This method identies preselected undesired harmonic currents, which are independently compensated using Integral ( ) regulators implemented in multiple synchronous reference frames , where is the mains frequency and is the rotating at harmonic order. Another frequency-selective based controller scheme has been discussed in [11], where integral regulators have been implemented in multiple direct and inverse synchronous 1,2, . reference frames rotating at 6 To eliminate the need of multiple reference frames, a new current control technique using the concept of stationary frame generalized integrators has been introduced in [12]. This current control technique is based on the sinusoidal signal integrator (SSI), which guarantees that the actual current tracks its sinusoidal reference (with zero steady-state error) and is tuned on a specied frequency. Using the concept of frequency-selective compensation, the current control scheme uses multiple SSIs in stationary reference frame, tuned on selected current harmonics 1 1,2, [12]. This means that many SSIs of order 6 might be necessary to reach the required THD performance, making digital implementations computationally heavier compared with other frequency-selective techniques.

Starting from the mentioned property of the SSI of being able to operate with both positive sequence and negative sequence signals, in this paper a current control scheme is proposed, with the following key features. For the fundamental current component, a proportional-SSI (P-SSI) regulator is tuned on the fundamental , and it is implemented in the stationary frequency, reference frame. 1, 2, , For each couple of harmonics at 6 1 , and a single SSI regulator is tuned at the frequency 6 it is implemented in a synchronous reference frame rotating at ; in such reference frame, the two harmonics 1 can be considered as a positive sequence at 6 . signal and a negative sequence signal at 6 The main advantages of the proposed current control scheme are: 1 are compensated with just both harmonics at 6 one regulator; it allows to halve the number of SSIs needed, compared with the solutions using an SSI for each harmonic [12]; good transient performance and better response time to load variations compared with frequency-selective current control methods using multiple reference frames. The reference current generation is performed in a synchronous reference frame aligned with the PCC voltage vector [13], [14]. To solve the problems given by distorted voltage at PCC, the paper also presents a simple and robust PCC voltage position estimation scheme. II. PROPORTIONAL-SINUSOIDAL SIGNAL INTEGRATOR The main goal of a P-SSI is to obtain zero steady-state error for sinusoidal inputs with a specied frequency . In the continuous-time domain, the transfer function of a P-SSI is given by [12] (1) where is the proportional gain, is the integral gain, and is the resonance frequency of the SSI. The employment of P-SSI regulators, compared with other solutions, gives the following advantages. Zero steady-state error for signals having the same fre; this feature can be exploited for APFs, quency as where the signal frequencies are well dened and practically constant (mains frequency and its multiples). [15], [16]; in The SSI acts as a resonant lter, tuned on this way, multiple SSIs with different resonance frequencies can operate in parallel without interfering with each other. The SSI can operate with both positive and negative sequence signals [12]. According to (1), the P-SSI regulator is a second-order system; a possible block diagram of the P-SSI is shown in Fig. 2 and the corresponding state-space model is (2)

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TABLE I HARMONIC SEQUENCES FOR THREE-PHASE RECTIFIERS

Fig. 2.

Schematic block diagram of P-SSI regulator.

where

For digital implementations, the discretized model of the P-SSI regulator (1) is (3) The discrete forms of the system and input matrices are computed as [17] (4) is the sampling time. where From (1), the system and input matrices become (5) (6) For large values of the resonance frequency , the delay caused by the sampling time can affect the system performance and also the system stability. According to (2), in steady-state conditions and are always sinusoidal having the the regulator states same amplitude and being always phase-shifted by 90 electrical degrees. For this reason, the compensation of the computation delay can be easily performed using the rotational transformation given by (7) where sated. 1 is the number of sampling intervals to be compen-

III. CURRENT CONTROL SCHEME USING MULTIPLE SSIS IN SYNCHRONOUS REFERENCE FRAMES The current control of an APF must deal with nonsinusoidal reference currents whose harmonic spectrum consists of a fundamental component and of the harmonics drawn by the nonlinear load. For diode or thyristor front-end rectiers, these harmonics are 1 1, 2, of the fundamental frequency of order 6 . If we consider the fundamental frequency component as a positive-type sequence, the corresponding sequence representations of the current harmonics in various synchronous reference frames are illustrated in Table I. The proposed current control scheme is a frequency-selective technique since it aims at compensating specic harmonics using SSI regulators. Based on the property of the SSI of being able to operate with both positive sequence and negative sequence signals, Table I also suggests two different possible current control strategies where a single SSI is used to simultaneously compensate two current harmonics: 1 , i.e., (5, 1) for each couple of harmonics of order 6 7), (11, 13), (17, 19) , a single SSI regulator is tuned at 1, 2, and it is implemented the frequency 6 in a synchronous reference frame rotating at ; 2) the couple of harmonics (5, 11) is canceled by a single SSI regulator tuned at the frequency 3 implemented in , meana synchronous reference frame rotating at 8 while the couple of harmonics (7, 13) is canceled by an SSI regulator tuned at the frequency 3 implemented in a synchronous reference frame rotating at 10 . For the experimental implementation the rst current control strategy has been used since it requires less rotational transformations compared with the second method. Thus, the proposed current control scheme using P-SSI regulators is shown in Fig. 3.

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Fig. 3.

Block diagram of the proposed current control scheme.

Fig. 4. APF control scheme.

For the fundamental current component, a P-SSI regulator is tuned on the fundamental frequency, , and it is implemented reference frame. Its main function is to in the stationary control the active current component needed to keep charged the dc-link capacitor at a specied voltage. Depending on the reference current generation, this regulator can be used for reactive current compensation as well. In addition, unbalanced load compensation can be also implemented since SSI regulators are able to deal with both positive and negative current sequence components [12]. To compensate the current harmonics, the current error is transformed in the synchronous reference frame aligned is then with the PCC voltage vector. The resulting error applied to three SSI regulators tuned on the resonance frequen12 , and 18 , respectively. The outputs of these cies 6 SSI regulators are added together and then transformed in stationary reference frame through an inverse rotational transwhich is subseformation to obtain the command voltage quently added with the output of the P-SSI regulator used for fundamental frequency to obtain the nal voltage commands in reference frame. The proposed current control scheme is thus a frequency-selective technique since it aims at compensating specic load harmonics. Compared with frequency-selective methods presented in [6] and [10], there is a clear difference. In [6] and [10], each harmonic to be compensated needs to be computed using sliding window integrators and then applied to an integrator. The compensation module for each harmonic operates in a syn, where chronous reference frame rotating at a frequency 5 7 11 is the harmonic order and takes into account the harmonic sequence [6], as shown in Table I. One direct and one inverse rotational transformation are required for each harmonic compensation module [5], [10]. Low gains for the integrator modules are used to avoid interactions between the different controller modules, resulting in a long compensation time [10]. For the proposed harmonic compensation scheme (Fig. 3), the input of the harmonic regulators is the current error consynchronous taining all the harmonics, calculated in the reference frame aligned on the PCC voltage vector. Each single SSI regulator, acting as a tuned resonant lter, will compensate

two specic harmonics without interfering with other regulators, allowing a good dynamic performance and less compensation time. Moreover, the proposed current control does not need additional load current prediction schemes [10]. The proposed current control scheme is able to compensate six current harmonics, i.e., fth, seventh, 11th, 13th, 17th, and 19th, with only three SSI regulators associated to one direct and one inverse rotational transformations (Fig. 3). That will significantly reduce the computational effort, compared with current control solutions using an SSI for each harmonic [12]. As shown by (3, 7), the computational effort to implement a single SSI is eight multiply-and-accumulate (MAC) xed-point operations, which corresponds to one direct plus one inverse rotational transformations. For this reason, if compared with frequency-selective methods [5], [10], [11] using multiple reference frames, the proposed method can get a competitive execution time when many current harmonics have to be compensated (Fig. 3). In this case, the complexity of an SSI and additional blocks (such as the reference generator) is balanced by the additional rotational transformations needed for frequency-selective methods. IV. DESCRIPTION OF THE OVERALL CONTROL SYSTEM The proposed current control strategy has been included in a digital control scheme for an APF which compensates the harmonics generated by a diode front-end rectier, as shown in Fig. 4. The quantities measured from the system are: the load , the APF currents , the PCC line-to-line currents and the APF dc-link voltage . voltages The block diagram of the APF control scheme is shown in Fig. 5 and contains two control loops. 1) DC-link voltage control loop: This is a slow loop using a simple proportional-integral (PI) regulator whose output in is the reference active current component synchronous reference frame. 2) APF current control loop: This loop regulates the APF with the proposed scheme of Fig. 3. The currents APF current reference is computed from the load and from the output of the dc-link regucurrents , as detailed in Fig. 6. This reference current callator

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Fig. 5. Block diagram of the whole APF control system.

Fig. 7. Computation of the PCC voltage vector position.

Fig. 6. APF reference current generation.

culation scheme is described in [13] and [14], and it is reference frame, rotating synchroperformed in the . The outnously with the PCC voltage vector puts of the current control block are the APF command in stationary reference frame. These comvoltages mand voltages are subsequently transformed into three. The three-phase comphase command voltages mand voltages are applied to a digital PWM block based on the sine-triangle comparison modulation technique to for the APF ingenerate the switching functions verter. The band-pass lter (BPF) blocks of Fig. 6 represent BPFs to be whose outputs are the harmonic current components, compensated by the APF. High-pass lters (HPF) are usually employed to retain all but the dc component, producing signals containing all the harmonics [13], [14]. The BPF (Fig. 6) has been used instead to limit the high frequency noise. In fact, the BPF higher cut-off frequency has been set at 5 kHz meanwhile the lower cut-off frequency is 20 Hz. This approach has minimal inuence on the magnitude and phase of the generated reference harmonic components. The fundamental reactive referis computed from the dc value of the -axis ence component load current component by means of the gain , according to the desired power factor compensation strategy. The position of the PCC voltage vector is computed by means of a proposed voltage lter scheme consisting of an SSI and a phase-locked loop (PLL) algorithm, as shown in Fig. 7. The main goal is to provide a smooth and accurate position of the PCC voltage vector for the APF control scheme even under distorted PCC voltage; in fact, any distortion of would deteriorate the ltering operation of the APF.

Since in steady-state operation the SSIs described by (2) have and with the same amplitude and being sinusoidal states always phase-shifted by 90 electrical degrees, the ltered PCC can be obtained using a single SSI voltage components voltage component. acting as a lter for the measured The ltering action and the transient response depends on the is chosen by a seSSI integral coefcient . The sign of quence detector. If the voltage sequence at the PCC is known in advance, the sequence detector can be eliminated. Anyhow, the sequence detection can be performed before starting the control interrupt service routine (ISR), so in practice the sequence detector does not require additional execution time. The outputs of the SSI are applied to a simple PLL block consisting of a PI regulator and an integrator [18]. Due to the ltering action of both the SSI and PLL, the estimated position of the PCC voltage vector is very smooth and is not inuenced by the distortion of the mains voltage. In case of unbalanced PCC voltage, there will be a small error in the PCC vector position estimation and best results will be obtained by means of a full sequence lter, as described in [12] V. EXPERIMENTAL RESULTS A 20-kVA shunt APF prototype has been built, using an insulated-gate bipolar transistor (IGBT) three-phase inverter with a switching frequency of 10 kHz. The dc-link reference voltage of the inverter has been set at 730 V. The inverter interfacing , are equal to inductance, , and the input load inductance, 250 H (see Fig. 4). The total estimated mains inductance, (see Fig. 4), is about 150 H. The ripple lter block in Fig. 4 represents a low-pass passive lter used to reduce the high frequency harmonic currents (generated by the PWM inverter of the APF) injected into the mains, below a specied amplitude. The whole APF control algorithm has been implemented on a 16-b, xed-point, TMS320LF2407A DSP, with a 40-MHz clock frequency. The control sampling frequency has been set at 10 kHz. The APF control algorithm has been written in mixed C/Assembler language to minimize the execution time. During the operation, the DSP saves data into its external memory;

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Fig. 8. Start-up of the PLL to estimate the position of the PCC voltage vector. (V); (2) v (V); (3) ! (rad/s); (4) # (rad); From top to bottom: (1) v and (5) sin #.

Fig. 10. Current control for -axis under steady-state operation with inductive (A); (2) i (A); and (3) " (A). load. From top to bottom: (1) i

Fig. 9. Non-linear load examples used for the experimental tests: (a) diode full-bridge rectier with inductive smoothing and (b) diode full-bridge rectier with capacitive smoothing. Fig. 11. Current control for  -axis under steady-state operation with inductive load. From top to bottom: (1) i (A); (2) i (A); and (3) " (A).

the data can be read and saved on a personal computer using the features of the DSP development software. The execution time of the whole APF control algorithm is 70 s, including protection tasks and save procedures. The execution time for the reference generator (Fig. 6) and the current control scheme (Fig. 3) is about 20 s. The operation of the PCC voltage vector position estimator (Fig. 7) is illustrated in Fig. 8, where the start-up of the PLL is shown. If the PCC voltage components are distorted, the SSI ltering action completely eliminates these effects and the estimated position of the PCC voltage vector is smooth, as shown in Fig. 8. To demonstrate the steady-state and dynamic performance of the proposed current control scheme, two different nonlinear loads have been considered (Fig. 9): diode bridge rectier having an inductive load or a capacitive load, respectively. A has been used to obtain step load transients. dc breaker A. Compensation of the Non-Linear Inductive Load In Figs. 1017, the steady-state operation of the APF compensating the inductive nonlinear load is shown. The effectiveness of the proposed control scheme is illustrated in Figs. 10 and 11,

showing the reference currents, the actual currents and the curreference frame. rent errors in stationary The voltage commands of the SSI regulators operating in syncomchronous reference frame are shown in Fig. 12. The mands of the SSIs tuned on the same frequency have different amplitudes since these regulators must simultaneously compensate two harmonics of different sequence. The SSIs commands in synchronous reference frame are added together and then reference frame. The retransformed in the stationary sulting command signals are added to the voltage commands generated by the P-SSI regulator tuned on the fundamental frequency (Fig. 3). The three-phase duty-cycle commands, used to generate the APF inverter switching functions, are illustrated in Fig. 13. Even with the inherent truncation errors caused by the DSP xed-point computation and the inuence of the sampling time delay, the discrete SSI regulators operating in synchronous reference frame are able to compensate all the current harmonics up to the 19th harmonic (950 Hz), as shown in Fig. 15. The obtained THD for the mains current is about 3.5%. The mains

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Fig. 12. Command voltages generated by the SSI regulators operating in (V); (2) v synchronous reference frame. From top to bottom: (1) v (V); (3) v (V); (4) v (V); (5) v (V); and (6) v (V).

Fig. 15. load.

Fourier analysis of the mains current for the compensated inductive

Fig. 16. Mains current and inductive load current in steady-state operation. Trace 1: i (A). Trace 2: i (A).

Fig. 13. APF duty-cycle commands under steady-state operation with inductive load: (1)  (pu); (2)  (pu); and (3)  (pu).

Fig. 17. Mains current and APF current for the inductive load compensation in steady-state operation. Trace 1: i (A). Trace 2: i (A). Fig. 14. Fourier analysis of the inductive load current.

current is almost sinusoidal, as shown by Figs. 16 and 17, where the phase mains current is plotted together with the same phase load current and APF current, respectively.

To evaluate the APF dynamic performance, two different tests have been considered. For the rst case, the APF is operating and the load is turned on and off, meanwhile for the second test the load is running and the APF control enables and disables

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Fig. 18. APF transient performance for inductive load turn-on. Trace 1: (A). Trace 2: i (A).

Fig. 21. APF transient performance when the harmonic compensation is disabled with operating inductive load. Trace 1: i (A). Trace 2: i (A).

Fig. 19. APF transient performance for inductive load turn-off. Trace 1: (A). Trace 2: i (A).

Fig. 22. Current control for -axis under steady-state operation with (A); (2) i (A); and (3) " capacitive load. From top to bottom: (1) i (A).

As shown by the experimental results, the proposed control strategy has good dynamic performance. The response time does not exceed one period of the mains currents. B. Compensation of the Non-Linear Capacitive Load In Figs. 2228, the steady-state operation of the APF compensating the capacitive nonlinear load is shown. The load resistance [see Fig. 9(b)] has been chosen to obtain approximately the same peak load current as for the inductive load. The APF reference currents, the actual currents and the current erreference frame are shown in Figs. 22 rors in stationary and 23, meanwhile, the duty-cycle commands are illustrated in Fig. 24. The capacitive load exhibits higher current distortion compared with the inductive load (see Fig. 25). As for the inductive load, the current control is able to compensate all the current harmonics up to the 19th harmonic (950 Hz), as shown in Fig. 26. The THD obtained for the mains current is about 5.5%; the steady-state performance with the capacitive load is slightly

Fig. 20. APF transient performance when the harmonic compensation is enabled with operating inductive load. Trace 1: i (A). Trace 2: i (A).

only the current harmonic compensation. The APF transient response is described by Figs. 1822.

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Fig. 26. load. Fig. 23. Current control for  -axis under steady-state operation with (A); (2) i (A); and (3) " capacitive load. From top to bottom: (1) i (A).

Fourier analysis of the mains current for the compensated capacitive

Fig. 27. Mains current and capacitive load current in steady-state operation. Trace 1: i (A). Trace 2: i (A).

Fig. 24. APF duty-cycle commands under steady-state operation with capacitive load: (1)  (pu); (2)  (pu); and (3)  (pu).

Fig. 28. Mains current and APF current for the capacitive load compensation in steady-state operation. Trace 1: i (A). Trace 2: i (A).

Fig. 25.

Fourier analysis of the capacitive load current.

poorer than that obtained with the inductive load and is inuenced by the rectier input inductance [1], [19]. The mains current is almost sinusoidal, as shown by Figs. 27 and 28, where the

phase mains current is plotted together with the same phase load current and APF current, respectively. To evaluate the APF dynamic performance with the capacitive load, the same tests as for the inductive load have been performed and the APF transient response is shown in Figs. 2932.

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Fig. 29. APF transient performance for capacitive load turn-on. Trace 1: i (A). Trace 2: i (A).

Fig. 32. APF transient performance when the harmonic compensation is disabled with operating capacitive load. Trace 1: i (A). Trace 2: i (A).

VI. CONCLUSION A current control scheme for shunt active power lters is proposed in this paper. The key issue is the use of sinusoidal signal integrators in the synchronous reference frame rotating at the fundamental frequency . This allows simultaneous com1 by a pensation of each couple of harmonics of order 6 1, 2, , single SSI regulator tuned at the frequency 6 yielding a signicant reduction of the computational effort compared with the scheme using an SSI regulator for each harmonic. For this reason, the proposed current control scheme can be attractive for industrial implementations based on xedpoint processors. Moreover, the proposed scheme has better response time compared to other frequency-selective current control methods. A simple and robust voltage lter is also proposed to obtain a smooth and accurate position estimation of the PCC voltage vector under distorted PCC voltages. The whole APF control system has been implemented on a 16-b xed point DSP and the experimental results, obtained with either inductive load or capacitive load show the validity of the proposed solutions, in both steady-state and transient operation. REFERENCES
[1] S. Bhattacharya, D. M. Divan, and B. Banerjee, Active lter solutions for utility interface, in Proc. IEEE ISIE Conf., vol. 1, 1995, pp. 5363. [2] H. Akagi, New trends in active lters for power conditioning, IEEE Trans. Ind. Appl., vol. 32, no. 6, pp. 13121322, Nov./Dec. 1996. [3] B. Singh, K. Al-Haddad, and A. Chandra, A new approach to three-phase active lter for harmonics and reactive power compensation, IEEE Trans. Power Delivery, vol. 13, no. 1, pp. 133138, Feb. 1998. [4] M. El-Habrouk, M. K. Darwish, and P. Metha, Active power lters: A review, Proc. Inst. Elect. Eng., vol. 147, no. 5, pp. 712, Sep. 2000. [5] C. B. Jacobina, M. B. R. Correa, T. M. Oliveira, A. M. N. Lima, and E. R. C. da Silva, Current control of unbalanced electrical systems, in Proc. IEEE IAS Conf., Oct. 1999, pp. 10111017. [6] M. Sonnenschein, M. Weinhold, and R. Zurowski, Shunt-connected power conditioner for improvement of power quality in distribution networks, in Proc. 7th Int. Conf. Harmonics Quality Power (ICHQP VII) Conf., 1996, pp. 2732. [7] S. Buso, L. Malesani, and P. Mattavelli, Comparison of current control techniques for active lter applications, IEEE Trans. Ind. Electron., vol. 45, no. 5, pp. 722729, Oct. 1998. [8] M. Lindgren and J. Svensson, Control of a voltage-source converter connected to the grid through an LCL-lterApplication to active ltering, in Proc. IEEE PESC98 Conf., May 1998, pp. 229235.

Fig. 30. APF transient performance for capacitive load turn-off. Trace 1: i (A). Trace 2: i (A).

Fig. 31. APF transient performance when the harmonic compensation is enabled with operating capacitive load. Trace 1: i (A). Trace 2: i (A).

As shown by the experimental results, the APF dynamic performance with the capacitive load is similar to that obtained with the inductive load, getting a response time less than one period of the mains currents.

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[9] S. Bhattacharya, T. M. Frank, D. M. Divan, and B. Banerjee, Parallel active lter implementation and design issues for utility interface of adjustable speed drive systems, in Proc. IEEE IAS96 Conf., vol. 2, pp. 10321039. [10] M. Sonnenschein and M. Weinhold, Comparison of time-domain and frequency-domain control schemes for shunt active lters, Eur. Trans. Elect. Power Eng., vol. 9, no. 1, pp. 516, Jan./Feb. 1999. [11] M. Bojyup, P. Karlsson, M. Alakula, and L. Gertmar. A multiple rotating integrator controller for active lters. presented at Proc. EPE99 Conf.. [CD-ROM] [12] X. Yuan, W. Merk, H. Stemmler, and J. Allmeling, Stationary-frame generalized integrators for current control of active power lters with zero steady-state error for current harmonics of concern under unbalanced and distorted operating conditions, IEEE Trans. Ind. Appl., vol. 38, no. 2, pp. 523532, Mar./Apr. 2002. [13] F.-Z. Peng, H. Akagi, and A. Nabae, A study of active power lters using quad-series voltage-source PWM converters for harmonic compensation, IEEE Trans. Power Electron., vol. 5, no. 1, pp. 915, Jan. 1990. [14] H. Fujita and H. Akagi, The unied power quality conditioner: The integration of series- and shunt-active lters, IEEE Trans. Power Electron., vol. 13, no. 2, pp. 315322, Mar. 1998. [15] D. N. Zmood and D. G. Holmes, Stationary frame current regulation of PWM inverter, in Proc. IEEE IAS99 Conf., Oct. 1999, pp. 11851190. [16] D. N. Zmood, D. G. Holmes, and G. Bode, Frequency domain analysis of three phase linear current regulators, IEEE Trans. Ind. Appl., vol. 37, no. 2, pp. 601610, Mar./Apr. 2001. [17] R. Isermann, Digital Control Systems. New York: Springer-Verlag, 19891991, vol. 1. [18] D. Detjen, J. Jacobs, R. W. de Doncker, and H. G. Mall, A new hybrid lter to dampen resonances and compensate harmonic currents in industrial power systems with power factor correction equipment, IEEE Trans. Power Electron., vol. 16, no. 6, pp. 821827, Nov. 2001. [19] F.-Z. Peng, Application issues of power active lters, IEEE Ind. Appl. Mag., vol. 4, no. 5, pp. 2130, Sep./Oct. 1998.

Valeriu Bostan was born in Romania in 1971. He received the M.S. and Ph.D. degrees in electrical engineering the from Politecnica University Bucharest, Bucharest, Romania, in 1996 and 2002, respectively. Since 2003, he has been a Lecturer Professor with Politehnica University Bucharest. He was involved in R&D programs on electrical drives, hybrid solutions for electric automobiles, digital DSP-based control systems, and power active lters. Dr. Bostan received the Werner von Siemens Excellence Award in 2003.

Maurizio Guerriero was born in Novi Ligure, Italy, in 1968. He received the M.Sc. degree in electronic engineering and the Ph.D. degree in electrical engineering from the Politecnico di Torino, Torino, Italy, in 2000 and 2005, respectively. He joined the Department of Electrical Engineering, Politecnico di Torino, in 2001. He is currently a Researcher under grant in the same Department. His elds of interest are power electronics and power quality.

Radu Iustin Bojoi received the M.Sc. degree in electrical engineering from the Technical University of Iasi, Iasi, Romania, in 1993 and the Ph.D. degree from Politecnico di Torino, Torino, Italy, in 2003. From 1994 to 1999, he was Assistant Professor in the Department of Electrical Drives and Industrial Automation, Technical University of Iasi. In 2004, he joined the Department of Electrical Engineering, Politecnico di Torino as an Assistant Professor. He has published more than 20 papers in international conferences and technical journals. His scientic interests regard the design and development of DSP- and FPGA-based advanced control systems in the elds of power electronics, high-performance electrical drives, and power conditioning systems. Dr. Bojoi received the IPEC First Prize Paper Award in 2005.

Francesco Farina received the M.Sc. and Ph.D. degrees in electrical engineering from the Politecnico di Torino, Torino, Italy, in 2001 and 2005, respectively. He then joined the Department of Electrical Engineering, Politecnico di Torino where he is currently a Researcher under grant. His elds of interest are the control design of high performance multiphase induction motor drives and the sensorless control of brushless motor drives. Dr. Farina received the IPEC First Prize Paper Award in 2005.

Giovanni Griva received the M.S. and Ph.D. degrees in electronic engineering from the Politecnico di Torino, Torino, Italy, in 1990 and 1994, respectively. From 1995 to 2001, he was Assistant Professor with the Department of Electrical Engineering, Politecnico di Torino. Since 2002, he has been an Associate Professor with the Politecnico di Torino. In 1993 and 1998, he was a Visiting Researcher at the R&E Center Elisha Gray II, Whirlpool Corporation, Benton Harbor, MI. He has published more than 60 papers in international conferences and technical journals. He is a Reviewer for the IEE Proceedings. His scientic interests regard power conversion systems and non conventional actuators. In particular, his research activity has focussed on the design and development of advanced systems in the elds of power electronics, design of integrated electronic/electromechanical systems, high performance electric drives, digital control for industry applications, and power conditioning systems. Dr. Griva received the IEEE Industry Applications Society First Prize Paper Award in 1992. He is a Reviewer for the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS.

Francesco Profumo (M88SM90) was born in Savona, Italy, in 1953. He received the Ph.D. degree in electrical engineering from the Politecnico di Torino, Torino, Italy, in 1977. From 1978 to 1984, he was a Senior Engineer with the R&D Ansaldo Group, Genova, Italy. In 1984, he joined the Department of Electrical Engineering, Politecnico di Torino, where he was Associate Professor until 1995. He is now Professor of electrical machines and drives with the Politecnico di Torino and Adjunct Professor with the University of Bologna, Bologna, Italy. He was a Visiting Professor with the Department of Electrical and Computer Engineering, University of Wisconsin, Madison, from 1986 to 1988 and with the Department of Electrical Engineering and Computer Science, Nagasaki University, Nagasaki, Japan, from 1996 to 1997. He published more than 190 papers in International Conferences and Technical Journals. His elds of interest are power electronics conversion, high power devices, applications of new power devices, integrated electronic/electromechanical design, high response speed servo drives, and new electrical machines structures. Dr. Profumo received the IEEE-IAS Second Prize Paper Award in 1991 and 1997 and the IEEE-IAS First Prize Paper Award in 1992. He is an active member of the IEEE-IAS Drives Committee and serves as Co-Chairman of the same Committee (IEEE-IAS TRANSACTIONS Review Chairman). He was also AdCom member of the IEEE PELS. He is member of the Technical Program Committee of several International Conferences in the Power Electronics and Motor Drives eld and he was the Technical Co-Chairman of PCC02, Osaka, Japan, in 2002.