Walter A. Triebel, Avtar Singh-The Lab Manual For 8088 and 8086 Microprocessors - Programming, Interfacing, Software, Hardware, and Applications, 4th Edition-Prentice Hall (2002)

*0080907 USED PRIC HT 40 Lab Manual to Accompany The 8088 and 8086 Microprocessors: Programming, Interfacing, Software, Hardware, and Applications FOURTH EDITION WALTER A. TRIEBEL Fairleigh Dickinson University AVTAR SINGH San Jose State University Upper Saddle River, New Jersey Columbus, OhioEditor in Chief: Stephen Helba Assistant Vice President and Publisher: Charles F. Stewart, Jr. Production Editor: Tricia L. Rawnsley Design Coordinator: Diane Emsberger Cover Designer: Jeff Vanik Cover art: Corbis Stock Market Production Manager: Matthew Ottenweller Product Manager: Scott Sambueci ‘This book was set in Times Roman. It was printed and bound by Victor Graphies. The cover was printed by Phoenix Color Corp. Pearson Education Lid Pearson Education Australia Py, Limited Pearson Education Singapore Pte. Lid. Peasson Education North Asia Li, Pearson Education Canada, Lid, Pearson Evcaci6n de Mexico, .A. de CY. Pearson Education—Japan Pearson Education Malaysia Pte. Lid Pearson Education, Upper Saddle River New Jersey Copyright © 2003, 2000, 1997, 1991 by Pearson Education, Ine., Upper Saddle River, New Jersey 07458. All rights reserved. Printed in the United States of America. This publication is protected by Copyright and permission should be obtained from the publisher prior to any prohibited reproduction, storage in a retrieval system, or transmission in any form or by any ‘means, electronic, mechanical, photocopying, recording, or likewise. For information regarding permission(s), write to: Rights and Permissions Department. ora urlect Tall 1098765 ISBN 013 045291.9Walter A. Triebel To my mother, Marie F Triebet Avtar Singh To my wife, Jaswant Kaur SinghPreface This book is written asa supplement to two different microprocessor textbooks: The 8083 and 8086 Microprocessors: Programming, Interfacing, Software, Hardware, and Applications, 4th ed., © 2003 (ISBN 0-13-093081-4), and The 80386, 80486, and Pentium® Processors: Hardware, Software, and Interfacing, © 1998 (ISBN 0-13-533225-7) Itis intended for use ia an accompanying laboratory course, Just as the textbooks were, the laboratory program has been designed to put equal emphasis on software and hardware aspects of microcomputers, A series of experiments has been developed to complement topics inthe extbooks and reinforce the concepts learned in a lecture course. ‘A number of changes have been made to this edition. The programs were tested and modified to be consistent with entering DEBUG on a PC running the Windows operating system, Program list files can now be examined using EDIT in the DOS environment or Notepad in the Windows environment, Also, source files of programs that require use of a macroassembler were modified so that they assemble with either the Microsoft Macroassembler (MASM) or the Turboassembler (TASM). Finally, all lab exercises were te-tested on PCS in both the Windows 98 and Windows Millennium operating system “The lab manual contains 25 laboratory exercises. They are organized ino four sections Part I uses the DEBUG program to explore the software model of the microcomputer in the PC. Five laboratory exercises are included that cover the DEBUG programm command set; the use ofthese commands to examine the sofiware architecture of the 80x86 MPU and memory subsystem of the PC; assembling and executing instructions; loading, executing, and debug- ‘ing programs; and exploring the instruction groups ofthe 80x86 instruction se. Part 2 is a study of the assembly language program development cycle and the use of the Microsoft macroassemblet. In Laboratory 6 the student explores the assembly lan- ‘guage program development process by assembling, editing, linking, and executing a pro- ‘gram, The next three laboratories explore the writing of assembly language programs for Practical software applications—average calculation, table sort, and mathematical series ‘generation. Here the student follows the process of writing an assembly language program for an application and then runs the program to verify correct operation for @ known test case. Laboratory 10 requires the student to employ the steps of the program development cycle by writing programs for specified applications, Finally, in Laboratory 11, modular programming techniques are examined,Part 3 ofthe manual begin the study of microcomputer hardware in the laboratory with the electronics ofthe original IBM PC. There are seven laboratories that explore the cir cuits and operation ofthe PC. Laboratories that introduce reading and tracing circuits in the schematic diagrams ofthe original IBM PC, explore the memory, input/output, and inerrup subsystems ofthe PC, examine the operation of the display, wse BIOS routines for keyboard input and display output, and generate and play mosi have been included Part 4 ofthe manual intoduces methods and techniques for building, testing, and troubleshooting microcomputer iterface circuitry inthe laboratory. Seven laboratories are provided. They include interfies to DIP switches, LEDs, and a speaker through the on board circuitry of the PCHLAB and an 82C5SA PPI; waveshape generation with the £254 PIT; communication tough a parallel printer interface and RS-232C seta termi nal interface; designing @ memory subsystem; and learning to use the internal iterrups available athe ISA bos. These laboratories entail building test ciceits, running diagnostic programs, writing programs to drive the VO interfaces, and observing interface operation ‘vith instrumentation, Tn general, the laboratories provide the student with working programs and circuits co experiment with, However, many ofthe laboratories include moe challenging acivies, such as requiring the programs and circuits to be modified or new programs or circuits to be designed to implement identified applications SUPPLEMENTS Supplementary materials arc available to complement the 80x86 microprocessor labora~ tory program offered by this manual. They include the textbooks identified in the preface ‘and materials forthe student and instructor that enable easy implementation of lectures for the classroom and a practical PC-hosted iaboratory program. 1, Instructor's Solution Manual with Transparency Masters to accompany The 8088 ‘and 8086 Microprocessors: Programming, Interfacing, Software, Hardware, and Applications, 4h edition, ISBN 0-13-093082-2, Prentice Hall, Inc. Pearson Education, Upper Saddle River, NJ 07458. Provides answers to all ofthe student exercises in the textbook and transparency ‘masters for over 300 of the illustrations in the textbook. Walter Tricbel Avtar SinghBrief Contents Part1 Part 2 Part 3 Part 4 DEBUG, A Software Development Program of the PC sw Assembly Language Program Development and the Microsoft Macroassembler (MASM) IBM PC Microcomputer Hardware.. Interface Circuits: Construction, Testing, and Troubleshootin; viiContents PART 1 Laboratory 1: Laboratory 2: Laboratory 3: Laboratory 4: DEBUG, A SOFTWARE DEVELOPMENT PROGRAM OF THE PC. Exploring the Software Archi 80x86 Microprocessor, Part 1: Loading the DEBUG Program, 1 Part 2: Examining and Modifying the Contents of the 80x86’s Internal Registers, 2 Part 3: Examining and Modifying the Contents of Memory, 2 Part 4: Exploring the Dedicated Use Part of the 80x86's Memory ‘Address Space, 3 Assembling and Executing Instructions with DEBUG Part 1: Coding Instructions in 80x86 Machine Language, 4 Part 2: Assembling Instructions and Saving Them on a Floppy Diskette, 4 Part 3: Loading Instructions from Floppy Diskette for Execution with the TRACE Command, 5 Loading, Executing, and Debugging Programs.. Pact 1; Executing a Program that Is Loaded with the ASSEMBLE Command, 6 Part2: Executing a Program Assembled with the MASM, 7 Part 3: Debugging a Program, 8 Working with the Data Transfer, Arithmetic, Logie, Shift, ‘and Rotate Instructions. Part 1: Data Transfer Instructions, 9 Part2: Arithmetic Instructions, 10 Pan 3: Logic Instructions, 11 Part 4: Shift and Rotate Instructions, 12Laboratory 8: PART 2 Laboratory 6: Laboratory 7: Laboratory 8: Laboratory 9: Laboratory 10: Laboratory 11: PART 3 Laboratory 12: Working with the Flag Control, Compare, Jump, Subroutine, Loop, and String Instructions swu.nmnunensnonnnnld Part {> Flag-Control Instructions, 13 Part2: Compare Instruction, 14 Pa3: ump Instructions, 15 Part 4: Subroutine Handling Instructions, 16 Part 5: Loop Handling Instructions, 17 Part 6: String Handling Instructions, 18 ASSEMBLY LANGUAGE PROGRAM DEVELOPMENT AND THE MICROSOFT MACROASSEMBLER (MASM) Assembling, Editing, Linking, and Executing Assembly Language Programs. Part 1: Assembling a File with MASM, 19 Part 2; Corecting a Source Program with Syntax Errors, 20 Part 3: Modifying an Existing Source Program, 20 Part 4: Creating a Run Module withthe LINK Program, 21 Part 5: Loading and Executing a Run Module with DEBUG, 21 Calculating the Average of a Series of Numbers Part 1: Description of the Problem, 22 Past2: Writing the Program, 24 Part 3: Running the Program, 25 Sorting a Table of Data. Part 1: Description of the Problem, 28 Part 2: Writing he Program, 28 Part 3: Running the Program, 31 Generating Elements for a Mathematical Series. Part 1: Description of the Problem, 34 Part 2: Writing the Program, 34 Part3: Running the Program, 39 Designing a Program for an Application Past 1: Description ofthe Application, 40 art 2: Producing and Verifying the Solution, 41 Part 3: Modifying the Application, 41 Exploring a Multiple Module Program... art 1: Module Program Description, 42 Part 2: Creating a Program from Multiple Modules, 45 Part 3: Running the Program, 46 IBM PC MICROCOMPUTER HARDWARE...... Exploring the Schematic Diagrams and Circuits of the Original IBM PC... Part 1: Exploring the Circuits of the Original IBM PC, 47 Part 2; Describing the Operation of the Circuits. of the Original [BM PC, 55 sess a7Laboratory 13: Laboratory 14: Laboratory 15: Laboratory 16: Laboratory 17: Laboratory 18: PART 4 Laboratory 19: Laboratory 20: Exploring the Memory Subsystem of the PC Part I: IBMPC Memory, 59 Part 2; Executing a Memory Test Program, 60 Part3: Modifying the Memory Test Program, 63 Exploring the Display System of the PC Part 1: Display Memory Buffer, 64 Part 2: Executing a Program That Displays the Characters of the ASCII Character Set on the Screen, 69 Part 3: Displaying the Complete ASCII Character Set fon the Screen, 70 Exploring the Input/Output Subsystem of the PC. Pact 1: InpuvOutput Ports of the IBM PC, 70 Part 2: Wiring a Speaker Control Program, 71 Past 3: Output Port for the Speaker in the Original IBM PC, 76 Exploring the Interrupt Subsystem of the PC Part: Interrupt Vector Table, 77 Part2: Exploring the Code of an Interrupt Service Routine, 78 Pact 3: Determining the PC Equipment and RAM Implementation, 78 Past 4; Print Screen and System Boot Interrupts, 79 Part S: The INT 21H Fanetion Calls, 79 Using BIOS Routines for Keyboard Input and Display Output sesmnsnsnnsnnns Part 1: Executing a Keyboard and Display Interaction Routine, 81 Part 2; Writing a Keyboard InpuvDisplay Output Program, 82 Part 3: Modifying the Keyboard InpuvDisplay Output Program, 84 Producing Music with the PC ss Part 1: Playing a Musical Scale, 90 Part2: Playing a Musical Melody, 94 Part3: Program for Playing Individual Notes for Keyboard inputs, 95 INTERFACE CIRCUIT! ‘ONSTRUCTION, TESTING, AND TROUBLESHOOTING.. re Using the PCHLAB's On-Board InpuvOutput Interface Circuits nnn 97 Part 1: Simple Input/Output with the INPUT and OUTPUT DEBUG Commands, 97 Part 2: Scanning the LEDs, 98 Part 3: Lighting LEDs Corresponding to Switch Settings, 99 Part 4: Sounding Tones on a Speaker, 100 ‘Tracing Signals in the PCALAB's On-Board Interface Circuits. Part 1: Observing the [npuy/Ouiput Address Decoding and Strobes, 101Laboratory 21: Laboratory 22: Laboratory 23: Laboratory 24: Laboratory 25: Part 2: Observing the Signals fora Blinking LED, 103 Part 3; Constructing Sean Waveforms for the LEDs, 103, Part 4: Measuring the Time Duration Between Switch Scans, 104 Designing Parallel Input/Output Interfaces with the ‘82CS5A Programmable Peripheral Interfce.nnmnnnnnenne] 0S Part 1; Designing, Building, and Testing 82CSSA-based Input/Output Interface Circuits, 105 Part 2: Observing Signals in the 82C55A Parallel Input/Output Interface Circuit, 107 Part 3: Using the Inpuv/Output Resources of the 82C55A Interface Circuit, 108 Waveshape Generation with the 82CS4 Programmable Interval Tieton Part 1: Designing, Building, and Testing an 82C54-based. Wave Shape Generation Circuit, 109 Part 2: Modifying the Frequencies through Software, 112 Part3: Modifying the Timer Mode and Output Waveshape, 113 Exploring Prallel and Serial Communication Input/Output fon an Adapter Card smn Part 1: Parallel Port on a Printer Adapter Card, 114 Part 2: Serial Port on an Asynchronous Communication Adapter Card, 121 Designing a Static Read/Write Memory Subsystem Part 1: Designing the Memory Subsystem, 126 Part 2: Writing Software to Verify and Observe Memory Operation, 130 Part 3: Building the Memory Subsystem and Verifying its Operation, 130 Part 4: Observing the Memory Interface Signals During the Write and Read Bus Cycles, 131 Part S: Troubleshooting the Memory Interface Circuitry, 131 Part 6: Running an Application Program Out of the External Memory Subsystem, 132 Designing External Hardware Interrupt Service Routines. Part 1; External Interrupt System for the PC Bus, 132 Part 2; Analyzing an Interrupt Program, 133 Part 3: Modifying the Interrupt Service Routine, 135 Part 4: Analyzing the External Hardware Interrupt Program, 137 Pact 5: Building and Testing an Interrupt Request Circuit, 140APPENDIX 1: REFERENCE FIGURES., APPENDIX 2: DEBUG COMMAND SET. APPENDIX STATUS AND CONTROL FLAGS ess APPENDIX 4: 8086/8088 INSTRUCTION SET. APPENDIX 5: PCuLAB LAYOUT MASTER... APPENDIX 6: PROGRAMS DISKETTE CONTENTS...1 DEBUG, a Software Development Program of the PC LABORATORY 1: EXPLORING THE SOFTWARE ARCHITECTURE OF THE 80x86 MICROPROCESSOR Objective Lear how to: + Bring up the DEBUG program, + Examine and modify the contents of the 80x86s internal registers. + Examine and modify the contents of the 80x86's code, data, and stack segments of memory. + Calculate the physical addresses of storage locations in the memory address space. + Examine the contents of the dedicated parts of the 80x86's memory address space. Part 1: Loading the DEBUG Program Here we will learn how to bring up the DEBUG program from the keyboard of the PC. The laboratory procedures that follow assume that the PC has a floppy disk drive called A and a hard disk, drive C. Its also assumed that the DOS directory on drive C ‘contains the DEBUG.EXE program. Check off each sigp as itis completed. Check Step Procedure 1, Turmon the PC and enter the DOS operating system environment by selecting Start, opening the Programs menu, and selecting the MS-DOS Prompt icon, Alternately, selecting Start, Run, typing. ‘Command into the Open: dialog box, and depressing the OK button also starts DOS. 2. Load DEBUG by issuing the command C:\WINDOWS>DEBUG (4) ‘What prompt do you see on the screen? —________ — 3. Return to the DOS operating system by entering the command Q 4) What prompt is now displayed?‘Save the displayed information to a Word document. 2. Use the Mark tool from the DEBUG toolbar to highlight the sequence of DOS and DEBUG. commands on the screen, Use the Copy too! from the DEBUG toolbar to copy the highlighted information to the Windows clipboard, ‘c. Open a new Word document 4. Paste the information from the clipboard into the Word document. fe. Save the Word document with the name lab/ Part 2: Examining and Modifying the Contents of the 80x86's Internal Registers Now we will use the REGISTER command to first examine the initial contents of the 80x86's intemal registers and then modify the values in some of the registers and state of the flags. Figure A2.1 in Appendix 2 fists the DEBUG command set. The table lists each command, its syntax, and a brief description of its function, Save the sequence of DEBUG commands and their results to the lab? document. Be sure to mark, copy, and paste the displayed information to the document before it scrolls off the top of the screen. Check Step _ Procedure —_ 1 [Use the REGISTER command to display the current contents of all ofthe 80x86's internal registers List the initial values held in CS, DS, and SS, ______, —____, Calculate the physical address of the next instruction to be executed. ‘What is the instruction held at this address? —_ Calculate the physical address of the current top of the stack. Enter the command RAH (4) ‘What happens and why? Use a REGISTER command to first display the current contents of CX and then change this value to 10,, Issue a REGISTER command to first display the current contents of IP and then modify its value 10.0200, Use the REGISTER command to display the current contents of the flag register and then change the state ofthe parity flag to represent even parity. Redisplay the contents of all ofthe 80x86's internal registers, Compare the displayed register contents to those printed in step 1. Make alist of those registers whose contents have changed. ‘What instruction is now pointed to by CS:1P? Part 3: Examining and Modifying the Contents of Memory [Next we explore the memory subsystem of the PC and operation of the memory examine/modify commands provided in the DEBUG program. Save the sequence of DEBUG commands and their results to lab. Remember to mark, copy, and paste the displayed information to the dacument before it scrolls off the top of the screen. Check __Step_ Procedure Use the information printed out in step | of Part 2 to draw a diagram similar to that in Figure Al.1 of Appendix I to show how the active memory segments are intially mapped. In the diagram, identify the lowest and highest physical address of each segment,10, Memory cs ss ES Use the DUMP command to display the first 256 bytes of the current data segment. Display the next 128 bytes of the code segment starting from the current value of CS:1P with a DUMP command Use the DUMP command to show the last six words pushed to the stack. With the ENTER command, load the first 16 bytes of the current data segment, one byte ata time, ‘with the value FF, Before terminating the command, verify that the memory contents have been changed by stepping back through the memory locations by depressing the - (hyphen) key. Use FILL commands to initialize the 16 storage locations starting at DS:10 with the value 5 , and the 16 storage locations starting at address DS:30 with 00,4, With a MOVE command, copy the contents ofthe 16 storage locations starting at DS:00 to the 16 storage locations starting at DS:20. Display the contents of the first 128 bytes of the current data segment with the DUMP command. Use the COMPARE command to compare the contents of the 16 storage locations starting at DS:00 to those starting at DS:10 and then to those starting at DS:20. Execute a SEARCH command to determine which storage locations in the range DS:00 through DS:3F contain the value FF, Part 4: Exploring the Dedicated Use Part of the 80x86's Memory Address Space Figure A1.2 in Appendix | identifies certain parts ofthe 80x86's memory address space as having dedicated or reserved func tions. Here we will determine the contents of a dedicated address space. Save the sequence of DEBUG commands and their results to lab before the displayed information scrolls off the top of the screen. Cheek Step Procedure ‘Change the contents of the DS register to 0000,,, Display the contents of addresses 0:0 through 0:1. Dedicated addresses 0:0 through 0:3 store a pointer forthe starting address of the service routine for the divide error interrupt, Use the values displayed in step 2 to calculate the physical address, corresponding to this pointer, ‘The pointer that identifies the starting location of the nonmaskable interrupt (NMI) service routine is, held in storage locations 0:8 through 0:B. Use the values displayed in step 2 to caleulate the physical address represented by this pointer, —___ TThe overflow interrupt pointer is held at locations 0:10 through 0:13 in memory. Using the values lisplayed in step 2, calculate the physical address represented by this pointer.LABORATORY 2: ASSEMBLING AND EXECUTING INSTRUCTIONS WITH DEBUG Objective Learn how to: + Code assembly language instructions into machine code, + Assemble instructions into the memory of the PC. + Unassemle machine code instructions stored in memory. + Store and load machine code insteuctions from a diskette. + Execute an instruction to determine the operation it performs. Part 1: Coding Instructions in 80x86 Machine Language Here we will use the general instruction formats of Figute Al.6 and machine language coding tables in Figures Al 3 chrough ALS in Appendix ito convert assembly language instructions into their equivalent machine code. Check off each step asi is completed Check Step _ Procedure —_ 1. Encode each ofthe instructions that follow into machine code. MOV AX.BX MOV AX,AAAAH, MOV AX,[BX] ——_— MOV AX,[0004H] | MOV AX[BX+S1] MOV AX|SI+4H) MOV AX|[BX+SI+44i] jow many bytes are required to store each of the machine code instructions in step 1? b. a f & He Part 2: Assembling Instructions and Saving Them on a Floppy Diskette [Next we will learn how to use the ASSEMBLE command to enter assembly language instructions into the memory of the PC, verify the loading of machine code instructions by disassembling with the UNASSEMBLE command, and save the machine code instruction on a data diskette, The syntax and function of the ASSEMBLE and UNASSEMBLE commands are described in Figure A2.1 in Appendix 2. Create a Word document narred lab? and save the displayed sequence of DEBUG commands and their results. Be sure to mark, copy, and paste the displayed information to the Word document before it scrolls off the top of the Check Step Procedure 1. For each ofthe instructions that follow, use DEBUG commands to assemble the instruction at the specified address, verify the loading of the instruction in memory, and then store the instruction in the file specified on a diskette in drive A. a. MOV AX,BX; CS:100; A:INST.1 (That is, assemble the instruction MOV AX,BX at location. (CS:100 and save in file A:INST.1.)b. MOV AX,AAAAH; CS:110; A:INST2 «. MOV AX|[BX}; CS:120; A:INST3 4. MOV AX {4H}; CS:130; A:INST4 €, MOV AX,[BX+ SI], CS:140; AINSTS £, MOV AX|[SI-+4H]; CS:150; A:INST6 g MOV AX[BX+SI-+4H}; CS:160; AINST.T Part 3: Loading Instructions fram Floppy Diskette for Execution with the TRACE Command Next, machine code instructions that were saved ov a data diskette will be loaded nto memory with LOAD commands and their operation will be observed by executing them with the TRACE command. Figure A2.1 in Appendix 2 describes the syntax and function of the LOAD and TRACE commands. Save the sequence of DEBUG commands and their results to lab2. Remember to mark, copy, and paste the displayed information to the document before it scrolls off the top of the screen. Cheok Step _ Procedure 1, Initialize the internal registers of the 80x86 as follows: (ax) = 0000, (BX) = 0094, (cx) = on02,; (px} = 0003, (SI) = 00303; (DI) = 00205, (BP) = 00303, Verify the initiaization by displaying the new contents ofthe revistes. Fill all memory locations inthe range DS:00 through DS:1F with 00,, and then initialize the word storage locations tat follow 00H) = BBBBE oo4H) = ccccH OH) = DpppE O14H) = EEEER OLLE) = PPPPH For each of the files that follow, reload the instruction that was saved in step 1 of Part 2, verify the loading of the instruction, display the contents of the internal registers and memory locations DS:00 through DS:1E, if necessary, correct the values in BX and CX, and then execute the instruction with the TRACE command. Describe the operation performed by the instruction. a. INSTI b. INST2 ©. INST3_ @. INST fe. INSTS t 8 INSTS. ,. INST.LABORATORY 3: LOADING, EXECUTING, AND DEBUGGING PROGRAMS Objective Learn how to: + Lood a program with the line-by-line assembler, verify its loading with the UNASSEMBLE command, and save the program on a data diskette + Runa program and verily its operation from the results it produces, + Load the machine code of an assembled progeam from a file on a data diskette, run the program, and observe the operation of the program, + Debug the operation of a program. Part 1: Executing a Program That Is Loaded with the ASSEMBLE Command In this part ofthe taboratory, we will learn how to enter a program withthe line-by-line assembler verify thatthe program was entered correctly by disassembling the program with the UNASSEMBLE command, save the program on a data diskeite,refoad ‘program froma data diskete, and observe the operation of the program by executing with GO end TRACE commands. Figure A2.1 in Appendix 2 lists each DEBUG command, its syntax, and a brief description of its ‘ution. Save the sequence of DEBUG commands and their results to@ Word document named lab3. Be sure to mark, copy. and paste displayed information to the document before it srolls off the top of the screen. Check off each step as iis completed. Check Step Procedure — 1. Using the ASSEMBLE command, (oad the block move program of Figure A1.7 into memory starting at address C$:100, 2. Verify the loading of the program by displaying it with the UNASSEMBLE command. How many bytes of memory does the program take up? ‘What is the machine code for the NOP instruction? ‘At what address is the NOP instruction stored? __. 3. Save the program on a formatted data diskette in drive A as file L3PI.1 —_ 4, Reload the program into memory at CS:100. Initialize the blocks of data as follows: a. Use a FILL command to clear all storage locations in the range 20000100 through 2000:013F. b. Verify that this range of memory has been cleared by displaying its contents with a DUMP command. . Fill the storage locations from address 2000:0100 through 2000:010F with the value 55, . Verify the initialization of the storage locations from 2000:0100 through 2000:010F with a DUMP command. Run the complete program by issuing a single GO command, What isthe starting address in the GO command? What is the ending address? —_ 7. Verify that the block move operation was correctly performed by displaying the contents of memory range 2000:0100 through 2000:013F. Give an overview of the operation performed by the program, —_ 8 Reinitiaize the block of memory as specified in step 5. 9. Execute the program using TRACE and GO commands similar to those shown in Figure ALS, Remember thatthe program has been loaded starting ata different address. — 10, Exit DEBUG with the QUIT cemmand,Part 2: Executing a Program Assembled with the MASM Here we will load a program that was assembled with Microsoft's Macroassembler (MASM) and observe its operation by executing the program with GO and TRACE commands. Save the sequence of DEBUG commands and their results to 1ab3. ‘Remember to mark, copy, and paste the displayed information before it scrolls off the top of the screen. Check Step Procedure Insert the Programs Diskette into drive A of the PC. — 2. Select drive A by entering Cr\WENDOWS>A: (1) 3. Use either EDIT in DOS or Notepad in Windows to display the source listing in file L3P2,LST that resides on the Programs Diskette. What isthe starting address offset forthe first instruction (PUSH DS) of the program? _—. The last instruction (RET) of the program? 4. Load the run module L3P2.EXE with the command Az\>DEBUG LAP2.EXE (11) —_— 5. Verily loading of the program by unassembling the contents ofthe current code segment for the offset range found in step 3. —_— 6. Initialize memory the same way as done in step 5 of Part L — 7. Run the program to completion by issuing a single GO command. —_— 8. Verily the operation ofthe program by displaying the contents of memory range 2000:0100 through 20004013. 9. Reinitialize the memory as done in step 5 of Part I and display the contents of the MPU's rogisters, —_ 10, Execute the program according to the instructions that follow: a. GO from address CS:00 through CS:13. What has happened tothe values in DS, AX, CX, SI, and DI? . GO from address CS:13 through CS:1A. «. Display the data from 2000:0100 through 2000:013F. Which byte of data was moved? Where was it moved to? 4d. GO from address CS:1 to CS:13. What has happened to the value in IP? e. GO from address CS:13 through CS:1A. What has happened to the value in SI, DI, and CX? £. Display the data from 2000:0100 through 2000:013K. Which byte of data was moved? ‘Where was it moved to? —_ ® GO from address CS:1A through CS:1C. “What has happened to the value in SI, DI, and CX? hh, Display the data feom 2000:0100 through 200010138. Describe the block move operation performed by the program. 11, Exit DEBUG with the QUIT command.Part 3: Debugging a Program Now we will debug a program that contains an execution error by executing the program step by step and observing program operation with DEBUG commands. Save the sequence of DEBUG commands and thei results to [ab3 before the displayed information scrolls off the top of the screen Check Step Procedure 1, Insert the Programs Diskeile into drive A ofthe PC. 2. Select drive A. —_ 3. Use either EDIT in DOS or Notepad in Windows to display the source listing in file L3P3.LST that resides on the Programs Diskette. What isthe starting address offset from CS: forthe firs instruction (PUSH DS) of the program? ‘The lat instruction (RET) ofthe program? 4. Load the run module .3P3.8XE with the DOS command A:\>DEBUG L3P3.EXE (.1) — 5. Verify loading ofthe program by unassembling the contents ofthe current code segment for the offset range found in step 3 6. Initialize memory the same way as done in step $ of Part 1 7. Execute the program according tothe instructions that follow GO from address C$:00 through CS:13. What has happened to the values in DS, AX, CX, SI, and DI? ', GO from address CS:13 through CS:1. ‘e. Display the data from 2000:0100 through 2000:013F, Which byte of data was moved? ‘Where was it moved to? ____ 4. GO from address CS:1A to CS:13, What bas happened to the value in IP? ‘e. GO from address CS:13 through CS:1A. f. Display the data from 2000-0100 through 2000:013R. Whick Byte of data was moved?” ‘Where was it moved to? ____ & GO from address CS:1A through CSC. Display the data from 2000:0100 through 2000:013R. Describe the block move operation performed by the program, ——E How does it differ from the planned operation? Assume that it was to copy the block of data from 2000:100 through 2000:10F to the range 2000:120 through 2000:12F. From the printout of the progrsin’s operation, what is the error in the program? Exit DEBUG with the QUIT commandLABORATORY 4: WORKING WITH THE DATA TRANSFER, ARITHMETIC, LOGIC, SHIFT, AND ROTATE INSTRUCTIONS Objective Learn how to: + Verify the operation of data transfer instructions by executing them with DEBUG. + Verify the operation of arithmetic instructions by executing them with DEBUG. + Verify the operation of logic instructions by executing them with DEBUG. + Verify the operation of shift and rotate instructions by executing them with DEBUG. Part 4: jata Transfer Instructions Here we will use DEBUG commands to execute various instructions from the data transfer group to observe the operation that they perform, Figure A2.1 in Appendix 2 lists each DEBUG command, its syntax, and a brief description of its function. Save the sequence of DEBUG commands and their results to a Word document named labd. Be sure to mark, copy, and paste displayed information to the document before it scrolls off the top of the screen. Check off each step as itis completed. Check Step _ Procedure - 1. Assemble the instruction MOV SI,{ABCH) into memory at address C3:100 and verify loading ofthe instruction, How many bytes of memory does the instruction take yp? - 2. Initialize the word of memory starting at DS:OABC with the value FFFF,, and then verify with a DUMP command that the contents of memory have been updated, — 3. Clear the SI register and verify by redisplaying its contents — 4. Execute the instruction with a TRACE command. Describe the operation performed by the instruction —_ ‘5. Assemble the instruction MOV [SI],BX into memory at address CS:100 and then verify loading of the instruction. How many bytes of memory does the instruction take up? — 6. Initialize the SI register with the value OABC,,, BX with ABCD,., and verify by redisplaying theie contents — 7. Clear the word of memory starting at DS:OABC and then verify that the contents ofthis memory location have been set to zero with « DUMP command. —_ 8. Execute the instruction with a TRACE command. Examine the contents ofthe memory locetion that ‘was modified by th instruction. Deseribe the operation performed by the instruction. — 9, Exit DEBUG with the QUIT command —— 10. Insere tae Programs Diskette into drive A ofthe PC and select drive A. —_ 11, Use either EDIT in DOS of Notepad in Windows to display the source listing in file LAPI.LST that resides on the Programs Diskette. What is the stating address offset from CS: forthe first instruction (PUSH DS) of the progeam? ‘What isthe starting address offset from CS: forthe last instruction (RET) of the program? —— 12, Load the rum module L4P1,EXE with the DOS command A:\>DEBUG L4P1.EXE (1)— B Ts Verity loading of the program by unassembling the contents of the current cade segment for the offset range found in step 11 Execute the program according to the instructions that follow: ‘8. GO from address C$:00 through CS: b. Use TRACE commands to single step execute instructions through address CS:1E. Explain what ‘operation is performed by each instruction. INSTRUCTION 1 INSTRUCTION 2. —_ INSTRUCTION $ INSTRUCTION 6. INSTRUCTION 7 INSTRUCTION 8. INSTRUCTION 9. INSTRUCTION 10 Part 2: Arithmetic Instructions We will now continue by executing various instructions from the arithmetic group to observe their operation. Save the sequence ‘of DEBUG commands and their results to /ab4, Remember to mark, copy, and paste the displayed information to the document before it scrolls off the top of the screen. Check Step. — 1 Rn 10 Procedure ‘Assemble the instruction ADC AX,[0ABCH] into memory at address CS:100 and verify loading of the instruction, How many bytes of memory does the instruction take up? Initialize the word of memory starting at DS:0ABC with the value FFFF,, and then verify that the contents of memory have been updated with a DUMP command. Initialize register AX with the value 0001 ,, and verify by redisplaying its contents. Cleat the carry flag, Execute the instruction with a TRACE command. Describe the operation performed by the instruction, Does a carry occur? —____ Assemble the instruction SBB [SI], BX into memory at address CS:100 and then verify loading of the instruction. How many bytes of memory does the instruction take up? Initialize the SI register with the value 0ABC,,, BX with ABCD, 4, and verify by redisplaying their contents. Initstize the word of memory starting at DS:0ABC with the value FFF, and then verify that the contents ofthis memory location have heen correctly initialized with a DUMP command. Clear the carry flag. Execute the instruction with a TRACE command. Examine the contents of the modified memory location. Describe the operation performed by the instruction 16 Does @ borrow occur? —____ Exit DEBUG with the QUIT command, Insert the Programs Diskette into drive A of the PC und select drive A.1B 4 Use either EDIT in DOS or Notepad in Windows to display the source listing in file LAP2.L.ST that resides on the Programs Diskette. What is the starting address offset from CS: for the fi (PUSH DS) of the program? —__ What is the starting address offset from CS: forthe last instruction (RET) of the program? Load the run module L4P2.EXE with the command A:\>DEBUG LYP2.EXE (.1) 3 instruction ‘Verify loading of the program by unassembling the contents of the current code segment for the offset range found in step 13, Execute the program according to the instruetions that follow: a. GO from address CS:00 through CS:5. ». Use TRACE commands to single-step execute instructions through address C8:15, Explain what ‘operation is performed by each instruction. INSTRUCTION 1 INSTRUCTION 2 INSTRUCTION 3 INSTRUCTION 4. INSTRUCTION $ INSTRUCTION 6 Part 3: Logic Instructions In this section we will study the operation of various logic instructions by executing them with DEBUG. Save the sequence of DEBUG commands and their results to abd before the displayed information scrolls off the top of the screen, Check Step Procedure —_ 1. Assemble the instruction OR AX,(0ABCH] into memory at address CS:100 and verify loading of the instruction, How many bytes of memory does the instruction take up? — 2. Initialize the word of memory starting at DS:0ABC with the value $555, and then verify thatthe contents of memory have been updated with a DUMP command, —_— 3. Initialize register AX with the value AAA «and verify by redisplaying its contents — 4. Execute the instruction with a TRACE command, Describe the operation performed by the instruction, —_ 5, Assemble the instruction XOR (SI), into memory at addeess CS:100 and then verify loading of the instruction. How many bytes of memory does the instruction take up? — 6. Initialize the SI register with the value OABC, BX with 5555,,, and verify by redisplaying their contents — 7. Initialize the word of memory stating at DS‘OABC withthe value OOAA yg and then verify that the contents ofthis memory location have been correctly initialized with a DUMP command. — 8. Execute the instruction with a TRACE command. Examine the contents of the modified memory location. Describe the operation performed by the instruction. 9. Assemble the following instruction sequence into memory stating at address CS:100 and then verify loading of the instructions, NOT ax ADD AX, 2 How many bytes of memory do they take up? n0. Te Initialize register AX with the value FFFF, and verify by redisplaying its contents, Execute the instructions with TRACE commands. Describe the operation performed by each instruction, INSTRUCTION 1 INSTRUCTION 2 Part 4: Shift and Rotate Instructions Now we will execute various instructions from the shift and rotate groups to observe their operation. Save the sequence of DEBUG commands and their results to labd before the displayed information scrolls off the top of the screen. Check Step Procedure —__ A, Assemble the instruction SHL WORD PTR [ABCH],1 into memory at address CS:100 and verify loading of the instruction. How many bytes of memory does the instruction take up? — ‘What is specified by the word pointer? —___. —_ 2. Initialize the word of memory starting at DS:0ABC with che value $555, and then verify that the contents of memory have been vpdated with a DUMP command, — 3. Clear the carry fag, — 4, Execute the instruction with a TRACE command. Examine the contents of the modified memory 12 10. rT 2 1B 14, location, Describe the operation performed by the instruction, Does a carry occur? Assemble the instruction ROR WORD PTR [SI}}1 into memery at address CS:100 and then verify loading of the instruction, How many bytes of memory does the instruction take up? Initialize the SI register with the value ABC, , and verify by redisplaying its contents Initialize the word of memory starting at DS:0ABC with the value AAA, and then verify that the ‘contents ofthis memory location have been correctly initialized with a DUMP command. (Clear the carry flag, Execute the instruction with a TRACE command. Examine the contents of the modified memory location. Describe the operation performed by the instruction. Does a carry occur? Exit DEBUG with the QUIT command. Insert the Programs Diskette into drive A of the PC and select drive A. se either EDIT in DOS or Notepad in Windows to display the source listing in file L4P4.LST that resides on the programs diskette, What isthe starting address offset ftom CS: forthe first instruction (PUSH DS) ofthe program? ‘The last instruction (RET) ofthe program? Lond the run module LAP4.EXE with the command AG\>DEBUG LYP4.EXE (4) ‘Verify loading of the program by unassembling the contents of the current code segment for the offset range found in step 12,— 1S. Execute the program according to the instructions thet follow: a. GO from address CS:00 to CS:5, b. Use TRACE commands to single-step execute instructions up to address 8:10, Explain what operation is performed by each instruction, INSTRUCTION | INSTRUCTION 2 INSTRUCTION 3. INSTRUCTION 4 LABORATORY 5: WORKING WITH THE FLAG CONTROL, COMPARE, JUMP, SUBROUTINE, LOOP, AND STRING INSTRUCTIONS Objective Learn howto + Verify the operation of flag control instructions by executing them with DEBUG. + Verify the operation of the compare instruction by executing it with DEBUG. + Verify the operation of jump instructions by executing them with DEBUG. + Verify the operation of the subroutine handling instructions by executing them with DEBUG. * Verify the operation of the loop handling instructions by executing them with DEBUG. + Verify the operation of the string handling instructions by executing them with DEBUG. Part 1: Flag-Contral Instructions In this part ofthe laboratory we will execute a program sequence that includes instructions from the flag-control group to observe the operations that they perform. Figure A2.1 in Appendix 2 lists each DEBUG command, its syntax, and a brief description of ts function. Save the sequence of DEBUG commands and their results toa Word document named /abS. Be sure to mark, copy, and. paste displayed information to the document before it scrolls off the top of the screen. Check off each step as itis completed. Check Step Procedure —_ 1. Assemble the following instruction sequence into memory starting at address CS:100 and then verify Joading of the instructions, LABP MOV BH, AE AND BH, LPH AND AH, OOH Mov [2008],BH SBF How many bytes of memory do the instructions take up? —__ 2, Initialize the byte of memory at DS:200 with the value 00,, and then verify that the contents of memory have been updated with a DUMP command —_ 3. Clear registers AX and BX and verify by redisplaying their contents —_ 4. Display the current state of the flags. Change the flags to reflect the NG, ZR, AC, PE, and CY states. 13Execute the instructions one ata time with TRACE commands. Describe the operation performed by each instruction, INSTRUCTION 1 INSTRUCTION 2 INSTRUCTION 3 — INSTRUCTION 4 — INSTRUCTION s INSTRUCTION 6. Briefly describe the overall operation performed by the instruction sequence. Describe any changes to the MPU’ flags that result from execution of the instruction sequence. Part 2: Compare Instruction Here we will use DEBUG commands to execute an instruction sequence that involves the compare instruction to observe the operation that it performs, Save the sequence of DEBUG commands and their results to /abS, Remember to mark, copy, and paste the displayed informecion to the document before it scrolls off the top of the screen Check Step Procedure — 1. Assemble the following instruction sequence into memory starting at address CS:100 and then verify loading of the instruetions. MOV BX,13218 MOV AX, OBBBBE CMP BX, AX How many bytes of memory do the instructions ‘ake up? —_ 2. Clear registers AX and BX arat very by redisplaying their contents, — 3. Display the current state of the flags. 4 Execute the instructions one ata time with TRACE commands, Describe the operation performed by each instruction. INSTRUCTION } —________ INSTRUCTION 2 INSTRUCTION 3 — Briefly describe the overall operation performed by the instruction sequence. ‘What were the states ofthe status flags before the compare instruction was executed? —. ‘What were the states of the status flags after execution of the compare instruction? Exit DEBUG with the QUIT command, 14Part 3: Jump Instructions Now we will use DEBUG commands to execute and observe the operation ofa factorial calculation program that performs both ‘unconditional and conditional jumps. Save the sequence of DEBUG commands and their results to labs before the displayed information scrolls off the top of the screen. Cheek Step Procedure 2. 3. 4. Insert the Programs Diskette into drive A of the Select drive A. Use either EDIT in DOS or Notepad in Windows to display the source listing in file LSP3.LST which resides on the Programs Diskette. What is the starting address offset from CS: for the first instruction (PUSH DS) of the program? —__ What is the starting address offset from CS: for the last instruction (RET) of the program? ‘Load the run module LSP3.EXE with the command A:\>DEBUG LSP3.EXE (.1) Verify loading of the program by unassembling the contents ofthe current code segment for the offset range found in step 3. Execute the program according to the instructions that follow: GO from address C8:00 to CS:5. Load the number whose factorial isto be calculated (N = 5) into register DX. Clear the memory storage location for the value of the factorial (FACT). GO from address CS: to CS:10. What is the state of the zero flag? .- Execute the JZ instruction with a TRACE command, Was the jump taken?’ .- GO from address CS:12 to CS:16, What is the current value in AL? ,. Execute the IMP instruction with a TRACE command. Was the jump taken? ‘What isthe address of the next instruction to be executed? \- GO from address CS:E to CS:10, What isthe state ofthe zero flag? Execute the JZ instruction with a TRACE command. Was the jump taken? GO from address CS:12 to CS:16. What is the current value in AL? . Execute the JMP instruction with a TRACE command. Was the jump taken? ‘What is the address of the next instruction to be executed? 1. GO from address CS:E to CS:10. What is the state of the zero flag? im, Execute the JZ instruction with a TRACE command. Was the jump taken? 1, GO from address CS:12 to C8:16. What is the current value in AL? 6. Execute the JMP instruction with a TRACE command. Was the jump taken? ‘What is the address of the next instruction to be executed? 1. GO from address CS:E to CS:10. What is the state ofthe zero flag? |. Execute the JZ instruction with a TRACE command. Was the jump taken?’ r- GO from address CS:12 to CS:16. What is the current value in AL? - Execute the IMP instruction with a TRACE command. Was the jump taken? ‘What isthe address ofthe next instruction to be executed? 1. GO from address CS:E to CS:10. What isthe state ofthe zero flag? 1. Execute the JZ instruction with a TRACE cornmand. Was the jump taken? ¥. GO from address CS:12 to CS:16, What is the current value in AL? wmehese h, 52 ww. Execute the IMP instruction with a TRACE command, Was the jump taken? ‘What is the address of the next instruction to be executed? x. GO from address CS:E to CS:10. What isthe state of the zero fag? y- Execute the JZ instruction with a TRACE command. Was the jump taken? ‘What instruction is to be executed next? 2 GO to CS:1B., What is the final value in AL? —_____ ‘At what address is the value in AL stored in memory as FACT? aaa. Display the value stored for FACT in memory. Exit DEBUG with the QUIT command, Part 4: Subroutine Handling Instructions Next we will use DEBUG commands to execute and observe the operation of a program that employs a subroutine. Save the sequence of DEBUG commands and their results to JabS before the displayed information scrolls off the top of the screen, Cheek 16 Step Procedure 1 2 3. Insert the Programs Diskerte into drive A of the PC. Select drive A. Use either EDIT in DOS or Notepad in Windows to display the source listing in file LSP4.LST that resides on the Programs Diskette. What isthe starting address offset from CS: forthe first instruction (PUSH DS) of the program? ‘What is the starting address offset for the last instruction (RET) of the program? Load the run module LSP4.EXE. with the command A:\>DEBUG LSP4.EXE (1) Verify loading of the program by unassembling the contents of the current code segment for the offset range found in step 3. Execute the program according to the instructions that follow: ‘a. GO from address CS:00 to CS:5. What instruction is to be executed next? 'b. Load the numbers that follow for use by the arithmetic subroutine. (AK) = ~32\, = PPEOH (BX) = 27,5" = 001BK (cx) = 10), = OO0aH (DX) = 200,, = 00caH ce. Execute the call instruction with 2 TRACE command. What instruction is to be executed next? 4. GO to address CS:10. What is the sum in DX? . Check the value of the last word pushed to the stack, f Run the program to completion with a GO command. What is the final value in DX? _ How did the contents of DX become this value? Exit DEBUG with the QUIT command.Part 5: Loop Handling Instructions Here we will use DEBUG commands to execute and observe the operation ofa block search program that performs a loop. Save the sequence of DEBUG commands and their results to /ab5 before the displayed information scrols off the top of the scroen. Cheek Step Procedure 1 2. 3. 2 Insert the Programs Diskette into drive A of the PC. Select drive A. Use either EDIT in DOS or Notepad in Windows to display the source listing in the file LSP5.LST that resides on the Programs Diskette. What i the starting address offset from CS: forthe first instruction (PUSH DS) of the program? What isthe starting address offset from C for the last instruction (RET) of the program? Load the un module LSPS.EXE with the command, Az\>DEBUG LSPS.EXE (.1) ‘Verify loading of the program by unassembling the contents of the current code segment for the offset range found in step 3. Execute the program according to the instructions that follow: a. GO from address CS:00 to CS:12. b. Clear all storage locations in the range DS:0 through DS:AF. «. Initialize the byte storage location DS:03 with the value AB, 4. Display the contents of all storage locations in the range DS:0 through DS:AF. . GO to address CS:15. What is the value in SI? What are the states of CF and ZF? ‘What is the next instruction to be executed? {. Execute the LOOPNZ instruction with a TRACE command. Was the loop taken? B. GO to address CS:15, What is the value in SI? What are the states of CF and ZF? ‘What isthe next instruction to be executed? h. Execute the LOOPNZ instruction with a TRACE command, Was the loop taken? 1. GO toaddress CS:15. What is the value in SI? What are the states of CF and ZE? What is the next instruction to be executed? J. Exceute the LOOPNZ instruction with a TRACE command, Was the loop taken’? What is the next instruction to be executed? why? k. Rum the program to completion with a GO command. Overview the operation performed by the rogram. Exit DEBUG with the QUIT command. 7Part 6: String Handling instructions In this part of the laboratory, we will use DEBUG commands to execute and abserve the operation of an array comparison pro- ‘gram that employs a string instruction. Save the sequence of DEBUG commands and their results to Jabs before the displayed information scrolls off the top of the screen. Check _Step Procedure —_ 1. Insert the Programs Diskette ino drive A of the PC. 2. Selvet drive A. —_ 3. Use either EDIT in DOS or Notepad in Windows to display the source listing in file LSP6.LST that resides on the Programs Diskette. What is the starting address offset from CS: forthe first instruction (PUSH DS) of the program? ‘The last instruction (RET) of the program? — 4, Load the run module LSP6.EXE with the command Ar \>DEBUG L5PL.EXE (.1) — 5. Verify loading ofthe program by unassembling the contents of the current code segment for the offset range found in step 3, — 6. Execute the program according to the instructions that follow: a. GO from address CS:00 to CS:16. What is the state ofthe direction ug? Does this mean that autoincrement or autodecrement addresting,will be performed? ‘What isthe state of ZF? ‘What are the values in the DS, SI, and Di registers? — What is the count in CX? _ What is the next fastruction to be executed? —_ . Clear all storage locations in the range DS:00 through DS:C7. ¢. Fillall storage locations in the range DS:C8 through DS:18F with FF. . Initialize the word storage location starting at DS:08 with the value FEFF),, €. Display the contents ofall storage locations in the range DS:00 througit DS:18F f, Run the program to completion with a GO command and then display the registers. What is the state of ZF? ‘What are the values in the DS, SI, and DI registers? ——___. ‘What is the count in CX? Overview the operation performed by the progeatn, —_ 7. Exit DEBUG with the QUIT command. 18Assembly Language Program 2 Development and the Microsoft Macroassember (MASM) LABORATORY 6: ASSEMBLING, EDITING, LINKING, AND EXECUTING ASSEMBLY LANGUAGE PROGRAMS Objective Learn how to: + Use MASM to assemble a source program into object and run modules. + Identify and corret syntax errors in a source program. + Edit an existing source program. + Make a run module with the LINK program, + Load and execute a run module with the DEBUG program, Part 1: Assembling a File with MASM In this part of the laboratory, we begin by assembling an existing source module with MASM. All programs used will befor the block-move program used as an illustrative example throughout the textbook. Check off each step as itis completed. Check Step Procedure 1. Ensure that a path is set to the MASM directory. 2. Insert the Programs Diskette into drive A and select drive A. 3. Use either EDIT in DOS or Notepad in Windows to display and print the source progeam in the file LSPL.ASM. — 4, Assemble and link the program with MASM version 6.11 using the object file name L6P1.OBI, source listing name L6PI.LST, and execution file name L6PI.EXE. The assemble command is, Ar\>ML/P1 LbPL.ASM (41) S. How many warning errors are reported? Severe errors? 197 10. Use either EDIT in DOS or Notepad in Windows (o display and print the source listing inthe file L6PLLST. Ac what lines of the source listing are the machine codes of the instructions that are used to load the source and destination addresses located? ‘What isthe source code form of the instruction that is used (o load the source index register? What is the opcode of the instruction? ‘What isthe immediate operand? ‘What isthe instruction pointer offset associated with the instruction in step 87 From che listing file printout identify the constants defined in the program. What does the conslant W stand for? In which line of the source listing does it occur? Part 2: Correcting a Source Program with Syntax Errors The source program assembled in the first part ofthe laboratory did not contain any syntax errors. Here we will assemble one that has errors and use the error information reported by MASM to correct the program. Check Step Procedure 1 2 3. — 7 Ensure that a path is set to the MASM directory, Insert the Programs Diskette into drive A and select drive A. ‘Assemble and link the program L6P2.ASM with MASM version 6.11 using the object file name L6P2,0BJ, source listing name L6P2.LST, and execution file name L6P2,EXE. ‘The assemble command is Ar\>ML/FL LEP2.ASM (1) How many warning errors are reported by the assembly process? Print the source listing ile L6P2.LS7 Circle the errors in the source listing. List the cause and correction for each error. Use EDIT to make the corrections in source file L6P2.ASM. Reassemble the source file L6P2.ASM and verify that no errors exist. Otherwise, repeat the edit/assemble sequence, Part 3: Modifying an Existing Source Program Next, we will take an existing source program, modify it, and then reassemble it. Check Step Procedure Ensure that a path is set to the DOS and MASM directories. Insert the Programs Diskette into drive A and select drive A. Use EDIT in DOS or Notepad in Windows to display and print the source program LOP3.ASM. ‘Modify the program such that the exact same block move operation is performed, but gerform the block transfer with a combination of LOOP and MOVSB instructions. Be sure the direction flag is sex to the appropriate direction.5 6 1 Edit the changes to the program and save as L6P3.ASM. Assemble/edit the program until there are no errors. Print out the final source program L6P3.ASM Part 4: Creating a Run Module with the LINK Program In the earlier parts ofthis laboratory, we assembled a program, identified and corrected syntax errors in a program, and modified source programs with an editor. This resulted in three error-free object modules. Here we will use the linker program to make run modules that can be executed on the PC. Cheek Step Procedure 1, Ensure that a path is set to the MASM directory. 2. Insert the Programs Diskette into drive A and select drive A. 3. Use the LINK program to ereate « run module for the source program in file L6P1.OBJ. Select the name of the run module file as L6P1.EXE and the map file as L6PI.MAP. To start the link process use the command :\SLINK (1) 4, Use EDIT in DOS or Notepad in Windows to print out the link map file. What are the star and stop addresses of the code segment? ‘What is the entry point ofthe program? 5. Repeat steps 2 and 3 for the object module L6P2.0B1. 6. Repeat steps 2 and 3 for the object module L6P3,0B1. Part 5: Loading and Executing a Run Module with DEBUG Now we have several run modules ready to be executed on the PC. In this part of the lab, we will Load the program with the DEBUG program and run it to verify that there are no execution errors Cheek Step Procedure 1 Ensure that a path is set to the MASM directory. Insert the Programs Diskette into drive A and select drive A. Print the source listing L6P!.LST for use asa reference in the steps that follow. Load the run module L6P1.EXE in DEBUG with the command A\>DEBUG L&P}.EXE (41) Display the initial values of the MPU’s registers, What is the original value of DS? Verify loading of the program by disassembliag the contents of memory, beginning with the start, address and ending at the stop address inthe linker map file printout for file L6P1.MAP. Execute the program according to the instructions that follow. Save the DEBUG session to a Word document. 1, Reset the value in DS to 2000H and fill the locations from DS:0100 through DS:010F with the value FFE; fll the locations from DS:0120 through DS:012F with the value OOH; then display these memory ranges to verify correct initialization. Reset DS to its initial value. 21+h. GO from the beginning of the program down to the instruction MOV AH(SI] ‘What are the values in the following registers? (ax) (Ds) (st) = (DI) (cx) ©, Use another GO command to execute the program down to the instruction JNZ. 0013. Display the Contents ofthe source and destination blocks of memory. What has changed? 4. Run the program to completion. €. Redisplay the contents of the source and destination blocks, Describe the operation performed by the program, 8. Rum the program in file L6P3.EXE ita similar way to that outlined for LOPI.EXE in steps 2 through 6, Save the DEBUG session to a Word document. Does this program perform the exact same operation as observed for the block-move program in step 6? If not, what isthe cause of the execution error? LABORATORY 7: CALCULATING THE AVERAGE OF A SERIES OF NUMBERS Objective Learn how to: * Describe a function that isto be performed with a program, + Weite a program to implement the function. + Run the program to verify that it performs the function for which it was written. Part 4: Description of the Problem Determine the average of a set of data points stored in a buffer. The number of points in the buffer, the offset address of the beginning of the buffer, and the data segment address are stored in a table called a parameter table. Figure L7.1(a) shows an ‘example of the parameters needed for the average program, Notice that the beginning address ofthis table is named COUNT. ‘This first address holds the number that indicates how mary data points are in the buffer. Since a byte is used to specify the umber of data points, the size of the buffer is limited to 255 bytes. The offset address of the beginning of the data buffer is stored in the table location called BUFFER. The data buffer segment is defined by the contents of location BUFFER +2, Assuming the data points as signed 8-bit binary numbers, write a program to find their average. 22o ae Estbshbegmngcl data sage aa tr (a) ‘Address Contents Meaning Set counter for the @ , Sevoomer rte | waacaton cont [10 Minbar ce pic a Butler CJ Oftset address for the Sette eal sum 2 Sot a aregets 20 a agent ater one no i Salar Le | penne Pitre Ser eronaine ‘aia pot © yoy Ax oMA.sEG ¢ Nov Bx Bey BB raaimpoet | eam ain wey ee Seen | tos Srburren nov oko i__. NXTPT: MOV ALIS! Update the ceunter and Update pointer caw eax attyosstor ono pot | f an curr INC. 3 ore ek Se Sxrer ov Axe ‘acs rex iow a aoced” rombe'aipois 0 | bcalaate avenge conan FIGURE L7.1 (a) Parameter table for average calculation program. (b) Flowchart for average calculation. (c) Program. 23Part 2: Writing the Program “The average can be found by adding all the signed numbers and then dividing their sum by the number of points that were added. Even though 8-bit data points are being added, the sum that results caa be more than § bits. Therefore, we will consider 16-bit result for the sum, and it will be held in register DX. The average that is obtained turns out to be just 8 bits long, It will be available in AL at the completion of the program. ur plan for the program that will solve this problent is shown in Figure L7.1(b). This flowchart can be divided into six basic Coperations, which are initialization, preparing the next point for addition, performing the addition, updating the counter and pointer, testing for the end of the summation, and computing the average. Initialization involves establishing the data segment and data buffer addresses and loading the data point counter. This is achieved by loading the appropriate registers within the MPU with parameters from the parameter table. The instructions that, perform this initialization are as follows: MOV AX,DATA SEG MOV DS,Ax MOV CL,CounT MOV BL,CI, LDS SI, BUFFER The first two instructions define the data segment in which the parameter table resides. This is achieved by first Joacing AX withthe value of DATA_SEG and then copying it into DS. ‘The instruction the¢ follows this loads CL. from the first address in the parameter table. This address is COUNT and contains the number of points to be used in forming the average. Looking at Figure L7-1(a), we see that this value is 10,g, The next instruction copies the number in CL. into BL for later use, The LDS instruction is used to define the buffer together with the data segment in which it resides. This instruction first loads SI with the offset adress of the beginning of the buffer from table location BUFFER and then DS withthe address ofthe data segment in which the data lies from table location BUFFER +2. The stumnraust start with zero; therefore, register DX, whichis to holt the sum, is loaded with zero by the instruction. MOV DX,O The next operation involves obtaining a byte of data from the buffer, making it into a 16-bit number by sign extension, and adding i to the contents of the DX register. This is accomplished by the following sequence of instructions. NXTPT: MOV AL, [ST] CBW ADD DX, AX ‘The first instruction loads AL with the element in the buffer that is poiated to by the address in SI. The CBW instruction con- verts the signed byte in AL to signed word in AX by extending its sign. Next, the 16-bit signed number in AX is added to the ‘sum in DX, Notice that the label NXTPT (next point) has been used on the first instruction. ‘To prepare for the next addition, we must incement the value in SI such that it points to the next element in the buffer and. decrement the count in CL. To do this, we use the following instructions: INC SI DEC CL If the coacents of CL at this point are nonzero, we should go back to obtain and add the neat clement from the buffer; otherwise, sve just proceed withthe next instruction in the program. To do this, we execute the following instruction: INZ NXTPT 26Execution of this instruction tests the value in ZF that results from the DEC CL. instruction. If this flag isnot set to one, a jump is initiated to the instruction corresponding to the label NXTPT. Remember that NXTPT is placed at the instruction used to move the byte into AL for addition to the sum. In this way we see that this part of the program will be repeated until all data points have been added. After this is complete, the sum resides in DX. The average is obtained by dividing the accurmulated sur in DX by the number of data points. The count of data points was saved earlier in BL. However, the contents of DX cannot be divided directly. It mus first be moved into AX, Once there, the signed divide instruction can be used to do the division. This gives the following instructions: MOV AX,DX IDIV BL The result ofthe division, which isthe average, is now in AL. The entire average calculation program is shown in Figure L7.1(¢). Part 3: Running the Program The source program in Figure L7.2(a) employs the average calculation algorithm we just developed asa procedure. Tis pro- ‘gram was assembled and linked to produce a un module in file LAB7.EXE, The source listing produced by the assembler is, shown in Figute L7.2(b), Now we will execute the program on the PC with 16 arbitrarily selected data points. Check off each step as itis completed. Check Step Procedure 1. Load the run module LAB7.EXE in DEBUG with the command. A:\>DEBUG LAB?-EXE (1) 2. Verify loading of the program by unassembling the contents of memory starting at the current code segment, 3. Execute the program according 10 the instructions that follow: ‘a. GO from address CS:0 through CS:A. What are the contents of the data segment register? b, Use DUMP commands to display the contents of the fist five data segment storage locations. ‘What is represented by the byte at DS:0? ‘What is represented by the next four bytes? ‘e. GO to address CS:17, What is represented by the contents of registers CL, BL, SI, and DX? (cL) (BL) (st) (px) ‘What physical data storage location is addressed by DS and SI? 4. Load DS:0 through DS:F with the values, 4, 5,6, 4, 5,6, loading with a DUMP command, . GO to address C8:25. What isthe sun? ‘What isthe integer average? ‘What isthe remainder? £. Run the program to completion. , FF, 1, 2,0, 1,5, 5, and 5. Verily 25mmme ence srnex_ see smack_se6 aata_se sorren BATA. cone_se ERB PROC LABORATORY 7 ne 8, 64 Due (| 5xos a6 BD_—_10000000H Nos ‘Secwent ‘CS:CODE_SEG, S5:STACK SEA, ‘cope bs:oaTa_see To return to DEBUG program put return addcess on the stack ust AK, 0 #Following code implements Laboratory 7 DIV RET as) ENDP ‘coe_ses AX, DATA_seG peetablion data segeent ce, cour: sEstablish data point count BE, cL St, BUFFER iPoincar for date points Dx, 0 pinieial sun = 0 aL, (ST) Het a byte size data point Heonvert. the byte to word Dk, AK indd to last sum st Feosnt co next data point a. PALL data points added ? NxTeT TIE not = eepeat AX, OK compute average = sun/count os pRetuen to DEBUG program FIGURE L7.2 (a) Source program for average calculation. 26Microsoft (R) Macro Assembler Version 6.12 06/28/99 20:40:00 LABORATORY 7 Page 1-2 ‘TUPLE LABORATORY 7 PAGE 4132 0000 sTACK_sec SEGMENT STACK ‘STACK 2000 0040 1 Da 4 Duet?) 08 ’ 040 sTRCK_seG exes 0000 DATA_SEG secuent para 0000 10 ‘count bee. 001 10000000 BUFFER BD 100000008 9005 DATA_SES ExDs 000 ccone_se6 senen? ‘cove 000 TAB? PROG FAR ASSUME CS:COOE_SEG, SS:STACK SEG, D5:0A7A_SEG so return to DEBUG program put return address on the stack 0000 1 rusk os. 001 28 0000 NOV AK, 0 008 50 pusk Ax sFollowing code inplenents Laboratory 7 0005 a8 ---- Mov AK, OATA_SE6 sestablish data segment (0008 SE D8 Nov DS, AK 000A GA OE 0000 R Mov CLy couNT sEetapligh date point count 000 8A 09 NOY BLy cL 0010 5 36 ooo & os ST, BUFFER sPointer for data points ore BA 0000 Nov Dk, 0 HInitial sun = 0 0017 @a 04 Nerer: MOV Aly (SE) Get a byte e1ze data point ors 98 cow Convert the byte to word Bola 03 Do ADD Dkr AK Gadd to last sur coc 46 ine st Point to next data point 9010 FE ¢9 bec ck. TALL aate pointe aadea ? OOLE 75 Fé oe Neer BIE not ~ repeat 9021 98 c2 Mov AK, De Compute average = sum/count 0023. F6 Fa Tory BL 0025 cB, eer iRetuen to DEBUG program 026 as? ENDe 0026 Cone_ses nos exp nae? FIGURE L7.2 (b) Source listing produced by assembler. (Continued)Microsoft (R) Maco Assenbler Version 6.11 06/28/99 10:40:00, EABORATORY 7 Symbols 2-2 Segnents and Groups: wane size Length Align Combine cla cone_se 16 Bit 0026 Para Private ‘Cone DATALSEG 16 Bit 0005 Para Private "DATA STRCK_SES) 16 Bit 0040 Para Stack. "STACK? Procedures, paranetees and locale: Name Type value atte UR eee P far 0000 CODE_SEG Length 0026 Public wxer DDL! : LNeas 0017 6 symbots: Name Type value ater BUFFER . Dior 9p: DATA ses ‘count Byte 4000 DATA,SEG 0 mesninge FIGUREL7.2 (Concluded) LABORATORY 8: SORTING A TABLE OF DATA Objective Leara how to: + Describe a function that isto be performed with a program. + Write program to implement the function. + Run the program to verify that it performs the function for which it was written Part 1: Description of the Problem Sort an array of 16-bit signed binary numbers so that they are arranged in ascending order. For instance, if the original array is 5, 4, 29, 15, 38, 3, ~8, ~32 after sorting, the array that results would be ~32, a, 3, 5, 25, 29, 38 Assume that the array of numbers is stored at consecutive memory locations from addresses A400, through AMIE, ,, Waite a sort program Part 2: Writing the Program First, we will devefop an algorithm that can be used to sort an aay of elements A(0), A(I), A(2), through A(N) into ascending onder. One way of doing this isto take the frst number inthe array, which is A(0), and compare it to the second number, ACI} IfA(O) is greater than A(1), the two numbers are swapped: otherwise, they are let alone. Next, A(0) is compared to A(2) and, 28based on the result ofthis comparison, they are either swapped or left alone. This sequence is repeated until A(0) has been compared with all numbers up through A(N). When this is complete, the smallest number will be in the A(0) position. ‘Now A(t) must be compared to A(2) through A(N) in the same way. After this is done, the second smallest number i inthe ‘A({) position. Up to this point, just two of the N numbers have been putin ascending order. Therefore, the procedure must be continued for A(2) through A(N-1) to complete the sort Figure L8. (a) illustra the use ofthis algorithm for an array with just four numbers. The numbers are A(0) = 5, A(1) = 1, AQ) = 29, and A(3) = ~8. During the sort sequence, A(Q) = 5 is first compared to A(1) = 1. Since Sis greater than 1, A(0) and ‘A(J) are swapped. Now A()) = | is compared to A(2) = 29. Ths time I is less than 29; toerefor, the numbers are no! swapped and A(0) remains equal to !. Next A(0) = 1 is compared with A(3) = 8. A(O) is greater than A(3). Thus A(O) and A(3) are swapped and A(0) becomes equal to ~8, Notice in Figure L8.1(a) that the lowest of the four numbers now resides in A(0). ‘The sort sequence in Figure L8.1(a) continues with A(1) = 5 being compared first to A(2) = 29 and then to A(3) = I. Inthe first comparison, A(I) is less than A(2). For this reason, their values are not swapped. But in the second comparison, A(l) is greater than A(3); therefore, the two values are swapped. In this way, the second lowest number, which is I, is sorted into A(1) It ust remains to sort A(2) and A(3). Comparing these two values, we sec that 29 is greater than 5. This causes the two values to be swapped so that A(2) = 5 and A(3) = 29. As shown in Figure L8. (a, the sorting of the array is now complete. ‘Now we will implement the slgorithm on the 80X86 microprocessor. The flowchart for its implementatios is shown in Figure L8.1(b) x ° 2 23 Statue: A(t) 5 1 2 8 original array a) 829 8 Array after comparing A(0) and A(1) A) 1 528-8 comparing A(O) and A(2) at) | -8 Sap | ray atter comparing A(0) and A(3) acy | -@ $33 1 | array atter comparing AC) and A(2) ay | -@ 9 fap 3 | aray comparing A(1) and (2) a eo. 528 | array comparing A(2) and A(3) FIGURE L6.1 (a) Sort algorithm demonstration. The first block in the flowchart represents the initialization of data segment register DS and pointers PNTR1 and PNTR3. The DS register is initialized with the value DATA_SEG to define a data segment that contains the beginning and ending addresses of the array to be sorted. PNTRI points to the first element of data in the array. It is register SI and is initialized to the value ARRAY_BEG, For pointer PNTR3, we use register BX and initialize it with the value ARRAY_END, It points to the last element in the array. Next, PNTR2, the moving pointer, is initialized so that it points to the second element in the array. Register DI is used to hold this pointer. This leads tothe following instruction sequence for initialization, MOV AX,DATA SEG MOV DX, aX MOV SI, ARRAY BEG MOV BX, ARRAY END AA: MOV DI,ST ADD DI,2 Notice that DS was loaded via AX with DATA_SEG (1AOGH) to define the data segment I and BX, which are PNTRI and PNTRS, respectively ae loaded with immediate operands ARRAY BEG (0400H) and ARRAY_END (O40E!). In this way they point the frst and last elements ofthe array, respectively. Finally, register DI, which is PNTR2, is loaded with 04004 fom SI and then increased by two with an ADD instruction se that it points to the second element inthe array. This eompletes the initialization process. ‘Neat, the array element pointed to by PNTRI is to be compared to the element pointed to by PNTR2. Ifthe element corre. sponding to PNTRI is arithmetically less than the element corresponding to PNTR2, the two elements are already in ascending 29‘AK. \AOOH Os.ax SLO40oH 8x.0406H Dust ote ax.(sth ax.l0n cc Dx.t00 (stiox (omhax ot ot Diex Tniaae 0S, an PATRI, and PNTRO PNTRY = (s1) 8 PNTR2= (00 PNTRI= (8X) stex © FIGURE L8.1 (b) Flowchart for the sort program. (c) Program. ‘order. But if ths is not the case, the two elements must be interchanged. Both of these elements are in memory, However, the MPU cannot directly compare two values in memory, For this reason, one of the two elements must be moved to a register ‘within the microprocessor. We use AX for this purpose. The resulting code is as follows: BB: MOV AX,(ST] CMP AX, [DI] JLE CC MOV DX, [DI] MOV [SI],Dx MOV [DI] ,Aax 30The first instruction moves the element pointed to by PNTRI into AX. The second instruction compares the value in AX with the clement pointed to by PNTR2. The result of this comparison is reflected inthe status flags. The jump on the less-than or ‘oqual-o instruction that follows checks if the first element is aithmetically less than or equal to the second elerment. Ifthe result of this check is yes, control is transferred 10 CC. CC isa label to be used in the segment of program that will follow. IF the check fils, the two lements must be interchanged. In this case, the instuctions executed next move the clement pointed to by PNTR2 into the location pointed to by PNTRI. Then the copy ofthe original value pointed to by PNTRI, which is saved in AX, is moved to the location pointed to by PNTR2 “To continue sorting through the rest of the elements inthe array, we update PNTR2 so tha it points tothe next element. The comparison is repeated until the first element has been compared to each ofthe other elements in the array. This condition is satisfied when PNTR2 points to the lst element in the array. That is, PNTR2 equals PNTR3, This part of the program can be done withthe code that follows: INC DI INC DI CMP DI,BX JBE BB The first wo instructions update PNTR2 so it points to the next element. The third instruction compares PNTR2 to PNTR3 to determine whether or not they are equal. If they are equal to each other, the first element has been compared to the last element and we are ready to continue with the second element, Otherwise, we must repeat from the label BB. This test is done with the jump on below or equal instruction. Notice that label BB corresponds to the beginning of the part ofthe program that compares, the elements of the array. Once we fall through the JBE instruction, we have placed the smallest number in the array into the position pointed to by PNTRL To process the rest ofthe elements in the array ina similar way, PNTRI must be moved over the entire range of elements and the foregoing procedure must be repeated. This can be done by implementing the code that follows: INC SI INC SI CMP SI,BX JB OA NOP The first swo instructions increment PNTR1 so that it points to the next element in the array. The third instruction checks if all the elements have been sorted, The fourth instruction passes control back to the sorting sequence of instructions if PNTRI does not point to the last element. However, if all elements ofthe atray have been sorted, we come to a halt atthe end of the program. The entire program appears in Figure L8.1(¢). Part 3: Running the Program ‘The sort algorithm we just developed is implemented by the source program in Figure L8.2(a). This program was assembled and linked to produce a run module in file LAB8.EXE. The source listing produced by the assembler during the assembly process is shown in Figure L8.2(6). Now we will run tke program on the PC for an arbitrary set of data points. Check aff each step as itis completed. Check _Step_ Procedure 1. Load the program LABS.EXE with the command Az\>DEBUG LABS.EXE (1) — 2 Verify loading of the program by disassembling the contents of memory starting atthe current code segment, 313. Execute the program according to the instructions that follow: ‘a, Enter the following 16-decimal data values as 16-bit numbers starting at the address defined by ARRAY_BEG. 5,0, by Verify the 16 data values by dumping them. €. Execute the program from the slat till CS:2D. d. Dump the 16 data values starting from the address ARRAY_BEG. Are the numbers sorted” €. Execute the program to completion. 3,2,12,-20,77,2,9,-2,53,-5,1, 28,145,159. TITLE LABORATORY ¢ PAGE STACK_se6 STACK_SEG Orta sea ARRAT_BES [ARRRYTEND DATA, BEG cove_sec TRB PROC ASSUME C8:CODE_SEG, S5:STACK_SEG, DS:0RTR secuent stack ‘STACK DB. 64 Due(?) Nos seowENt Rta a 00H Da HOEK exos SEGMENT "cone FAR #70 return to ORBUG program put return address on tne stack pust aK, 0 x #Following code inpzenents Laboratory 6 Nov Ak, DATA_sec pEstablish dats sagnent Nov Bs, AK Mov Sr, ARRAY_BEG dEstabliah PNTRL Mov BX, ARRAY END Pestablaeh PNTRS BAL Moy DL, ST Pestapiien PNTRE DDL, 2 eB: Moy AK, [STI scompace two elements oH AK, (DTH me ce iM interchange 2 aqual/lese MOV DX, (0rd Jotnerwise interchange ov st, oF Moy 1007) AK ce: INC or update Puree oe 3t, Bx puast element ? vB Be no we st fupdate PNTRL INC ST owe St, ex Fast comparison 7 vB RR fie se Dove: NOP RET iRetuen to ORBUG prot rage ENDP cone_sts exos END cape FIGURE L8.2 (a) Source program for sorting a table of data. (Gontnvea) 32Microsoft (R) Macro Assembler Veesion 6.12 06/28/99 20:49:35 LABORATORY 8 Page 1-1 TITLE LABORATORY & pace ,132 2000 STRCK_SEG SEGMENT STRCK ‘STACK 0000 o0s0 | bs 4 Duet?) 00 1 040 STACK_s86 exos ooco DATA SEG ‘SEGMENT voaTAY 0000 0400 ARRAY. BEG ce 40H 002 0408, ARRAY END Da AOEH 004 DATA_3E ENDS 0000 cove_se¢ ‘seowent ‘cove 000 TARE” eROC_ FAR ASSIME CS:CODE_SEG, S9:STACK_SEG, 0S:DATA SEG Fo return to DEBUG program put return address on the stack 9000 3 push ne 002 88 0000 Mov AK, 008 50 PusH AK sFollowing code inplenerts Laboratory @ 0005 BB ---- R Mov AK, DATA_s86 sEstablish data segrent 0008 aE De Mov os, AX 000A 8B 36 0000 & MOY SI, ARRAY _BES pestablish PNTRL 000 eB ie d002 Mov BK, ARRAY™END jStablish BNTRS 0012 9B FE Mov Br, st sstablish PRTR? 018 83 6? 02 aod Dr, 2 0017 ep o« Be: Mov AX, [sr] Compare exo elements 0019 3B 05 cmp AK, (DI) oo1a 78 06 me ce iNo interchange if equal/iess oo1D 88 15 Mov DX, [07] sOtherwise interchange oor 80 16 soy (si), of 002i 89 05 ov Bt)y AX 0023 47 ce: NCO supdate eNTR 002 47 incor 002s 38 eB ae br, Bx Hast elenent 7 0027 26 gE Jee Be 0029 46 ine St Hupdace eNTRL oon 46 inc St 0028 35 83 cet, Bx sagt comparteen 7 020 72 83 cB ORR STE ns, oo2r 30 owe: NOP 0030 ca RED #Return to DEBUG program 031 Lage EDP 031 cooe_sea eos END LaRe FIGURE 8.2. (b) Source listing produced by the assembl (Continued)Microsoft (R) Macro Aasenbler Varsion 6.11 06/20/99 10:49:35 LABORATORY & Symbols 2 ~ 1 Segnents and Groups: Name Size ength Align Combine Clase CODE SEG ee ee. se Bt 008 Pare paracses |) 36 Bit 0004 Para sta ses : 16 Bie 0040 Pare Procedures, parameters and locals: une 0000 cope_seG Length 0031 Public ~ 0012 cove"sec BB ci? cove_se6 colt 0023 Cone "ses poe De 002F © Sone “sEe symbole: wane Type Value Atte ARAL BEG es Word 0000DATA. se. ararvieng DDL Mord 0002—-DATALSES 0 Raznings FIGURE L8.2 (Concluded) LABORATORY 9: GENERATING ELEMENTS FOR A MATHEMATICAL SERIES Objective Learn bow to: + Deseribe a function thats to be performed witha program. + Write program to implement the function + Run the program o verify that it performs the function for which it was writen. Part 1: Description of the Problem Write a program to generate the frst ten elements of a Fibonacci series. In this series, the first and second clements are zer0 and one, respectively. Each element that follows is obtaized by adding the previous two elements, Use a subroutine to generate ‘the next element from the previous two elements. Store the elements of the series starting at address FIBSER. Part 2: Writing the Program (Our plan for the solution of this problem is shown in Figure L9.1(a). This flowchart shows the use of a subroutine to generate ‘an clement of the series, store it in memory, and prepare for generation of the next element, 34cP aban ata rene seven rd counter I “Save ft evo numbers ‘often (OK = count or the numbers feraning tobe gered {olan number greeted INuM2« memary locaton for the ast FIBSER = memory teation forthe Brgnring of theses sente ‘Shwe agers to be ad in the subroutine T “Get previous t t Severe narber MOV AX.OATA.SEG Nov Osx Mov NUMIoH Mov NUM2.IH Mov FIBSEROH MOV FIBSERS1.IM LEA OLFIBSER+2 Mov cxaH NXTNM: CALL. SRATE DEC cx JNZ—_NXTWM one nor. ‘HRTF: Push Ax PusH 8x Nov ALNUMY Mov BLNUM2 A00 ACBL. Mov [oll AL Mov NUMIBL Moy NUMZAL inc ot ror ax ror ax ReT eo t number tbe generates t t Restore eiaers ee on the ack 1 FIGURE L9.1 (a) Flowchart for generation of a Fibonacci series. (b) Program. The first step in the solution is initialization. It involves setting up a data segment, generating the first two numbers of the series, and storing them at memory locations with offset addresses FIBSER and FIBSER+ 1, Then a pointer must be established to address the locations for other terms of the series. This address will be held in the DI register. Finally, a counter with initial value equal to 8 ean be set up in CX to keep track of how many numbers remain to be generated. The instructions needed for initialization are: Mov Mov Mov Mov Mov xOv LEA ov AX, DATA_SEG DS,AX NUML,O NUM2,1 PIBSER,O PIBSER+},1 DI, FIBSER+2 cx,8 Notice thatthe data segment address is defined as DATA_SEG. Itis first moved into AX, and then DS is loaded from AX with another MOV operation. Next the memory locations asigned to NUMI and NUM? are loaded with immediate data 0000,, and (001, respectively. The same values are then placed in the storage locations forthe first two seros elements, FIBSER and FIBSER +1, Now DI is loaded withthe address of FIBSER+2, which is pointer to the storage location of the third element of the series, Finally, CX is loaded with 8, 35‘To generate the next term in the series, we call a subroutine, This subroutine generates and stores the elements. Before returning to the main program, it also updates memory locations NUM1 and NUM2 with the values of the immediate past (wo clements. After this, the counter in CX is decremented to record that a series element has boen generated and stored. ‘This process must be repeated until the counter becomes equal to zer0. This feads to the following assembly language code: NXTNM: CALL SBRTP DEC cx ONZ NXTNH DONE: NOP ‘The call isto the subroutine labeled SBRTE. After the subroutine runs to completion, program contro! returns to the DEC CK statement. This statement causes the count in CX to be decremented by one, Next, a conditional jump instruction tests the zero flag to determine ifthe result ater decrementing CX is zero. If CX is not zero, control is returned to the CALL instruction at NXTNM. If itis zero, the program is complete and execution halts. ‘The subroutine itself follows: SBRIF: PUSH AX PUSH BX MOV AL, NUL MOV BL, NUMe ADD AL,BL mov (DI), aL MOV NUM1,BL MOV NUM2, AL INC DI POP BX POP AX RET First, we save the contents of AX and BX on the stack. Then NUMI and NUM2 are copied into AL and BL, respectively. They are then added together to form the next element. The resulting sum is produced in AL. Now the new element is stored in mes ory indirectly through DI. Remember that DI holds a pointer to the storage location of the next element of the series in mem= ‘ory. Then the second element, which is held in BL, becomes the new first clement by copying it into NUMI. The sum, which isin AL, becomes the new second term by copying it into NUM2. Finally, DI is incremented by one so that it points to the next clement ofthe series. The registers saved on the stack are restored and then we return to the main program. Notice that both the subroutine call and its return have Near-proc operands. The entire program is presented in Figure 19.10) 36TITLE LABORAT PAGE STACK_seG DATA_sEG num FIaSER cone_see ‘ony 9 32 SEGMENT 08 SEGMENT STACK *stACK* 6¢ 0ue(?) (CS:CODE_SEG, S8:STACK_S5G, DS:0ATA SEG Fo return to DEBUG program put return address on the stack rush #Following code 2x implements Laboratory 9 Mov AK, DATA S56 FEstablish date segnent wov 0S, ax nov Mu, 0 sinieialsze first number Nov MuM2, 1 initialize second number mov FTBSER, 0 First number in series vov — FTBSERSL, 1 isecond number in series TEAL, Frastat2 FPointer to next elenen nov ck, 8 initialize count vwemet: CALL SBRTP iGenezate next element mee cx, onze FTE not done Ret SORTF PROC PUSH isave registers used Nov soenerate next elenent Nov 00 wov yPrepare for next call Nov ine Pop iRestore regieters ker Sorte ENDP iro _ ENP cone._ses eos FIGURE L9.2 (a) Source program for generating a Fibonacci series. (Conti 7TITLE LABORATORY 9 pact 232 ‘000 STACK SEG SEGMENT stick ‘stack’ 000 o040 ¢ 8 64 uet?) 00 1 cove STACK StS ENDS 000 DaTA_SE6 ‘secuene soazat 000 00 nue oe 2 001 00 nan De. 2 002 “d00a 1 PEBSER Ey to ove(?) 1 006 cata se 2x08 000 coe_st6 seGMenr ‘cove 000 TABS” PROC EAR ASSUME C5:0006_SE6, S5:STACK_SEG, 08:DAA SEC #0 eetumn to DEBUG Progeam put return addzess on the stack 0009 1 zusH Ds 001 58 0000 vov My 0 S008 0 PUSH mx sfoLlowing code smplenente Laboratory 9 0005 Be -——— R Nov Ak, DATA. seo sBetablish data segnent 0008 SE be Nov Sy Ax 00a C6 06 0000 R 00 ov NM, © HInitialize sense number OO0F Gs 0¢ GOCL ROL yoy MUM) Hiattselize second nurber cote C6 06 0002 R 00 wv Fresta, 0 Seteet number in series 00t9 C6 06 a003 ROL mov EIBSERT, SSecond umber in series 0018 € 3E o004 R Tea br, FTBSEReZ Feoineer te next eenent 0022 88 0608 nov Ge & Hinttielize coune 0025 Ee 0008 amo: Gxt SBATE iGenecate next elenent 0028 43 bec cx 002978 ex See Neon 26 not dons 0028 30 tone: NOP 0026 ce RET 020 SORTF PROG NEAR 020 PusH AX sSave registers uses ooze Busk BK 002F 9 0000 & MO Abe NM soonerate next elonent 9032 Ga 1e 0001 Mov Bu, NM 0036 42 ¢3 AoD Ly BL 0038 63 a5 hov Tati, AL 003A 88 05 mov [ors AL ssave next elenent 003¢ 88 Ie o000 Nov Noy BL Ferepare for next call 0040 Az Ooo! R Mov NUM) AL ots wee or coca por aK pReatore cegistecs co4s roe ax 04s Ret 047 sete ENDe 047 aps enor. 047 cote _seé Nos eu LABS FIGURE L9.2 (0) Source listing produced by the assembler. (Contiued)Segments and Groups: Name Size Length Align Gorbine class cone_ses 16 Bit 0047 Para Private ‘cone DRTA_SEG 16 ait 000c Para Private ‘DATA’ STACK sec 16 Bit 0040 Para Stack “STACK Procedures, parameters and locals: wane type Value ater Laas ss 2 Far 0000 CODE_SES-——Lengthe 0047 publi Narn L Nese 0025 2 Done 078 SeRTE B xear 0020 Length= 001A Public Symbols: Name type Value atte FIBSER syte 0002, oATA SEG sana Byte 0000—DATATsEG num | Byte 0001 se 0 warnings 0 Errore FIGURE L9.2 (Concluded) Part 3: Running the Program Figure L9.2 shows & source program that implements the Fibonacci series generation routine writen as a procedure. This pro ‘gram was assembled and likes to produce a run module called LAB9.EXE. The source listing produced by the assembler is tiven in Figure L9.2(b). Now we will verify the operation ofthe program by generating the first fen numbers of the series by «executing it on the PC. Check of each step as itis completed. Check Step Procedure —_ 1. Load the program LAB9.EXE with the DOS command A:\>DEBUG LABY.EXE = (.1) 2. Verify loading of the program by disassembling the contents of memory starting atthe current code segment Execute the program according to the instructions that follow: a. GO from CS:0 t0 C8:2C. b. DUMP the data memory from DS:0 to DS:C, Verify thatthe series of numbers starting at location DS:2 and ending at DSB satisfies the rules of Fibonnaci series, <4. What is contained in locations DS:0 and DS:1? Execute the program to completion. ° 39LABORATORY 10: DESIGNING A PROGRAM FOR AN APPLICATION Objective Lear how wo + Plan the software solution for an application. + Consiruet a flowehart to illustrate the solution. + Write an assembly language program that performs the solution + Create a source program, object module, and run module forthe solution. + Verify the operation of the program by running it for known test cases Part 1: Description of the Application A program is needed that will scan through a block of 32-word-wide unsigned integer numbers called an ARRAY, looking for che first number at any even word address that matches atest number called a PARAMETER, The offset address of the number in the table that matches the parameter isto be stored in memory at address FOUND. Assume that the table is focated in the current data segment and starts at an offset ARRAY equal to 0100H, Moreover, the parameter to be seansod for in te table is inthe current data segment at offset 0000H and address FOUND is also in the current data segment at offset 0200H. Figure L10.1 illustrates this struc~ ture of memory. Use the scan string instruction to perform the scan operation and start scanning from the lowest addressed word. Memory os oro araeren eee pre s.o100H oso1orn 1 osoro2H s.103H psor96H Ds:19FH ‘os.0200H ouND seer ro FIGURE L10.1 Memory organization for the array scan operation. 40After writing a program for the application and creating its run module, the solution must be tested to verify that no execu: tion errors exist. The operation of the program can be tested by verifying that it can correctly find the PARAMETER at the low- cst even-word address in the table, highest even-word address inthe table, and at Ieast one other even-word address in the table, ‘The value of the parameter and contents of the array can be arbitrarily selected. Part 2: Producing and Veritying the Solution For the problem described in Part 1, we will plan the solution, write an assembly language program and create source mod- ul, assemble and lnk o produce object and run modules, and use DEBUG to test the execution ofthe program. Check off each Step as itis completed. Check Step _ Procedure — 1, Plan a solution for the problem and describe by constructing a flowchart 2. Write an assembly language program that implements the solution. Include all information and. statements needed to create a source module compatible with MASM. 3. Use EDIT or Notepad to create a source module in file L10P2.ASM. 4. Assemble the source module to generate file L10P2.OBJ and file LI0P2.EXE, Repeat steps 3 and 4, iff necessary, until 0 assembly errors result 5. Verify the correct operation of the program by testing operation for the specified test cases, Ifthe program contains execution errors, epeat steps 1 through 5 until the program runs successfully Part 3: Modifying the Application ‘The application defined in Part | is to be changed so that the program will find all even-address word numbers in ARRAY that contain data that match PARAMETER and store their offsets in a table called ADDRESSES_FOUND along with a count of the total number of times the parameter was found, which isto be saved in memory location COUNT. The structure of memory for this application is illustrated in Figure 1.10.2. Notice that COUNT should reside in the table at the First byte address following the ADDRESSES_FOUND table. To verify its operation, the program should be tested for a match at one address, several addresses, and all addresses, Check Step Procedure 1, Plan a solution forthe problem and describe by constructing a flowchart. 2, Write an assembly Janguage program that implements the solution, The program written in Part 2is a ‘200d starting point. Include all additional information and statements needed to create a souree ‘module compatible with MASM, 3. Copy the file L10P2.ASM to file L10P3.ASM. Use EDIT or Notepad to modify the source program according to the changes made in step 2 4, Assemble the source module to generate file L10P3.0BJ and file L10P3.EXE, Repeat steps 3 and 4, if necessary, until O assembly errors result, S. Define test cases (a value for PARAMETER and data for each element of ARRAY) to verify that the program will find a match at one address, several addresses, and all addresses. 6. Verify the correct operation of the program by checking the operation for the test cases defined in step 5. Ifthe program contains execution errors, repeat steps I through 5 until the program runs successfully. a4Memory osenoon Posner s.00014 pscroaH bs:o100H os.o1o2H 2s-or0aH sora Dsio1arn J s:0200H Ds.oz01H s.o202H S:oz0aH ‘ADDRESSES_-FOUND osezse aeezan4 sen $counr FIGURE L10.2 Memory organization for the parameter matcb aperation, LABORATORY 11: EXPLORING A MULTIPLE MODULE PROGRAM Objective Learn how to + Describe @ multiple module program. + Create a program from multiple modules. + Declare global variables, constants, and procedures. + Declare external variables, constants, and procedures. + Execute the program and analyze it using the DEBUG progeam. Part 1: Module Program Description In this part of the laboratory, we begin by defining the problem that is to be solved with the program and then describe the structure of a modular program solution. We want to perform two operations with software. The first operation is to load an ‘ASCII text message into memory as data and the second is to display the message on the screen of the PC. 42‘We will develop the software solution to this application 98a set of modules. Infact, just two modules are needed to implement @ complete solution. One of the modules is called the MAIN module and the other is called the DISPLAY module. MAIN ‘module contains an ASCII message string that is to be displayed on the screen of the microcomputer. It also calls the routine that is used to display this information. On the other hand, the routine that is used to display the message is in the DISPLAY ‘module, These two modules must work together to produce the desired result. For this reason, they are linked together to pt0- ‘duce a single program. Upon execution, this program displays the following message on the screen ofthe microcomputer: The first b terms of Fibonacci series are: 0,1,1,2,3,5 Let us next look atthe functions performed by each of the modules in more detail Module 1 (MAIN) We begin with the MAIN module, This module establishes the message to be displayed and the number of characters in the message, and calls a display routine in module 2. Figure [11.1 shows the iaformation in this module of the program. Reading, the program, we find that it loads the ASCII message string into memory with a define byte (DB) directive statement. Notice that MAIN also sets up a data segment at address DATA_SEG and then calls the display program that is used to display the ‘message on the microcomputers screen. TITLE LABORATORY 11 MODULE 1 (HAIN! pace 132 STACK_SEG SEGMENT STACK 'STACK' 08 64 UPI?) STACK SEG ENDS DATA_SEG seavent eustrc'parAY uate MESSAGE, MESSKGECNT MESSAGEOB «CR LE, "The first 6 terms of Fibonacci series are: smcR, MESsAGECNT Egy” S-NESSAGE cr EQ 0D . EQ ont DATA_seG ENDS cone_ses SEOMENT pusLic'cooe* TRBIT PROC EAR EXTRN DISPLAY:NEAR ASSUME C5:CO0E. SEG, SS:STACK SEG, Of #7o return to CEBUG program put return address on the stack PUSH AX sFollowing code Amplenents the main nodule of Laboratory 12 Nov AX, DATA ses s8stablish data segment CALL DrSPLAYL Ret nali_ENDP cone_sea ews eNDLABII FIGURE L111. MAIN module.Though the message as well as the message character count are in module 2, they are needed in module 2 so that the message can be displayed on the screen. This requires thatthe message address and the message character count be made a global variable and global constant, respectively. In this way they become accessible from module 2. To do this, we include the statement POBLIC MESSAGE, NESSAGECNT in the data segmext of module 1. Furthermore, since the routine DISPLAY that is called by module | is actually ocated in module 2, it must be declared as external in module 1, This is done using the statement EBXTRN DISPLAY: NEAR in the code segment of module 1. Here type NEAR tells thatthe code for the routine is in the same code segment. That is, both modules are in the same code segment. Module 2 (DISPLAY) Earlier we pointed out that this module is responsible for displaying the message on the screen. [t does sis by using the DOS display character BIOS function (10H). The information in the DISPLAY module is given in Figure L1 1.2. Notice that the values of MESSAGE and MESSAGECNT are loaded to initialize the SI and CX registers, respectively. Then the message is output to the screen with the NXTCHAR display loop. ‘Since the display routine has to be accessible from module {, it must be declared as public. Looking at Figure L11.2, we find that this is performed by the statement PUBLIC DISPLAY Moreover, when the display routine is executed, it needs to access the message address and message character count from mod de 1. For this reason, message address and message character count must be declared as exteenals inthe data segment of mod ule 2. Ths is done with the statement BXTRU MESSAG: YEE, MESSAGECNT:ABS TITLE LABORATORY 11 MoDULE 2 (DISeLAYL) pRce 132 aata_see seanent PupLictDaTAt EXTRN MESSAGE:BYTE, MESSAGECNT:ABS DATALSES exDs cove_ses SEGMENT PuaLictcove’ ASSUME CS:CODE_skG, DS:DATA_SEG PUBLIC DISPLAN sFollowing code implenents Laboratory 11 rodule 2 DTSPLAYL PROC NEAR LEA SI, MESSAGE itnitialize meseage pointer Mov. Ck, MESSAGECN: pinitialize message byte counter NarcHars Moy AL, [87] pet up for INT 10H Moy AH, 24 INT Loi NT 10H OLsplays a character INC Sr PUpdate the pointer fepeat for the next character Return from module orsPLava enpe ODE _SEG exes END FIGURE L11,2 DISPLAY module. “4Notice that type BYTE is specified for the variable MESSAGE and type ABS for the constant MESSAGECNT. A type must be declared with an external variable or a constant. This is because the assembler must allocate space for an external when the module is assembled, Iti atthe link time thatthe addresses for these variables and constants are resolved. Part 2: Creating a Program from Multiple Modules In this section we will assemble and link the two modules described in Part | into a run module that can be executed on the PC. Earlier we identified that the source code for the modules are given in Figures LI1.1 and L11.2, respectively. Module 1 (MAIN) is stored in file LABLIM1.ASM and module 2 (DISPLAY) in file LABI1M2.ASM on the Programs Diskette. We ‘will first assemble these two modules separately and then link them together to form a single run module, As we go through this, process, the linking information generated by the assembler will be analyzed. This information is used by the linker to produce a final program that can either be run using tke DEBUG program or run directly from the DOS prompt. Check off each step as it is completed. Check Step Procedure — 1. Assemble the program in te file LABIIMI.ASM to generate the files LAB1IMIOBJ and. LABIIMLLST. Examine the LST file and answer the following: ‘a, What is the length of MESSAGE string?, b. What type is the MESSAGE label? ‘. What type of label is MESSAGECNT? 4. What type is the label DISPLAY 1? €. How is the instruction CALL DISPLAY 1 assembled and why? Assemble te program inthe ile LABIIM2.ASM to generate he LAB IM. BY and LABIIMALST files. Examine the LST ile and answer the folowing a. What the ype ofthe label DISPLAY? 1. What ipo ithe NXTCHAR label? €: What inthe LST file indicates that MESSAGE i an enteral abel? G: How much spac i llocsted to encode the abel MESSAGE in te insuuction LEA Si MESSAGE? ¢. What in the.LST file indicates tat MESSAGECNT is an extemal constant? {How ch space is allocated to encode te consant MESSAGECNT in he instruction MOV CX, MESSAGECNT? 3. Link the files LABTIMI,OBY and LABIM2.OBI, Lethe inked fe be raved LAB LEXE. Also generate te fil LABI MAP, Examine the MAP ile and answer he following 2 Wht ae the clave stat and sop adresses fr the data segment the stack segment, andthe coe segment? b. What meant bythe progr eny point? «. If the execution file is loaded into memory such that the code starts at address 23EDH:0000H, at what addresses will the data segment and stack segment start? 5Part 3: Running the Program inthis part of the laboratory we will run the program that was produced in Part 2. The run module can be executed by using the DEBUG program or run directly from the DOS prompt by simply entering its name fallowed by the Enter key. Here we will use DEBUG to run the program. Save the sequence of DEBUG commands and their results to a Word document named lab! ‘Remember to mark, copy, and paste the displayed information to the documes before it scrolls off the top of the screen. Check Step _ Procedure 1 Load the program LABII.EXE with the command A:\>DBBUG LAB1L1.EXE (1) TER command to determine the address where the program starts ia memory. Unassemble the program and determine the following: a. The statting address of the data segment b. The starting address of the DISPLAY! routine. Execute the program up to the start of the DISPLAY! routine, Use a REGISTER command to determine the contents of the DS register,» ‘Compute the addresses for the label MESSAGE and the constant MESSAGECNT. Verify that the MESSAGE and the MESSAGECNT aceresses contain the expected information. [Now execute the prageam to completion, What is displayed on the seven? Quit the DEBUG program, At the DOS command enter Ar\>LABLI (4) What is displayed on the sereen? How does this result compare to the information displayed on the screen in step 6?3 IBM PC Microcomputer Hardware LABORATORY 12: EXPLORING THE SCHEMATIC DIAGRAMS AND CIRCUITS OF THE ORIGINAL IBM PC Objective Learn how to: + Locate ICs, pin numbers, and signst mnemonics in the schematics of the original IBM PC. + Trace signal paths from the inputs to the outputs of a circuit, + Describe the operation of complete circuits within the original IBM PC. Part 1: Exploring the Circuits of the Original IBM PC In this part of the laboratory, we will idemtify the device numbers, pin numbers, inpuoutput signals, and schematic sheets for specific citeuits on the system processor board of the original IBM PC. The schematics ofthe system processor board are illustrated in Figure L12.1. Check off each step as itis completed. Check Step Procedure Twenty-five points are identified in the circuit diagram of Figure L12.2. Mark the identified device ‘number, sheet number, signal mnemonic, and pin numbers into the schematic. The notation used is as follows: U = 21C number Pin = 21C pin number SH = ? Schematic sheet number Sig(X) = ? Signal mnemonic(s) Determine the information by locating these points in the schematic diagrams of the original IBM PC (Sheets 1 through 10 in Figure L12.1). — 2 The speaker data output is supplied at pin 1 of connector P, on sheet 8 ofthe schematic diagrams in Figure L121. Trace the path ofthis signal from pin 1 of the connector back to the 8088 MPU, Draw a diagram of the circuits along this path and mark all 1C numbers, schematic sheet numbers, input/output signals, and ppin numbers, Include inthe diagram the circuits that produce the PCLK and TIM 2 GATE SPK signals. a(wonesodiog sauyyoew ss 109) dd Wal eMIGUO ey yo swesBerp anewayDs 4°21 38NDLY 1 te0us) pueog worshs 1982/99 feveentege?164/256K System Board (Sheet 2 of 10) FIGURE 12.1 (Continued) 164/256K System Board (Sheet 3 of 10) FIGURE L12.1 (Continued)64/256K System Board (Sheet 4 of 10) FIGURE L12.1 (Continued) oe 1 te! a 64/256K System Board (Sheet 5 of 10) FIGURE L12.1 (Continued)SHR « LUNI64/256K System Board (Sheet 7 of 10) FIGURE L121 (Continued) nei ssn “ « 164/256K System Board (Sheet 8 of 10) FIGURE L12.1 (Continued)64/256K System Board (Sheet 10 of 10) FIGURE L12.1 (Continued) 54Part 2: Describing the Operation of the Circuits of the Original IBM PC In Part 1 of the laboratory, we located specific circuits in the schematic diagram of the IBM PC. Here we will continue by describing the operation of these circuits. Check Step Procedure 1 ‘Describe the operation of the speaker circuit drawn in step 2 of Part 1. Include inthe description the bs cycles the 8088 performs to set SPKR DATA and TIM 2 GATE SPK to the appropriate logic levels, what the levels ofthese signals are, the U/O address decoding that takes place during these bus cyeles, and how the speaker drive signal is generated, Assume thatthe internal registers ofthe 8253, timer are already initialized, Deseribe the operation of the circuit in Figare L12.2 after the MPU enables parity with the ENB RAM PCK signal. Include in the description the bus cycle the 8088 performs to set ENB RAM PCK to the appropriate logic level, what this level is, the 1/0 address decoding that takes place during the bus cycle, and how this output enables party checking Describe the operation of the circuit in Figure 12.2 as the MPU inputs the state of the PCK signal. Include in the description the bus cycle the 8088 performs to read the logic level of PCK, wit this Jevel means, the 1/0 address decoding that takes place during the bus cycle, and how the state ofthis, input can be used in software. Describe in detail the operation ofthe parity generator/checker and DRAM array circuit in Figure L12.2 as a byte of data are written into the DRAM array. Assume thatthe byte of data isthe value FF ig Repeat step 4, but fora read cycle in which a party error is detected 55“ynaya seypaysiiojesoue6 AUed Z°Z113NNDLHLL (iN anise feaneate LUT WIT eet IGURE L12.2 (Continued)FIGURE L12.2 (Continued) 58LABORATORY 13: EXPLORING THE MEMORY SUBSYSTEM OF THE PC Objective Learn how to: Explore the implemented and unimplemented parts of the memory space in the PC. Explore the R/W memory and ROM parts ofthe implemented memory. Determine the ROM BIOS release date. Execute a routine to testa block of storage locations in memory. + Write a memory test program. Part 1: IBM PC Memory ‘The microprocessor inthe original PC is capable of accessing IM-byte of memory. The address range 0,, through BEFFF is meant for R/W memory and C006, 0 FFF. is for the ROM. Not all the ROM or R/W memory address space is imple- ‘mented ina particular PC. Here we will explore Various address ranges to determine if they are implemented anc, if range is implemented, whether itis R/W memory or ROM. Save the sequence of DEBUG commands and their results to a Word docu ‘ment named 1ab/3. Remember to mark, copy, and pasts the displayed information to the document befor it scrolls off the top ofthe sereen. Check off each step as itis completed. Check __Step Procedure —_ 1. Load the DEBUG program by entering Cz\DOS>DEBUG (.1) —— Perform the debug operations that follow: a, Dump the 128 memory locations starting at address 100:0, b. Dump the 128 memory locations starting at address 4000:0, ¢. Dump the 128 memory locations starting at address B000:0. 4. Dump the 128 memory locations starting at address F600. «€. Comparing the displays produced for steps a,b,c, and d, can you identify an unimplemented area cof memory (depends on the memory in your PC? —_ 3. Try writing SSH to the 128 locations starting at 100:0, 4000:0, B000:0, and F600:0. To verify writing, dump the contents of these locations. Are there locations that you were not able to write to? tyes, what are these locations? Looking at the displayed information in steps 2 and 3, can you conclude which part of the memory ‘appears to be unimplemented and which part is ROM?. —_ 4, Dump the 8-byte memory contents starting at address FO00:FFFS. What do you see? This is the ROM BIOS release date. Quit the DEBUG program. 59Part 2: Executing a Memory Test Program Figure L13.1(@) shows a source program that writes the pattern 075SH to the 128-byte memory block starting at location 1800-0, You should verify that usable RAM is available inthis memory range of your PC. After writing the patter, the storage locations are read and their contents compared with the patter. This program does not verify that each bit in a word can be set to 0 or 1. It simply determines whether or zot a specific bit pattern can be written into or read from each memory location in the block. A listing of the program is shown in Figure L.13.1(b). The run module is available on the Programs Diskette as file L13P2,EXE, Now we will execute this program and verify ifthe memory passes the read/write test. Check __Step Procedure —_ 1, Clear the screen by issuing the command C:\DOS>CLS (.1) NOTE: This operation must be performed; otherwise the steps that follow will not provide the desired results Load the run module L13P2.EXE with the debugger. 3. Run the program by executing it to the end. What happens to the top line of the display? — 4. DUMP the register contents of DX. What is the significance of the value in DX with respect to the state of the memory block? — 5, DUMP the memory contents starting a address B800:0, What do they signify? — 6. Quitthe DEBUG program.ume LABORATORY 13 Pace 132 STRCK_SEG seavent STACK ‘STACK* 8. 64 Due (?) sTRCK_SEs ENDS exten - o7sss MEM START : on HEM_sroe : 7H 1DSEG_ ADDR OBBO0H Uae OB00CH for a monochrone system cove ses seouent TABI3, PROC FAR ASSUME C3:C00E_SEG, ss so return to DEBUG program put return address on the stack Mov. AK, 0 Push AX :following code implements Laboratory 13 Mov AX, DSEG_ADDR sEstaplich data segment Mov BS, AR ov ST, MEM_START iNext menory addeess MOY GK; (MEM STOP-MEM_START+1)/2_ :No of word Locations AGAIN: MOV WORD PTR[ST], PATTERN Write the pattern Mov AK, (STI FReed te back cw AX, PATTERN same ? ONE BREMEN $Bad menory if not same Inc St pRepeat for next location Mc SE Looe xGAIN MOV DK, 1234H peode for test passed He DONE BAGMEM: MOV OX, OBADH code for failed test ONES NOP Ret sRetuen to DEBUG program apis eNoe (COuE ses ENDS eNDtaaia FIGURE 13.1 (a) Source program for Laboratory 13. 61Microsoft (R) Macco Assenbler Version 6.11 06/29/99 09:27:43 LABORATORY 23 Page 12 ‘TITLE LABORATORY 13 PRGE 132 ‘9000 STACK SEG SEGMENT STACK "STACK" (0002 9040 ( ~ DB 64 DUe(?) 00 1 040 STACK, ES exos = 0755 PATTERN - o1ssH = 0000 MEM _staRT : on = 07F MEXSTOP = ore = 2600 se6_AnoR : 9000 ‘cope_see SeoMeNT "cope" ‘9000 TaB13 proc FAR ASSUME CB:CODE_St, $¢:STACK_SEG 280 ratuen to DEBUG program put ceturn addres 0000 18, Push os sor Be vo00 Mov AK, © 008 $0 Push AK’ sFollowing code implements Laboratory’ {3 000s 22 8800 Mov x, D586 _ADDR 069 6 Do Moy Ds, AK 000A BE 0000 ov ST; MEM STARE Mext swmory address oe 89 co40 Mov x, (MEM_STOP-MEM_START+11/2 9010 G7 0% 0755 AGAIN: MOV WORD PTR[ST), PAPTERN :Weite che pattern 0014 68 04 Mov AK, (STI pRead Lt back 001 3p 0755, amex, PATTERN isane ? 0018 75 09 GN BAIHEN [Bad menory if not same 0018 46, me |S iRepeat for next location onic 46, INC SI oo1D £2 FL oor AGAIN OoLF BA 1234 Mov Dy 2234H rode for eat passes 0022 eB 03 Me DONE 0024 BA OBAD BADMEM: MOV Dk, OBADH rede for Exiled test 9027 80 Doxe: NOP ooze ca ner sReturn te. ge6UG program 02s apis eNDe 023 coDe_Se6 exos eNDRAaLS FIGURE L13.1 (b) Source iisting produced by the assembler. OBE00H Use OBVOOH for a monocheoRe aysten fon the stack stablish data segrent tro of word LocationsMicrosoft (R) Maceo Assembler Version 6.11 06/29/39 08:27:43, LABORATORY 23 Symbols 2-1 Seqnents and Geoups: Name size Length Align COU SES eee ie pit 0029 are STACK SE Ill de aie 0080 ara Procedures, parameters and local: Name Type Value atte RBIS ee eee 0000 cone_SEG © Lengthe 0029 Public AGAIN 010 Conese. aaowem © | oes cone nsES ONE bee? cone ses Name type value Ater DSEG_ADOR . 1... Number B800h vexsraet DDT [ Mumpe® C000 mecsror.. 2S Number 007Fh partes 22 DDD DDD t Number 0758h 0 Waenings 0 Errore FIGURE L13.1. (Continued) Part 3: Moditying the Memory Test Program Earlier we pointed out thatthe program run in Part 2 verifies that a particular pattern can be written into and read from cach word of the block of memory. It does not veify that every bit position in the segment of memory can be set to I, reset to 0, and read. back correctly. Here we will modify this program to test the block of memory using bit patterns that allow better bit testing, Check Step _ Procedure — 1, Modify the memory test program of Figure L13.1(a) as follows: a Adress range of the block of memory locations to be from 10000H through 1000BFE. ’. The storage locations in memory are to be tested as bytes instead of words. . The bytes of memory are to be tested with each of these patterns: OOH, FFH, AH, and SSH. The patterns are to be used in the order listed, 4. The patterns are to be read from a table in memory starting at address PATTERN, €. IF the test passes, the contents of registers AX, BX, CX, and DX should all be zero. However, if the test fails fora byte, the program must stop immediately and update the values in the registers as follows: (AX) = Current contents of DS (BX) = Offset of the memory location that failed (CX) = The data that failed (DX) = OBADH, 63—— 2% Create the source program with an editor assemble into an object program, and create a run module in file MTEST.EXE. 3. Verify the operation of the program for good memory by running it onthe PC. 4. Use adebug sequence to verify the operation ofthe program for a bad memory by executing the pro- ‘gram up tothe compare instruction; before performing the compare operation, modify the data read from memory with an R coramand so that it simulates an erro; then run the program to completion; finally, examine the registers to determine i the error condition is correctly identified. Repeat this process for each ofthe patterns LABORATORY 14: EXPLORING THE DISPLAY SYSTEM OF THE PC Objective Learn how to: + Explore the relationship between the display memory buffer contents and corresponding characters on the display. + Execute a program to display the ASCII character set of the PC one character at a time on the sereen, ‘+ Write a program that displays the complete ASCII character set on the screen. Part 1: Display Memory Butter A part of the PC's memory known as the color display buffer resides from address B800:0 through B800:0FFF in memory. Figures L14.1(a) and (b) show the relationship between the lines and columns of the sereen and the contents of the display buffer memory. Here we will study the relationship between the contents ofthis buffer and information displayed on the screen. For every character displayed on the screen, there are 2 consecutive bytes of information in display memory. The byte marked ASCII, which is located atthe even address, isthe code forthe character. The table in Figure L14.2 shows the ASCII codes for all numbers, characters, and symbols that can be displayed on the screen of the original IBM PC. The contents of the ATTR byte, which is at the odd address, selects dispiay attributes for the character. The attributes available for characters displayed on the display are normal, blinking, underlined, intensified, and reverse-video, The chart in Figure L14.3 shows the relationship between the bits of the attributes byte and display features. By performing the steps that follow, we wall examine the relationship between the contents of the character and attribute bytes and displayed information. Check off each step as itis completed. NOTE: Ifthe PC you are using has a monochrome display, instead of a color display, the display buffer starts at address B000:0. Therefore, to run the laboratory exercises that follow with a monochrome monitor, simply replace addresses ‘B800:0 through B800:0F FF with the corresponding address in the range 8000-0 through BO00-OFFE The results obtained will be similar. Check —_Step_ Procedure —_ 1. Clear the sereen by issuing the command C:\DOS>CLS (4) NOTE: This operation must be performed; otherwise, the steps that follow will not provide the desired results — 2. Load DEBUG by entering C:\DOS>DEBUG (.1) Write down what is displayed on the screen — 3. Dump the contents of the display buffer from address B800:0 through B800:13F, NOTE: If you make any errors in the key sequence, you must start over by returning to DOS and clearing the screen 64At what addresses in the buter are the characters of the word DEBUG held? Also list the ASCII code and the attribute byte for each character. Character __Address_ ASCII Code__Attribute Byte D _—— E B u G Why are the contents of the attributes bytes all displayed as a period at the right of the screen?” When no characteris displayed in a position on the screen, what ASCII code is put into the display buffer address corresponding to this location? ‘What docs this ASCII code stand for? _—__ Return to DOS, clear the screen, and reenter DEBUG. Use a DUMP command to display the contents ofthe display buffer from address B800:A0 through B800:BF. How does this compare to the results observed in step 3? Display the contents of the display buffer for the address range B800:140 through BBO0:15F. ‘What line of information on the sereen does this represent? Dump the contents of the display buffer for the address range B800:1E0 through B800:27F. What line of information does it represent onthe sereen? Return to DOS and clear the screen Enter DEBUG and then display the contents ofthe display buffer from address B800:00 through 'B80027F, Compare the displayed information to the contents ofthe buffer. What isthe address range in the buffer ofthe line ofthe screen where the DEBUG commas is displayed? Find the address range in the buffer ofthe line of the screen where the DUMP command is displayed ‘At what address range in the display buffer is the first line of information displayed with the DUMP command held? Return to DOS, clear the screen, and reenter DEBUG. Perform the DEBUG operations that follow. a. Enter the ASCII characters of the word NORMAL separated and terminated by the hexadecimal code 07 starting at address B800-0, That is, enter ‘N’07'0°07"R’07'M’07’A’OT'LO7 into addresses B800:0 through B800:B. What is displayed at the top left corner of the screen? b. Enter the ASCII characters ofthe word BLINKING separated and terminated by the hexadecimal. code 87 stating at address B800:0, Whats displayed at the top let comer ofthe screen? ‘e. Enter the ASCH characters of the word UNDERLINED separated and terminated by the hhexadecimal code 01 starting at address B800:0. What is displayed atthe top left corner of the4, Enter the ASCII characters of the word INTENSIFIED separated and terminated by the hexadecimal code OF starting at address B800:0. What is displayed atthe top left comer of the screen? ‘VIDEO separated and terminated by the hhexadecimai cose 70 starting at address B800:0. What is displayed at the top left comer of the sercen? ‘Eater the ASCH characters ofthe word REVER: e {, What are the addresses of the memory locations that contain the ASCII code and attributes of a character displayed on line 20 at column 50? — 12, Quit the DEBUG program, 7079 ® FIGURE L14,1 (a) Organization of the screen as rows and columns. 66Line Coen oa | ~ascu_[_arra 2 [ascn_|_ ara 03 asc | _ ara 079 ate 10 ATR. 1a TTR v0 ser [ 20 [asc] ATTA 2a [asc | ArT 240 | asc | _ An 24x [Tascn [arta 242 [ascn_[ _arTA 263 [ascn[ ara 270 [_ascr_| _ ATR © FIGURE L14.1 (b) Storage of tharacter information in the display butt 000 04 e006 20098 20040 ‘800-42 ‘00:4 ‘800.48 00.140 Boo 142 cca F00 eonF02 aor 00 Fos 200:F0E 67Fl J Ow Character Set (80-FF) Quick Reference Character Set (00-7F) Quick Reference g ral Ae Aj |>/+ holo 8 Bla Ly 1 se CHEE | BETH |= |* T Hr 1 gl< $3) 2 RZ sof Ml-}< 2 ko} :0)-0) kmkO} Q z cea] ted) <9 | 20 <| >a 4 5 FIA\F 4 5 nie mle lAlR 13}. 15 Foreground Under) z x a s ale} s *) > --l—-| 2\< & & elo e =|). —|E) clo) 2 8 alK|D [> ZI-\ 5 ° diols OQ} Orfafaalte] . alee elo vjeje|e = : olelo @lelsl=[sl2[zl2| 2 . Bite of Aribute bre Bacrground FIGURE L14.3 Attribute byte format.Part 2: Executing a Program That Displays the Characters of the ASCII Character Set on the Screen Inthis par ofthe laboratory exercise, we will examine the ASCI display character set of the PC. Here we will assemble, Save, execute, and analyze a program tht when ran displays the characters ofthe ASCII character set on the screen Check Step Procedure — 2. Bring up the DEBUG pregram, Assemble the program that follows into memory starting at address CS:100. CS:100H MOV AX,88008 CS:303H MOV DS,AX CS:105H MOV DI,OCaUH CS:108H MOV AX,O7218 OBR HOV DL,OPPE ODE MOV [D1L],AX FH MOV CX,PPPPH 2H DEC Cx 3H JNZ OLL28 CS:115H INC AL CS:117h DEC DL 19H JZ Ob1D8 BH JMP OLODE LDH NOP : 2029090 Disassemble the program to verify that it has loaded correctly. Add comments to the program to explain what cach instruction does. What is the ending address of the program? How many ytes of memory does the program take up? How many times does the loop implemented with the INZ. instruction get repeated? ‘What is the purpose of this loop? How many times does the loop performed by the JZ instruction get repeated? —____ Describe the operation performed by this loop. Save the program on a data diskette in file CHAR.1 (Quit the debugger, clear the sereen with a CLS command, and then bring DEBUG back up, ‘Load the program from CHAR. 1 at CS:100 and verify correct loading. Run the program with a single GO command. Write the command so that execution stops at the NOP instruction, Describe the events observed on the screen. Describe how the program performs this function in detail. 69Part 3: Displaying the Complete ASCII Character Set on the Screen In the last part of the laboratory, we executed an existing program. Now we will modify that program to perform a different dis play operation. The modified program will be debugged, executed, and then saved on a data diskette. Check Step Procedure 1. Bring up the DEBUG program, load the file CHARI; display the program with an unassemble ‘command: save the instruction to a Word document; and print, 2. Modify the program such that each new ASCII character is always loaded into the display buffer at the address corresponding to the next character position on the display. In this way, the complete character set will end up displayed on the screen, Mark the needed changes into @ printout of the program. 3. Assemble the modified program into memory at C$:100 and then save it on a data diskette in file CHAR2 4. Quit the debugger, clear the screen, and then bring DEBUG back up. —_ 5. Load the program from CHAR.2 at CS:100. 6. Run the program with a single GO command. Does the program perform the desired operation? If not, debug the program and then repeat steps 2 through 6. LABORATORY 15: EXPLORING THE INPUT/OUTPUT SUBSYSTEM OF THE PC Objective Leam how to: + Input and output to the 1/O peripheral ICs on the main processor board of the original IBM PC. + Write a program 1o cantrol the speaker of the PC. + Program the 8253 timer for speaker tone contro. NOTE: Earlier PCs had a speaker driven by circuitry on the motherboard. If your PC does not have this type of speaker, this lab will not produce the expected fone. Part 1: Input/Output Ports of the IBM PC In the original IBM PC, peripherals suck as the 82554, 8253, 8237A, and 8259A are located in the 8088'S /O address space, For this reason, they are accessed using IN and QUT instructions. Here we will explore the registers of just one of these devices. Moreover, we will write to an area where no port is implemented to see What happens when we try to read from or write toa nonexistent port. Finally, we will read a timer-register within the 8253 to see that its contents change with time. Check off each step as itis completed. 70Check Step _ Procedure — 1. Load the debugger. — 2. Assemble the following instructions: XOR AL,AL MOV Dx, 3008 IN AL, DX MOV AL, SSH OUT Dx, AL IN AL,DX — 3. Perform the following debug operations: a, Execute the first three instructions of the program. What value is now in AL? b. Execute the next two instructions. What do they do?. . Execute the last instruction, What do you get in AL? What is your conclusion? — 4. Assemble and execute the instructions that follow to read timer 1 of the 8253, Note that timer 1 is read on port 41H and is controlled by writing to port 43H, MOV AL,WOH ;Preeze counter 1 ouT 43H, AL NOP iGive tine to 6253 NOP IN AL,41H Read low byte NOV AH, AL Nop IN AL,41H ;Read@ high byte XCEG AH,AL Position the bytes ‘What are the contents of AX? —— _5_ Execute the insteuctions in step 4 one more time. What do you now read in AX? ‘Are they different from step 4? If so, why? —_ 6 Quit the debugger. Part 2: Writing a Speaker Control Program A flowchart for a program that produces a 1.5 kHz tone for 100 ms at the PC speaker using the 8253 timer/counter is shown in Figure L15.1. Let us first calculate the count V (divisor) that needs to be loaded into the 8253 timer to produce a 1.5 kHz tone frequency from the 1.19 MHz timer clock frequene:. This is done using the expression 1N = Timer inpot frequency/Timer output frequency = L19 MHa/l.S kHz 793 = 3196 Here we have assumed that the timer clock is 1.19 MHz (for a 4.77 MHz PC). n‘setup accept Leathe visor —_. Fad ana eave ports to mon oe oand be 1 of porters to able the ima an ose 00 ‘speaser i Wat or 102 r estore por gtk em Ce) FIGURE L15.1 Flowchart for tone generation program. Thus, to generate the 1.5-KHz tone, we must first load the timer with the divisor 319). To do this, the mode of the 8253 must be first set to accept the divisor. The instructions needed to set the mode are MOV AL, DBLH ;Set mode to accept divisor our 43H,AL [Now the divisor is loaded into the timer 2 at 42H with the instructions MOV AX,3159H 7 (AX) = divisor OUT 42K,AL ;Load LSBYTE of divisor MOV AL, AH OUT 42H,AL ;Load MSBYTE of divisor 2‘To output the 1.5 kHz tone atthe speaker we must enable both the timer and the NAND gate Us; that controls the speaker signal. This i done by first reading the tate ofthe output port at adress 61 setting bits O and I to logic 1, and then writing the byte back to the output port. Tis is done withthe sequence of instructions IN AL,b1H ©; Read port b1H MOV) AH, AL Save its contents OR AL,3 ;Enable timer and NAND gate OUT = b1H, AL Notice that the original value of port 61, has been saved in the AH register. Now the speaker is turned on and the 1.5-kHHz tone is being generated. ‘The tone is to be produced for just 100 ms, Therefore, a software delay can be inserted at this point inthe program; when the delay is complete, the speaker is turned back off. The software delay is produced by the instruction sequence MoV CX,SOEQH ;4 Clock cycles DELAY: NOP 3 Clock cycles NOP 3 Clock cycles LOOP DELAY = 4? Clock cycles The count loaded into CX by the MOV instruction determines the duration of the time delay. The value S0EQ,, is found from the time it takes to execute the instructions in the loop on an 8088 processor. Let us look at how this value was found, “The total number of clock eycles forthe loop is given by the expression HCYC = 4 + (NYO +3) + (N= 1917) +5 Here the 4 represents the execution cycles of the MOV instruction, (3 + 3) represents the execution cycles of the two NOP instructions; the 17 represents the execution cycles of the LOOP instrustion when the contents of CX are not zero; and 5 rep resents the execution cyeles forthe LOOP instruction when the contents of CX are zero. Here N stands for the count loaded into (CX. In the 4.77 MHz PC, each clock cycle has a period of 210 ns. Thus a 100-ms delay is defined by the expression DELAY = (#CYC)(Clock period) 100 ms = [4 + (NYG +3) + CN — 1}{17) + 5}210) ns Solving this expression for N, we get In order to increase the delay, we can repeat the delay loop itself by enclosing it within another loop which uses Bes the counter. To repeat the delay loop 10 times, thus generating a 1 stone, the follwing instructions can be used. MOV BL,OAE sRepeat counter RPTDELAY: (Insert 100 as delay loop instructions) DEC BL ;Update the repeat counter NZ RPTDELAY Repeat if not done After the delay is complete, we must turn the speaker back off. This is done by writing the byte saved earlier in AH back to the output port at address 61H. We do this with the instructions MOV AL, AH Restore port L1H OUT b1R,AL The complete source program is shown in Figure L15.2(a) and the listing produced by the assembler is shown in Figure 115.206), 73TITLE LABORATORY 15 pace 132 StRCK_sts secnent STARCK “STACK" be. 64 Due (2) STACK SES ENDS cone_se secnent cove" TARTS PROC FAR ASSUME CS:CODE_SEG, @8:STACK : #70 ceturn to DEBUG program put return address on the stack post 0s MOY AK, 0 PUSH Ax Following code implenents Laboratory 15 Mov Ay OB6H JSet up tiner our 43, AL. MOY AX 319 2(nX) = divssor our é2H, AL fuoad Lsbyve of divisor Mov AL, AK Hload MSByte of divisor NAL, 61H pRead port 61H Mov A AL jSave Les contents OR Ly 3 FEnable timer and NAND gate cor Gtk, AL Mov BL, on Repeat Counter RETOELAY: Mov CK, S0EOH #Delay counter DELAY: NOP }for 100 mace delay Noe. Loop DELAY bec BL Update the sepeat counter Jx2RPTDELAY pRepeat if not dene Moy AL, AH pRestore port 618 oor Gtk, aL RE LxB1S END ‘coDE_ sas exos END LABS FIGURE L15.2 (a) Source program for Laboratory 15. 4Microsoft (R) Macro Assembler Version 6.11 LABORATORY 15 0000 2000 0040 | 30 1 ooo 000 000 000 16 oot 58 008 50 0005 20 007 6 0003 28 00c £6 000 BA, 0010 6 coz es cote aA, 9016 06 0018 Es. cola 83, oo1e core 89 oor 50 0020 $0 02 £2 0023 Fe 0028 75 0027 a, 002s 6 0028 ca ooze 026 0000 Bs 3 a9 @ ce @ 6 cy 03 el 00 ce Fs TITLE LABORATORY 15 eRsE 132 STACK_SEG SEGMENT 0B stack S86 exos ‘cope_se6 secnent IAEIE Roc FAR 06/30/99 082 Page 2-1 ‘STACK ‘STACK* 64 Duet?) [ASSUME CS:CODE_SEG, SS:STACK_SEC To return to DEBUG program put return address on the stack pusk os MOY OK, 0 Push AX’ sFollowing code implenents Laboratory 15 MOY by OB6H our 43H, AL MOV Ak, 3191 oot 424, AL Woy AL, AH our 43%, AL TAL, 61H Mov AK, AL oR LS our tk, AL BL, ont (Ck, SOBCH Deway: NOP Looe DeLay bec BL GNt——-RPTDELAY Moy Ly AN our 6th, AL LABLS _ENDP ‘cone 886 exas exo raps FIGURE L15.2 (b) Source listing produced by the assembler. iset up timer DIRK) = divisor fload LsByte of divisor ad MSByee Of davieor pRead port 61H [Save Sts contents penable tiner and NAND gate sRepeat Counter soelay counter Por 100 mees delay, Update the repeat counter pRepeat if not done pRestore port 61KMicrosoft (R) Maczo Assenbler Vereion 6.12 06/30/39 08:09:29 EABORATORY 15 Symbols 2 ~ 1 Sogrents and Groupe: Name size Align Combine Class COOSEG ee Be HE private 'co0e" stackste 22). : be Bit Stack "STACK Proceduzes, paraneters and iccale: Name type atte Lass 2 . Pree Lengths 002¢ Publ! ReTDELAY «| © Near ‘ope =sE DELAY Lt E Nese cope =ses Symbols: Name type Value atte © haznings 0 Errore FIGUREL15.2 (b) (Continued) Part 3: Output Port for the Speaker in the Original IBM PC [As described earlier, the UO address 61H points tothe output port that controls the speaker and other peripherals, such as the cassette and keyboard. Bit 0 onthe port enables the timer to supply a clock signal, and bit | is used to enable the clock signal to the speaker. We will fist read the stats ofthese bits on the port and then change them to drive the speaker. Finally, we wil run the program developed in Part 2. Cheek 76 Step Procedure 1 2 3 Load the DEBUG program. Assemble and execute the instruction needed to input the contents of port 61H into the AL register. ‘What are these contents? — ‘What do bits 0 and | indicate with respect to the 8253 timer clock and the enable bit for the clock to the speaker? —____ Change the contents of AL so that the two least significant bits are logic 1. Do not change any other bits What are the new contents of AL? Assemble and execute the instruction needed 10 output the new contents of AL. to the output port at 61H. What happens and why? Reload AL with the original contents as recorded in step 2. Again, assemble and execute an instruction to output the contents in AL to the output port at 61H. What happens and why?— 6. Load the program LABIS.EXE. Unassemble the program to verify its loading, 8. Execute the program. What happens? — 9. Change the program with DEBUG so thatthe divisor loaded into the 8253 is one-fourth the original value. Execute the program again. What is the difference when compared to the operation observed in step 8? 10, Change the program so thatthe tone duration is doubled, Execute the program. Describe the difference when compared to the results observed in steps 8 and 9, LABORATORY 16: EXPLORING THE INTERRUPT SUBSYSTEM OF THE PC Objective Learn how to: + Determine the address of an interrupt service routine. + Explore the code of an interrupt service routine. + Execute software interrupt service routines to determine the equipment attached to the PC and the amount of RAM. + Execute the software interzupt service routines for print screen and the system boot. + Use the interrupt 21 function calls to read and set the date and time, Part 1: Interrupt Vector Table ‘The PC's interrupt vector table is located in the first 1024 bytes of RAM memory, that is, from address 00000H through O03FFH. Each vector akes up four bytes of memory; therefore, there are 256 vectors in the interrupt vector table. Here we will explore the contents of the interrupt vector table and use this information to calculate the starting address for several interrupt service routines, Check off each step as itis completed. Check Step Procedure Load the DEBUG program. 2. Dump the contents of the memory locations starting at 0:0. Compute the starting address of the service routines for the following interrupt types: Interrupt type 2 (NMI) Interrupt type 8 (Timer) Interrupt type 9 (Keyboard). Interrupt type 10 Intereupt type 11 Interrupt type 12 Interrupt type 13 Interrupt type 14 (Diskete) Interrupt type 15 7Part 2: Exploring the Code of an Interrupt Service Routine [Now we know the starting address of several interrupt service routines in ROM, Next we will examine the instruction sequence in the NMI service routine. Check _Step Procedure —_ 1. Unassemble the code of the service routine for NMI, — 2. What isthe address ofthe last instruction in the NMI service routine? — 3. Does this service routine invoke another software interrupt? Ifyes, which one? — 4. Does this service routine call another routine? IFyes, where is that routine located? Describe the operation imaplemented by the three instructions that follow the IN AL, 62 instruetion in the beginning part of the service routine 6. Ftom the hardware discussion in Chapter 12 of The 8088 and 8086 Microprocessors: Programming, Imerfacing, Software, and Applications, 4th &z, determine the conditions in the hardware that will enforce bypassing of the rest ofthe instructions (those immediately after the three) of the NMI routine. — 7. Now determine the conditions of the hardware that will enforce executing the rest of the instructions of the service routine, Part 3: Determining the PC Equipment and RAM implementation ‘The service routines for INT 11H and INT 12H are used to determine what equipment is attached to the PC and how much RAM is implemented. Execution of the service routine for INT 11H returns a word in AX. The bits of this word indicate winat type of equipment is attached to the PC. The bts of the word are encoded as follows: Bit 0 = 1 ifthe PC has floppy disk drives attached Bits 3,2 = system board R/W memory size (00 = 16K, 01 = 32K, 10 = 48K, 11 = 64K) Bits 5,4 = video mode (00 = unused, 01 = 40X25 BW using color card, £0 = 80X25 BWW using color card, 11 = 80X25 BW using monochrome card) number of oppy disk drives (00 = 1, 01 = 2, 10 = 3, 11 = 4 only if bitO = 1) Bits 11,10.9 = number of RS232 cards Bits 15,14 = number of printers attached Other bits = don't care Bits 7, By executing the service routine for INT 12H, a number is returned in AX that indicates the number of kilobytes of R/W mem: ‘ory in the system. In this part of the laboratory, we will execute these software interrupt routines. NOTE: Some variations in bit meanings may be experienced if you are using a compatible or PC other than an original IBM PC. In this case, refer to the reference documentation for the PC to determine the bit functions. 78Check Step Procedure ‘Load the DEBUG program. Display the contents of all registers. What is the value of AX? __ ‘Assemble the instruction INT | 1H followed by an NOP instruction at the current code segment address. Execute up to the NOP instruction and then display the registers. What are the new contents of AX? ‘What do the contents of AX indicate with respect to the following equipment? a. Floppy disk drives present or not D, System board RAM size. e, Video mode, —_____ 4, Number of floppy disk drives. fe. Number of RS232 cards. £. Number of printers attached, ‘Assemble the instruction INT 12H followed by an NOP instruction atthe current code segment address. Execute up to the NOP instruction and then display the new contents of the registers. What is the value in AX? How much R/W memory isin your PC? Quit tae debugger. Part 4: Print Screen and System Boot Interrupts Now we will examine the operation of two other interrupt service routines. The INT SH service routine can be used to print what is displayed on the screen. On the other hand, the service routine for INT 19H is used to boot the system. Here we will ‘execute these interrupts to observe the functions that they perform. Check Step Procedure —_ 1. Load the DEBUG program. — 2. Assemble the instruction INT SH followed by an NOP instruction at che current memory location poiated toby CS:IP. Execute up to the NOP instruction and then describe what happens. —_— 3. Assemble the instruction INT 19H followed by an NOP instruction atthe memory location pointed to by CS:IP. Execute up to the NOP instruction, What happens? Part 5: The INT 21H Function Calls INT 21H is provided to invoke DOS operations for a wide variety of functions, such as character 1/0, file management, and date and time setting and reading. Here we will learn to use the time setting and reading functions. To call any function, the register AH is loaded with the funtion nuraber and then the instruction INT 21H is executed. Ifthe specified function cannot be performed, DOS returns FF in the AH register Check Step Procedure —_—_ 1 ‘Read the program in Figure L16.1 and determine the following: ‘a. Function number and AH contents to read date >. Function number and AH contents to read time. . Function number and AH contents to set date. 4. Function number and AH contents to set time. 79‘e. What date is already set by the system? £. What time is already set by the system? — 2. Load the DEBUG program. — 3. Assemble the program starting atthe address specified by the current CS:1P, — 4, Execute the program up to the point where it reads the date. Display all registers. Determine the date. — 8. Execute the program up to the point where it reads the time. Determine the time. 6. Execute the program up to the point where it loads registers to seta new date. Note the contents of registers CX, DH, and DL. How have they changed? — 7. Execute the program up to the point where it loads the registers to set a new time. Enter 2 new date and note the contents ofthe CH, DH, CL, and DL registers. How have they changed? 8. Quit the debugger. Do you think a new date and time are set? —_ 9. Use DOS commands TIME and DATE to verify that the new date and time are set. You may now want to reset your system back to the original date and time. smovah2in——_; getdate, AL=day ofthe wove, CXeyeer, OM=month, Diy imtin ‘movenzeh | geetine, CHanou, CLeminse, OMMucons ine 2m Dshunareta at «second mov ah nat date a flows: movent7es ex yes mov dhe ah= month mov de Jaleday sein i mov ah 26 | at time a follows: sav ch, 118 chs hour rmovah.i0h i ch= meond rmovelty j= minute rmovalten —_dl-=hunaredte ineam FIGURE L16.1 Program for Laboratory 16, Part 5. LABORATORY 17: USING BIOS ROUTINES FOR KEYBOARD INPUT AND DISPLAY QUTPUT Objective Learn how to: + Use the read keyboard and display character BIOS routines + Display prompt messages on the screen, + Display characters entered at the keyboard on the sereen + Write a program that makes decisions based on inputs from the keyboard.Check Step Procedure —_ 1, Load the DEBUG program, — 2. Display the contents of al registers. What is the value of AX? — 3. Assemble the instruction INT 11H followed by an NOP instruction atthe current code segment address. Execute up to the NOP instruction and then display the registers. What are the new contents of AX? What do the contents of AX indicate with respect to the following equipment? ‘a. Floppy disk drives present or not b, System board RAM size. . Video mode, 4. Number of floppy disk drives. fe. Number of RS232 cards. £. Number of printers attached. Assemble the instruction INT 12H followed by an NOP instruction atthe current code segment address. Execute up to the NOP instruction and then display the new contents of the registers. What is the value in AX? How much R/W memory is in your PC? Quit the debugger. Part 4; Print Screen and System Boot Interrupts Now we will examine the operation of two other interrupt service routines. The INT 5H service routine can be used to print ‘what is displayed on the screen. On the other hand, the service routine for INT 19H is used to boot the system. Here we will execute these interrupts to observe the functions that they perform. Check Step Procedure —_ 1. Load the DEBUG program. —_ 2. Assemble the instruction INT SH followed by an NOP instruction at the current memory location pointed to by CS:IP. Execute up to the NOP instruction and then describe what happens. Assemble the instruction INT 19H followed by an NOP instruction atthe memory location pointed to by CS:IP, Execute up to the NOP instruction. What happens? Part 5: The INT 21H Function Calls INT 211 is provided to invoke DOS operations for a wide variety of functions, such as character 1/0, file management, and A:L18PL.EXE (1) Describe what you hear, NOTE: The numbers used in this program for the tone and repeat count implement the correct durations for the tone and silence daration based on the 8088 microprocessor in the original IBM PC, which runs at § MHz. Ifyou are using a PC with another processor, 8086, 80286, {80388 80486, or Pentium® processor or an 8088-based PC that is running ata different clock frequency, the music produced by this program will be played too fast. This is because the software generated delay will be much shorter. This can be compensated for by either increasing the number loaded into CX in the DELAY subroutine or by increasing the values of the repeat counts for the tone duration and silence between tones. What is the clock speed at which your PC runs? ‘Compute the values for the repeat counter and the silence counter or delay count for your PC so as to produce each tone for 0.25 s with 0.75 s of silence between tones. ______, Modify the program using the results obtained in step 5, reassemble, relink, and generate LISPIA-EXE. Rerun the new program to verify that it works correctly. Describe the difference between what was heard in step 4 and what you now hear, Rewrite the program produced in step 6 to make it interactive with the user. That is, have it display a ‘message asking the user to enter the “UU” or “D” key to play the up scale or down scale, respectively. ‘The program must also be modified so that just the up scale or down scale is played according to the key input, Save the executable file as L18P1.EXE, Run the new program to verify its operation, 92‘TETUE LABORATORY 18 Pare 1 (8PI-ASM rac 586 goer weer smack 826 Bios, camn_secl™ —Sg0g! SM ISNEng GP data mathe” nereres = 10 Repeat counter for a tone duration Gert rroc aR oe ASSiee CEiCone see, ss:smce ees, us:0AzA.see Roltoving code saplonente taberatary 18 wey Set up data segnent Noy Gat divisor oo in a eed tsayte of divisor Gr Bi ay ong Naty of civisor iy BS HEive Tb contents Soe th a sunable tiner and AD gate Nor Gui“ketcraa Sat up the capeat counter for ellence Dutavi: Nov x, SOEDH ——oelay count fer 100, FIGURE L18.2 Program for ‘aboratory 18.Part 2: Playing a Musical Melody In the last section, we executed 2 progeam that automatically plays a musical scale, Here the program will be medified to per mit it to play simple musical melodies. To do this, we simply build the data table with the sequence of notes needed to play the piece of music. That is, by arranging the counts for the tones of the scale in the appropriate order it is possible to generate sic. For instance, if the first three notes in the melody are E, E, and F, the first three entries in the table would be O70DH, 070DH, and O6A8H. When run, the program plays zhe sequence of tones defined by the note table; thereby, playing the melody, Here we will analyze, execute, and modify a program that is written to play a melody, Cheek Step Procedure 1 3. & Print out the program in file L18P2.ASM. From the contents of the data table inthe program, make a list of the notes in the order they are played. Run the program in file L18P2.EXE. Does it play a melody? Can you name the song? NOTE: Again, the numbers used in the program for the tone and repeat count implement the correct durations for the cone and silence durations based on the 8088 microprocessor in the original IBM PC, which runs at 5 MHz. Ifyou are using a PC with another processor, 8086, 80286, £80386, 80486, or Pentium® processor, or a PC that is running ata different clock frequency, the music produced by this program will be played too fast. This is because the software ‘generated delay will be much shorter. This can be compensated for by either increasing the ‘number loaded into CX in the DELAY subroutine or by increasing the values of the repeat ‘counts for the tone duration and silence between tones. If necessary, modify the program as done in step 6 of Part I ofthis laboratory exercise, Call the files for the modified program L18P2A, XXX. Rerun the executable file Modify the date table in the program of file L18P2.ASM so that they represent the melody. (high) BAGFGAPGABGAGFEFC( high } BAGPGAFGABGAGPEF Heere C(high) stands forthe C that is coded as the count 047111. Save the new program in the file L18P2B.ASM. Assemble, link, and then rerun the program. Can you name the new music piece that isplayed? Repeat step 4 for the following melody BEEEEERGC ( low) DEFPPPPEEEDDEDGEEEEEEEGC ( low ) DEPPFFFEEEGGFDC(1ow) 94 Here C(low) stands for the C that is coded as the count O8E2H, ‘What is this melody?Part 3: Program for Playing Individual Notes for Keyboard Inputs The music programs we have worked with so far were all table driven. That is, they played a sequence of tones that were listed ina table in memory. Here we will work with a program that plays the notes ofa scale in response to keyboard inputs. This will permit any melody to be played without any modification to the program. The notes of the song are keyed in one after the other from the keyboard, Check Step _ Procedure — 1. Set the PC to print what is displayed on the screen and print out the program in file L1SP3.ASM with a TYPE command a, From the contents of the data table in the program, make list of the notes in the order their counts are stored in memory. . Give an overview of the operation of the part of the program identified as Wait for keyboard char- ‘acter down to the comment Generate the tone, e. Which key must be entered to terminate execution of the program? Which keys of the keyboard are used to play the notes of the scale? Which key plays C(low)? high)? —_____ ‘What musical note is played when key 2 is depressed? _ 44. What equation is used to calculate the offset of the count forthe note from the keycode? In which register is the offset of the count for the note to be played from the table passed to the Generate the tone routine? —______ — 2. Run the program in file L18P3.EXE directly from DOS. Depress the | through 8 keys in that order. What happens? NOTE: Again, the number used in the program or the repeat count implements the correct duration for the tone duration based on the 8088 nicroprocessor in the original IBM PC, which runs at 5 MHz Ifyou are using a PC with another processor, 8086, 80286, 80386, 80486, or Pentium® processor, (or an 8088-based PC that is running ata different clock frequency, the lone produced by this program will be sounded for too skort a period. This is because the software generated delay will ‘be much shorter. This can be compensated for by either increasing the number loaded into CX in ‘the DELAY subroutine or by increasing the values ofthe repeat count for the tone duration. —_ 3. If necessary, modify the program as done in step 6 of Part 1 of this laboratory exercise. Call the files for the modified program L18P3A XXX. Rerun the executable file. — 4. Try out the keyboard by playing the melody used in step 4 of Part 2 of this laboratory exercise. It is repeated here, (high) BAGFGAPGABGAGFEFC (high) BAGPGAFGABGAGFEF5. Repeat step 4 for the melody that follows, which was used in step $ of Part 2, EEEEEEEGC ( low) DEFFPPPEBEDDEDGEEEEEEEGC ( lov) DEFFFFFEEEGGFDC (low) 6. 2 Modify the program so as to add a message tht is displayed when the program is brought up saying Enter I 10 8 10 play a tone or (1) to terminate. Call the files for the modified program L18P3B XXX. Rerum the executable file. Write a program that aifows you to save a sequence of keystrokes (musical notes) entered from the keyboard and play them back by pressing “P” on the keyboard. One should be able to replay as many ‘times as one wishes until (4) is pressed to terminate the program. Assemble, link, and execute to verify the operation of the new program. Save the file as L18P3C.XXX.4 Interface Circuits: Construction, Testing, and Troubleshooting LABORATORY 19: USING THE PCwLAB’S ON-BOARD INPUT/OUTPUT INTERFACE CIRCUITS Objective Learn how to + Use the DEBUG INPUT and OUTPUT commands to input the settings ofthe switches and light the LEDs ofthe PCMLAB. + Analyze, modify, and run programs tha igh the LEDs ofthe PCL AB. + Analyze, modify, write, and run programs that light the LEDs of the PCU.LAB based on the setting of its switches. + Analyze, modify, and run programs that produce tones at the speaker of the PCLLAB. NOTE: For this laboratory exercise, the PCALAB must be attached to your PC. Also, the INTIEXT switeh must be set to the INT position so that the on-board I/O interface circuitry is enabled for operation Part 1: Simple Input/Output with the INPUT and OUTPUT DEBUG Commands Here we begin our laboratory study of the on-board circuits of the PCLAB. This lab focuses on how to exercise the iopul! ‘output resource (LEDs, switches, and speaker) through software, In this part ofthe lab we will use the INPUT and OUTPUT commands of DEBUG to read the settings ofthe switches and light the LEDs. Check off each step as it is completed. Check —__Step_ Procedure Ensure that the INT/EXT switch is set for operation of the on-board circuitry. — 2, Bring up the DEBUG program. —_ 3. _Setall eight switches to the ON positon, Write an INPUT command that will read ther state Issue this command to the PC.LAB. What value is displayed on the screen? — 4, Reset all ofthe switches tothe OFF position and then read their state with another INPUT command. What valu is now displayed on the screen? —_ 5, Set switch Sy, §,, Sp, and Sy, to ON and the rest to OFF Again read their state with an INPUT command. What value is displayed on the screen? 7ML. Put switch $,, 8» Sq, and 8, to ON and the rest to OFE. Read ther state with an INPUT command. ‘What value is displayed onthe sereen? —______ ‘Make alist chat identifies which bitin the byte displayed om the screen with the INPUT command corresponds to each of the switches S, through S,. Explain how you determined this. Weitea single OUTPUT command that will tum on all eight LEDS. Issue the command to verify the operation. Do all LEDs turn on? Write another OUTPUT command that will turn all the LEDs off, — Issue the command to PCuLAB. What happens? Write an OUTPUT command that will ust turn on LED, Issue the command to verify the operation. What happens? Issue an OUTPUT command that will just turn on LED, throug LED,. What is the command?” Issue another OUTPUT command to turn all LEDs off. What is the command? Part 2: Scanning the LEDs J Part 1, we used the OUTPUT command to light the LEDs. Now we will use assembly language routines to turn the LEDs on. and off. First, an existing program is analyzed and run. This program is designed to scan the LEDS. That is, one LED is lit after the other. Then the program is to be modified to scan the LEDs in the opposite direction. Check Step Procedure 1 2. 98 Bring up the DEBUG program, Assomble the program that follows into memory starting at address CS:100. MOV Dx, 3LEH Mov BL,O6H MOV AL,OLR SCAN: OUT DX,AL 3. MOV CX,PPPFR; — DELAY: LOOP DELAY =; SHL AL,1 : DEC BL ; INZ SCAN a NOP Disassemble the program to verify that it has been loaded correctly, Add comments to the program to explain what each instruction does. What is the ending address ofthe program? How many bytes of memory does the program take up? Desoribe the operation performed by che program. Save the program on a data diskette in file LEDS. 1Run the program with a single GO command, Write the command so that execution stops at the NOP instruction, Describe the LED display sequence observed, ‘Modify the program so that the LEDs light in the opposite order; that is, LED,, LED,, and so on. Run the program to verify its operation, Part 3: Lighting LEDs Corresponding to Switch Settings In the prior part ofthis laboratory we worked with routines that scan the LED lighting one after the other. Here we will inte grate software that reads the switches with software that lights the LEDs, That is, the seiting of the switches is read, and based ‘on the input value, appropriate LEDs are lit, Check Step Procedure 1 2 Bring up the DEBUG program. Assemble the program that follows into memory starting at address CS:100. POLL: MOV DX,31DE IN AL, DX MOV DX, 31EH OUT DX, aL IMP POLL Disassemble the program to verify that it has been loaded correctly. Add comments to the program to explain what cach instruction does. What isthe ending address of the program? How many bytes of memory does the program take up? Deseribe the operation performed by the program. Save the program on a data diskette in file SWLED. 1 Set al of the switches to ON. Run the program with a single GO command. Which LEDs are lit? Reset switches S, through S, to OFF. What is the change in the LEDs that are lit? [Next reset switches S, through S, to OFF. What isthe change in the LEDs that are lt? Finally, st switches S, through S, to represent all binary combinations from OFF OFF OFF = 000 through ON ON ON = 111, Describe the relationship observed between switch setting and the LEDs ‘that light. Modify the program so that only the LED corresponding to the decimal equivalent of the switch setting gets lit. That is, if the switch setting is S,S,S, = 011, just LED, should light. Run the program and verify its operation. Write a program thet will poll the switches stating from S, and working back to switch S.A switch should be polled waiting for it to be set to the ON position. When this condition is detected, the corresponding LED should be tumed on. For instance, when switch S, is switched to ON, LED, should light. Then the poll sequence should move on to the next switch, S., and wait fori to be closed. This should continue until S, is switched to ON and LED, lights. After thi, a short time delay should elapse, then all LEDs should be tured off, andthe program terminated. Run the program to verify its yperation, 99Part 4: Sounding Tones on a Speaker Here we will analyze, run, and modify a program that sounds a tone at a speaker. Check Step Procedure 1. Bring up the DEBUG program, 2. Assemble the program that follows into memory starting at address CS:100, MOV Dx,31PH MOV BX, PPFPH MOV AL,O1E ON_OFF: OUT Dx,AL MOV CX,FFPPH DELAY: LOOP DELAY XOR AL,O1E DEC BX : INZ OWOPF ; NOP : Disassemble the program to verify that it has loaded correctly. Add comments to the program to explain what each instruction does. What is the ending address of the program? How many bytes of memory does the program take up? Describe the operation performed by the program. —_ 3. Save the program on a data diskette in file SPKR.1 — 4. Run the program with a single GO command. Change the count in CX to 7FFFH and rerun the program. Half the value of the count in CX one mote time and rerun the program. Describe the effect ‘of halving the count in CX on the tone produced — 5. Modify the program so that it first displays the prompt “Enter the count in the form XXXX (.3," reads entries from the keyboard, and assembles them into the value of count forthe delay. Run the program for the three counts used in step 4 to verify its operation. LABORATORY 28: TRACING SIGNALS IN THE PCwLAB’S ON-BOARD INTERFACE CIRCUITS Objective Learn how to: + Observe the address decoding that takes place to produce the I/O chip select signals for the switches, LEDs, and speakers. + Confirm that the VO chip select outputs of the I/O address decoder are not produced by unique addresses + Verify that memory-mapped addresses will not decode to affect the on-board 1/0 interface. + Trace the operation of circuits driving a blinking LED. + Construct a timing diagram of the waveforms for the key signals in path from address bus and data bus to the blinking LED, + Construct a timing diagram of the LED drive waveforms that are produced by a sean LED program. + Take measurements to determine the polling repetition rate ofthe switches, NOTE: For this laboratory exercise, the PCwLAB must be attached to your PC. Also, the INTIEXT switch must be set (0 the INT position so that che on-board 1/0 interface circuitry is enabled for operation, 100Part 1: Observing the Input/Output Address Decoding and Strobes Inthe last laboratory we exercised the on-board 1/0 interface circuits with software. We will now observe the electrical operation ofthis arcware. This part ofthe laboratory covers 1/0 address decoding as shown in Figure A1.9 in Appendix A. By taking electrical measurements, we wll observe the generation of the I/O chip selects signals, verify that these outputs are not produced by unique addresses, and that memory mapped 1/0 instruction sequences will not produce these outputs. Check off each step as itis completed, Check Step Procedure ‘Verify that the INT/EXT switch is set for operation of the on-board circuitry 2, Attach an IC test clip to the 74LS138 address decoder IC U;, and another to the 74LS32 OR gate IC Uz ofthe on-board circuitry of the PCALAB. ON_OFF: DELAY: 3. Assemble the program that follows into memory starting at address CS:109. Mov ov Mov DX, 31EH BX, PPPPH AL, OLE ouT Dx,aL MOV CX, PPFFE LOOP DELAY XOR AL,O1E DEC BX JNZ ONOFF i; NoP ; Disassemble the program to verify that it has been loaded correctly. Add commentsto the program to explain what each instruction does. What is the ending address of the program? How many bytes of memory does the program take up? Describe the operation performed by the progeam. —_ 4. Save the program on a data diskette in file LEDS.2. — 5. Run the program with a single GO command, Describe the LED display sequence observed. — 6. Run the program again and use the built-in logic probe to test the logic signals at pins 7, 9, and 10 of IC Uy, and pins 3, 6, and 8 of U,», Record these values as 0, 1, high-Z. or P in the table that follows, # 3 Uin6 UID. —_ 7. Runthe program again and observe the same six signals measured in step 6 with an oscilloscope. ‘When taking measurements on IC Uj, externally synchronize the scope to the active UO chip select ‘output, Draw the six waveshapes. Show their time relationship relative to the same 0 on the time axis, Use the leading edge of the active /O chip select signal asthe time reference point. Mark in the appropriate voltage levels and timing characteristics. — 8 Modify the program so that the first instruction reads MOV DX,31FH. Disassemble the program to verify that it has been loaded correctly. What change in program operation should be expected? What is the ending address of the program? How many tytes of memory does the program take up? 101102 9. 10. rs 2. 13. 4 15, 16. Describe the operation performed by the program. Save the program on a data diskette in fife SPKR.2. Run the program with a single GO command, What docs the program do? Run the program again and use the logic probe to again test the logic signals at pins 7, 9, and 10 of IC U,; and pins 3, 6, and 8 of Uj. Record these values in the table that follows, Wii-t0_ Ui Uns Uns vit Signal Run the program again and observe the six signals measured in step 9 again, but this time with an ‘oscilloscope, When taking measurements on IC Uy», as before, externally syne the scope to the active VO chip select output. Draw the six waveshapes as done in step 7. How do these results differ from those obtained in step 7? Modify the program so thatthe first instruction reads MOV DX,31DH, the OUP instuetion is replaced by ON_OFF: IN AL, DX, and remove the XOR instruction. Disassemble the progeara to verify that it has been loaded correctly. What change in program operation should be expected? ‘What isthe ending address ofthe program?. How many bytes of memory does the program take up? Describe the operation performed by the program. ‘Save the program on a data diskette in file SW.1 Run the program and measure the logic signals at pins 7, 9, and 10 of IC U,, and pins 3, 6, and 8 of U,z with the logic probe, Record these values in the table that follows, Pind Une Uini@ US i266 UL Run the program again and observe the six signals measured in step 12 with an oscilloscope. When. taking measurements on IC Uy, again externally syne the scope to the active I/O chip select output. ‘Draw the six waveshapes as done in step 7. How do these signals compare to those observed in steps 7 and 102 Reload the program ILEDS.2 into memory at CS:100, Unassemble to verify loading. Modify the program so thatthe I/O address of the LED is changed to FFIE,, Disassemble to verify correct, ‘modification. Run the program with a single GO command, Observe the same six signals measured in step 7 with an oscilloscope. Are there any changes? Explain why, Repeat steps 14 and 15 for 1/0 addresses F31E,, and OFIE;,. What do the results obtained in steps 14 and 15 demonstrate?17. Reload the program LEDS.2 into memory at CS:100, Disassemble to verify loading. Modify the pregram by replacing the OUT instruction with the instruction ON_ OFF: MOV DX], AL. Disassemble to verify the modification, Run the program with a single GO command. 18, Observe the same six signals measured in step 7 with an oscilloscope. Are there any changes? Explain why. Part serving the Signals for a Blinking LED Here we will trace the signal path from an LED output back to the address and data buses. The circuit path is driven by a pro- fram that causes the LED to blink. While the program is running, the voltage levels and duration ofthe signals inthe path of the VO interface will be determined and these results will be used to produce a timing diagram of the key signals Cheek Step 1 2 Procedure ‘Attach IC test clips to the 74LS138 address decoder IC Uj , the 74L$32 OR gate IC U,, the T4LS374 LED port latch IC Us, and the 74,8240 LED drive buffer Uj, of the on-board circuitry of, the PCLLAB. Reload the program LEDS.2 into memory at CS:100. Disassemble to verify loading. Run the program. with a single GO command. Does the program perform the expected operation? Use an oscilloscope to observe (do not draw) the signals at each of the test points that follow: Ryy(3300)_ —pin 16 Uyg (74LS240) —pins 19, 3, and 17 Ujs (TALS374) —pins 1, 19, 18, and 11 Uj (7HLS32). —pins 6, 4, and Uy; (ALSI38) —pins 1,2, 3,4, 5, 6, and 9 Ujg (7418688) —pin 19 Using the signal at pin 19 of Ug (741-8688) as the external sync to the oscilloscope, remeasure the signals that follow in the oraer they are listed, Us, (M4LS138) pins 4 and 9 Uj; (ALS32), —pins 4 and 6 Uy (4LS374) —pins 11, 18, and 19 Uy (74LS240) —pins 17 and 3 Rijs (30M) —pin 16 Draw these 10 waveshapes. Show their time relationship relative to the same time reference. Use the leading edge ofthe signal at pin 4 of IC U,, (74LS138) as the time 0 reference point. Mark the appropriate voltage levels and timing characteristics. Show the signals for atleast two occurences of the pulse at U,, (74.8138) pin 4. Part 3: Constructing Scan Waveforms for the LEDs In this part of the laboratory, measurements will be taken to construct waveforms for scanning of the eight LEDs. A program is run that scans the LEDs, that is, lights one after the other. The eight LED drive signals are observed and voltage levels and timing measurements are taken relative to the signals for LEDg, Finally, the eight signals are used to form the scan sequence ‘waveforms, 1033. Procedure ‘Atach IC test clips tothe 74L$374 LED port latch IC U3 andthe 741.8240 LED drive buffer U,, oF the on-board circuitry ofthe PCuLAB. Reload the program that was saved in Laboratory 19 in the file LEDS.1 into memory at CS:100. Disassemble to verify loading. Run the program witha single GO command. Does the program perform the expected operation? Using the signal at pin 2 of IC U,, (74.8374) asthe external sync tothe signs that follow in the order they ae listed. illoscope, measure the U)3 (74LS374)—pins 2, 5, 6,9, 12, 15, 16, and 19 Draw these eight waveshapes. Show their time relationship relative to the same time reference. Use the leading edge of the signal at pin 2 of IC U, (74LS374) asthe time equal 0 reference point. Mark the appropriate voltage levels and timing characteristics. Show the signals for atleast two occurences of the pulse at U,, (74LS138) pin 4 How long does each LED stay on? Stay off? How long does it take to complete one full sean of the LEDS? Draw a waveform diagram to show what you think the signals atthe outputs at pins 18, 16, 14, 12,9, 7, 5, and 3 of U4 (74LS240) would look like. Show just one scan of the display. Measure several of these outputs with an oscilloscope to verify that your timing diagram is correct. Part 4: Measuring the Time Ouration Between Switch Scans In the last part of this laboratory, we examined how the LEDs are scanned. Here we will observe the polling of the switches. A program that polls the switches will be run and measurements taken to permit calculation of the switch sampling frequency. Check Step Procedure — Load the program from file SW] that was saved in step 11 of Part 1 ofthis laboratory into memory starting at CS:100. Disassemble the program to verify that it has ben loaded correctly. Rum the program with a GO command —— 2% _Useanoscilloscope to make the signal measurements needed to determine the poll duration between samples ofthe switches, How long isthe state of the switch setting enabled tothe data bus? ‘What is the duration between successive samples ofthe switch settings? —______ What is the switch sampling frequeney? —____ — 3. Decrease the count for the delay loop in the program to the value OFFF Disassemble the program to verify thatthe change has been made correctly — 4, Repeat the measurements made instep 2. How long is the state of the switch setting enabled tothe data bus? —_____ ‘What isthe duration between successive samples ofthe switch settings? ‘What is the switeh sample frequency? 5. Decrease the count for the delay loop inthe program to the value O0OF ,. Disassemble the program to 104 verify thatthe change has been made correctly.Repeat the measurements made in step 2. How long is the state ofthe switch setting enabled to the data bus? ‘What is the duration between successive samples of the switch settings? What is the switch sampling frequency? LABORATORY 21: DESIGNING PARALLEL INPUT/OUTPUT INTERFACES WITH THE 82C55A PROGRAMMABLE PERIPHERAL INTERFACE Objective Learn how to: + Design, build, and test switch input, LED output, and speaker output I/O interface using an 82C55A. + Perform functionality tests on the interface by running a diagnostic program. + Observe the electrical operation of the interfaces with instrumentation. + Write and run software routines to exercise the I/O interfaces. NOTE: For this laboratory exercise, the PCLLAB must be connected to your PC. Also, the INT/EXT switch must be set io the EXT position so thatthe on-board 10 interface circuitry is disabled and the UO resources, LEDs, switches, and speaker are available for use with external circuitry. Part 1: Designing, Building, and Testing 82C55A-based Input/Output Interface Circuits Figure L21.1 shows @ block diagram of an /0 interface we want to design. In this part of the laboratory exercise, we will design this circuit, build it onto the breadboard area of the PCLAB, and verify its operation by running a diagnostic program, 0-2, ++; > Phy Aiky f+ ty ion ———__+l0 — iow ——______- a Pa, Leos 22055 rc, Reser Ls seer RESET DAV FIGURE L21.1 Parallel /0 interface circuit using the 82C55A. Looking atthe block diagram, we see thatthe interface is used'o connect an eight position DIP switch as an input device, and. set of eight LEDs and a speaker as output devices to the microcomputer. An 82CSSA device will be used to implement the parallel /O interface. Notice that the switches are connected to port A, LEDS to port B, and the speaker to the most significant bit at port C of the 82CSSA, The interface citeuits used for these types of UO devices in the PCuLAB are shown in Figures 13.12, 13.13, and 13.15 of the textbook The 8088 and 8086 Microprocessors: Programming, Interfacing, Software, Hardware, and Applications, 4th Ed, (Figures 14.12, 14.13, and 14.15 of the texthook The 80386 80486, and Pentium® Processor: Hardware, Software, and Interfacing). Similar circuit designs can be used when connecting the devices to the ports of an 82C5SA. 105Let us continue by looking at the microprocessor interface of the 82CSSA. Looking at the block diagram, we see that the 82C55A\¥s data bus is attached to data bus lines D, through D, of the 1/0 channel interface, Moreover, the VO channel signals, 10 read (TOR), and /O write (OW) are applied directly to the RD and WR inputs of the 82C55A, respectively. For this reason, the parallel I/O interface is located in the microcomputer's I/O address space. Whenever the MPU executes instructions to communicate with the 82C55A, the circuit ofthe select logic block produces, the chip select signal (CS) needed to enable the 82C55A\s microprocessor interface. In the design of the circuit, you should use the address range 300H to 303H forthe rogisters ofthe 82CS5A. This means the select logic must generate the chip select signal for the 82C55A whenever the microprocessor executes IN and OUT instructions to this address range. From the circuit dis gram, we see that just A, through A, get decoded in this circuit. The other two address bits are for a two-bit register select code, A,Ag, Looking at Figure L21.1, we see that they are applied to register select inputs of the 82CSSA. Therefore, the I/O addresses are assigned to the 82C55A as follows Device TO Address ‘Switches (Port A) “30011 LEDs (Port B) 301 ‘Speaker (Port C) 302 Mode register of the 82C55A, 30341 Figure 121.2 shows the inputs and ouput of the select logic circuit in more detail. Earlier we pointed out that this circuit ‘ust generate the SELECT82CS5 signal in response to an I/O address from 300H to 303H. This part of the cireuit can be designed using a digital comparator such as the 74LS688. A similar design, shown in Figure AJ.7, was already discussed in the textbook with respect to the circuitry on the PCHLAB. The SELECTR2CSS output must become active whenever AgAgAyAgAsAeAyAs = 11000000 and AEN =0 Aoki] 9 | Soot | SacI 1000000 — A+! age, | Sects tor sacs aen——+ FIGURE 121.2 Select logic circuit. ‘Once the circuit has been built on the breadboard, it is ready to have its operation tested. Earlier we pointed our chat a dia nostic program will be used for this purpose. This program is located on the Programs Diskette in file 82SSLAB.EXE and can be initiated directly from DOS. This program performs a series of tests that will demonstrate that the circuit works correctly First, a message is displayed telling that entry of (1) will cause the program to go to the next test and the ESC key will auto- ‘matically terminate the diagnostic sequence. Also displayed at this time is “LED SCAN TEST: Watch LEDs.” This means that the LED diagnostic test has been initiated. Ifthe LED interface is working correctly, the LEDs will turn on one ata time starting with LED, and ending with LED, This test continues to repeat uatl either (~) or ESC is depressed. ‘Let us assume that the LED scan test has passed end tha the (1) ey is depressed, In this case the program initiates the DIP switch test. First, a message is displayed to indicate chat all switches must be set to the OFF position. After this is done, all LEDs should be turned off. Ithis is the case, the switches were road as being al off. The test repeats until (4) is depressed, This input signals that we are ready to go to the next step in the switch test. This makes another message appear on the display. You are now instructed 10 mave all switches to the ON position. When this is done, all LEDs tun on to acknowledge thatthe inputs from the switches were read as ON. Ifall LEDs are OFF when the first part of the switch testis run and ON for the second part, the test has passed and the DIP switch interface is operating correctly. 106Assuming thatthe display interface also checked out to operate correctly, ()) is depressed to cause the diagnostic routine to continue on to the speaker interface. The message “SPEAKER TEST:—Speaker must beep twice repeatedly” is displayed. 1f the circuit is working correctly, the speaker will produce separately two tones followed by a silence. The circuit testis now com plete; therefore, either the (-1) or ESC should be depressed to terminate the diagnostic program. Check off each step as it is completed. NOTE: If this lab is performed on a 80386, 80486, or Pentium® processor based PCVAT, a wait state generator may be needed. See Figure 124.4 for a ypical wait state generator circuit configuration. Cheek Step & Procedure Draw a schematic diagram of your design for the interface circuit of Figure L21.1. Label all ICs and pins with numbers, and signal lines with mnemonics. Use a circuit layout master from Appendix 2 to make a layout drawing that implements the schematic circuit. Identify the ICs, pins, and appropriate signals. Build the circuit on the PCLLAB breadboard area. (Leave out the power supply connections.) Pecform a thorough visual inspection of the circuit to assure that it is correctly wired and that no short circuit exists between devices. Use the PCuLAB's continuity tester co verify thatthe circuit connections are correct. Be careful to assure that no short circuits exist on the breadboard. Make the power supply connections to the circuit. Insert the Programs Diskette imo drive A. Run the diagnostic program to verify that the circuit works correctly. The program can be initiated directly from DOS with the command :\>825SLAB (1) Ifthe diagnostic program does not produce the appropriate responses for any part of the circuit, use that part of the diagnostic program to exercise the circuit and debug the circuit’ operation, Part 2: Observing Signals in the 82C55A Parallel Input/Output Interface Circuit In the last section, we designed the switch, LED, and speaker /O interface circuit, constructed it on the PCALAB, and tested its operation with the 8255LAB diagnostic program. In this part of the laboratory exercise, electrical measurements will be taken to observe the operation of each interface, Cheek step Procedure 1 2 Attach an IC test clip to the 82C55A IC. Rerun diagnostic program 825SLAB.EXE. For now leave the program in the part that performs the LED sean test Use the parallel output of the 82CSSA that drives LED, as an external sync input tothe oscilloscope and then observe each of the outputs of the 82C5SA that drive an LED. Draw these eight waveshapes, ‘Show their time relationship relative to the same time reference. Use the leading edge of the signal that drives LED, as the time 0 reference point. Mark the appropriate voltage levels and timing information. Show the signals for one complete scan of the eight LEDs. How long does each LED stay on? ~ Stay off? —___ How long does it take to complete one full scan of the LEDs? Continue the diagnostic program to the DIP switch test. Let the part of the test where the switches are scanned for ON repeat. 107Use an escilloscope to make the signal measurements needed to determine the poll duration between samples of the switches, ‘What isthe duration between successive samples of the switch settings? What is the switch sampling frequency? —______ ‘Continue the diagnostic program to the speaker test. Let this test repeat so that signal measurements ‘can be made. ‘Observe the output of the 82C55A that drives the speaker. What is the frequency of the tone produced. at the speaker. How long does each beep last? ‘What is the time interval between the beeps? Over what time interval does the speaker test repeat? Part 3: Using the Input/Output Resources of the 82C55A Interface Circuit Up to now we have just observed the electrical operation ofthe switch, LED, and speaker interface circuits. In this part ofthe laboratory exercise, we will write programs to use these interfaces. The frst program represents a simple data processing application. That is, it reads inputs from the switches, processes the input data, and then outputs results for display on the LEDS. A scc- cond program demonstrates what is known as & conirol application. In a program writen for this type of application, inats are read and based on these values the operation of outputs are controlled. Check Step Procedure 108 1 2. Set all switches to the OFF position. ‘Write a program that initializes the 82CSSA for operation, reads the contents ofthe eight switches, ‘makes the 4-bit value ead from switches 0 through 3 binary number in a register as variable A the 4-bit value read from switches 4 through 7 in another register as variable B, process the input data by performing the arithmetic operation A + B, and output the resulting binary number to the LEDs; Bring up DEBUG, assemble the program at CS:100, disassemble the program to check is entry, save the program in file SUM.1 Run the program and find the results produced foreach case ofthe input switch settings. Case 1: A= OFF OFF OFF OFF , B = ON ON ONON Case 2: OFF ON OFFON ,B = ONONONON Case3: A= ONOFFONOFF ,B = ONONONON, ‘What binary number is displayed on the ILEDs for each case? Case 1 Case 2: Case 3 Repeat steps 1 through 4 with the following change. The processing performed on the input data should be the logic operation B AND A. Write a program that polls switches 0, 1, and 2. Whenever all three switches are ON, LEDg lights and the speaker generates a tone. However, switch 1 controls the LED, and if itis OFF, the LED no longer lights. Switch 2 controls the operation of the speaker, and ifit is OFF, the speaker does not produce @ tone, The tone frequency should be approximately 1.5 kHz. Bring up DEBUG, assemble the program at C8:100, disassemble the program to check its entry, save the program in file CNTRL.1— 8 Run the program and find the results produced for each case of the input switch seitings. Case 1: 8,S)8) = ONONON Case2: 8,88, = OFF ON ON Case? 88,8) = ON OFF ON ‘What results are displayed and sounded? Case 1: __. Case 2: Case 3: LABORATORY 22: WAVESHAPE GENERATION WITH THE 82054 PROGRAMMABLE INTERVAL TIMER Objective Lear howto: + Design, construct, and test waveshape generation circuits using the 82C54 programmable interval timer. + Perform functionality tests on the interface by running a diagnostic program. + Analyze and execute initialization software for the 82CS4 timer, + Observe and measure square wave and pulse signals with electrical instrumentation. + Reprogram the 82C54 timer to change signal frequency and mode of operation, NOTE: For this laboratory exercise, the PCuLAB must be connected to your PC. Also, the INT/EXT switch must be set to the EXT position so that the on-board I/O interface circuitry is disabled and the 1/O resources, LEDs, switches, and speaker are available for use with external circuitry. Part 1: Designing, Building, and Testing an 82C54-based Waveshane Generation Circuit The block diagram in Figure 22.1 is a waveshape generator circuit that is designed sing the 82CS4 programmable interval timer IC. In this part of the laboratory exercise, we will build the circuit onto the breadboard area of the PCpLAB, initialize the timers with a diagnostic program, and verify its operation by using an oscilloscope to observe the input and output signals. ° 0-9, -———+——+[5-, 2 Phe Phy =f Sites A A A, ig ——____—__+|0 iow + i : PB, P8-—A—e| Leds Ark | _ 2085 Bec, secet RESET lage 7 Lt speaker ‘ore2ces| ESET ORV — FIGURE L22.1. Waveform generation circuit using the 82054 109Figure L22.2(a) shows the counter configuration implemented withthe circuit. Notice thatthe counters are cascaded to produce a 3-stage frequency divider circuit, The counters are all configured by the diagnostic program to operate as square-wave ‘generators. Looking at the block diagram, we see thatthe input of the first stage is clock f.. In figure 1.22.1, we find that this input is generated by dividing the 14,31818 MHz OSC clock that is available at the UO channel interface by 12 t0 generate a 1.19 MEz clock, f,. Counter 0 divides this input by 10; thereby, producing the output = fN0 ‘at OUT», This output is used as the input of the second stage, counter 1. Here it is divided by 100 to produce the signal (100 at OUT;, Finally, the third stage accepts fas its input and divides this signal by 10,000 before outputting the signal f, = f/10,000 at OUT, Let us now examine how the microprocessor interfaces with the 82CS4, Inthe block diagram, we find thatthe data bus of the 82C54 is supplied throughs a buffer by data bus lines Dy through D, from the 1/0 channel interface. Notice that the data buffers are enabled by control signals 1OR, TOW, and CS. The programmable interval timer is located in the microcomputers WO address space. For ths reason, the VO channel signals /O read (IOR) and /O write (TOW) are applied directly to its RD and WR inputs, respectively ‘Notice in Figure L22.1 that a 7420 4-input AND gate is used to decode the chip select outputs of the PCHLAB. As shown, the registers of the timer IC are located in the ] address range X318, through X31B,,. For the MPU to communicate with these registers, it must execute JN or OUT instructions to these addresses. The specific reister accessed is selected by the two- bit address code Ayo. After th circuit has been built on the breadboard, itis ready to have its operation tested. Earlier we pointed out that a diagnostic program will be used for this purpose. This program initializes the circuit to operate as shown in Figure L22.2(a). By ‘observing and measuring the signals at CLK,, OUT,, OUT), and OUT, we can verify thatthe circuit operates correctly. The waveform characteristics to be measured are the pulse width, pulse interval, and period. Figure L22.2(b) identifies each of these characteristics for a typical periodic signal. The diagnostic program is located on the Programs Diskette in file 8254LAB.EXE. Check off each step as itis completed. NOTE: If this lab is performed on a 80386, 80486, or Pentium® processor based PC/AT, a wail state generator may be needed. See Figure L24.4 for a typicat wait state generator circuit configuration. ri coun como? | [comers | 0 “too [oor] “etooe POUT o victge) to [ Tim | FIGURE 122.2 {a} Counter configuration. (b) Waveform characteristics. 110Check Step 1 2 10. uw. Procedure Draw a schematic diagram of your design for the interface circuit of Figure L22.1. Label all ICs and pins with numbers, and signal lines with mnemonics, Use a circuit layout master from Appendix 2 to make a layout drawing that implements the schematic cireuit. Identify the ICs, pins, and appropriate signals. Build the circuit on the PCALAB breadboard area. (Leave out the power supply connections.) Perform a thorough visual inspection of the circuit to assure that itis correctly wired znd that no short circuits exist between devices, Use the PCLAB's continuity tester to verify thatthe circuit connections are correct. Be careful to assure that no short circuits exist on the breadboard. Make the power supply connections to the circuit. Set switches 8, and S, to the ON position, Insert the Programs Diskette into drive A. Print the source program in file 8254LAB.ASM, What are the values of the control word loaded into counters 0, I, and 2? and Fromthe control word for counter 2, identify the values and meanings for RL, RLy M;M, My BCD ‘What are the values of the count loaded into counters 0, 1, and 22, ‘What isthe decimal value ofthe count loaded into counter 27 Run the diagnostic program to verify that the circuit works correctly. The program can be initiated withthe command As \>8254LAB ‘A tone should be sounded at the speaker and the LED should blink NOTE: If the circuit does not produce a tne, first recheck the layout and connection ofthe circuit Verify that the diagnostic program has loaded correctly by viewing it with an unassemble command. Then gon with step 9 but use the measurements taken to debug the hardware ‘operation of the circuit. Ifnone ofthe counters are working, you may have a problem with the interface circuit. To debug the interface, look atthe input clock OSC and output clock fof the divide by 12 circuit, and control signals CS, JOR, and 1OW of the data bus buffer circuit Attach an IC test clip to the 82054 IC. Use an oscilloscope to make the following measurements. 2. Observe the signal at CLK, and measure te duration ofthe pulse width, pulse interval, and perio ‘What is the frequency of f,? —______ 'b, Observe the signal at OUT, and record the duration ofthe pulse width, pulse interval, and period. Calculate the frequency of f,? Make a calculation to determine how much counter 0 divides input f, by. ¢¢. Measure the signal at OUT, to find the duration of its pulse width, pulse interval, and period, Caleulate the frequeney of f, Determine how much counter 1 divides input f, by. m12 13, 4d. Observe the waveshape at OUT, to find the duration of its pulse width, pulse interval, and period, Cateutate the frequency of f, How much does counter 2 divide input f, by? By how much is f divided as it oes from the input of counter 0 to the output of counter 2? Leave switch 1 in the ON position and set switch 2 to OFF. What effect does this have on the sound produced at the speaker? Observe the signals fy fy, and f,, with an gscillascope, What changes do you find? Explain why this happens. Set switch 1 to the OFF position and switch 2 back to ON. What effect does this have on the sound produced at the speaker? Observe the signals fy, fj, and f, with an oscilloscope. What changes do you find? Explain why this happens. Part 2: Modifying the Frequencies Through Software In the last section, we constructed and tested the operation of the 82CS4 cascaded counter circuit, Here we will continue to use this circuit by modifying the program to change the frequency of the square wave produced at the output. Check Step _Pracedure — 1. Copy the source program from file 8254 AB.ASM to file TIMER_1.ASM. —_— 2. Assuming that the operation of counters 0 and | are to be unchanged, calculate a new divide factor for counter 2 so thatthe output will be a 100 Hz symetical square wave. — 3. What value must be loaded into counter 2 in order to set it fr the divide factor found in step 2? — 4. Print a copy ofthe source program in file TIMER_1.ASM. —_ 5. Modify the source program TIMER_I.ASM so that it wll Joad counter 2 withthe count determined instep 3 — 6. Assemble the program in file TIMER_1.ASM to produce executable program TIMER_1LEXE. — 7 Attach an IC test clip to the 82C54 IC — 8. Set switches S, and S, to the ON positon. 9. Run the program TIMER_IEXE. Describe the operation of he circuit. 1210. Use an oscilloscope to measure the period of signals fff, and f What are the frequencies off, fy f,, and 2 ‘What isthe measured divide factor of counter 2? _____ By how much is f, divided as it goes from the input of counter 0 to the output of counter 2? Describe how the operation of the circuit has changed. Part 3: Modifying the Timer Mode and Output Waveshape Upto this point in the laboratory exercise, we have used the 82CS4 to generate a symmetrical square wave signal. Now we will change the mode of operation for the 82C54 to produce an asymmetrical signal waveform at the output. To do this, we will Jeave timers 0 and 1 set up the same as they were in Part 2, but counter 2 is to be reconfigured for Mode 2, rate-generator operation Check Step Procedure —_ 1. Copy the source program from file TIMER_1.ASM to file TIMER_2.ASM. 2. Determine the value of the control word needed for counter 2 so that itis configured as before except that it now operates in Mode 2 (rate generator), rather than Mode 3, —_ 3. Print a copy of the source program in file TIMER_2.ASM. —_ 4. Modify the source program TIMER_2.ASM so that it wll oad counter 2 with the control word ddotermined in step 2 — ‘5. Assemble the program in file TIMER_2.4SM to produce executable program TIMER_2.EXE. — 6. Attach an IC test clip to the 82CS4 IC. — 7. Set switches S, and S, to the ON position. — 8. Run the program TIMER_2.EXE, Observe the output of counter 2 with an oscilloscope. Describe the operation of the circuit 9. Use an oscilloscope to measure the pulse width, pulse interval, and period ofthe signals ff fy, and fg Identify whether the signals have a symmetrical (Sym) or asymmetrical (Asym) waveshape. sym/Asym Calculate the frequencies of fff and fy . What is the measured divide factor of counter 2? How has the operation ofthe circuit changed? 113LABORATORY 23: EXPLORING PARALLEL AND SERIAL COMMUNICATION INPUT/OUTPUT ON AN ADAPTER CARD Objective Learn how to: + Seta printer port on a commercially available printer adapter card for use in a PC. + Analyze a printer driver program, * Look atthe important interface signals for a printer and a printer adapter. + Seta serial port on « commercially available adapter card. + Analyze a serial port driver program. *+ Look at serial port bits as they are transmitted. Part 1: Parallel Port on a Printer Adapter Card In this laboratory we are going to use a commercially available communications interface adapter card, The adapter card we use 4s he MCT-2SIP card, which is manufactured by Modular Circuit Technology. It is an 8-bit ISA bus compatible card that provides two serial ports, a parallel por, and a game port. Each port can be independently enabled or disabled. In this section we ‘will consider the operation of the parallel port and how itis used to interface a printer with the PC. Similar cards are available from other companies and can be used with minor changes or in some eases, no changes at al. Figure 1.23.1 shows the layout of the board and location of the various connectors and switches. Ifa PC already has either a parallel or a serial port, we must consider them when configuring the MCT-2S1P card. Otherwise an addressing conflict may ‘occur and the expansion ports will not operate correctly Sosa! atta Carnector GEES! cm H Bas00459 LPTIRO SODODODOD0RNRORUOOOOUO0000___s FIGURE L23.1. Mulli-V/O expansion card. 14DIP switches are provided to configure the operation of the board. The functions of the individual switches are described in Figure L23.2. For the printer interface, we find that there are two switches on DIP switch JPI that need to be appropriately set Notice that switch number 2.configures the parallel port as either LPT] or LPT2, If we assume that there is already a port LPT in the PC, we must set the switch to the ON position, thereby, assigning the parallel port on our adapter card to the address of LPT2. The other printer control switch on JPI, switch 3, is used to enable or disable the printer port. As shown in Figure L23.2, it should be OFF to enable the parallel interface. coma COMB Th OOM, aides | 30T_| OOM ates _|_1 OF CON, aidess rat | 30a | COM, ads 20H | 10n Enable 408 Eble 208 Disable 400 Disable 201 Serial port address setings Tipo [ COMA | od port [COM RQ, | 308 [IRQ [30m iro, | 4m | 1RQ, | 40m ik, | 501 | RQ, | 50m ik, | 500 | IRQ, | 90m ‘Sera port IRQ stings Paraleligame port 2 PT ads 78H 20 LPT, dss 78H 20n Enable parallel port 308, Disable paral port 30n Enable ame poet, Tom Disable gave prt TO Parle port adress seins and paraleligame port enblsable FIGURE 123.2 DIP switch settings Figure L23.3(a) shows a conceptual view of the interface between the printer and the parallel port. There are three types of signals atthe interface: data, control, an status. The data lines are the parallel path used to transfer data tothe printer. Transfers of data over this bus are synchronized with an appropriate sequence of control signals. The data transfer can only take place if the printer is ready to accept the data. Printer readiness is indicated through the parallel port by a set of signals called status, lines. This interface handshake sequence is summarized by the flowchart of Figure L23.3(b) ‘The parallel port connector on this board provides easy access to important interface signals. The actual signals supplied at cach pin of the connector are shown in Figure 123.4(a). These signals are categorized as data, control, and status in the list of Figure L23.4(b). Ina particular implementation only some ofthese signals may be used. For instance, to send a character to the printer, the software may only test the busy signal. If tis inactive it may be sufficient to proceed with the transfer. In this sec~ tion we will analyze a program that implements a parallel printer interface. Check off each step as itis completed. 115. ® FIGURE 123.3 (a) Parallel printer interface. (b) Flowchart showing the data transfer in a parallel printer interface. 3 3 a Hs et oe of pee a ae —S= 19 Ground Data: oes FIGURE 223.4 (a) Parallel port pin assignments. (b) Types of printer interface signals. 116Cheek Step Procedure ‘Study the possible settings for the switches of JPI and determine their correct positions so that the parallel port becomes LPT? and itis enabled for operation. ‘Set the switches on the board to the positions determined in step 1. Turn off the PC and insert the adapter card itto the AT slot of the PCLAB. Also connect a printer tothe parallel port. Ensure that there is paper in the printer, itis turned on, and selected. The printer is selected if the On Line light is li. The program in Figure L23.5 can be used to send a stream of Xs to the printer LPT2, After itis started it can be stopped by pressing any key on the keyboard. The executable file of this program is named PARLAB23,EXE, Run this program by entering A:\>PARLAB23 (4) Describe what happens. ross a key on the keyboard. Describe what happens. Analyze the program to determine the following: Address of the data port Address of the status port. Address of the control port. Bit position and active level of the following status signals when they are read from the parallel interface adapter by software: Busy — Paper Empty Select — Error _ ‘The bit position and active state of the following control signals when they are presented to the adapter by software: Strobe Initialize Sletin ‘What value of status byte does the printer adapter look for when checking to see if the printer is ready to accept a byte of data, Draw a flowchart for the ‘outipt routine. Describe how the ‘outlpt’ subroutine works 7‘Monitor the Busy and Strobe signals with an oscilloscope ora logic analyzer. These signals can be acquired from the connector using clip leads, Draw their waveforms. Analyze the waveforms obtained in step 6 and determine the values ofthe following: Strobe signal pufse width Character time (Character data rate (Characters/min) —— ‘Change the program so that the printer will print your name 10 times and then stop. Assemble, link, and execute the new program. Describe the results achieved by the new program and how it is, different from the original one. 118Page 60,132 Title Simplified parallel Port oriver Program Parallel port driver program Simpl tied version using polled 1/0. + Parallel interface 1/0 porte: all are relative te the LETBASE port Lerease equ 0278n } base port (03bch, 0379h, or 0278h) PORTA equ LPTBASE+O 5 data port PSTATUS equ LPTEASES1 + status port offser POTRL equ Leranse+2 control port offset } Status port bit definitions (Logic levels as INPUT) BLERROR eq 000010000 Error = active Low BuSELECT sq 000300008 © Select oo xcrive HToH HEE eqs 0ol00000 ©; aut of paper — active HIGH sLeusy sq 200000008; Busy = Setive Low 2 bits to check in "busy" test [BSTATHASK equ BLERROR or BHSELECT oF BHPE or BLEUSY 2 they should nave these values when not bus SSTATVAL ‘equ BLERKOR Or PHSELECT or BLBUSY } contol port bit definitions (logic levels ae mMeur) usTROSE eqs po00000 ©; Strobe = active HIGH SLINIT equ 00001008 Initialize > active Low BHSLOTIN eq 00001000 ©} Select in - active HIGH ‘BCTRLNORY equ -BLINIT or BHSLCTIN ; “nornal” settings P note: This program 4s intended for use as 2 COM file. Thur st } contains only one segment and no explicit stack. Cede begins } St" absolute Location 100K. Data Le interspersed witn code after peogeam segnent assume ce:progran,de:progranyes:nothiing ssepcogean ors 1008 main proc far mov evan oy any tx! # Prine only "x" Selzoutipe § print the character mov ahyo # check for keypress ine teh 52 masna £ loop sf no Keypress FIGURE L23.5 Parallel port test program. 119rov ax, 4000h fer Bik ceturn £0 DOS with exit code 0 main endp subrourin outpute @ character to the LET using polled 1/0, cali with: AL = character Returna: nothing } ALL cegisters preserved outlet pree near push ax 2 gave all registers used posh ox send the character to the DATA port ov dx, POATA 4; output the character to the data port out dxral } seite the daca port, } wait £412 cot busy according to the STATUS port ov dx,PSTATUS check for busy outlpers sn alae 2 read the statue port and a1, BSTATMASK Check for proper "ready" bits emp 21, BSTATVAL, Jne—outlpea + loop ti1i ready } generate the strobe pulse on the CONTROL port ov dx, POTRL 2 esezobe nigh ov BL;BCTRLNORM or GHSTROBE out dxval nee one aystens may need a Little ore delay Bev al BCTRLNORM 3 strobe Low out éxral pop dx + estore the registers pop ax outipt endp program enda eng tart FIGURE 123.5 (Continued) 120Part 2: Serial Port on an Asynchronous Communication Adapter Card ‘The serial interface of the MCT-2S1P card can be used to transfer data between a computer and a device with an asynchronous serial por. In this laboratory, we will use the serial port on the ISA card to demonstrate and observe asynchronous serial communications. The interface uses the serial port in what is known as a loop back mode. That is, the data output during the transmission process is returned at the receive input. Figure 123.6 lists the signals of the COMA serial interface implemented with @ male DB9 connector. Serial data is received ‘on the RX line and transmitted on the TX line. The general format for an asynchronous serial data transfer is shown in Figure 1.23.7. Even though the general format shows eight data bits there can be from five to eight bits in a practical application. The data bits ate preceded by a start bit (space or 0) and are followed by a parity bit and 1, 1.5, or 2 stop bits (mark or 1). A serial communication line when not transmitting ot receiving data is always at the mark level, RS7320 | 089 Name | Fin ‘Assignment cr 1 | BCD Data Carrier Detect) 58 2 AX (Receive Datel BA, 3 TX (Transmit Data) c 4 | DTR (Data Terminal Ready) AB. 3 ‘GND (Signal Ground) cc. é DSR (Data Set Ready) cA 7 [RTS (Return to Send) ca 2 (CTS (Clear to Sena) ce 2 (Ring Indicator) FIGURE L23.6 Serial port (COMA) signals and pin assignments. Figure 23.2 shows the DIP switches that affect the serial ports. Since the serial port that is generally available on the processor board if the OC is configured as COMI, the serial port COMA in the adapter card will be set up to be COM3. This is done by setting switch 3 on JP2 to the ON position and switch 4 to the OFF position. ‘The serial interface on the adapter card is implemented using a Universal Asynchronous Receiver Transmitter (UAR) device. There are seven 8-bit registers within the device that can be used to implement the serial interface. In this lab we will use only the three registers listed in Figure L23.8. The addresses of these registers are expressed with respect to the BASE. address at which the UART is located. The receive buffer register (RBR) is where the data is received; the transmit holding register (THR) is the one that is used to send the data out. The line status register (LSR) gives information about the status of the {transmission or reception. In this laboratory, we will use only a subset of the status to implement the interface. = TTT FIGURE L23.7 Serial interface data format. In addition to the data and status ports we need to define formatting of the data as shown in Figure L23.7. For this purpose, wwe will use the MODE command of the DOS to define the data format, This command can be written to automatically intial- ize the UART with the number of data bits, type of parity, and the number of stop bits. 121Register Address Bits (0-7) Receive Butter BASED Datao to Data? Register’ (RR) ‘Transmit Holding DASEto atao to Data? Register (THR) Line status BASES Register (ZSR) FIGURE L23.8 The serial interface registers, addresses, and bits as implemented on the Multi-V/O card. Check Step Procedure —_ 1. Study the DIP switches of JP2 and determine their settings so that the seria port becomes COM3 and is enabled for operation. Select IRQ4 for COMA port Set the switches on the board to the positions determined in step 1. Turn off the PC and insert the ‘adapter card into the expansion slot of the PCLAB. Also, connect the pins of the DB9 connector as follows: connect RX to TX; short DCD, DTR, and DSR together; and connect RTS to CTS. This wall allow us to receive the characters on RX that are transmitted on TX without worrying about the ‘modem handshake signals, — 3. Use DEBUG to determine the COM3 base address for your PC, Itis at address 0000:0404, NOTE: If this address is other than OSESH, then the program used in step 5 needs 10 be modified —— 4. _Issue the following MODE command to define baud rae, party, data bis, and stop bts: Az\>MODE COH3:3200,E,8,3 ()) ‘What format has been defined by this command? — 'S. The program in Figure L23.9 can be used to send a stream of Us from TX to RX. After it is started it can be stopped by pressing any key on the keybourd. The executable file of this program is called SERLAB23.EXE, Run this program by entering the command >SERLAB23 (4) Monitor the TX line with an oscilloscope. Identify the following from the timing display: Data format Bit transmit time. (Character transmit time Data rate (Characters/sec) —_ 6 Change the baud rate to 9600 using another MODE command and repeat step 5. — 7. Draw flowcharts for the routines ‘Incom’ and ‘Outcom’ that are used in the program of Figure L23.9. — 8. Change the program so that it can transmit and receive your name. Store the received name in memory such that it can be verified using the DUMP command of DEBUG, Assemble, ink, and run the modified program to verify its operation 122Page 60/132 Title sifplified serial eort river Program Simplified serial port driver progran Restricted to CoM) with polled 2/0. Sends the letter "U" repeatedly. Run the MODE conmand first to initialize COM. For instance 3 run the following comand ODE CoH3:2200,0,8,1 for 1200 baud, even parity, @ data bite, and 1 stop bit. PARSE equ 88h } Serial interface 1/0 parte: all are relative to the PASE port PoaTA equ 0h PUSR equ Sn 8x buffer/Tx holding register Line status cegister Line etatus register bit definitions saoaoy eau 00000001; RX data ready USTAHREMeTY equ 0010000025 TX holding register empty } This program is intended for use as 2 COM file. Thus it contains F ondy One segment ana no explicit stack. code begins at absolute } location 100H. bata is interspersed with code after the appropriate subroutine. progean segment assume ce:program,de:progeam, eg :notningr program org 100m main program main prec far call testpor sup the test using polled 1/0 mov axe c00n, 4} return to DOS with exit code 0 fee th FIGURE 123.9. Serial port driver program. 123main onde TE ready, ceade the character and discards it. If not ready, returns immeaiately. call with: nothing. Returne: nothing: All registers preserved. incom proc near push di 4} check 1f RK is cesay mov x,POASEVELGR + read the LSR test al LERORDY 4 test the RX ready Bit je) tacoma if'not ready, Just zeturn receive the character ov dx, BUASE*POATA ; get the character te lide pop dx pop ax. sncom end Subroutine: outeon Waite e411 1% 4s ready, then outputs a "UY to the date pore ‘The polled ceceive routine is clled ineide the "wait for 7% ceady" leop: cat with: nothing Returnes nothing ALL registers presecved, push ax f vate et1t ex ready push ax 2 save ax Pov diy PBASE*PLSR } ead the LGR to check for TX empty FIGURE L23.9 (Continued) 124outcomt: Loop t111 7K is avatlable call incom receive é display any waiting characters in alae test a1; LSTAHREMPTY ; test the TX Hn empty bit 32 Sutcomt pop ax } send the character fev dx, BBASE*2DATA 7 output the character to the data port out axed pop dx pop ax outcom encp Subroutine: testpol Runs the serial test with polled 1/0. F call with: nothing b Returns: nothing } All registers preserved. testpol proc near push ax testeoml: moval, Ut call Guteon 2 Note: RK routine called by ourcon mov ah, 01 3 call BI08 for key test 42 testcomt exit on key press Pop ax testpol engp program ends eng atert FIGURE L23.8 (Continued) 125LABORATORY 24: DESIGNING A STATIC READ/WRITE MEMORY SUBSYSTEM Objective Learn how to: + Design a 2K byte static read/write memory subsystem that interfaces to the PC's + Build the memory circuit on the breadboard of the PCHLAB. + Write software routines that will read from or write fo the memory subsystem, * Verify correct memory circuit operation by writing data into it and then reading the data back. + Observe the read and write memory eyeles by monitoring interface signal, + Observe the effect and diagnose the cause of a malfunction in the memory circuit + Load a program into the static memory subsystem, run the program, and observe its operation, NOTE: For this laboratory exercise, the PCy.LAB must be connected to your PC. Also, the INT/EXT switch must be set to the EXT position so that the on-board 10 interface circuitry is disabled and the /O resources, LEDS, switches, and speaker are available for use with external circuitry) Part 1: Designing the Memory Subsystem Design the 2K x 8 bit external static read/write memory subsystem whose block diagram is shown in Figure L24.1. The memory circuit is to attach to the PC’s ISA bus and the address ranges for its storage locations isto be selectable by DIP switches as follows: Read/Write Memory Adare Range SS; ‘XXBOOOH - XXB7FFHL of off XXBSOOH -XBEFFH of on XXCOOOH = XXCTEFHL on off XXCHOOH - XXCFFFHL on on ‘The value XX specified in these address ranges must be determined based on the memory map of your PC. Find an 8K byte area of read/write memory address space that is not used in your system, Select XX o that the external memory subsystem ‘maps into this part ofthe PC’s memory address space. Memory interac signals Lo DIP switches (RAM adress selection) FIGURE 24.1 External memory subysystem block diagram. 126‘The memory array circuit is to be designed using the 21144. 1K X 4. ‘SRAM IC. Information about this device is given in Figure L24.2. A diagram showing how a 2K byte memory atray is implemented with this device and how it can be interfaced to the ISA bus is shown in Figure L24.3, 2114A 1024 X 4 BIT STATIC RAM yasmina A tit EE | see te ecu ef eke ee engl Sate Mery = Low Pe » High SF | Directly TTL Compatible: All inputs 1 ante Cyl nt Aone Tine post 1 ae 5 Supp at Gonmon De inp en Outpt Yong ign coat 1 pectage « runneae ‘Te intel 21144 Isa 4006-it static Random Access Memory organized as 1024 words by 4s sing MMOS. «high per- {formance MOS technology. Ituses uly OC sable (stele) ereutry thoughout in both he aay andthe decoding, therefore requires no clocks or retrshing fo operate, Osta ecress'sparticvarly simp since adress setup times arent required. The Gata read out nondestructivaly and has the sare polarty asthe input dala. Common inpuUoutout pins are provided. Tne 2114A is storage, and possibe dena signed for memory apalcations where tne nigh pertrmance and high reliablity of HMOS, low cost, large bit ole interfacing are important design cojacves The 21140 i placed in an Ta-pin package for the highest, {tis dvcty TTL compatii inal respect: inputs, outputs, eng a single +5V supply. A separate Chip Select (5) aud atows ‘sy selection of an inlvicual package when outputs are or-ted, PINCONFIGURATION LOGIC SYMBOL ‘BLOCK DIAGRAM Ba Dito roma] * Os rm mens Chi ELECT 1 FIGURE L24.2 2114A static RAM specifications. (Reprinted by permission of Intel Corporation, Copyright Intel Corporation 1979) 127SAp-SAy ne 805-SD;, 2 < SAG? A] chip PCS AAA, Select = - Loge —=CS, Mn —e| WE Cireult ole Swi e—e tks swe} SRAM FIGURE 24.3 Implementation of the external memory subsystem. Figure 1.24.2 shows thatthe 2114A is available in variety of access time ranging from 100 ns to 250 ns. Depending upon the speed memory devices used, type, and the clock rate of the MPU in the PC, you may be required to insert a number of wait states into the external memory’s read/write operation. The block diagram fora wait state generator is shown in Figure L24.4(a) and a typical cieuit implementation for its given in Figure L24.4(b). To design ths circuit, you need to select the appropriate D-type flip-flop, shift register, gates, and buffer. Let us briefly look at how this wait state generator circuit works. The LO CH RDY signal is returned tothe ready input of the MPU through the ISA bus and is used to identify whether the current bus cycle should be completed or extended. Logie 1 at this output tells the MPU that the current read/write operation is to be completed. On the other hand, logic 0 means that the ‘memory bus cycle must be extended by inserting wait states. )O CH RDY must be an open collector output. For this reason, the 74LS0S bute, which is identified in the circuit diagram, is an appropriate choice ‘The D-type Nip-flop is used to start the wait state generator circuit whenever an external memory bus cycle is initiated. The Qoutput ofthe flip-flop is held at logic 0 before either CSp or CS, of RESET DRV becomes active. Therefore, UO CH RDY Interface Circuits &—+ Tye] Wait state ENR e——e} generator ——# YO CH ADY enw e——-] RESET DRVe—e| cKe—+ Note: For VO wait state generator change « tL MEM to [OF and HEM to iOW FIGURE 124.4 (a) Wait state generator block diagram. 128oe a es) —? mass vocHRDY Solect walt states B7eS4aeT CLK) shittregistor co) Dataepat FIGURE L24.4 (b) Implementation of the wait state generator circuit isatlogic 1 and signals that wait states are not needed. The Q outputs also applied tothe CLR input ofthe shift register Logic (at CLR holds it inthe rest state. That is, outputs 1 through 8 ar all hed t logic 0 Whenever a memory read or write operation takes place to storage location in the external memory’ address range, the logic Oat ether CSp or CS, and logic Oat either MEMR or MEMW makes the Q output ofthe D-type flip-flop become logic 1. 1} CH RDY is now logic O and signals the MPU to start inserting wat states into the memory bus cycle. ‘The Q output also makes both the CLR and Data Input ofthe shift register logic |, Therefor, itis released and the logic 1 atthe data input shifts up through the register synchronous to the CLK signal. When the Select Wait State output becomes logic 1, it makes the RS input ofthe flip-flop active, thereby resetting the Q output 1 Logi 0, Thus, the 1/0 Cit DY output returns to logic | and terminates the insertion of wat states, The numberof wait stats inserted depends upon hhow many clock periods 1] CH RDY remain at logic 0. Tis can be changed by simply attaching the Scleet Wait States line 8 different output of the shift register. For instance, the connection in Figure L24.4(b) represents two wait state operation 'A zero wait state memory readwrite cycle has at most two clock cycles available forthe data transfer operation 1 be completed. Fora PC witha 33 MHz MPU, this means that SRAMs are needed with access ime less than 67 ns. To use 100 ns davies, ‘we must insert at least ewo wait stats into the memory bs cyetes o give the memory subsystem enough time to respond Check _ Step Procedure Make a detailed schematic drawing of the circuitry needed to implement the chip select circuit in Figure L24.3, Assume that SW1 and SW2 are switches on the PCuLAB, Identify all ICs, pin ‘numbers, and input and output signals inthe cireuit diagram, — 2. Make a detailed schematic drawing of the address buffer circuit for the memory subsystem of Figure 1.24.3. Label all ICs end pins with numbers, and all input and output signals with mnemonics, Make a detailed schematic drawing of the wait state generator circuit, Mark all IC numbers, pin numbers, and appropriate input and output signals in the diagram. Make a detailed schematic drawing of the memory array circuit for Figure L24.3. Identify the ICs, pins, and appropriate input and output signals —_ 5. Make a drawing showing how the complete memory circuit for Figure L24.3 will be built on the breadboard area of the PCuLAB. Use a layout master from Appendix I. Label the ICs, numer the pins, and identify appropriate signals inthe circuit diagram, 129Part 2: Writing Software to Verify and Observe Memory Operation The next step in the design of the memory subsystem is to prepare software routines that can be used for troubleshooting, testing, and experimenting with the memory circuit. [tis not easy to observe memory bus interface signals when random read or ‘write accesses are taking place from the memory subsystem. To observe the operation of the cireuit, the memory operation must bbe performed repeatedly. For this reason, we will write three separate programs: a repeating memory write, a repeating memory read, and a repeating write then read, They will later be used to exercise the circuit so cat its operation can be observed, Cheek Step Procedure Write a program loop (WRITEM.1) which repeatedly writes a byte of data equal to AAH to an arbitrarily selected address in your memory subsystem. Write a program loop (READM. 1) which repeatedly reads the byte of data at the memory address selected in step 1. Write a program loop (TESTM.1) which tests each storage location of your memory subsystem. The program should write the test data pattern AAH to all the memory locations and then read them back to verify that the write operation took place correctly, Use a software time delay after each read and ‘write operation. The message WRITING should be displayed on the screen as the write part of the ‘rogram is initiated. Then the test pattern is to be written to one memory location after the other until all storage locations are filled. Each time the test pattern is written to memory it should also be displayed on the screen. Next read cach memory location to verify that it contains this pattern, When the read part of the program is initiated, the message READING should be displayed on a new line of the screen and each time a byte of data is read from memory its value isto be displayed. After a byte is read from memory, itis to be compared to che test pattern (AH), before the next byte is tested. If the byte read from any memory location does not match the write test pattern, the read testis to stop and display ERROR on a new line ofthe screen, Registers DS and DI should contain the address of ‘the location with the error 2nd accumulator AL. the byte of data read. Display the address ofthe error in the form (DS);(DI) on the screen below the error message and the value of data read in error on the line that follows. On the other hand, if all memory Jocations are read and found to contain the correct pattern, AAH, the message PASSED isto be displayed on a new line of the screen, Part 3: Building the Memory Subsystem and Verifying Its Operation ‘Now we are ready to build the memory subsystem and test it for correct operation, Cheek Step Procedure 2 Build the circuit designed in Part 1 on the breadboard of the PCULAB, Carefully verify its correct construction before applying power. Verify the operation of the circuit by using a DEBUG E command to fil the first five byte storage locations in the memory subsystem with the data pattern SSH. Verify loading with a D command. Repeat the operation with the data pattern AAH. With the switch setting S, Sy = OFF OFF, use a DEBUG F command to fill the complete memory subsystem with $SHs, Verify loading with a D command. Next fill all bytes with AAH and then verify zhat all memory locations contain AAH. Enter and un TESTM.1 with DEBUG. Verify that the memory test passes, thereby establishing that ‘your memory subsystem works correctly, Repeat step 3 for each of the other settings of the address range select switches. 130Part serving the Memory Interface Signals During the Write and Read Bus Cycles [Now that the memory subsystem is operating correctly, we will examine the sequence of interface signals that are produced during the memory write and read bus cycles. Check Step 1 Procedure Use DEBUG to enter program WRITEM.| into the memory ofthe PC and then run i, Display the signals of the memory write cycle on te oscilloscope. Use an appropriate signal to externally trigger the oscilloscope. Make a detailed drawing ofthe memory waite cycle showing the clock, SD, SD. MWR, CSo, and CS, signals. Load and run READM.1 with the DEBUG program. Using an appropriate signal to externally trigger the oscilloscope, display the signals ofthe memory cycle, Draw the memory read cyce showing the clock, SDy,SD,, MWR, CSp, and CS, signals. Part 5: Troubleshooting the Memory Interface Circuitry In this part ofthe laboratory, we will introduce hardware bugs into the memory interface circuit, observe their effects, and then diagnose how they cause the observed effect. Check Step Procedure 1h. Enterand rua TESTM.1 with DEBUG, Verify hat t passes to confirm thatthe memory subsystem is working correctly —— 2% Cearthe memory with an F command. Disconnect the wire a the TS, output ofthe chip select logic circuit. Rerun the TESTM.1 program, What happens? —— 3. Use an Fcommand to fil ll storage locations inthe memory withthe vale FFE, Display the new contents of memory with a D command. What has happened? wy? —— 4. Reinstall the wite at CS, and then clear the memory with an F command, Remove the wire fom the MWR input of SRAM 4 Rerun the TESTM.L program. What ha happened? 5, Use anF command to fll all storage locations inthe memory with the value 55H, Display the new contents of memory with a D command. What has happened? why? 131Part 6: Running an Application Program Out of the External Memory Subsystem Here we will load and run sn application program out of the external memory subsystem. Check Step Procedure 1. Write a program, SBLOCK. 1, that implements a block move of an arbitrarily selected block of 16 bytes of data in the SRAM memory address space to a destination block that is also located in the SRAM, 2. Use DEBUG to enter the block move program into the SRAM on the breadboard, initialize the source block of memory with 5H and the destination block with AH, and then run the program, Verify its ccortect operation by displaying the contents of memory. State your observation and the conclusion about the designed memory subsystem. LABORATORY 25: DESIGNING EXTERNAL HARDWARE INTERRUPT SERVICE ROUTINES Objective Learn how to: ‘+ Mask and unmask external interrupt requests, Set up an interrupt vector for an external interrupt. Analyze the operation of an interrupt service routine Write an interrupt service routine. Initiate an external hardware interrupt request Part 1: External Interrupt System far the PC Bus ‘An 8259A programmable interrupt controller is used to implement the interrupt interface subsystem in the original IBM PC. This interrupt controller provides eight interrupt request inputs. Request at these inputs are sampled and analyzed by the 8259 and if active a request for service is issued to the MPU. ‘As shown in the block diagram of Figure 25.1, many of the interrupt requests are not available on the PC bus. For example, IRQg and IRQ, are used on the main processor board for the time of day counter and the keyboard, respectively. Even the ‘ones that are available on the bus may have a dedicated use within the PC. For instance, IRQ, is typically used by a serial port interface. Those that have a dedicated use are not generally available for experimentation, Interrupt requests are serviced through the interrupt vector table in memory. In this table, type numbers 8 through 15 are assigned to 8259A generated interrupts. As shown in Figure L25.2, these type numbers correspond to the range of addresses. from 20H through 3CH. Each vector takes up four bytes of memory, two bytes to store a 16-bit offset address and another two for a 16-bit segment base address, Together this offset ani segment base address define the starting address of the service routine. When an interrupt request is received by the MPU, the corresponding vector is read ftom memory and the offset and seg- ‘ment base address parts are loaded into the instruction pointer and code segment register, respectively, Then the MPU begins executing the service routine. 132Neu oy ‘no, | timo aay 10, | eyoare Ro, Ro, te + wr mo, |_ soiavo Pe ‘no, bes Ro, ——— sate Ro, ——— Pree J FIGURE L25.1 External Interrupts in a PC. For the 8259A to see an active request at an interrupt request input, the corresponding input must be programmed as ‘unmasked, The PC uses two V/O addresses, 20H and 21H, to access the 8259A\s internal registers, To unmask an interrupt request input, the content of the register at address 21H is read. This byte contains the bits that need to be set or reset to mask or unmask the individual interrupt request inputs. Figure 25.3 shows how the bits are aligned with the eight interrupt request inputs. The ‘mask bit corresponding to the request input is made 0 and the new value is written back into the register at address 21H, In addition to unmasking the interrupt request atthe 82C59A, the MPU must be programmed to enable its external interrupt ‘request input. That is, the IF flag bit must be set to 1, This is done by executing the STI instruction. “The interrupt service routine is written to take care of the request by performing the function to which the interrupt request input is allocated. The value in any register used in implementing the function must be saved before the function is initiated and restored at the end. In addition, before returning from the service routine, the 8259 must be informed that servicing of the request is complete. This is accomplished by writing the end of interrupt (EOI) code 20H to the register at address 20H. This tells the 8259A that it can process another request if one exists. The service routine ends with an RETE instruction. This instruction reenables the interrupts as well as returns program control to the point in the program where the interrupt request ‘was received. NOTE: In order todo this laboratory exercise, an available interrupt request input is required atthe PC bus. Ifthe PC is ‘running DOS, a DOS utility called MSD can be run to find out which interrupts are available, For a PC running Windows, information listed under the accessories menu can be used to determine which interrupts are available. In this exercise, we assume that IRQ, is available for experimentation. However, you must confirm if this interrupt is ‘available on your PC. If not, perform the experiment with one that is available Part 2: Analyzing an Interrupt Program ‘The first step in writing an interrupt service routine is often to create it as a software interrupt routine and test the operation ‘without adding the complexity ofthe hardware. That is, the function that isto be initiated from hardware is simulated with soft- ‘ware. Once the service routine is written and debugged to perform the function correctly, it can be linked with the kardware and rotested, The program in Figure 1.25.4 is written to initiate interrupt service routine using the software interrupt instruction INT rn where mis the type number. Here we will begin our study of how to writea service routine for an internal hardware interrupt by analyzing the operation ofthis program. Check off eack step as itis completed. 133pease vectors L ina, typo 18 act L FO, {pete BR tro, — were > 82508 L ro, A tee oH EL Fo, tent 20H vo ina, e010 LE 10, | 08 2a K no, | te08 L J FIGURE L25.2 Interrupt vectors for the 8259A interrupts ro, | mo, | ma, | ma, | a, | mo, | ina, | a, ‘Set (oge 1 at means masked RO ‘Reset og) bit mane unmasked IRO FIGURE L25.3 Mask/unmask byte of 8269A, loc at /0 address = 21H ina PC. 134Check Step Procedure —_ 1. What value of mis used in the program? —______ —_ 2, What type number is used to invoke the software interrupt service routine? — 3. Which interrupt request from the PC bus is equivalent to this software interrupt? — 4. Which registers are used in the interrupt service routine? — 5S. What function is performed by the interrupt service routine? 6. Assemble the source program in file LAB2SS1.ASM. Run the program LAB25S1.EXE, What is accomplished by the program? Part 3: Modifying the Interrupt Service Routine In Part | we analyzed and observed the operation of an existing software interrupt service routine. Here we will learn how to create our own service routine. That is, a new service routine will be written and tested, and if necessary, debugged, Cheek Step 1 Procedure Write a service routine that flashes all eight LEDs on the PCuLAB offand on ten times. Use an appropriate time delay so that flashing is visible to the naked eye. Replace the software interrupt service routine in the program of Figure L25.4 with this new service routine. Save the new source program as file LAB2SS2.ASM, assemble to create an executable file, and test by running onthe PC. Print a copy of the new source program. Write a service routine that produces @ 1000 Hz tone on the speaker of the PCLLAB off and on ten times. Replace the software interrupt service routine inthe program of Figure L25.4 with this new service routine. Save the new source program as LAB2S$3.ASM, assemble to create an executable file and test by running on the PC, Print a copy ofthe new source program. 135(TITLE LABORATORY 25 (CoPTWARE =eTERRUEE) 2 Definition Honange n ta invoke another interrupt ara ses ‘seourr case me Be mow, Phcwived an Enters 2, 0, 7H Sorveer Ba bab PPenporary place for current vector Ban SES Bios cuss og Retum address of Dos (or neste) wou aK, Bss(20meNaT save current vector temporarily Te BUTE Totheay zEetablten snternupt vectas fog Nona Sax 82. (20newra) , OFFSET rT saV_ RY Nov Woap BER 5: (2owoncarats Seo" t_SRW Raw mov a, vomovacr Restore original vectas Rov Bes aowiaesl ax wov BS caomsarasay, ax ner sRetsen to 005 (or DEBUG) FIGURE 125.4 Interrupt program for Lab 25, Part 3. 136.FIGURE.L25.4 (Continued) Part 4: Analyzing the External Hardware Interrupt Program Once the software interrupt service routine is found to be functioning correctly, itis ready to be integrated with the hardware ‘The program in Figure L25.5 is the same as that in Figure L25.4 except its main part has been modified so thatthe service rou- {ine is initiated by an external hardware interrupt at request input IRQ, of the PC, instead of by a software interrupt instruction, Here we will analyze the operation ofthis program, Check Step _ Procedure —_ 1, Which instructions are used to unmask the interrupt request input IRQ,? — 2. Which instructions are used to save the current vector from IRQ,? Which instructions are used to setup the new interrupt vector for IRQs? — 4. Which instructions are used to restore the old interrupt vector? — 5. Assemble the source program in file LAB2SH1.ASM. NOTE: IF IRQ, is not the interrupt request chosen on your system, modify the program to accommodate the request input available for your system. 137FETLE LABORATORY 25 (HARDWARE PERRUPT : sehanae to" lnvoke, anather interrupt m= one Fase For HRs urackin [Ghange’ thin t9 unmask another incezeupt srnce 86 sxowen PACK stack: Basan soovenr ‘pATA sous, nao ‘Semevecr Be 2 DuPI7)——ptenporary place tor currant vector REA SEE Bios ae ee ee sasee Pam, elie, onion yy Bom iaablish daca segment or Ax, ESslatywre] Save euezent vector temporarily Soe Rete Tokay fof NS TEES. oerses ur sty ere Shs race GEG PET & end eh soereuot cask tice Pa rncorrupe, fag = 6 wre Ge Ne ber ieeetaze tag Soe Edges, we wr sratuen o 008 (or eG) FIGURE 125.5 Interrupt program for Lab 25, Part 4. 138turn fron interrupt gervice routine with DX = 1 (Interrupt tag) 1_S_ROW ish save registers to be used yoy seseablish dace cement ‘or a a yov aL, 208 und of interrupt co 6259 FIGURE 125.5 (Continued) 139Part 5: Building and Testing an Interrupt Request Circuit ‘Now that the hardware service routine is available, the intereupt function is ready tobe tested with the hardware, To do this, {est circuit is required to simulate the occurrence ofthe event in external hardware, The one-shot ciecuit in Figure L25.6 can be used to issue an interrupt request to IRQ, using a switch on the PCuLAB, Check Step Procedure —_ 1 Build the circuitry of Figure L25.6 on the breadboard of the PCALAB. Initially set switch 0 to the OFF position ‘Make sure that switch 0 is in the OFF position. Load and run the program LAB2SHILEXE. What happens? ‘Turn switck 0 momentarily to the ON position and then back to the OFF position. Slowly repeat this ON/OFF switch sequence several times. What happens? Replace the subroutine in the LAB25H1.ASM progeam by the LED flash subroutine written in Part 2, step | and save the source file as LAB2SH2,ASM. Assemble the new source file and then run the ‘program. Repeat the switch sequence from step 3. What happens? Replace the subroutine in the LAB2SH1.ASM program by the tone generation subroutine written in Part 2, step 2 and save as LAB2SH3.ASM. Assemble the new source file and then run the program, Repeat the switch sequence from step 3. What happens? swo Pouas) 6 nas (Pc aus) FIGURE 125.6 A one-shot circuit that can be used to issue an interrupt request to PC. 140Appendix 1 Reference FiguresFIGURE A1.2 Dedicated and general use memory. (Reprinted by permission ‘of Intel Corporation, Copyright intel Corporation 1979) FIGURE A1.1 Active segments of memory. (Reprinted by permission of Intel Corporation, Copyright Intel Corporation 1978) RE Ww Ww 000 AL AX 001 cL cx 010 DU DX ou BL BX 100 AK sp 01 CH BP 110 DH sl Mu BH DI FIGURE A1.3. Register (REG) field ‘encoding. (Reprinted by permission of Intel Corporation, Copyright Intel Corporation 1979) 142‘CODE EXPLANATION 00 ‘Memory Mode, no displacement follows* ol ‘Memory Mode, 8-bit displacement follows 10 ‘Memory Mode, 16-bit displacement follows u Register Mode (no displacement) @ ‘Except when R/M = 110, then 16-bit displacement follows ~ Effective Address Calculation RM W=1 | RM | Mod=00 Mod = 01 ‘Mod = 10 (000 AX 000 -| (@X)+ (Sh) (BX) + (SI) +D8 | (BX) +S) +DI6 001 cx oor | @X) +N (BX) + (DI) + D8 | (BX) + D1) +DI6 o10 DX oi | (@P) +I) (BP) +(S1) + D8 | BP) + (SI) + DIG ou BX ou | @P) +n (BP) + (D+ D8 | BP) + ON + DI6 100 SP. 100 | (si (Sl) + D8 () +DdI6 101 BP 11 | @D (pl) + Ds (Dl) +DI6 10 Sl 110 | DIRECTADDREss | (BP) + D8 (BP) + DI6 1 DI im | 6x (BX) + DS (BX) + Dio ©) FIGURE A1.4 (a) Made (MODE) field encoding. (b) Register/memory (R/M) field encoding. (Reprinted by permission of Intel Corporation, Copyright Intel Corporation 1979) Field | Value | Function S 0 No sign extension 1 Sign extend 8:bit immediate data to 16 bits if W Vv ° Shifvrotate count is one 1 Shiftrotate count is specified in CL register z 0 Repeat/loop while zero flag is clear 1 Repeatiloop while zero flag is set FIGURE A1.5 Additional 1-bt fields and their functions. (Reprinted by permission of Intel Corporation, Copyright Intel Corporation 1979) 143Ion inenon trees mon] oan | oem Seamer epae mason mem] oan | osm rapueimenon Tope] eae | ae nanee Tete ronan reasnene Ti peetm] eee | oarm ove staan eamimanay erage m= =] emo [aa ned FIGURE A1.6 8088 instruction encoding tables. (Reprinted by permission of Intel Corporation, Copyright Intel Corporation 1979) 144se = tage seinen a pane einen em parr teaimeneinrapon te FIGURE A1.6 (Continued) eee [= eee are ee Te 145amend ga me FIGURE A1.6 (Continued) 146 mterem| ome | eam mtn] ear] ean wares] ean | meeeainenorin apace FIGURE A1.6 (Continued) Heya]Hf Tanners [ ae =] 147ong et Senet mememetecny ea Austeseg nets Armen ont pote Ata senp eros ee Pimnsemso nem oe ene eonten ed ere me santennatiet correc ranaren cares Meniketti morecnageana permet ert nme cae FIGURE A1.6 (Continued) 148oo monitor in FIGURE A1.6 (Continued) Mov AX,2000H Mov 95ax mov shotao wov ot0120% wov cxo104 mov Anist mov (O1L.AH esl Inc of uNz 2084 Nor FIGURE A1.7 Block move program. 149“E208 ax Bse2tdab0 ‘ua2010 nov ae,2000, Eizs0709 eeoe for eae 336250809 ado BE Boe Haigase eaze sev Rite) Be ato bass tov Teilsat Raene & bee Beacons arr on bios FRE g ch Seesz00°s ax-2000 exe001e Be-0000 sPweeEE wp=0000 s2-0100 21-0120 Berea SESS GSrasea Eeeves “hobo ax ba aan bone cxeo1e bH-2009 se-reRE AP.0090 sreo100 pt=2120 SEDGE. osi86) SeLesbe SivGe an bw 20 ne B5pg00d, Gctaea Secande cicis42 rrseabe “WV UP EX PL NE AM #O He ‘e-z000 Be-eoo0 cxsania icone SEVERE. arog, sraoio0, on=0130 SEoageg Sorsas Getezoa “wv ur erecnz wa 20 Ne SSaarezoo 091088 rove oata BSegieroe mat fy, Bt “ BSeox0 2808:6120 "88 00 0 00 00 oo oo 20-00 09 00 00 20 00 a8 oo . axereon mx-0000 SSertano' 020 Bx-0000 SPAFFER apsoG0o sr=Ci00 ot=0120 Sah Coctnes_ feoosna “mv UP er €L NE NA FO He tov tery Sseox20s00 AnoreaD 24-0000 gpegoxe micoodo saeErer sP-oa00_ st-0300) or-0120 2900:0120 FF 00 0 0 00 00 00 00-00 90 09 99 40 ab 90 0 AXeFFO0 Bx=0000 cxz0019 Dx-0000 SFAPFEE P=9000_sr=0201 o4-0120 Seckeee EIN SESSep Costes Soconsy “tw Gh ex 8 Me wn p0\ 4c Acero ax,0009 ohegoxD mmG0G0 shorrEE ag-0000 Stoel oneoi2i becsese SSG GRINS Gecoine Sho°Gr err ne an ee ae FIGURE A1.8 Program debugging. 150FIGURE A1.8 (Continued) FIGURE A1.9 Address decoder circuit. (Courtesy of Microcomputer Directions, Inc.) 151Appendix 2 DEBUG Command Set“eS puewwos weiford gne3d b'Zv 3HNDI ( ssauday ssasppe tiodyyeaug 218 nop ump suoyonnsul amp mN9¥a, INIOGXVSUE] SSRICAV ONLRIVIS=] 9 °9 suononsisu o Jaques porszads ay Jo wor Na9x9 2p 2981] (agawan] [ssauaay=).1 son ‘Arousur ‘0038 pe 9p09 aureus ore WonanUNsO! 249 2IqUDSsy [ssauday ONLLIVIS] ¥ sjquiassy [[s¥o19a8 40 WaaWAN ¥OLDIS onoysip © wo 2qy € Jo Stuonion ay yaL ALoUIoUL Peo] LAV TARIG] SSTUGAY ONLLAKLS] 1 prot Uswo1oas 40 waeWnN YOLDIS omoysip © Wo o[yj# Ut Asouramn Jo SwusTH0> amp Nes NLDWVAS SAAC] SSIAGAY ONUAVISI Ab oa IP 94101 Warum 94 OF EEP xp on eHEUATES o¥R UES ANVN aN. Suen suononuisut Jguiosse woqeainbo sy oj 9poo auryoous yp qqWOSSEU) [issaxaay ONIGNal ssaudaV ONLEAVIS) 0 ayquisseup, siaquunu ox aq Jo souax2yIp pur wns feustsapexdy sre1aUID | ZIWANTINAN HL soengngyppy xo vod indino yp 04 9159 2p EAA LAG ‘SSTuaaY O anding vod an amy proxy ssaxcav andy 4] af emp aye uoveur exp sueries0| te Sejdsp pu Guu wep Jo 49019 € yHaxp Y>rES 1SI7 SSAC ONIANG SSzNGGY ONILAVIS § owas ‘ep 1Us.94 9p uTEIWO> sexy suor.e20| SSmRIGAV NOIIVNLLSICL 2 Aejdsp pur Ksowaur uy yep Jo s490}9 Ov azedwsO.) ‘SSAA DNIGNA SSTHCAGV ONLLAVLS 9 undo won| uowearsop SSACAV NOLLVNILSIG oy uowous ut worneo0| 2asNos 8 WOH} BIEP JO 920 w 26Oyy ‘SSCA ONIGNA SSIHAAY ONLLVES 20H SI, UL BxeP oP Yim AzoW9UE WT DOIG e I] LSI1 SSANGGY ONIGNS SSIUAICV ONLLAVLS A ma Azur Jo stuaquOS ay AppOU 40 SutuTEXA List] ssauaay 4 say eidssp a4 01 Stow jo stu amp dungy issauaavla une wesSoad 971g 9m Jo 980 pur D 1) so1siiau yeuaut av Jo syo}G09 a4 Apfpout Jo OuTUEXy [aN waLsiogal 4 sostBoy vonsuay | eg ‘puewuo.) 154Appendix 3 Status and Control Flags| Figure A3.1_ Status and control flags. (Reprinted by permission of intel Corporation, Copyright Intel Corporation 1979) 156Appendix 4 sose/soss instruction setData Transfer Instructions Jump Instructions 1 MOV — Move byte or word XCHG — Exchange byte or word XLAT Translate byte LEA Load effective address LDS Load pointer using DS [Load pointer using ‘Addition Arithmetic Instructions ADD Add byte or word ADC Add byte or word with carry INC Increment byte or word by 1 AAA ASCIL adjust for addition DAA __Decitnal adjust for addition Subtraction Arithmetic Instruct SUB Subtract byte or word SBB Subtract byte or word with borrow DEC Decrement byte or word by 1 NEG —_Nogate byte or word DAS Decimal adjust for subtraction AAS ASCII adjust for subsraction MP___Compare operands ‘Mult, And Div. Arithmetic Instructions MUL Multiply byte or word, unsigned DIV __ Integer divide byte or word, unsigned IMUL — Multiply byte or word, signed IDIV Integer divide byte or word, signed AAM ASCII adjust for multiply AAD ASCII adjust for division CBW Convert byte to word CWD __ Convert word to doubleword IMP Jump to short, near or far address 1 JCC __Jump conditional (ce) to short address Subroutine-Handling/Stack instractions CALL Call procedure 1 RET Return from procedure ' PUSH Pop word onto stack | POP Pop word off of stack PUSHF Push flags onto stack | POPF Pop fags offof stack String Tnstruetions MOVS — Move byte or word sting MOVSB Move byte sting | MOVWS Move word string | CMPS Compare byte oF word sting SCAS Scan byte or word sting LODS Load byte or word string STOS _ Store byte or word string Prefixes and Auto-Indexing Instr. for String Operations - RE Repeat REPEIREPZ, Repeat while not equal/zer0 REPNE/REPNZ, Repeat while not equal/nt zero cup Clear direction flag (DF) sD Set direction flag (DF) Loop Instructions | LOOP ‘Loop | LOOPE/LOOPZ, Loop ifequal/zer0 LOOPNE/LOOPNZ Loop if not equalinot zero __| InpuOutput Instructions Logie Instructions AND "AND" byte or word OR —_ Inclusive “OR" byte or word XOR Exclusive “OR” byte or word NOT Complementation or negation of byte or word CMP__Compare word or byte Shift and Rotate Instructions SALISHL Shift arithmeticHogical left byte or word SHR Shift logical right byte or word SAR Shift arithmetic right byte or word ROL Rotate left byte or word, ROR Rotate right byte or word RCL Rotate left through carry, byte of word. RCR___ Rotate right through carry, byte or word IN Input byte or word from 1/0 space | QUT __ Output byte of word to 1/0 space Interrupt Instructions Clear interrupt enable flag (IF) | Set interrupt enable flag (IF) i Software interrupt | Interrupt return | Interrupt if overflow Halt until intercupt or reset | Escape to external processor LOCK — Lock bus during next instruction NOP __Nooperation | Flag Control Instructions LAHF Load AH register from lags. SAHF Store AH register in flags CLC Clear carry flag (CF) STC Set carry flag (CF) MC Complement carry flag (CF) CLI Clear interrupt enable flag (IF) STI___ Set interrupt enable flag (IF) FIGURE A4.1 8088/8086 instruction set groupings. 158Mnemonic | Meaning Format Operation Flags Affected MOV 1 Move MOV DS )> (0) ‘None XCHG Exchange XCHG DS Do None XLAT Translate XLAT (AL) + @X) + (D80)_ | None (AL) LEA Load effective address LEA Regl6,EA EA (Regi6) None Lps. Load register and DS LDS Regl6Mem32_ | (Mem32) — (Regi6) None (Mem32+2) > (Ds) LES Load register and ES LES Reg 16Mem32_| (Mem32) ~> (Regl6) None (Mem324+2) > (ES) @) Destination Source Memory ‘Accumulator ‘Accumulator Memory Register Register Register Memory Memory Register Register Immediate Memory Immediate Destination ‘Source Scg-reg Regié ‘Accumulator Regl6 Scg-reg Memi6 Memory Register Regié Seg-reg Register Register Memory, Segreg Register Memory o © FIGURE A4.2 (a) Data transfer instructions. (b) Allowed operands for MOV instruction. (¢) Allowed operands for XCHG instruction. 159Mnemonic | Meaning Format | Operation Flags Affected ‘ADD ‘Addition ADDD,S | S)+O)>@) OF, SE, ZAR PR CF Carry > (CF) Apc ‘Add with carry apep,s | (8)+@)+(CF) (0) | OF SF,ZF,ARPRCF Carry > (CF) INC Increment by 1 INCD O+190) OF, SF, ZF, AE PF AAA ASCII adjust for AAA AR CF addition OF SF, ZF, PF undefined DAA Decimal adjest for DAA SE ZB AB PE CE, addition OF undefined @ Destination Source Regaster Register Register Memory Memory Register Register Immediate Memory Immediate Reg8 Accumalator Immediate Memory © ° FIGURE A4.3 (a) Addition instructions. (b) Allowed operands for ADD and ADC instructions. (c) Allowed operands for INC instruction. ‘Mnemonic | Meaning 1 Format ‘Operation Flags Affected SUB Subtract SUBDS | ©)-@ 20) OF, SB ZR. AR, PE CF Borrow —» (CE) sBB Subtract with borrow | SBBDS | (D)-(S)-(CF)>(D) | OFSRZEARPRCE DEC Decrement by 1 DECD 0-150) OF SE ZR, AR PF NEG Negate NEG D 0-0) OF, SF,ZF, AR, PF, CE 1c Das Decimal adjust for Das SF, ZB, AF, PR, CR, subtraction OF undefined AAS ASCII adjust for AAS AB,CF subtraction OF, SE, 25 PF undefined @ Destination Source Register Register Register Memory —— Memory Register Destination Accumulator | Immnediate Regi Destination Register Immediate Regs Register Memos Immediate Memory Memo © © @ FIGURE A4.4 (a) Subtraction instructions. (b) Allowed operands for SUB and SBB instructions. (c) Allowed operands {for NEG instruction. 160Mnemonic | Meaning Format | Operation Flags Affected MUL Multiply ‘MULS (Al) > AX) OF, CF (unsigned) (AX)- (S16) (DHA) | SE.ZF AF, PF undefined piv Division pivs (1) QGAXISE)) + (AL) OF SR, ZF, AF, PF, CF (unsigned) R(AX)(S8)) > (AH) undefined 2) QDXAXYIS16)) > (AX) R(DX,AXY(S16) — (DX) IfQis FF in case (1) or FPF in ease (2), then type 0 interrupt occurs Imo. Integer multiply | IMULS. (AL) ($8) 9 (AX) OF CF (signed) (AX)-(S16)—» (DNAX) | SEZE AR PF undefined iv Integer divide wwvs | ()QAaxy(ss) > @D OF, SE, ZF, AF, PE, CF igned) R(AX)(S8)) (AH) undefined 2) ADXAXY/IE16)) —> (AX) R(DXAXYS16) > DX) 1 Qis postive and exceeds ‘TEFE jg or if Q is negative and becomes less than 80015 then type 0 interrupt ecours AM Adjust AL for | AAM QALY) + (AB) SR ZR PE ‘mulplication R(AL/0) — (AL) OF, AR, CF undefined AAD Adjust AX for | AAD (AH) 10+ (AL) >aL) | SRZRPF division 00 (AH) OF, AR, CF undefined caw Converttyeto | CBW (MSB of AL) — (All bits None word ‘of AH) Convert wordto | CWD (MSB of AX) > (All bits ‘None double word ‘of DX) FIGURE A4.5 (a) Multiplication and division arithmetic instructions. (b) Allowed operands. @ © 161Mnemonic [Meaning Format Operation Flags Affected ‘AND Logical AND ANDDS S)-(D)9(D) OF SF, 25 PR CF AF undefined oR Logical Insusive-OR | ORDS ()+O)9—) OF SE ZA PR CI AF undefined XOR Logical Exclusive-OR | XORDS | (SJ@(D)(D)__-ORSEZE PREF AF undefined Nor Lopicel NOT Norp ©) >) None © [Destination | Source Register Register Register Memory Memory Register Register Immediate Destination Memory lnmmediate Register Accumulator | Immediate Memory 6) © FIGURE A4.6 (a) Logic instructions. (b) Allowed operands for the AND, OR, and XOR instructions. (c) Allowed ‘operands for NOT instruction. Mnemonic | Meaning Format Operation Flags Affected SALSHL | Shiftacihmetic | SAL/SAL Shift the (D)leftoy the numberof CF, PF, SE, 2F ietuishit | cout bit postions equal to Count and AF undefined logical tft fill the vacated bit positions on the | OF undefined if count right with zoos 41 SHR Shif logical | SHRD, Count | Shift the (D) right by the number | CF, PR, SE ZF right of bit postions equal to Count and AF undefined | fill the vacated bit positions on the | OF undefined if count tet witn zeros “1 SAR Shif arithmetic | SARD,Count | Shiflthe (D) righ by the number SF, ZR, PR, CF right oftit positions equal to Count and AF undefined fill the vacated bits positions on the left with the original most sig- OF undefined if count #1 nificant bit @) Destination | Count Register 1 Register cL Memory t Memory cL ©) FIGURE A4.7 (a) Shift instructions. (b) Allowed operands. 162Mnemonic [Meaning Format ‘Operation Flags Affected ROL Rotate left ROL D, Count | Rotate the (D) left by the number cr ‘of bit positions equal to Count. OF undefined Each bit shifted out from the lef- ifcount #1 ‘most bit goes back into the right- ‘most bit position, ROR Rotate right ROR.D, Count | Rotate the (D) right by the number | CF Cf bit positions equal to Count. OF undefined Each bit sifted out from the right- | if'count + 1 ‘most bit goes into the leftmost bit position. RCL Rotate left RCL D,Count | Same as ROL except carry is oF through attached to (D) for rotation. OF undefined carry ifeount # 1 RCR Rotate tight RCRD, Count | Same as ROR except carry is cr through attached to (D) for rotation, OF undefined carry ifcount # 1 @ Destination | Count Register 1 Register cL Memory LL Memory o) FIGURE A4.8 (a) Rotate instructions. (b) Allowed operands. Mnemonie | Meaning ‘Operation Flags Affected LAKF ‘Load AH from fags (Al) — Fag) | None SAF Store AH into flags (Flags) (aH) | SE ZRAR PEC cc Clear carry ag (Hao cr ste Set arty flag cHet oF ewe Complement carry flag (CF) — CF) oF cL Clear interrupt flag (IF) 0 IF stl Setinterype fag (ret i ® 1 ° an [sr | 2 ar | — |» [er] SF = Sign flag ZF = Zero fag AF = Auxiliary PF = Parity lag CF = Carry flag, = Undefined (do not use) ) FIGURE A4.9 (a) Flag-control instructions. (b) Format of the AH register for the LAHF and SAHF instructions.Mnemonic Meaning Format | Operation Flags Affected ‘CMP Compare ) ‘or resetting the flags (8) is used in seting CF, AF, OF PF, SE ZF @ Destination | Source Register Register Register Memory Memory Register Register Immediate Memory Immediate ‘Accumulator_| Immediate O) FIGURE A4.10 (a) Compare instruction. (b) Allowed operands. “Mnemonic Meaning Format ‘Operation Flags Affected IMP Unconditional jump IMP Operand ump is initiated to the address specified by th operand None @ Operands Stor-inbel | Near-label Far-label Mempirl6 Regptrlé Memptr32 ©) FIGURE A4.11 (a) Unconditional jump instruction. (b) Allowed operands. 164‘Mnemonic | Meaning Format Operation Flags Affected Tee Jee Operand | Ifthe specified condition ee | None is true the jump to the address specified by the ‘operand is initiated; otherwise the next instruction is executed, @ Mnemonic | Meaning Condition JA Above 0 JAE, ‘Above or equal 3B Below TBE Below or equal CR 1eZF=1 IC Carry CF ICXZ, CX register is 800 (ChorZF) =0 JE Equal ZF=1 IG Greater ZE = Oand SF = OF IGE Greater or equal SE= OF IL Less. (SF xor OF) ILE, Less oF equal (SF xor OF) or ZF) = 1 INA ‘Not above CF = 1orZF=1 INAE ‘Not above norequal_| CF = 1 INB. Not below CF=0 INBE ‘Not below nor equal = Oand ZF = 0 INC. ‘Not carry CR=0 INE ‘Not equal Ze=0 ING Not greater (GF xor OF) or ZF) = 1 INGE Not greater nor equal_|_(SF xor OF) = 1 INL Not less INLE Not less nor equal INO Not overflow INP Not parity INS Not sign NZ. Not zer0) 10. Overflow 2 Parity IPE Parity even IPO) Parity odd PE=0 ‘Sign Zero FIGURE A4.12 (a) Conditional jump instruction. (b) Types of condi (b) nal jump instructions. 165‘Mnemonic Meat ig Format ‘Operation Flags Affected CALL ‘Subroutine call ‘CALL Operand Execution continues from the address of the subroutine specified by the operand, Information required to return back to the main program such as IP and CS are saved con the stack. None @ ‘Operand Near-proc. Far-proc Memptri6 Regptrl6 Memptr32 o FIGURE A4.13 (a) Subroutine call instruction. (b) Allowed operands. ‘Mnemonic “Meaning Format ‘Operation Flags Affected RET Return RET of RET Operand Return to the main program by restoring IP (and CS for far-proc). If Operand is present, itis added to the contents of SP. None FIGURE A4.14 (a) Return instruction. (b) Allowed operands. 166Mnemonic | Meaning Format | Operation Flags Affected PUSH Push word onto sack PUSHS | (SP) —(S) None (SP) (SP) - PoP Pop wor offstack — POPD.—|_ (D) (SP) (sp) (82) ~ 2) THIF 0 TRIF (CS) > (SP) — 4) Q+4-) C8) (P) > (SP) 6) (4m) 302) IRET Interrupt return IRET sey >a”) all (SP) +2) 4s) (GP) +4) + Flags) (SP) +6 SP) INTO Interrupt on overflow INTO INT 4 steps TRIP BLT Halt HLT Wait for an external None interrupt or reset to occur walt Wait WAIT Wait for TEST input to None go active FIGURE A4.22 Interrupt instructions. 169Ap pe ndix 5 PCLAB Layout Master1712 PC” interfacing ‘Board? PCuLABAp p e n d ix 6 Programs Diskette ContentsVolume in drive A has no label Directory of A:\ DISKDIR, 0 03-17-02 Silla DiskDir R255LAB EXE 1,674 03-02-02 7:ldp 825SLAB.EXE. 8255LAB oBs 870 03-17-02 7:38 825SLAB.OBI 8255LAB LsT 19,974 03-17-02 7:38a 825SLABLST BLOCK ASM 1,489 09-10-98 10:43p_ BLOCK.ASM BLOCK EXE 60S 03-02-02 6:49p BLOCK.EXE BLOCK oB) 197 03-02-02 8:09p BLOCK.OBJ BLOCK ist 2,953 03-02-02 8:09» BLOCK.LST BLOCK MAP 185 03-02-02 649p BLOCK MAP EBLOCK ASM 1,488 09-1298 7:124 EBLOCK.ASM EBLOCK LsT 3484 03-02-02 8:09p EBLOCK.LST 13P2. ASM 1,489 09-10-98 1043p L3P2.ASM L3P2 EXE 60S 03-02-02 6:52p _L3P2.EXE 132 ops 195 03-02-02 8:10p L3P2.0BI 13P2 LST 2,950 03-02-02 8:10p L3P2.LST 13P3 ASM 1.489 06-28-99 9:53a L3P3,ASM 13P3 EXE 605 03-02-02 6:53p_L3P3.EXE 13P3 oBs 195 03.02.02 8:10p L3P3.0BI L3P3 LST 2.950 03-02-02 8:11p L3P3.LST LAP] ASM 14032 02.23.88 4:37 LAPI.ASM LaPL EXE 639 03-02-02 6:S4p LAPLEXE Lap oBI 282 63.02.02 &:1lp_ LAPL.OBI LaPL LsT 2,624 03-02-02 &:llp LAPL.LST LaP2 ASM 745 3:0Sa_LAP2.ASM Lap2 EXE 614 03-02-02 6:S4p_ LAP2.EXE 1aP2 OB) 245 03-02-02 8:llp LAP2.OBI LaP2 LsT 2,240 03-02-02 8:11p LAP2.LST LAPS ASM 475 02-23-88 4:Sda_LAP4.ASM Lapa EXE 593 03-02-02 6:55p_ LAPA.EXE. Lapa op! 183 03-02-02 &:1lp L4P4.0BF Laps LsT 1,613 03-02-02 8:1lp_ L4PA.LST LsP3 ASM 988 06-28-99 10:12 LSP3.ASM L5P3 EXE 620 03-02-02 6 :S6p_LSP3.EXE L5P3 ops 234 03-02-02 8:12 LSP3.0BI L5P3 ist 2304 03-02-02 8:12p_ LSP3.LST L9P4 ASM 872 02-24-88 12:372 LSP4.ASM 13P4 EXE 596 03-02-02 6:56p LSP4.EXE L5p4 OB) 186 03-02-02 8:12p LSP4.0B) LsP4 LsT 2340 03-02-02 8:12p LSP4.LST LSPS ASM 522 01-01-80 12:04a _LSPS.ASM LSPS EXE 600 03-02-02 6:57 LSPS.EXE LSPS OB) 190 03-0202 8:13p_LSP5.0B5 LSPS LsT 1,816 03-02-02 8113p LSPS.LST LSP6 ASM 902 06-28-99 10:271 1.5P6.ASM LSP6 EXE 1,001 03-02-02 6:S7p_LSP6.EXE. LSP6 OB) 235 03-02-02 8:13p LSP6.0BJ LSP6 LsT 2229 03-02-02 8:13pLSP6.LST L6Pt ASM 1,489 09-10-98 10:43p L6PI.ASM. LsPt EXE 60S 03-02-02 6:58 L6PI.EXE oP ops 195 03-02-02 8:13pL6PI.OBI LoPt LsT 2,950 03-02-02 8:13p L6PLLLST 176LeP2 LoP2 L6P3 (32 L13P2 Li3P2 Li3P2 LisPl List LigPL Lisp2 Lisp2 Lisp2 Lise3 Lisp3 L18p3 LAB? LAB7 LAB7 LAB7 LABS LABS LABS LABS LAB9 LAB9 LAB9 LAB9 LABIL LABit LABIIMI LABLIML LABIIM2 LABIIM2 LABIS LABIS LABIS LABIS LABIT LABIT LABIT VABQSHI LABS, LAB2SHi LAB25S1 LAB25S1 LAB25S1 NOTEPAD PARLAB23 PARLAB23 PARLAB23 PARLAB23 SERLAB23 SERLAB23 ASM LST ASM ‘ASM EXE OBI LsT. EXE OB) LsT EXE oBy LsT EXE ops LsT ASM EXE Bt LST ASM EXE OB) LsT ASM EXE opr LST EXE MAP OBI LsT OB) LST ASM EXE OBI LsT EXE ons LST EXE Br Ast EXE OB) LsT LNK ASM EXE OBI LST ASM EXE 1,488 3,461 1,489 1315 618. 210 2,876 314 4,190 7110 340 4,982 674 308 5,142 1,337 630 260 271 1,464 oat 270 3,085 1,637 662 308, 3,562 on 475 350 2,635 237 1,929 1,292 620 212 2,664 787 440 5,890 nS 386 6,552 695 306 5,499 1,519 3,985 817 187 1,027 4917 833 09-12-98 03-02-02 09-10-98 06-29-99 03-02-02 03.02.02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02, 03-02-02 03-02-02 03-02-02 03-02-02 06.28.99 03-02-02 03-02-02 03-02-02 06-28-99 03.02.02 93-02-02 03-02-02 06.28.99 03-02-02 03-02-02 03.02.02 03.02.02 03-02-02 03-02-02 03-02-02 03-02-02 3-02-02 06-30-98 03-02-02, 03-02-02 03-02-02 03-02-02 03-02-02 03.02.02 03.02.02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 11-23-01 01-09-00 03-02-02 03-02-02 03-02-02 01-09-00 03-02-02 7a B:ldp 10:43p 9.278 7:00p B14p Bldp 7332p B:14p B:15p 735p 8:15p 8:15p 737 8:15p 8:15p 10:39 7.02p 8222p 8222p 8378 7.:02p 8:17 8:17 10:49 7203p 8:17p 8:17 7:56 7:36p 753p 7539 7153p 7353p 8:09 749 8:20p 8:20p 7:2p 8221p 8221p 8:03p 8:23p 8:23p 8:04 8:23p 8223p 9:02p 1018 7.078 8:23 8:23p 7914 7:08p L6P2.ASM Lop2,.LST L6P3,ASM L13P2.ASM L13P2 EXE L13P2.0B1 LisP2LsT L18PLEXE. L18PLOBJ LISPLLST L18P2.EXE Li8P2.0B) Li8P2,.LST L18P3.EXE L18P3,0B] LisP3.LST. LAB7.ASM LAB7.EXE LAB7.OBy LAB7LST LABS.ASM LAB8.EXE LAB8.0B) LABRLST LABO.ASM. LAB9.EXE, LAB9.OBI LABOLST LABILEXE. LABILMAP, LABIIMLOBI LABIIMLLST LABIIM2.0BI LABIIM2.LST LABIS.ASM LABIS.EXE LABIS.OBJ LABIS.LST LABIT.EXE LABI7.0B) LABIT.LST LAB2SH1 EXE LAB2SH1.OBI LAB2SHLLST LAB2SSILEXE LAB25S1.OBI LAB25S1.LST Notepad.lnk PARLAB23.ASM PARLAB23.EXE PARLAB23.081 PARLAB23.LST ‘SERLAB23.ASM SERLAB23.EXE amSERLAB23 SERLAB23 13P2 L3P3 LAP I LaP2 Lapa LSP3 LSP4 LSPS LSP6 L6PL LPs L6P3 Lep3 Lisp2 LAB7 LABS LAB9 LABIS PARLAB23 SERLAB23 S25SLAB 825SLAB LABIT LABI7 LISPL LisPl L18p2 Lisp2 LisP3 L1sP3 LABIIMI LABLIM2, LAB2SH1 LAB25H1 LAB25S1 LAB25S1 8254LAB 8254LAB $254. AB 8254LAB 8254LAB 178 opr LsT MAP MAP MAP MAP MAP MAP. MAP MAP MAP. MAP OBI MAP EXE MAP MAP Map MAP MAP MAP MAP ASM MAP. ASM MAP ASM MAP ASM MAP ASM MAP ‘ASM ASM ASM MAP ASM MAP LST ASM oy MAP EXE 150 file(s) 0 di(s) 203 8911 185 185 232 232 185 232 185 185 232 185 195 185 605 185 232 232 232 185 152 182 7,594 232 271 232 1,946 28 1,946 28 2216 228 932 787 3,543 232. 2,886 232 14,262 5,958 232 1,619 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 93-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-02-02 03-92-02 03-02-02 03-02-02 03-17-02 03-17-02 03-17-02 03-17-02 03-17-02 442,718 bytes 967,680 bytes 8:23p 8:23p 6:52p 6:53p 6:54p 6:54 6:55p 6:56p 6:56p 6:57p 6579 6:58p 6359p 6:59 6:59 7:00p 7502p 7029 7:03 7:04 7.079 7.08 713p Tap 7221p 7222p 7332p 732p 734 7359p 731 737 748p 75ip 8:02p 8:03p 8:04p 8:04p 7334 73a 7338 734a 13da free SERLAB23.0BI SERLAB23.LST L3P2.MAP L3P3.MAP_ LAPLMAP, LAP2.MAP, LAPA.MAP LSP3.MAP LSP4.MAP LSPS.MAP LSP6.MAP L6P1LMAP L6P3.0B) L6P3. MAP L6P3.EXE L13P2.MAP LABT.MAP EAB&. MAP LAB9.MAP LABIS.MAP PARLAB23. MAP SERLAB23.MAP 8255LAB.ASM 825SLAB.MAP LABI7,ASM LABI7.MAP LISP1LASM LISPLMAP L18P2.ASM L18P2.MaP LISP3.ASM LISP3.MAP LABIIMLASM LABIIM2,ASM LAB2SH1.ASM LAB2SHILMAP 8254LABLST 8254LAB.ASM 8254LAB.OBS 8254LAB MAP 8254LAB EXE

Walter A. Triebel, Avtar Singh-The Lab Manual For 8088 and 8086 Microprocessors - Programming, Interfacing, Software, Hardware, and Applications, 4th Edition-Prentice Hall (2002)

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Walter A. Triebel, Avtar Singh-The Lab Manual For 8088 and 8086 Microprocessors - Programming, Interfacing, Software, Hardware, and Applications, 4th Edition-Prentice Hall (2002)

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