Analysis, Optimized Design and Adaptive Control of a ZCS Full-bridge Converter without Voltage Over-Stress on the Switches

Xin Zhang
Student Member, IEEE Nanjing University of Aeronautics and Astronautic No. 29, Str. YuDao, Nanjing, 210016, Jiangsu, China

Henry Shu-hung Chung

Senior Member, IEEE City Univ. of Hong Kong Tat Chee Avenue, Kowloon Tong, Kowloon, Hong Kong eeshc@cityu.edu.hk

Xinbo Ruan
Senior Member, IEEE Huazhong University of Science and Technology Wuchang, Wuhan, 430074, Hubei, China

Adrian Ioinovici
Fellow, IEEE Holon Institute of Technology Holon, 58102, Israel adrian@hit.ac.il

Abstract This paper presents the analysis and design of a new current-driven soft-switched full-bridge converter, in which all main switches are zero-current-switched (ZCS), and the switches in a switched-capacitor snubber are zero-voltage-switched (ZVS). For each value of the supply and load, the snubber capacitor is adaptively charged at the minimum necessary value for assuring soft-switching; thus, less resonant energy is circulated. There is no extra voltage stress on the switches. The current through the switches is limited to the input current. A dc analysis led to the derivation of the voltage conversion ratio. The resonant elements of the snubber circuit are optimally designed by trading-off the soft-switching range the duty-cycle loss over a wide supply and load variation. The calculation of the ac small-signal transfer functions allowed for the design of the controller, which was implemented by DSP. A 530V/15kV, 5kW prototype has been built and evaluated. Index Terms- Adaptable soft-switching, dc-dc conversion, fullbridge converter, high voltage converter, zero-current switching

Recently, a new current-driven full bridge converter was proposed [10]. It contains a switched-capacitor snubber connected in parallel to the primary winding. All main switches are ZCS and the snubber switches are ZVS. The parasitic elements of the coupling transformer are used in the resonant operation. The resonant energy used to assure softswitching is self-adaptable for each actual value of the input/load current. The purpose of this paper is to present a detailed dc analysis of this converter. The voltage conversion ratio formula is found, allowing for an analysis of the dutycycle loss. The conditions necessary for achieving ZCS of the primary-side switches are derived analytically, and a knowledge design of the resonant elements is proposed. A trade-off between the duty-cycle loss and the soft-switching range gave the design equations. The small-signal ac transfer functions of the converter are found , serving to the design of the controller. The controller is implemented by DSP. A 530V/15kV, 5kW prototype has been built and evaluated, the good measured efficiency proving the advantages of the solution. II. ZCS FB CONVERTER

I. INTRODUCTION Pulse-width modulated (PWM) full-bridge (FB) converters have been popularly used for high-power dc/dc conversion. There is a large literature on ZVS PWM-FB converters. However, the ZVS technique is more suitable for converters using majority-carrier type switching devices, such as MOSFET. For high-voltage and power applications, the suitable switch is the insulated gate bipolar transistor (IGBT) . For such switches, ZCS is preferable, for dealing with the tail current at turn-off. Although a few ZCS switching schemes have been proposed [1-9], they present different drawbacks, such as large current and/or voltage over-stresses due to resonant peaks, or use of much resonant energy even when it is not necessary .
__________________________________________

The work described in this paper was fully supported by a grant from the Research Grants Council of the Hong Kong Special Administrative Region, China (Project No.: CityU 112406).

Fig. 1 shows the circuit schematic of the proposed current-driven FB converter. It consists of a front-stage dc/ac converter formed by the switches S1~S4 and an output-stage rectifier formed by DA~DD. The two stages are interconnected by a coupling transformer Tr with the turns ratio n : 1, leakage inductance Llk, and parasitic capacitance CP. The input side of the converter is supplied through an inductor L1. A snubber formed by a resonant inductor Lr and a switchedcapacitor circuit consisting of two MOSFETs, Sa1 and Sa2, and a resonant capacitor Cr is connected across the primary side of the coupling transformer. It can make S1~ S4 switch at zero current. Fig. 2 shows the theoretical voltage and current waveforms and timing diagram of the converter. The output voltage of the converter is controlled by adjusting the angle between the switch pairs (S1, S2) and (S3,S4). S1 (S3) and S2 (S4) are operated in anti-phase. There are twelve operating modes from t0 to t12 in one switching period Ts. However, as the operation is symmetrical in every one half of the switching cycle, only the operation from t0 to t6 is described

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Fig. 1 Proposed ZCS current-fed FB converter.

Ts / 2

S1 S2 S3 S4 Sa1 Sa2 vCr -Vx iLr is vs1 is1 Iin Vp Iin

Ts 2

Ts / 2
t t t t t t

1. Mode 0 [Before t 0 ] Before t0, the energy is transferred from the input to the output via L1 , S1 , S 4 , Tr , D B and DC . C r is charged at the minimum necessary voltage V x for assuring the main switches switch at zero current, It will be shown later that the value of V x is chosen to satisfy the following criterion 1 1 C r V x 2 Lr I in 2 (1) 2 2 2. Mode 1 [ t 0 - t1 ] At t0 , S3 is turned on with ZCS. decreases while the current through
t
t

Vx nVo -Iin nIin nVo Vp

t t

A resonance path is

formed by Lr , Llk , C Sa1 . The current through S4 , iS 4 ,

S 3 , i S 3 , increases. This

mode ends at t1 when iLr (t1 ) = iS 4 (t1 ) = 0 , iS 3 (t1 ) = I in , and S4 is turned-off with ZCS.

t t

iLr (t ) = I in
where T =

vs2 nVo is2 vs3 is3 vs4 is4 vsa1

n Vout Llk [t + sin T (t t0 )] Lr + Llk T Lr

and LT =

(2)

Iin nVo Iin nVo Iin nVo-Vx Vp-Vx Iin -Iin nVo-Vx Vp-Vx

t t

t t t
t

LT C Sa1 As the resonant component of the current in (2) is small, L + Llk t01 = t1 t0 I in r (3) n Vout

Lr Llk . Lr + Llk

3. Mode 2 [ t1 - t 2 ] L1 undergoes charging. At t 2 , the controller dictates the turn-on of S 2 (ZCS) and S a 2 (ZVS) . 4. Mode 3 [ t 2 -

iSa1
vsa2 iSa 2

t
t

t3 ]

Iin -Iin

t 0 t1

t2 t3t4t5 t6 t7

t8 t9 t10t11 t12

A resonant path formed by S 2 , Lr , S a1 , C r , S a 2 , and S1 is created. (4) vCr (t ) = V x cos 1 (t t 2 )

Fig. 2 Timing diagram and key waveforms of the converter.

V iS 2 (t ) = i Lr (t ) = x sin 1 (t t2 ) Z1

(5)

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i S1 (t ) = I in i S 2 (t )
where 1 =

(6)

1 Lr C r

and Z1 =

Lr . Cr

III. STEADY-STATE ANALYSIS AND DESIGN CONSIDERATION

A. ZCS conditions

This mode ends at t3 when i Lr (t 3 ) = I in and i S1 (t3 ) = 0. S1 is turned off with zero current. Therefore, I Z 1 sin 1 in 1 (7) 1 Vx In order to make i Lr reach I in , based on (5), it is necessary to ensure that V x / Z1 > I in , giving the ZCS criterion in (1). This means that there is enough energy in the resonant capacitor C r to charge the resonant inductor Lr . It t 23 = t3 t 2 =

1. For the leading switches In order to ensure soft-switching of the leading switches, it is necessary to ensure that the switch pairs have sufficient dead time td,lead for current transfer. In Mode 1, td,lead should be long enough for the current through S3 to increase from zero to Iin and the current through S4 to decrease from Iin to zero. Thus, based on (3), td,lead should satisfy the criterion

td ,lead > I in ( Lr + Llk ) n Vo

(9)

can be noted that for the designed values of C r and Lr , the necessary energy stored in C r for this purpose depends on the value of the input current. At a small value of I in , less energy is needed. The maximum energy is required at the high end of the range of the input current (i.e., at the low value of the range of the input voltage and at high load current). So, V x can be calculated for each actual value of

I in . It will take a higher value only when needed. This gives the adaptability characteristic of the proposed solution :it allows for using at each actual value of the input voltage and load the minimum necessary of resonant energy that can assure ZCS of the primary switch. Consequently, the resonant energy and conduction loss are reduced.
5. Mode 4 [ t 3 -

2. For the lagging switches As shown in Mode 3, Cr provides the required energy for achieving zero-current switching of the lagging switches. Thus, based on (5), the dead time of the lagging switches td,lag should satisfy the criterion 1 I Z t d ,lag > sin 1 in 1 (10) 1 Vx According to (1), for the designed value of Z1, Vx depends solely on the value of Iin, Iin is continuously sensed and the minimum necessary capacitor voltage for ensuring ZCS at the measured value of the input current, Vx, is calculated with (1). When the sensed value of vCr reaches the calculated value of Vx, Sa1 (or Sa2) will be turned off, marking the end of Mode 4.
B. DC voltage conversion ratio As shown in Fig. 2, is defined as follows

t4 ]

C r is discharging and then charged by I in , so that its voltage is reversed. This mode ends at t 4 when the voltage on C r reaches V x . S a 2 is switched off at zero voltage.

T =

Ts = t34 + t45 + t56 2

(11)

t34 = t 4 t3 =
The voltage on calculated value

Cr [vCr (t3 ) + V x ] I in

(8)

where T is the time duration of the phase shift. From the conservation of energy in a half switching cycle
5 Ts Vin I in = ik Vo 2 k =1

C r is sensed. When it reaches the

where ik =

(12)

V x , the control circuit dictates the end of

this mode ,by turning S a 2 off . 6. Mode 5 [ t 4 -

tk

t k 1

| is (t ) | dt

t5 ]

t01, t23, and t34 are obtained from (3), (7), and (8).

The junction capacitance of Sa2 is charged by I in until v Sa 2 (t5 ) = n Vout - Vx . 7. Mode 6 [ t5 -

t12 = t2 t1 =
t45 = t5 t4 =

Ts T + t56 t23 t01 2

t6 ]

Ts t01 t12 t23 t34 = T t01 t34 2

(13) (14)

It should be noted that t56 equals t01. It can be shown that

When the voltage across the primary side of Tr reaches nVout , the energy is transferred from the input to the load via
S2 , Lr , Tr , D A , DD .

i1 =

L + Llk 1 1 n I in t01 = I in 2 r 2 2 Vo

i2 = i3 = i4 = 0

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(15) By substituting (13)-(15) into (12), the dc conversion ratio M is obtained

i5 = n I in t 45 = n I in (T t01 t34 )
TS n (2 T t01 2 t34 )

D. Self-Adaptable Voltage for Cr According to (1), the required value of Vx is maximum when Iin is maximum

M=

(16)

Vx, max =

Lr Pmax Cr Vin , min

(21)

C. Design of the component values 1. Value of Lr Based on (9), in order to assure that the leading switches can complete the current transfer process within t01, the maximum value of Lr, Lr,max, is found as

Fig. 5 shows the value of Vx versus the output load current with the parameters given in Table I. For example, when Vin is 530 V , at the rated load, Vx is about 30 V. If Vin is changed to 424 V, Vx becomes about 48 V, because Iin is increased.
E. Soft-switching range of the proposed converter Based on (11),

Lr ,max

n Vo = t01 Llk I in

(17)

T =

Lr,max is designed at the rated load condition. Fig. 3 shows the relationships between t01 and Lr,max with the parameters of the experimental prototype. The parameters are given in Table I. In Fig. 3, 0.14 s was chosen to be a reasonable value for t01. The minimum value of Lr, Lr_min, is determined by considering the maximum rate of rise of the leading switch

Ts t12 t23 = t01 + t34 + t45 2

Ts t23 2

(22)

Thus, the soft-switching range of the converter can be expressed as

t01 + t34 < T

(23)

current di dt

max

. Thus, in Mode 1,

n Vo di |max Lr + Llk d t
giving

Lr ,min = n Vo (di dt |max )1 Llk

(18)

A value of di dt max =80 A/s is used for shaping the switching trajectory and avoiding high electromagnetic interference.
2. Value of Cr Based on (1), and, as Vx < nVo, it results

Thus, by using (3), (7) and (8), and substituting the above boundaries of T into (16), it is possible to calculate the maximum (M_max) and minimum (M_min) values of M. Fig. 6 shows the relationships of M_max and M_min versus the normalized output load current with the parameters given in Table I. The interception point between M_max and M_min for the minimal input voltage of 424 V gives the minimum load for which soft-switching is assured. For the specified input voltage range, both output voltage regulation and softswitching operation begins at 7% of the rated load, and it is assured in all load range, including heavy load.

Cr

Lr I in 2 n 2 Vo 2

(19)

The time taken for reversing the polarity of the snubber capacitor voltage in Modes 3 and 4 from Vx to Vx is equal to tCr=t23+t34. By using (7) and (8), it can be shown that
tCr = t23 + t34 = 1

sin 1

Vx 2 I in 2 Z12 + Vx I in Z1 + Cr (20) Vx I in

Fig. 4 shows the relationships between tCr and Cr for different values of Vx calculated for the parameters given in Table I. The value of Cr is determined by considering the required values of tCr and Vx. As shown in Fig. 2, the voltage stress on Sa1 and Sa2 is nVoVx. Increasing Vx will reduce the voltage stress on Sa1 and Sa2, but will increase t34, and thus, tCr is chosen 1.5 s with Vx = 50 V, then, Cr is 100 nF.

Fig. 3 t01 versus Lr,max.

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Kv
e ( s ) v
c ( s ) v

Gvc ( s )

Gcc ( s )
K iiin ( s )

K PWM

(s) d

Gvd (s)

o ( s ) v

r ( s ) v

Gid ( s )

Z o (s)
o ( s) i

Ki

in ( s) i

Ai ( s )

Gig ( s )
in ( s) v

Gvg ( s )

Fig.7 Closed-loop small-signal ac equivalent model of proposed converter

Fig. 4 Resonant time tCr versus Cr for different values of Vx.

Fig. 5 Vx versus per-unit Io. Fig.8 Bode diagram of Gid(s).

IV. ADAPTIVE CHARACTER OF THE ZCS-ASSISTED RESONANT ENERGY According to (1), Vx is calculated for each measured value of the input current, such that to ensure ZCS for all the specified range of input/load currents. At a low input/load current, less resonant energy is needed. The controller will determine the instant t4 for which the actual vCr(t) reached the calculated value Vx. V. CONTROLLER DESIGN A current-mode control of the proposed converter is used. The equivalent small-signal ac model of the closed-loop e ( s ) - Small-signal error regulator is given in Fig. 7.,where v voltage, Kv- Output voltage scaling factor. Ki- Inductor

Fig.6 ZCS assured load range of the proposed converter.

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current scaling factor. Gvc(s) -Transfer function of voltage loop compensator. Gcc(s) -Transfer function of current loop compensator. According to Fig.7, the current loop gain, Ti (s), results in (24) The parameters Ki and KPWM have been designed as: Ki =0.265, KPWM =0.303. and Gcc(s) was designed as a PI controller:

Ti ( s) = Ki K PWM Gcc ( s)Gid ( s)

The voltage and current loop controllers Gvc(s) and Gcc(s) are implemented by DSP. The bilinear transformation 2 Z 1 s was applied to render discrete the above two T Z +1 continuous compensators
Gcc ( z ) = ( 30.075 z 29.925 ) ( z 1)

(28) (29) (30) (31)

vn = vn 1 + 30.075(en en 1 ) + 0.15en
Gvc ( z ) = ( 2.52 z 2.48 ) ( z 1)

Gcc ( s ) = K ip + K ii s

(25)

= vn 1 + 2.52(en en 1 ) + 0.04en vn

The values of Kip and Kii were designed as Kip=30, Kii=30000. Fig.8 presents the Bode diagram of Gid(s) which provides the information for the PI controller design. The voltage loop gain, Tv, results in:

VI. ADAPTIVE CONTROL CIRCUIT The control system was implemented by a digital signal processor (DSP) TMS320F28335 with a soft-start scheme. The input inductor current iL1 (i.e. the input current Iin) and output voltage Vout were sampled to provide the necessary

Tv ( s) =

K PWM K v Gvc ( s )Gvd ( s)Gcc ( s) 1 + Ti ( s)

(26)

where Kv is chosen as Kv=1/5000, and Gvc(s) is designed as a PI controller:

Gvc ( s) = K vp +

K vi s

(27)

With Kvp=2.5, Kvi=8000, Fig. 9 shows the Bode diagram of the voltage-loop with and without compensator Gvc. The designed cross frequency of the voltage-loop is 650Hz. The phase margin is 50 degree.
Fig. 10 Software flowchart of the control algorithm.

information for the current-mode control and calculate the minimum snubber voltage Vx for achieving zero-current switching [Eq. (1)]. The instantaneous value of the snubber capacitor voltage vCr is also sensed and compared with the calculated value of Vx. The auxiliary switches Sa1 and Sa2 are synchronized to switch on with S1 and S2, respectively. When the value of vCr equals Vx or Vx, Sa1, respectively, Sa2 are turned off. Fig. 10 shows the flowchart of the control mechanism.
Table I Main components of the prototype

Component S1 ~ S4 Sa1 ~ Sa2 IGBT driver D1 ~ D4

Fig.9 Bode diagram of the voltage-loop gain Tv(s).

Value FF150R17ME3G
IPW90R340C3

Component Cr Llk Co Tr Lr

Value 100nF 8.6H 0.2F / 30kV 0.05 : 1 1.5 H

2SD106AI-17 30kV / 3A

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VII. PROTOTYPE AND EXPERIMENTAL RESULTS A prototype (Vin=530V, Vo =15kV, P=5kW, fs=20kHz) was realized, with Cr= 100nF, Llk =8.6 H, Co= 0.2F/30kV, Lr =1.5uH. Table I gives the components of the prototype. The experimental time-domain steady-state voltage and current waveforms of the primary switches S1 , S4 , and Sa 2 at full load are given in Fig11. It proves the ZCS of the main switches and ZVS of the auxiliary switches . Fig. 12 presents the snubber capacitor voltage vCr (t4 ) (in percentage of vCr , max ) under different line/load conditions (a reduced input voltage attracts an increased input current at a constant output power). The experimental efficiency versus the load is given in Fig. 13. It can be seen that an efficiency of almost 94 % is obtained at full load.
(c) Waveforms of

v Sa 2

and iSa 2 ( vSa 2 : 800V/div and iSa 2 : 10A/div).

Fig. 11 Voltage and current waveforms of the switches S1 , S 4 , and S a 2 at full load condition (Timebase: 10s/div).

VIII. CONCLUSIONS The design and analysis of a current-driven full-bridge converter suitable for high voltage applications has been presented. By using a simple snubber, it can realize ZCS of the main switches in a large input/load range, and ZVS of the auxiliary switches. The resonant energy used for achieving ZCS is self-adaptable. The circulation of resonant energy is reduced at the minimum necessary for achieving ZCS of the main switches. The voltage stress on the switches never surpasses nVo . There is no additional current stress, as the current through the primary switches never overpasses the nominal value. A trade-off design allowed for minimizing the
(a) Waveforms of v S1 and iS1 ( v S1 : 1kV/div and iS1 : 10A/div).

(b)

Waveforms of v S 4 and iS 4 ( v S 4 : 1kV/div and iS 4 : 10A/div).

Fig. 12 Measured vCr ( t4 ) , i.e., actual V x , in percentage from its maximum possible value under different line/load conditions.

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REFERENCES
[1] X. H. Wu, D. M. Xu, J. H. Kong, C. Yang, and Z. Qian, High power high frequency zero current transition full bridge dc/dc converter, in Proc. APEC98 Conf., 1998, pp. 823827. M. Marx and D. Schroder, A novel zero-current-transition fullbridge dc-dc converter, in Proc. PESC96 Conf., 1996, pp. 664669. C. Iannello, S. Luo and I. Batarseh, Small-signal and transient analysis of a full-bridge, zero-current-switched PWM converter using an average model, IEEE Trans. Power Electron., vol.18, no. 3, pp. 793-801, May 2003. J. Chen, R. Chen, and T. Liang, Study and implementation of a single-stage current-fed boost PFC converter with ZCS for high voltage applications, IEEE Trans. Power Electron., vol. 23, no. 1, pp. 379-386, Jan. 2008. A. Leung, H. Chung, and K. Chan A ZCS isolated full-bridge boost converter with multiple inputs, in Proc. IEEE Power Electron. Spec. Conf., 2007, pp. 2542-2548 S. Atoh and H. Yoshike, PWM dc-dc converter with a resonant commutation means, in Proc. INTELEC91 Conf., 1991, pp. 308313. D. M. Xu, X. H. Wu, J. M. Zhang, and Z. Qian, High power high frequency half-wave-mode ZCT-PWM full bridge dc/dc converter, in Proc. IEEE Appl. Power Electron. Conf., 2000, pp. 99-103. J. Zhang, X. Xie, X. Wu, G.Wu, and Z. Qian, A novel zerocurrent-transition full bridge dc/dc converter, IEEE Trans. Power Electron., vol. 21, no. 2, pp. 354-360, Mar. 2006. L. Qin, S. Xie and H. Zhou, A novel family of PWM converters based on improved ZCS switch cell in Proc. IEEE Power Electron. Spec. Conf., 2007, pp. 2725-2730. X. Zhang, H. Chung, X. Ruan and A. Ioinovici, A ZCS FullBridge Converter without Voltage Over-Stress on the Switches, Proc. IEEE ECCE 2009, pp. 1991-1998.

[2]

[3]

[4]

[5]

Fig. 13 Experimental efficiency versus load power.

[6]

[7]

duty-cycle loss resulted from the resonant process , and concomitantly assuring soft-switching and output voltage regulation from a low value of the load (7 % of the rated value). Soft-switching and output voltage regulation is then assured in all range of the load, including heavy load. The measured efficiency of the proposed soft-switching converter is very high :94 % at full load, being much higher than the value for a full-bridge converter with RCD snubber.

[8]

[9]

[10]

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