K. J. Somaiya College of Engineering, Mumbai-77 Lab Manual: BE ETRX (Seme !er "###$ #n !ru%!ion !o !&e !u'en! E(ery !u'en!

! i e)*e%!e' !o bring *rin!ou! of +ri!e-u* of &i e)*erimen! !o be *erforme' a! !&e !ime of *ra%!i%al,!u!orial e ion a *er !&e !ime !able T&e !u'en! mu ! !a-e %oun!er igna!ure of !&e %on%erne' fa%ul!y on !&e ame 'ay 'uring lab e ion for !&e (erifi%a!ion of ou!%ome of !&e e)*erimen! T&e .ournal +ill %on!en! /0 i1e *a*er unle i! i no!ifie' for *ar!i%ular ub.e%! T&e !u'en! %an u e e*ara!e blan- /0 i1e *a*er if ne%e ary +&ile +ri!ing .ournal Co(er *age of e(ery e)*erimen! &oul' be in !an'ar' forma! a a!!a%&e' along +i!& lab manual T&e %on!en! of !&e .ournal +ill be a *er !&e forma! gi(en S!u'en! are e)*e%!e' !o follo+ !&e in !ru%!ion gi(en by %on%erne' fa%ul!y from !ime !o !ime

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K. J. Somaiya College of Engineering, Mumbai-77 CONTENTS Sr. No. Name of the Experiment Page No. Date of performance Date of Submission / Correction Remarks

This to certify that Di#.!!!!!!!!!

ro./Sis. !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!!!!!!!!!

Ro"" No. !!!!!!!!!!!!!!Exam.No.!!!!!!!!!!!!!!!C"ass!!!!!!!!!!!!!!!!!!!! atch No.!!!!!!!!!! has comp"ete$ the specifie$ term %ork in sub&ect of !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!in satisfactory manner insi$e the co""ege of Engineering as "ai$ by the 'ni#ersity of (umbai $uring the aca$emic year )u". / )an.*+!!! to No#./,pr.*+!!! O#era"" -ra$e. -ra$e. ,, / , / / C / CC

Staff member /n0charge

1ea$ of the Department

Principa"

2e*ar!men!: Ele%!roni% Engineering

Bran%&: Ele%!roni% Engineering

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K. J. Somaiya College of Engineering, Mumbai-77

July October Year 2013 Department of Electronics Engineering

Name of lab :LICD LAB Subject: LICD Semester: V List of Experiments

1 & , . 0 3 5 !o stu"# In$erting an" Non%in$erting Amplifier using op%amp Design of Sc'mit trigger (it' )!* + L!* $alues Stu"# of Astable multi$ibrator using IC%-.1 Design of multiple fee"bac/ filter using IC%-.1 Design 12&1 la""er . bit D2A con$erter using IC -.1 Stu"# of Astable multi$ibrator an" 4onostable multi$ibrator using IC000 Stu"# of IC%56,5 as (a$eform generator Soft(are: a7Design fre8uenc# response of Integrator2Differentiator b7Design *recision 9ull :a$e 1ectifier c7Design *ea/ Detector "7Design Instrumentation Amplifier

A""itional Experiments ;Not trul# be#on" s#llabus7 ('ic' stu"ents s'oul" "o as an assignment ;a7 Stu"# of regulator IC%-&, ;b7 Application of IC%030 ;c7 9las' t#pe A2D con$erter ;"7 Application of filters An# ot'er experiment stu"ents ma# come for(ar"< tr# out an" s'o( as "emonstration to ot'er batc'es

Sub.e%! #n-%&arge: Prof.(.S.(arathe Prof.S.1a"be Prof.,.4.Naiksatam

3ame of %on%erne' 4a%ul!y: 23 Prof. .(.S.(arathe *3 Prof. S.1a"be 53 Prof.,.4.Naiksatam 63 Prof.(egha Sharma

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K. J. Somaiya College of Engineering, Mumbai-77

Experiment / assignment / tutorial No._______ Grade: AA / AB / BB / BC / CC / CD /DD Signature of the Staff In !harge "ith date

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K. J. Somaiya College of Engineering, Mumbai-77

Ba!%&:

Roll 3o.:

E)*erimen! 3o.:

Ti!le: To stu$y /n#erting an$ Non0in#erting ,mp"ifier using opamp 762. 5555555555555555555555555555555555555555555555555555555555555555555555 /im an' 6b.e%!i(e of !&e E)*erimen!..-/im.0 To stu$y /n#erting an$ Non0in#erting ,mp"ifier using opamp 762 6b.e%!i(e : To stu$y the in#erting8 an$ non0in#erting mo$e of operation8 fin$ the maximum input #o"tage s%ing8 an$ obser#e effect of "oa$ing. 555555555555555555555555555555555555555555555555555555555555555555555 CE6 !o be a%&ie(e': CE67,CE68,CE60 T&eory: The op amp use$ is high performance mono"ithic one constructe$ using the fair chi"$ p"anar epitaxia" process. /t is inten$e$ for %i$e range of ana"og app"ications. 1igh common mo$e #o"tage 9 absence of "atch up ten$encies make 762 i$ea" for use as a #o"tage fo""o%er. /mportant features are. 2. No fre:uency compensation re:uire$ *. No short circuit protection 5. Offset #o"tage nu""ifying capabi"ity 6. No "atch up prob"em ;. <arge common mo$e 9 $ifferentia" gain 5555555555555555555555555555555555555555555555555555555555555555555555 S!e*+i e-9ro%e'ure: 23 Connect the circuit for /n#erting configuration. *3 ,pp"y sine %a#e i/p of 2=p0p82>1? an$ measure o/p =o"tage an$ $ra% the %a#eforms. 53 /ncrease input #o"tage from ?ero to maximum such that output goes in to saturation. (easure =oh an$ =o" an$ $ra% transfer characteristic. 63 ,pp"y 5= or 6= D.C. %ith ;++! an$ 2>! in series %ith to the input an$ measure output. comment on the input attenuation. ;3 Repeat steps * to 6 for Non /n#erting ,mp"ifier

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K. J. Somaiya College of Engineering, Mumbai-77

Cir%ui! 2iagram:

observation Table: Sr. 3o. 7. :. "in 2.C /.C. ine +a(e 7 "*-* 7K;1 4in' ou! ma)imum *ea- !o *ea- (ol!age ("in$ u%& !&a! no %li**ing i ob er(e'.#n%rea e in*u! (ol!age !o
6

6u!*u!

8.

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K. J. Somaiya College of Engineering, Mumbai-77 ob er(e %li**ing an' mea ure "o; an' "oL

0.

/**ly ine +a(e 7 (*-* +i!& <==! an' 7K! in erie +i!& i! an' mea ure ou!*u!.

Con%lu ion: 7$ Comment about phase of output %.r.t. input an$ transfer characteristic of opamp. :$ comment on the input attenuation in both type of amp"ifiers

2e*ar!men! of Ele%!roni% Engineering

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K. J. Somaiya College of Engineering, Mumbai-77

2a!e: 5555555555555

Signa!ure of fa%ul!y in-%&arge

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K. J. Somaiya College of Engineering, Mumbai-77

Ba!%&:

Roll 3o.:

E)*erimen! 3o.:

Ti!le: 2e ign a S%&mi!! Trigger (#n(er!ing$ +i!& >T9 ? LT9 (alue . 5555555555555555555555555555555555555555555555555555555555555555555555 /im an' 6b.e%!i(e of !&e E)*erimen!..-/im .0 To Design an$ stu$y the %orking of Schmitt Trigger using op0amp /C 762. 6b.e%!i(e : To obser#e the hysterisis of schmitt trigger 555555555555555555555555555555555555555555555555555555555555555555555 CE6 !o be a%&ie(e': CE67,CE68,CE60 T&eory: The c"ass of Comparators %hich use the positi#e @regenerati#e3 fee$back is ca""e$ as Schmitt Trigger or Regenerati#e comparators. The Schmitt trigger circuit is as sho%n abo#e .The resistance $i#i$er forme$ by R2 9 R*8 connecte$ bet%een the output an$ the non0in#erting termina" of the op amp8 intro$uces positi#e fee$back. This Schmitt trigger circuit is basica""y an in#erting comparator %ith positi#e or regenerati#e fee$back intro$uce$. Thus it is ca""e$ as regenerati#e comparator. Note that the sine %a#e has been app"ie$ as the input #o"tage to the in#erting input. Design:1) For UTP and LTP = 4 V.

2) For UTP = 4V. and LTP = 2 V.

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K. J. Somaiya College of Engineering, Mumbai-77 3) For UTP = 4V. and LTP = 0 V.

S!e*+i e-9ro%e'ure: 1. Connect the circuit as shown in the fig 1) and 2) with proper resistances used. 2. Observe the waveforms at the i/p and o/p terminal. 3. Verify observed and theoretical values. 4. Change the PeakPeak value of Vi from 10V. to 12V. and to 3V. and observe Vo. 5. Also observe the hysterisis of the ckt keeping CRO in X-Y mode.
6. Observe Vo waveform If we reduce the value of R2 = 0. Cir%ui! 2iagram:

observation Table:
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K. J. Somaiya College of Engineering, Mumbai-77 23 Aor 'TP an$ <TP B 6 =. Sr.3o. 7. :. 8. "i 2+= 2*= 5= T&eore!i%al (alue 9ra%!i%al "alue

*3 Aor 'TP B6= an$ <TP B * =. Sr.3o. 7. :. 8. "i 2+= 2*= 5= T&eore!i%al (alue 9ra%!i%al "alue

53 Aor 'TP B6= an$ <TP B +=. Sr.3o. 7. :. 8. "i 2+= 2*= 5= T&eore!i%al (alue 9ra%!i%al "alue

Dra% i/p an$ o/p %a#eforms as obser#e$ on CRO for both the circuits %ith sca"e. 'se graph paper. Comment an$ $ra% if necessary for points 68 ;an$ C in proce$ure. Con%lu ion:

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K. J. Somaiya College of Engineering, Mumbai-77

2a!e: 5555555555555

Signa!ure of fa%ul!y in-%&arge

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K. J. Somaiya College of Engineering, Mumbai-77 Ba!%&: Roll 3o.: E)*erimen! 3o.:

Ti!le: 2e ign of / !able Mul!i(ibra!or u ing #C 707 5555555555555555555555555555555555555555555555555555555555555555555555 /im an' 6b.e%!i(e of !&e E)*erimen!..-/im .0 To Design an$ stu$y the s:uare %a#e generator. 6b.e%!i(e:- 'n$erstan$ the %orking of ,stab"e mu"ti#ibrator an$ stu$y the $esigning of the same. 55555555555555555555555555555555555555555555555555555555555555555555 CE6 !o be a%&ie(e': CE67,CE68,CE60 T&eory: The circuit of an ,stab"e (u"ti#ibrator is sho%n. /t is ca""e$ as free running or s:uare %a#e generator. The output of this circuit %i"" be at D=sat or 0=sat $epen$ing upon %hether the $ifferentia" #o"tage is positi#e or negati#e respecti#e"y. To exp"ain the operation8 %e can see that the capacitor #o"tage of in#erting termina" is ?ero at start. ,ssume =o B =sat. Then =p B !=sat %here !B R2/@R2DR*3 @fee$back factor3. No% =n B += an$ =p B D !=sat So =o %i"" be D =sat. @Our assumption is true3. . Eith the output #o"tage at D=sat8 the capacitor start charging through R from += to D=sat. The #o"tage across the capacitor start increasing an$ =o remains same ti"" capacitor #o"tage is "ess than !=sat8 Once this #o"tage is crosse$ !=sat the output #o"tage s%ings to F=sat an$ no% the capacitor charges in opposite $irection to%ar$s F=sat. ,gain %hen =c fa""s be"o% F=sat #a"ue8 the op0amp goes to positi#e saturation. The time perio$ of the output %a#eform is gi#en by TB*RC "n G@2D !3/@20!3H. /f %e substitute #a"ue of ! then e:uation becomes TB*RC "n G2D @*R2/R*3H. 2e ign:- Design ,stab"e (= using opamp 762/C %ith fo""o%ing parameters. Are:uency0 bet%een *++ 1? to 2 >1?. =cc an$ =ee B D9 0 2* =8 =op0p B *.=sat. Circuit Diagram.

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K. J. Somaiya College of Engineering, Mumbai-77 55555555555555555555555555555555555555555555555555555555555555555555 S!e*+i e-9ro%e'ure: 20Connect the circuit as sho%n in $iagram. *0 S%itch on the po%er supp"y. 50Obser#e the o/p %a#eforms on CRO an$ measure fre:uency. 60Connect * capacitors in series an$ then in para""e" an$ Obser#e the o/p %a#eforms on CRO an$ measure fre:uency. ;0Change the #a"ue of R an$ Obser#e the o/p %a#eforms on CRO an$ measure fre:uency . C0No% change the ratio of R2/R* to ha"f an$ obser#e the o/p %a#eforms on CRO an$ measure fre:uency. 70Compare a"" the resu"ts %ith the theoretica" #a"ues observation Table: Sr. 3o. 2. *. 5. 6. ;. C. 2e %ri*!ion of %ir%ui! %onne%!ion Eith $esigne$ R 8 C * Cs in series *Cs in para""e" R #arie$ to Rmin R #arie$ to Rmax R2/R* change$ to 6b er(e' (alue T&eore!i%al (alue

Con%lu ion

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K. J. Somaiya College of Engineering, Mumbai-77

2a!e: 5555555555555

Signa!ure of fa%ul!y in-%&arge

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K. J. Somaiya College of Engineering, Mumbai-77 Ba!%&: Roll 3o.: E)*erimen! 3o.:

Ti!le: 2e ign of mul!i*le fee'ba%- fil!er /im an' 6b.e%!i(e of !&e E)*erimen!..-/im .0 !o "esign multiple fee"bac/ filter. 6b.e%!i(e : stu$y the $esign mu"tip"e fee$back fi"ter an$ uti"i?e the open0"oop gain. 555555555555555555555555555555555555555555555555555555555555555555555 CE6 !o be a%&ie(e': CE67,CE68,CE60 The mu"tip"e fee$back fi"ter uti"i?es more than on e fee$back path an$ exp"oits the fu""0 open0"oop gain. (u"tip"e fee$back topo"ogy is an e"ectronic fi"ter topo"ogy %hich is use$ to imp"ement an e"ectronic fi"ter by a$$ing t%o po"es to the transfer function.

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K. J. Somaiya College of Engineering, Mumbai-77 Cir%ui! 2iagram:

S!e*+i e-9ro%e'ure: 1 Connect t'e circuit as s'o(n in t'e "iagram & Appl# sine (a$e i2p from 166=> to 06?=> an" measure o2p $oltage , Calculate gain in "B an" plot grap' of gain $2s fre8uenc# semi log paper 6b er(a!ion Table: 9or Lo(%pass filter: Sr No fre8uenc# 4easure" $alue;$7 @ain ;A$7

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K. J. Somaiya College of Engineering, Mumbai-77

9or 'ig' pass filter : Sr No fre8uenc# 4easure" $alue;$7 @ain ;A$7

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K. J. Somaiya College of Engineering, Mumbai-77

Cal%ula!ion:

Con%lu ion :

2a!e: 5555555555555

Signa!ure of fa%ul!y in-%&arge

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K. J. Somaiya College of Engineering, Mumbai-77 Ba!%&: Roll 3o.: E)*erimen! 3o.:

Ti!le: S!u'y of R-:R la''er !y*e 2/C 5555555555555555555555555555555555555555555555555555555555555555555555 /im an' 6b.e%!i(e of !&e E)*erimen!..-/im .0 !o stu"# 1%&1 la""er t#pe DAC. 6b.e%!i(e : to stu$y app"ication op0amp for $igita" to ana"og con#ersion. 555555555555555555555555555555555555555555555555555555555555555555555 CE6 !o be a%&ie(e': CE67,CE68,CE60 The %eighte$ resistor type D,C not on"y re:uires %i$e range of resistor #a"ues but a"so itIs #a"ue of "argest resistor is 2*J times the R of the circuit K an$ thus to a#oi$ this prob"em basica""y R0*R <,DDER type D,C is preffere$. The R0*R net%ork can be ana"yse$ by using the the#eninIs theorem by obtaining output #o"tage correspon$ing to each $igita" input $28$*8$58$6 seperate"y an$ a$$ them to get the fina" #o"tage =o.The expression for the output #o"tage is "o@ "R A '7:-7 B '::-: B '8:-8 B ..CB 'n:-n D Cir%ui! 2iagram:

S!e*+i e-9ro%e'ure:
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K. J. Somaiya College of Engineering, Mumbai-77 23 Connect the circuit as sho%n in the $iagram. *3 ,pp"y the $igita" inputs to the respecti#e 6 bit inputs. 53(easure the ana"og output #o"tage an$ compare %ith the theoretica" #a"ues obtaine$ by ca"cu"ation. ob er(a!ion Table: Sr. 3o. 2igi!a- i,* %o'e (easure$ #a"ue@#3 Ca"cu"ate$ #a"ue@#3

Con%lu ion :

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K. J. Somaiya College of Engineering, Mumbai-77

Cal%ula!ion:

2a!e: 5555555555555

Signa!ure of fa%ul!y in-%&arge

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K. J. Somaiya College of Engineering, Mumbai-77 Ba!%&: Roll 3o.: E)*erimen! 3o.:

Ti!le: Stu$y of ,stab"e mu"ti#ibrator an$ monostab"e mu"ti#ibrator using /C0;;;. 5555555555555555555555555555555555555555555555555555555555555555555555 /im an' 6b.e%!i(e of !&e E)*erimen!..-/im. 0 !o stu"# Astable an" monostable 4ulti$irator using IC 000 6b.e%!i(e : stu$y app"ication of monostab"e mu"ti#ibrator. 5555555555555555555555555555555555555555555555555555555555555555555 CE6 !o be a%&ie(e': CE6:,CE68,CE60 T&eory: ,stab"e mu"ti#ibrator is a"so ca""e$ free running osci""ator8 this circuit $oes not re:uire any triggering signa" to change its output state./nitia""y %hen the supp"y is s%itche$ on8 the #o"tage across the capacitor %i"" be ?ero %hich %i"" be compare$ %ith the */5 r$ =cc in the upper comparartor an$ 2/5r$ =cc in the "o%er comparator %hich makes f"ip f"op to set making output L to go high an$ LM to go "o%. Through in#erter the fina" output goes high. so the transistor L2 %i"" remain off an$ the capacitor starts charging through Ra8 Rb to%ar$s =cc. Ehen the #o"tage across the capacitor becomes s"ight"y more than */5r$ =cc8 the upper comparator output goes high an$ "o%er comparator output goes "o%. A"ip f"op resets making L B+ an$ LM B2. through in#erter fina" output goes "o% an$ transistor L2 turns ON. The capacitor no% starts $ischarging 8 %hen its #o"tage becomes s"ight"y "ess than 2/5r$ =cc8 the fina" output goes high again. The cyc"e repeats pro$ucing a rectangu"ar %a#e at the fina" output.The e:uation for the time perio$ is. Ton@ =.EFA(Ra B Rb$G %D Toff@ =.EF RbG % Tota" time perio$8 T@ =.EF(Ra B : Rb$ G%.

The fre:uency of osci""ation8 4@ 7,T.

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K. J. Somaiya College of Engineering, Mumbai-77 The $uty cyc"e is 8 2@ Ton , T 2e ign 9ro%e'ure: Aor a gi#en #a"ue of fre:uency an$ $uty cyc"e the circuit can be $esigne$ as fo""o%sK 2. ,ssume the #a"ue of capacitor for a specifie$ $esign. *. The resistors #a"ue can be $eci$e$ by formu"a be"o%. Rb @ 7.0(2 H 7$ , 4C Ra @ Rb (:2 H 7$ , (7 H 2$ Ehere 8 D B gi#en $uty cyc"e8 A B gi#en fre:uency. , (onostab"e (u"ti#ibrator8 often ca""e$ a one0shot (u"ti#ibrator8 is a Pu"se0 generating circuit in %hich the $uration of the pu"se is $etermine$ by the RC net%ork connecte$ externa""y to the ;;; timer. /n a stab"e or stan$by state the output of the circuit is approximate"y ?ero or at "ogic0"o% "e#e". Ehen an externa" trigger pu"se is app"ie$8 the output is force$ to go 1igh @B =cc3. The time the output remains high is $etermine$ by the Externa" RC n/% connecte$ to the timer.The (onostab"e circuit has on"y one stab"e state @output "o%38 hence the name (onostab"e.Aigure sho%s interna" b"ock $iagram of ;;; configure$ for (onostab"e Operation. ,ccor$ing to figure8 initia""y %hen the output is "o%8 i.e. the Circuit is in stab"e state8 transistor L2 is ON an$ capacitor C is shorte$ to groun$. 1o%e#er8 upon app"ication of a negati#e going trigger pu"se to pin* of amp"itu$e greater than 2/5=cc comparator *Is o/p s%itches from high to "o%8 sets the f"ip f"op8 %hich in turn $ri#es the o/p to its high state8 This turns Transistor L2 OAA8 %hich re"eases the short circuit across the Externa" capacitor C an$ $ri#es the o/p high. The capacitor C no% charges to%ar$s =cc through R. 1o%e#er8 %hen the #o"tage across the capacitor e:ua"s */5 =cc8 comparator 2Is o/p s%itches from "o% to high8 resets the f"ip f"op8 %hich in turn $ri#es the o/p to its "o% state The o/p of the f"ip f"op turns transistor L2 ON8 an$ hence capacitor Crapi$"y $ischarges through the transistor. The output of the (onostab"e remains "o% unti" a trigger pu"se is again app"ie$. Then the cyc"e repeats. The graph sho%s the trigger i/p8 output #o"tage an$ capacitor #o"tage Ea#eforms. T @ 7.7G RGC
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K. J. Somaiya College of Engineering, Mumbai-77 2e ign *ro%e'ure : Aor a gi#en #a"ue of the time perio$ 8 the resistance #a"ue can be ca"cu"ate$ from abo#e e:uation of time perio$ . The capacitance #a"ue can be assume$ for a specific time perio$ 555555555555555555555555555555555555555555555555555555555555555555555 S!e*+i e-9ro%e'ure: 2.Connect the circuit as sho%n in the fig. *.,$&ust the pot #a"ues as per the $esign. 5.Obser#e the %a#eforms at the o/p termina" an$ across the capacitor. 6=erify obser#e$ an$ theoretica" #a"ues. Cir%ui! 2iagram:

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K. J. Somaiya College of Engineering, Mumbai-77

6b er(a!ion Table: a$ / !able mul!i(bra!or 9arame!er 6b er(e' (alue Cal%ula!e' (alue

b$Mono !able mul!i(ibra!or 9arame!er 6b er(e' (alue Cal%ula!e' (alue

Con%lu ion

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K. J. Somaiya College of Engineering, Mumbai-77

2a!e: 5555555555555

Signa!ure of fa%ul!y in-%&arge

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K. J. Somaiya College of Engineering, Mumbai-77 Ba!%&: Roll 3o.: E)*erimen! 3o.:

Ti!le: S!u'y #C I=8I fun%!ion genera!or. 5555555555555555555555555555555555555555555555555555555555555555555555 /im an' 6b.e%!i(e of !&e E)*erimen!..-/im. 0 To stu$y /C J+5J function generator. 6b.e%!i(e : stu$y of function generator /C0J+5J 555555555555555555555555555555555555555555555555555555555555555555 CE6 !o be a%&ie(e': CE6:,CE68,CE60

T&eory: The operation of /C J+5J function generator is base$ on "inear charging an$$ischarging of capacitor as sho%n in functiona" $iagram of /CJ+5J. There are t%o current sources8 out of these one8 sourcing current %hi"e other is sinking the current. These current sources a"ternate"y charge an $ischarge an externa" capacitor. Ehen current source N/I $ri#es #o"t abo#e @capacitor3 D#e reference #o"t "e#e"8comparator2 f"ips the A/A. This in turn s%itches the current source*. Current source* $ischarges the capacitor at same rate as it %as charge$ %hen triangu"ar %a#e fa""s be"o% the F#e reference "e#e"8 the other comparator f"ips the A/A. Current source* is s%itche$ out 9 current source2 begins charging up capacitor again. The #o"t across externa" capacitor is buffere$ an$ becomes triangu"ar %a#e output. The o/p of A/A is buffere$ an$ becomes s:uare %a#e oth triangu"ar an$ s:uare %a#e outputs are buffere$ so that output impe$ance of each is *++ohms. 1o%e#er the sine %a#e output is obtaine$ by gi#ing triangu"ar o/p to sine shaper but it has re"ati#e"y high output impe$ance of 2kohm. Arom this sine %a#e is often fe$ to a separate non0in#erting amp"ifier that pro#i$es buffering gain 9 amp"itu$e a$&ustments. 555555555555555555555555555555555555555555555555555555555555555555555 S!e*+i e-9ro%e'ure: 2.-i#e supp"y #o"tage of 2+#o"ts *.Check the output at pin no. *858O. 5.Check by #arying pot of 2++>P 9 2>P %hich parameter of %hich %a#eform gets #arie$.

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2e*ar!men! of Ele%!roni% Engineering

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K. J. Somaiya College of Engineering, Mumbai-77 6.Dra% the %a#eform 9 measure the $ifferent parameters of %a#es as per the abso"ute #a"ue. Cir%ui! 2iagram:

4ig.:. N(OS amp"ifier %ith Dep"etion "oa$

Con%lu ion

2e*ar!men! of Ele%!roni% Engineering

LICD/July.-Oct13

K. J. Somaiya College of Engineering, Mumbai-77

2a!e: 5555555555555

Signa!ure of fa%ul!y in-%&arge

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K. J. Somaiya College of Engineering, Mumbai-77

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2e*ar!men! of Ele%!roni% Engineering

LICD/July.-Oct13