LABORATORY EXPERIMENT #10 AN INTRODUCTION TO THE 555 INTEGRATED CIRCUIT TIMER

Discussion: The 555 timer is an integrated circuit used in a multitude of precise timing and waveform generation applications. In this lab, we will consider the 555 configured as an "astable multivibrator" and as a "monostable multivibrator" or "one shot." Essentially, the "astable multivibrator" is a circuit that outputs a quasi-rectangular waveform whose frequency and duty cycle are established by choice of external resistors and capacitor (see Figure 1a). In comparison, the "one shot" receives an appropriate trigger signal and outputs a single pulse whose duration is set by the selection of an external resistor and capacitor (see Figure 1b). As with the 741 op-amp, the 555 timer requires a power supply and external circuitry to achieve the desired operating characteristics. As illustrated in Figure 2, the chip has eight pins that are identified in the following table.
Vout Vcc 0V Vout Vcc T pulse

0V
trigger time

Figure 1. (a) Astable Output

Figure 1. (b) Monostable Output

Pin# 1 2 3 4 5 6 7 8

Description Ground Trigger Output Reset Control Voltage Threshold Discharge Supply Voltage

1 2 3 4

8 7 6 5

TABLE I: 555 Timer Pin Description

Figure 2. 555 Pin-Out

The supply voltage for the chip (pin 8) has the flexibility of being anywhere between +5V and +18V. The output voltage (pin 3) can take on two states: a "high" state (~ 0.5V below the supply voltage) and a "low" state (~ 0.1V). The ground pin (pin 1) will be tied to the common ground point used for the rest of your circuit. Pin 4 (reset) will be tied to pin 8 during this lab; in other applications, it can be grounded to force the 555 output to its "low" state. Pin 5 (control voltage) will be connected to ground through a 0.01uF capacitor for this lab. The remaining pins 2 (Trigger), 6 (Threshold), and 7 (Discharge) constitute the "heart" of the 555 timer and will

555

require a closer inspection of the innards of the chip to understand how they will be merged with the external circuitry. A functional circuit diagram of the 555 timer is provided in Figure 3. Note that it consists of 3 high-precision equal-valued resistors, 2 comparators, an RS flip-flop, and a transistor connected to the discharge pin. The non-inverting (+) and inverting (-) terminals of the comparators may both be viewed as "infinite input resistance," implying that no current is allowed to flow in. As a consequence, the power supply voltage (Vcc) and three 5k resistors are isolated, the voltage across each resistor necessarily being Vcc/3. The voltage at the inverting terminal of the top comparator must then be 2Vcc/3, and the voltage at the non-inverting terminal of the bottom comparator is Vcc/3 (as shown in Figures 4 and 5). Recall that the comparator output is a logical "high" when the non-inverting terminal voltage exceeds the inverting terminal voltage (e.g., R=1) and is a logical "low" when the inverting terminal voltage is greater than the non-inverting terminal voltage (e.g., R=0).
Vcc 5k Comparator Threshold (pin 6) Q FlipFlop Q

R 5k S Trigger (pin 2) Comparator 5k

Ouput (pin 3)

Discharge (pin 7)

100

Figure 3. Functional Diagram of 555 Timer To next consider how the comparator outputs drive the RS flip-flop to then create the chip output, first we will assume that pin 2 (Trigger) and pin 6 (Threshold) are connected together and we will refer to that voltage as Vtrig. Three comparator output possibilities exist: if Vtrig < Vcc/3, then the lower comparator output is high (S=1) and the upper comparator output is low (R=0); if 2Vcc/3 > Vtrig > Vcc/3, then both comparator outputs are low (R=0 and S=0); and if Vtrig > 2Vcc/3, then the upper comparator output is high (R=1) and the lower comparator output is low (S=0). Note, there is no way for both R and S to be high since this would simultaneously require Vtrig to be greater than 2Vcc/3 AND less than Vcc/3. The RS flip-flop is a "register" whose output is a function of the R and S inputs with the functional relationship illustrated by the following truth table:

2Vcc/3 > Vtrig > Vcc/3 Vtrig < Vcc/3 Vtrig > 2Vcc/3

R 0 0 1 1

S 0 1 0 1

Qn+1 Qn 1 0 N/A

TABLE II: Flip-Flop Truth Table

The variable Qn+1 refers to the next state or output of the flip-flop given the indicated inputs. Thus, when S=1 and R=0, the output is a logical one (the set condition). When R=1 and S=0, the output is a logical zero (the reset condition). Finally, when R=0 and S=0, the output remains in the state that it was previously in (the memory condition). Thus, if we had Vtrig < Vcc/3 so that the output was a logical one and then we transition to a situation where 2Vcc/3 > Vtrig > Vcc/3, the output would stay at logical one. Similarly, if Vtrig > 2Vcc/3 so that the output is at logical zero, then a transition to a situation where 2Vcc/3 > Vtrig > Vcc/3 would result in the output remaining at a logical zero.
Vcc Thresh RT 2V 3 cc CT R Vcc S 10k Trig 1V 3 cc Q FlipFlop Q Output RLED INTERNAL TO 555

Discharge 100

Figure 4. Monostable Multivibrator Functional Circuit Monostable Multivibrator Operation Monostable (meaning, one stable state) is best explained by referring to Figure 4. Here we see that the discharge terminal (pin 7) is connected to the Threshold pin. To understand the discharge terminal, consider that there are two outputs of the RS flip-flop, Q and Q . The signal Q is the logical complement (opposite) of Q. Thus, if Q is a logical one, then Q is a logical zero. If Q is a logical zero, the base of the transistor is grounded and the transistor is off the discharge terminal appears as an open circuit. However, if Q is a logical zero and Q is a logical one, then the transistor is pushed into saturation and the discharge terminal appears as a low

impedance path to ground. As Figure 4 illustrates with the capacitor tied to the discharge pin, this would enable us to rapidly dump the charge from the capacitor CT . Lets next explain how the circuit achieves a programmed timing interval. As the name implies, the monostable has one stable state the output being low. Thus initially with the trigger terminal held at Vcc , S=0 and R must also be zero. To see that this is so consider that R=1 initially, the output would be low (the reset condition) and Q would be high. The transistor 2 would be on, and the capacitor voltage would discharge, forcing Vthresh below VC = Vcc . 3 Therefore, R=0 and we would enter the memory state Q would remain low and Q would stay high (the transistor being on would maintain the capacitor voltage at zero). Now by shorting the Trigger terminal to ground, we then force S=1 so that Q=1 (the set condition) and Q goes low. Thus, the discharge transistor turns off and Vcc is allowed to charge the capacitor. By immediately removing the Trigger terminal short, both R=0 and S=0 and the timer stays in the memory state with Q=1. The output state does not change until the capacitor voltage charges up 2 to Vcc at which point R=1 and the output toggles back to the monostable state (the reset 3 condition): Q=0 and Q =1. The discharge capacitor is turned on and the capacitor charge is dumped to ground. Both R=0 and S=0 and we then remain in the memory state with Q=0. The 2 time that the capacitor takes to charge from 0V up to Vcc is dictated by the time constant of the 3 external RC network. The charging of this capacitor is governed by:
t RT CT VC = VCC 1 e

2 Thus, if we set VC = Vcc and solve for the time, we get the following: 3 1 Tpulse = RT CT ln = 1.0986 RT CT 3 Clearly, we can choose a combination of RT and CT to give us the required time delay. Finally, consider the output of the circuit pictured in Figure 4. With the output normally low, the LED is off. When the output is high and the capacitor is charging, the LED is on. Thus, we should anticipate that the LED will be on for Tpulse once we momentarily short the trigger input to ground. Astable Multivibrator Operation The "astable multivibrator" is configured by using the internal connection of the complement of the 555 output and the transistor connected to the discharge pin (pin 7) as shown in Figure 5. Note, when the 555 timer output is high (Q = 1), its complement (logical inversion) must be low ( Q = 0 ). With Q = 0 , the internal transistor is "off" and pin 7 appears as an open circuit. When

the 555 timer output is low (Q = 0), its complement must be high ( Q = 1 ). With Q = 1 , the internal transistor is "on" and pin 7 appears as a very low impedance path to ground (essentially a short circuit). As shown in Figure 5, resistors RA and RB and capacitor CT are external components connected to pins 2 (Trig), 6 (Thresh), and 7 (Discharge) of the 555 timer. Once again, the two internal comparators of the 555 draw no current from the external circuit and simply appear as open circuits. The discharge pin will appear as either an open or a short depending on the status of the RS flip-flop.
Vcc Thresh RA 2V 3 cc RB R S CT Trig 1V 3 cc Q FlipFlop Q Output INTERNAL TO 555 470 Vcc

Red

470

Green

Discharge 100

Figure 5. Astable Multivibrator Functional Circuit With the power supply off, the capacitor voltage is initially zero and thus R=0, S=1, Q=1, and Q = 0 . Therefore, the transistor is "off" and pin 7 appears as an open circuit. With the power supply on, the external circuit then simply consists of a charge path from the power supply, through RA and RB, into CT (see Figure 6a). The capacitor voltage (which is also Vtrig) builds up exponentially. When it exceeds Vcc/3, the flip-flop enters the memory state and the 555 output remains at Q=1. Once Vtrig builds up past 2Vcc/3, the previous truth table indicates that R=1, S=0, Q=0, and thus Q = 1 . The internal transistor is "on" and the external circuitry is modified to the schematic detailed in Figure 6b. Note, now the capacitor is disconnected from Vcc and will discharge through RB to ground (through pin 7). As Vtrig decays back below 2Vcc/3, the RS flipflop transitions back to the memory state and the 555 output remains at Q=0. Once Vtrig falls below Vcc/3, the truth table indicates that R=0, S=1, Q=1, and Q = 0 . The transistor is turned "off" and we return to the original "charging" circuit (as pin 7 now appears as an open circuit). The circuit will continue to oscillate between the "charging mode" when Vtrig builds from Vcc/3 to 2Vcc/3 and the "discharging mode" when Vtrig decays from 2Vcc/3 and Vcc/3 (see Figure 7). During the "charge mode" the trigger voltage is governed by:

Vtrig

2 R +R C = Vcc Vcc e ( A B ) T 3

Setting this equal to the "trip voltage" of 2Vcc/3 allows us to solve for the amount of time that the output is in the logical one state: TH = 0.693 ( RA + RB ) CT

RA

Vcc

RB

Vcc

RA

RB

CT

Vtrig

Vtrig

CT

(a)

(b)

Figure 6. Astable Circuit During (a) Charge and (b) Discharge

Vcc

Vtrig

2 V 3 cc 1 V 3 cc

t Vout
Vcc

t
TH TL

Figure 7. Astable Capacitor and Output Voltage Waveforms During the "discharge mode" the trigger voltage is governed by:
2 Vtrig = Vcc e RB CT 3 t

Setting this equal to the "trip voltage" of Vcc/3 allows us to solve for the amount of time that the output is in the logical zero state: TL = 0.693RB CT By combining TH and TL, we can determine the period of the cyclic waveform produced T = TH + TL = 0.693 ( RA + 2 RB ) CT The reciprocal of the period is the frequency in Hertz f = 1 1.44 = T ( RA + 2 RB ) CT

The duty cycle of the output waveform is given by the ratio of the output high time to the output period or D=

(R A + RB ) TH = (R A + 2 RB ) T

Clearly, when RA=0 D=0.5 and when RA= D=1. Thus, as currently configured, our astable multivibrator can only produce duty cycles ranging between 0.5 and 1. Consider the output network of Figure 5. When Q=1 and Vout = VCC , there is zero volts across the red LED (its off) 15V 2.3V and = 27 mA flows through the green LED (its on). When Q=0 and Vout = 0V , 470 15V 2.3V there is zero volts across the green LED (its off) and = 27 mA flows through the 470 red LED (its on).

Section A. Building and Evaluating a Monostable Multivibrator

+15V 10k 5% GND Trigger Out RLED 5% LED Reset Vcc Dis. Thres. Control 0.01uF CT RT

Figure 8. Monostable Multivibrator Circuit for Section A

1. When the output of the 555 is high, the voltage is approximately 15V. A conducting LED will have a voltage drop of about 2.3V. If we desire to have 25mA of current flowing through the conducting LED, what is the required value for RLED? Choose the closest 5% value for this resistor and record the value here. RLED = ___________ 2. If CT=22F electrolytic capacitor, find the theoretical resistance RT to provide a 6 sec, 15 sec, and 30 sec delay. 3. Choose the nearest standard 5% resistor. Measure and record the value of the resistor in the following chart. Also, record the anticipated time delay. 4. Build the circuit shown in Figure 8 (this is Figure 4 with the 555 chip pin-out inserted) and complete the following chart. Note, the jumper needs only to be touched to ground to activate the timing cycle. You should immediately take it out of ground so that the circuit can correctly cycle into the memory state. The stop-watch should be used to measure the achieved delay. Use the measured time delay to then estimate the actual capacitance. Repeat the 30 sec measurement 3 times. Have the instructor verify your circuit operation following the 6sec measurement. INSTRUCTOR VERIFICATION: _______________

Time Delay 6 sec 15 sec 30 sec 30 sec 30 sec

Theoretical Resistance

Closest Standard 5% Value

Actual Measured Value

Anticipated Time Delay

Measured Time Delay

Calculated Capacitor

5. Comment in your postlab as to why we would prefer to rely on the 30-sec measurement more heavily for the calculated capacitor value. 6. De-energize the proto-board.

Section B. Building and Investigating an Astable Multivibrator 1. Given D=2/3, f=0.167Hz and CT=22F electrolytic, solve for RA and RB (where RA must be >100k). Make sure to show your work in the postlab. Build the astable multivibrator circuit illustrated in Figure 9 (this is Figure 5 with the 555 chip pin-out inserted). Choose the closest 5% resistor values and measure and record the actual values.
+15V Red 470 5% +15V Reset Control 0.01uF CT

GND Trigger Out

Vcc Dis. Thres.

RA RB

470 5% Green

Figure 9. Astable Multivibrator Circuit for Section B

2. Energize the circuit and complete the following chart. Have the instructor verify your circuit and results. INSTRUCTOR VERIFICATION: _______________

Measured RA

Measured RB

Theoretical Period

Measured Period

Theoretical Duty

Measured Duty

3. De-energize the proto-board and disassemble the circuit. Return all resistors, capacitors and timer chips to the appropriate bin drawers. Return all proto-boards, proto-wire kits, and stopwatches to the lab cabinets.

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