SPICE

Verify macro model accuracy

with PSpice test circuits
By Soufiane Bendaoud
Amplifiers Marketing Manager
National Semiconductor Corp.
Spice models have gained popu-
larity over the past years. While IC
manufacturers strive to provide
their customers with accurate
models, system designers dictate
the trend of accuracy and in-
novations in Spice macro model
development.
Many IC companies claim that
their models are the best and that
they offer revolutionary features.
What they often fail to provide
is a circuit that allows their cus-
tomer to verify the accuracy of
the macro model.
Op-amp macro models are
probably the most sought after.
While they can be extremely
helpful when accurate, they can
also cause serious problems, es-
pecially when they are not in the
hands of experts.
Most system design engi-
neers take the time to test the
op amp macro model by itself
before implementing it in a more
comprehensive circuit. I’ve seen
people get erroneous simulation
results and then call up the apps
group of the IC manufacturer to
tell them that the model they’ve
developed is not functional.
When the applications person
tries to get some details about
what’s not working in the model,
the response is usually, “I used a
different model from your com-
petitor, and it works just fine in
my circuit.”
The truth is that all models
are not the same, and some may
not work in a particular setting.
Instead of investigating op amp
macro models’ shortcomings, it
would be helpful to have a collec-
tion of circuits that allows users to
test any model, in other words,
universal test circuits for op amp
macro models.
Parameters for test
Macro models differ in their levels
of complexity or simplicity. Much
like the datasheets, the models
should emulate parameters rel-
evant to applications in which
the op amp is thought to be ap-
propriate. For example, if you use
a rail to rail output op amp, you
should be able to test and verify

Figure 1: When testing open loop gain and phase, the user should choose a
frequency range that goes beyond the unity gain bandwidth of the amplifier.

Figure 3: CMRR is especially important in non-inverting configurations

because of modulation.

Figure 2: When running the simulation for slew rate, make sure your setup is Figure 4: PSRR is important in any application where the voltage supply is
in transient. susceptible to any interference.

Electronic Engineering Times-Asia | November 1-15, 2006 | eetasia.com 

 Figure 6: To simulate the current-noise density, use the same circuit and place
a 100kΩ resistor in series with the non-inverting terminal.

Figure 7: You can use any circuit previously described, and simply activate the
voltage and current probes in PSpice to see them.

goes beyond the unity gain band- voltage that appears.

Figure 5: When modeled correctly, the output impedance helps to get a more
accurate settling-time behavior when the amplifier is driving capacitive loads.
the output saturation voltage vs.
the load current. Likewise, a low-
noise amplifier should have a
model that emulates at least the
voltage noise.
Despite their differences, am-
plifier macro models have some
things in common. These are the
most interesting parameters—
they are usually the starting point
of the simulation.
Open loop gain, phase margin—
The open loop gain vs. frequency
is probably the first test that en-
gineers perform to evaluate the
amplifier’s macro-model perfor-
mance. This test is important be-
cause it shows the DC gain, -3dB
frequency, crossover frequency
(gain bandwidth product in the
case of a voltage feedback ampli-
fier) and the phase margin all in
one simple little circuit.
Figure 1 shows the test cir-
cuit. The RC network ensures
that the output is biased at a
suitable DC voltage. At higher
frequencies, the capacitor shorts
the inverting input to ground,
placing the op amp in open loop.
The capacitor is chosen to be
large to provide an early roll off
(f = 2πRC). Thus, even if the op
amp you’re testing has a very low
frequency dominant pole, you
would be able to simulate, see a
smooth transition and the 20dB
per decade roll off.
When testing open loop
gain and phase, the user should
choose a frequency range that
width of the amplifier.
When using a rail-to-rail out-
put model, it is important to use
the test circuit with the same
load indicated in the datasheet.
Otherwise, you will probably not
get the result you would expect,
especially the DC gain (AOL =
gmRL).
Slew rate—This is another ele-
ment defining the amplifier
speed that every model should
have. Slew rate is defined by the
ratio of the tail current over the
compensation capacitance.
Depending on the macro
model, the capacitor that deter-
mines the slew rate can be placed
at the input or in a separate
network.
Since we already know the
relationship Idt = Cdv, we can
simply use the circuit of Figure
2 and take the derivative of the
output to get the slew rate. To do
this, just use the insert command
in the probe screen and type in
the letter d before the output
When running the simulation
for slew rate, make sure your
setup is in transient. Ensure that
the input signal also has fast
enough rise time and fall time
(edges) as to not limit the slew
rate. On the other hand, the input
signal frequency must be chosen
according to the op amp’s speed.
An input signal that’s too fast will
cause convergence problems.
CMRR, PSRR—These two parame-
ters are not always modeled, but
they can be equally important.
CMRR and PSRR are fairly easy to
implement in a model, as they
usually consist of a simple RC
network, resistor divider and volt-
age-controlled voltage source.
CMRR is especially important
in non-inverting configurations
because of modulation. On the
other hand, PSRR is important in
any application where the volt-
age supply is susceptible to any
interference.
The test circuits presented in
Figures 3 and 4 allow the user to

 Electronic Engineering Times-Asia | November 1-15, 2006 | eetasia.com

Figure 8: This test circuit sweeps the current across the supply and allows
you to determine how much current is drawn from the amplifier at different
supply voltages.
Figure 9: The first test circuit uses a voltage-controlled voltage source.
simulate these two parameters.
If they are modeled correct-
ly, the pole and zero location
should match the graphs in the
datasheet.
Note that you can choose to
invert either CMRR or PSRR on the
plot screen by simply inserting a
minus sign preceding the volt-
age probe.
Output impedance—This is a
specification often omitted from
the datasheet altogether, but is
sometimes necessary.
When modeled correctly, the
output impedance helps to get
a more accurate settling-time
behavior when the amplifier is
driving capacitive loads. Output
impedance is also needed to
calculate the proper component
values when a compensation
scheme is considered for stability
purposes.
The test circuits provide the
user with three curves for the
output impedance at different
gains in the frequency domain.
The output impedance is ob-
tained by taking the ratio of the
output voltage over the 1A cur-
rent source.
The graph in Figure 5 shows
the output impedance of the
LMV791 to be approximately
100Ω.
Voltage, current noise—This is one
of the areas in which the creators
of amplifier macro models have
made progress. Some of today’s
models allow you to simulate
the voltage noise with its flicker
noise component and current
noise with excellent accuracy.
Modeling noise into the macro
model doesn’t take much more
computing or simulation time.
However, it can be a difficult task,
at least until you have figured out
the right equations that make
the voltage-noise density curve
mimic the datasheet graph with
Electronic Engineering Times-Asia | November 1-15, 2006 | eetasia.com
Figure 10: In the second test circuit, we sweep the voltage from -2.5V to 2.5V.
the 1/f corner as well.
You can easily test the volt-
age-noise density by taking the
output of a voltage follower
(with a voltage source of 0V) on a
log-log scale. To simulate the cur-
rent-noise density, use the same
circuit and place a 100kΩ resistor
in series with the non-inverting
terminal. In the probe window,
make sure to divide the result by
100E3 or whatever resistor value
you choose.
Using a large resistor value
makes the current noise domi-
nate since it is coupled into the
resistance. Thus, voltage and
thermal noises become negli-
gible compared to the current
noise.
Make sure to specify the out-
put voltage in the analysis setup
window of PSpice. In Figure 6, we
specify the output voltage as Vout
and the input voltage as Vin, and
check the box “noise-enabled.”
Input bias current input offset
voltage—These parameters are
probably the easiest to model.
The input offset voltage can eas-
ily be implemented as a voltage-
controlled voltage source at the
input whose value is taken from
the datasheet.
In general, you won’t even
have to use a specific circuit to
test Vos and IB. You can use any
circuit previously described, and
simply activate the voltage and
current probes in PSpice to see
them. Figure 7 shows the input
bias current at 1.5pA and the in-
put offset voltage at 1.48mV. Note
that the supply current is also
shown to be 1.15mA at ±2.5V.
Output saturation voltage—This
parameter is sometimes known
as the dropout voltage. It is par-
ticularly important in rail-to-rail
output models. This is because it
indicates the output swing as a
function of the load current and
can help you choose the appro-
priate op amp, especially when
driving heavy loads or when dy-
namic range is a concern.
The test circuit uses a simple
DC sweep with two equal input
voltages of opposite magnitude
to replicate the sourcing and sink-
ing of the load current.
Supply current vs. supply volt-
age—The test circuit in Figure
8 sweeps the current across
the supply and allows you to
determine how much current is
drawn from the amplifier at dif-
ferent supply voltages. This test
is particularly helpful for power-
conscious applications.
The slope of the supply cur-
rent curve can easily be added
into the model.
Overshoot, transient response—
This test circuit serves two
purposes: testing the transient
response (whether small signal or
large signal) and the overshoot.
Overshoot is important be-
cause it indicates how much ring-
ing an amplifier has with a capaci-
tive load. Overshoot is a measure
of stability in time domain; it is the
equivalent of what peaking is in

the frequency domain.
Some macro models use extra
passive components to mimic
the overshoot accurately. But
generally, if the phase margin is
accurate, the overshoot should
come pretty close to what it
should be.
You can test the transient
response using the same test
circuit without the 100pF ca-
pacitor. Some datasheets indicate
whether a small capacitance is
 Electronic Engineering Times-Asia | November 1-15, 2006 | eetasia.com
used as a load when measuring
the small signal transient. In that
case, simply use the same value
of capacitance.
Common-mode voltage range—
This parameter is important as it
allows the user to see the head
room and how far away your in-
put signal needs to be from the
supply.
The first test circuit in Figure 9
uses a voltage-controlled voltage
source. In the second test circuit
in Figure 10, we sweep the volt-
age from -2.5V to 2.5V.
Phase reversal—Phase reversal
occurs in some amplifiers when
the input signal exceeds the
input common-mode voltage
range. During a phase reversal,
the output changes polarity and
may cause damage to the op
amp, resulting in system lockups.
The test circuit is a simple
voltage follower with a sine wave
input of 6V. The output waveform
indicates that the macro model,
just like the op amp, doesn’t
exhibit any phase reversal. It is
clipped at ±2.5V.
The test circuits described are
not meant to replace the evalua-
tion of the device on the bench.
Rather, they provide the user with
the flexibility of making quick
assessments with respect to the
accuracy of the macro model.