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PHILIPS TECHNICAL TRAINING

L05HD TRAINING MANUAL

PHILIPS CONSUMER ELECTRONICS


64 PERIMETER CENTER EAST
PO BOX 467300
ATLANTA, GA 31146-7300

MM032205
TABLE OF CONTENTS

INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

POWER SUPPLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

AUXILIARY POWER SUPPLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

MAIN POWER SUPPLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

DEFLECTION SYNC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

TV SIGNAL PROCESSOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

DEFLECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

CONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

VIDEO SIGNAL FLOW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

CRT DRIVE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

AUDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

SIDE JACK PANEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

TROUBLESHOOTING TO PANEL LEVEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23


Introduction

The L05HD TV chassis is designed for the model year 2005. This set is High Definition ready
with an NTSC tuning system. To receive the ATSC channels a set top box is required.

This design is used in large screen sizes of 27 and 30 inch with the 27-inch having a 4:3
aspect ration and the 30 inch version having a 16:9 aspect ratio. There are three types of
CRTs used which are the 100 degrees, 110 degrees, and wide screen version.

The standard architecture consists of a Main panel (called the family board), a Picture Tube
panel, a Side I/O panel, a HDMI panel, a HD panel, and a Top Control panel. The panels
consists primarily of conventional components with some surface mounted devices.

The functions for 1fH video and audio processing is performed in one IC (TDA1200xx, IC
7200), the Hercules chip. This chip is located on the solder side of the main panel.

The functions for the HD signals and 1fH to 2fH conversion is performed on the HD panel.
Except for switching, OSD, Closed Caption, Text, and A/D conversion, the bulk of the pro-
cessing is performed by the Trident chip, IC 7201.

The L05HD chassis has two signal processing sections, one for the 1fH (NTSC), and one for
2fH (HD) processing. Whatever signal is applied to the set, it is displayed on the CRT in a
1080i format.

The NTSC tuning system features 181 channels with on-screen display. The main tuning
system uses a tuner, a microcomputer, and a memory IC mounted on the main panel. The
microcomputer communicates with the memory IC, Remote Receiver, Tuner, Signal process-
ing IC, and HD processing section. The Memory IC retains the settings for favorite stations,
customer-preferred settings, and circuit settings. The circuit settings can be accessed by the
service technician via the Service Alignment mode.

The On-screen graphics and Closed Caption decoding are done within IC 7206 located on
the HD panel. They are added to the main signal in the Display Processor, 7221, located on
the HD panel.

Customer Operation

The L05 customer menu is similar to the L04 customer menu. The L05HD does not have
Picture-in-Picture.

Press the Menu button to make a selection. Press the Cursor up-down buttons on the
remote to highlight the desired selection. Press the right Cursor button to make the selection.

Page1
Press the Menu button on the remote and press the Cursor up-down button to obtain the
following screens.

Page 2
Setting up the access code.

1. Press the Menu button on the remote Main Features


Timer
to display the on-screen menu. Picture
Sound
Timer
Rotation Rotation
Timer
Start Time
Features AutoLock AutoLock Stop Time
Install Active Control Active Control Channel
2. Press the Cursor up or down buttons Digi. Pic. Demo Digi. Pic. Demo Activate
Display
until the word features are highlighted.

3. Press the Cursor right button to display


the features menu options. Features Features
Timer Access Code T imer Access Code
Rotation ---- Rotation XXXX
4. Press the Cursor up or down buttons AutoLock
Active Control
AutoLock
Active Control
until the words autolock are highlighted. Digi. Pic. Demo Digi. Pic. Demo

5. Press the Cursor right button. The


screen will read, “Access Code ----”
Features Features
T imer Access Code T imer New Code
6. Using the number buttons, enter 0, 7, Rotation XXXX Rotation ----
1, 1. XXXX will appear as you press AutoLock
Active Control
Incorrect AutoLock
Active Control
the buttons. Digi. Pic. Demo Digi. Pic. Demo

Incorrect code will appear on the screen.


Enter 0711 again.
Features AutoLock
T imer Confirm Code Block Channel
7. The screen will ask you to enter a new Rotation XXXX Setup Code Of fStop T ime
code. Enter any 4 digit code. AutoLock
Active Control
Clear All
Block All
Channel
Activate
Digi. Pic. Demo Movie Rating Display
TV Rating

1 2
4

2 VOL
3
4 5
6
7

Page 3
Power Supply Block (Figure 1)

The Power supplies are both located on the Family board. The supplies are divided into two
sections, the Auxiliary and Main section. A single filter and rectifier circuit supplies both
sections. The Auxiliary supply operates in a low power mode when the load is reduced. In
the standby mode, the 3.3 and 6 volt supplies are operating. The 3.3 volt supply provides
power to the processor section of the Hercules. The 6 volt supply provides power to the IR
receiver. The Main supply is switched Off via the Standby line.

When the set is turned On, the "B" line from the Hercules processor goes High switching
7547 which turns 7535, 7509, and 7545 On. The +3V3A, +6VA, +12VA, and +8VA supplies
are then switched On. The load placed on the Aux Power supply will cause it to switch to the
full power mode. At the same time, the STBY line switches Low turning the Main SMPS
supply On. The supply produces a +6 volt, +140 volt, -16 volt, and +16 volt supplies.

The +Vaudio (+16 volt) supply switches on the degauss relay.

Page 4 FIGURE 1 - POWER SUPPLY BLOCK


Auxiliary Power Supply (Figure 2)

IC 7510 is the heart of the Auxiliary Power supply. In the Standby mode, VIA the current
sensing and Control circuits, a low power condition is detected by the IC. The IC then goes
into a Burst Mode operation to reduce the power used by the circuit. In the Burst Mode, the
supply will operate at approximately 25 kHz. In full power operation the frequency will be
approximately 66 kHz.

When power is first applied to the set, Start up is supplied to the IC by the internal Start-Up
current through Pin 14. Startup voltage is also applied to the IC to Pin 2 by the AC_IN line
which is tied to the neutral side of the AC line. During normal operation, power is supplied to
the IC by the HOT windings, Pins 1 and 2, of transformer 5504. Output drive from Pin 11 is
applied to the Gate of Transistor 7525. Voltage developed across the current sensing resis-
tors in the Source of 7525 provides current sense information to the IC. When 7525 is
switched Off, the voltage on Pin 1 of 5504 goes High. This winding supplies the operating
voltage the power supply circuit. It also turns Transistor 7567 On causing the Gate of 7525 to
stay Low as long as Pin 1 of 5504 is High. This prevents 7525 from turning On until the field
of 5504 has collapsed.

Regulation is accomplished by monitoring the +3 volt supply. This voltage is fed to Shunt
regulator 7542 which controls the current through opto-isolator 7516. Shunt Regulator 7542
begins conducting when Pin 3 of the IC reaches 2.5 volts. At this point current flows through
the opto-isolator, 7516. The transistor inside 7516 turns On applying a control voltage to Pin
6 of 7510. If a problem should develop in the feedback circuit causing an excessive voltage
on Pin 6, Transistor 7549-2 will turn On, switching Transistor 7532 On. This will a voltage to
the Demag circuit on Pin 7 causing the IC to latch Off. The IC will stay latched until power is
removed and reapplied to the set.

In the Standby mode, the "B" control line from the Hercules Processor is Low. Only the +3,
+3V3, and +6 volt supplies are present. When the set is turned On, the "B" line will go High,
turning Transistors 7509, 7545, and 7535 On. This will switch On the +8VA, +12VA, +8V,
+3V3A, +6VA, and +5V supplies.

In normal operation, voltage from Pin 12 of 5504 is rectified by 6540 to produce a negative
voltage which prevents Transistor 7561 from turning On. If AC is removed from the set, this
negative voltage will disappear. The voltage across the filter capacitors on the +3V line will
turn 7561 On. The Power Down line will then go Low signaling the processor to shut the set
down.

Page 5
Page 6

To 1533 Of
AUXILIARY POWER SUPPLY VDC 1534
+3V3A
1533
1
2
+3V3A
+8V

1 Source Select + 3 Vaux_GND1


Vaux_GND
2 Microcontroller 4 9509
3 5 Vaux_GND

T 1000mA
4 6
Vaux_GND1

3535
1532
5 9554

4R7
2586 7
I565 Vaux_GND MAINSUPPLYGND
6 8 4567
VCC Vaux_GND
330p 21 On 7 9
I557 8 10
6532 11.8 Off +5V
2585

2582

100n

11 * 9536
1u0

+6VA

2592
* 12 9523

68p
BAV21WS F534 I534

2580

3592

2544
4551 POWER_DOWN

33K
E

10n

2n2
* 7585 Vaux_GND1 Vaux_GND1
3V2
0V BC857B C A4
I560 3551 I510 2524
I538 3563 6540 I588 6542 F577 6543

4585
1n0 B B 7561
4R7
BZX384-C18

* 4V5 0V PDTC143ZT To 1405


6533 I563 3525 I595 220R BAS316 BZX384-C12 BAS316
I528
6512

2526

100n

2510

2564

100n
C Of

22u
3V7 2539 3565 * Vaux_GND E
RGP10D 300K 3560 +8VA

3589
AC_IN 9534

10K
15K *

BAS316
* * 470p Vaux_GND1

470K
3588

6534

3567

3534
Deflection

3K3
I553 3599 6550 I558 6539 5524 7535 33R
I556 5523 I564 F578 +12VA
SI2307DS Controller
1M5 SARS03
* SB340L-7010 0086 10u F582
1535
4523 HEATSINK 1

470u 16V
15.5 On
BAS316
2528

470n
3528

6531

3598

2536

2534

9530
330K

5504 2
4M7

1m0
7510 3536 I568
11.5 Off TEA1507 6 7 * 3
FIGURE 2 - AUXILIARY POWER SUPPLY

7543
E L78L33ACZ
2 START-UP 14 2K2 5 Vaux_GND1
Vcc
SUPPLY
Drain 8
15V9 158V B Vaux_GND1 Vaux_GND +8V

3546
CURRENT SOURCE 1 3

68K
MANAGEMENT I599 5521 IN OUT Vaux_GND1
0V1 I536 4 2 1
F581 9 F583
3 VALLEY 6544
3527

C COM

47u 16V

47u 16V
47K

Gnd

BAS316
I537
3V4 7567

3568

6536

2555

2556
10

47K
VOLTAGE HVS
3550 CONTRLLED BC847B SB340L-7010

2
OSCILLATOR I533 2522 6546
START-UP Demag 7 2
I509

FREQUENCY 11
220K
BZX384-C15

CONTROL CURRENT SOURCE Vaux_GND1


470p STPS10L60D
6549

7532 E OVER LOGIC 1 12


BC857B 15V8 9 Vaux_GND 2538 5526 F584 Vaux_GND1Vaux_GND1 +3V
TEMPERATURE CONTROL Sense I540 F535
PROTECTIOM CIRCUIT 0V SS28411-00
7525 158V
CURRENT
*

470u
0083 1n0 470U

220R
3561 220R
B SENSING +3V3
I554

4m7 6V3
HEATSINK
15V8 0088

2535

3545
D 9524

2K2
3526 I526 G F580 +3V3A
Driver HEATSINK

2523
11

1n0
POWER-ON OUTPUT

2584

3562
C INPUT RESET DRIVER 3V4 I530 * 3V4 2 3
0V 6 CONTROL 0V 3547
Ctrl CIRCUIT S 2 1
Vaux_GND

2525

470p
1V3 MAXIMUM Vaux_GND 68K
BURST ON-TIME OVER
I532 1 2 Vaux_GND 0V

1
DETECTOR PROTECTION POWER 2546 I589
PROTECTION 7545
3530 I531 6545 SI2305DS

BAV21WS
2u2

3531

3538

3532

3533

6537
1K0
* * *

BAS316
56K SB340L-7010 I594 5527

4540

3540

4548

3548

6553
68K

68K
3597 2520 I539 * * * * *
470U
2591

10V
47K 100n

470u
2590

2587
6538 1n0 3537

I545
6552 I547

3m3
BAV21WS 68K
7516 7547

BAS316
2589
STPS10L60D Vaux_GND1 C PDTC143ZT

6554

4566
3566
TCET1103(G)

68K
Vaux_GND1
4 I590 3542 **
1
2u2
* I596
20V 9V 5V7 B B
680R
1.27V On

3539
2V A4

1K0

9515
I529 0V
I512 1.45V Off 3549 3 2 3543 2543 * * E
8V
100K

1V5
3595

I592 6V
C 270R 10K 100n 7509

8V1
15V8 2578 SI2307DS
2588 Vaux_GND F537 +6VA

1
3593

2521

3529
10K

1K2
47n

F585

TL431CZ-AP
B I597 C 7549-1 3553

K
7549-2 IMX1 1n0
IMX1 0V6 0V6

7542

REF
3 27K 7544 +6V
B 2V5 I593 L78L33ACZ
Vaux_GND 3544
2583

3596

A
10K
10u

F586 +5V
Vaux_GND 1 3

2
E 2K2 IN OUT
3594

22K

3587
COM

2K2

47u 16V

47u 16V
BZX384-C6V8
Vaux_GND

2558

2557
3586

3585
3583

6547

3590

5K6

68K
5K6

82K

2
C
REGION NAFTA 9V
2576
SIZE 27VRF-HD 30WSRF-HD B

2575
3540 --- --- 0V

10n
100n Vaux_GND1 Vaux_GND1 Vaux_GND1

3591
3548 --- ---

10K
Vaux_GND MainSupplyGndA 7575 7577 0V
3551 --- --- E 0V PDTC143ZT BC847BW C
3566 --- ---
2579
4523 --- --- 0V B
4540 JMP JMP Vaux_GND 0V7
C 10n
4548 --- --- Vaux_GND E
4551 JMP JMP 7576 B Vaux_GND
4566 --- --- BC847BW 0V7 C BC847BW *
3581
4585 --- --- 7583 7584 9529 Stdby_con
5523 100MHZ
--- 120R 100MHZ
--- 120R E B C BC847BW A4
6548 22K AUX_ON|ITV_MSG
6553 BAS316 BAS316 BAW56W 10V7
Vaux_GND 2577 A4
7535 SI2307DS-E3 SI2307DS-E3 B
9515 --- --- Vaux_GND E 0V
9524 --- --- 100u
E Vaux_GND
9529 --- --- Vaux_GND
9530 --- --- Vaux_GND
9534 --- ---
Main power supply (Figure 3)

The Main Power supply provides the VBAT (141 volt), and Audio voltage supplies. This sup-
ply is switched Off during the Standby mode. During Standby the STBY_Con line is High
which turns Transistor 7573 On. This causes the opto-isolator 7513 to turn On hard. This
places a higher voltage on the control Pin of IC 7511 causing the IC to shut down. The
operating voltage from the Auxiliary supply keeps a small voltage on Pin 2 of 7511 to prevent
it from cycling On and Off. Output from Pin 11 of 7511 drives FET 7512 which drives
Transformer 5512. When Pin 2 of 5512 goes High, Transistor 7514 is switched On turning
7512 Off. This is to prevent 5512 from becoming saturated.

When the set is turned On, the STBY_Con line goes Low switching 7573 Off. The VBAT
supply is the reference voltage for regulation. Since this voltage is missing during startup, the
Shunt Regulator 7571 is turned Off. The voltage on Pin 6 of 7511 goes Low, which turns the
drive from the IC On. When the set is On during normal operation, the supply voltage on Pin
2 of the IC is supplied by Pin 2 of Transformer 5512. When the VBAT supply reaches the
correct voltage, Pin 3 of the Shunt Regulator 7571 reaches 2.5 volts switching it On. This
switches the opto-isolator On to provide a regulation feedback path.

Transistor 6551 provides a power on ramping of


the VBAT supply.

7512 drive test points.

Page 7
Page 8

POWER SUPPLY REGION


MAIN RANGE
SET
NAFTA
LR
27VRF-HD 30WSRF-HD
Vbat 143V 143V
AUDIO OUTPUT 2X10w 2X10w
1572 --- ---
1577 --- ---
2506 --- ---
5500 --- ---
9502 --- ---
9504 --- ---
+Vaudio 9506 JMP JMP
AC_IN 9572 JMP JMP
I543 9577 JMP JMP

I506

I582
* 95062506 I583
1503
LKS1AF 4 2
3508

DEGAUSSING COIL
2 220R 33n
9512

BZX384-C12
3

4R5
Rh

3541
1504

6541
3 1

47K
2 F502

4R5
Rs
5502 F500

*
1

2501

RES

+T
F501 5 4
I542
1 3523 16V4
1 8
5564 16V4
DMF2405H60
F541
1 4

47u 25V
1501 1502 3502 I525
* 3503 I501 7541

2541
PFC5000 PFC5000
BC857B
* DSP-301N 2 3
Vaux_GND1

2503
2n2
FIGURE 3 - MAIN POWER SUPPLY

I580 I502 9513 F542

3
1 5506 4 9505
AC Main Plug RES
Or 1500 2 3 6500
F508 "$" VDC
Vaux_GND1
From 1505 Of
F503
T4E.250V
F506 9501
*
DMF35
9502
3509
1
* 4
*2542
9510

RES

2505

2507

RES
2504

2n2
-T
*

2
Front Interface Panel 9500 1 5501 4
* 5500 2R0
Audio_Gnd AUDIO_GND2 AUDIO_GND1
2500

470n

* 3505

3504

2502

2508

100n
1507

RES
1505 1 4

1M5
For ITV only

For ITV Only


I507 9511
RES
2

2R0
1

3510
1 2 3 F509
2 3 2
V

I584
DMF2405H60

-T
F504 F507
9503
RES
I581
* 9504 * 5512 18
I552 6551
5551

3
I514 2
3513 I551 F552 5552
17 1
Vbatt
3 140V
27u
7514 2K2 16

2
0V
2551
* 2552
3500

BC847B
3M3

I524 4 15

BAS316
I517 1n0 6564 160V 100u

3524

6514
47K
I515
I505 2V3 14

3521
5

3K3
I522 7511 STPS10L60D
TEA1506T/N1
13
5562 6563 F563 * 1572
9572
F564

5511
I511
2 14
I513
*F 2.5A -Vaudio
3501

START-UP
* 7512 D 295V
3M3

Vcc Drain I579 -16V


SUPPLY
* 2563 F562

*
15V5 12
3506

2509

CURRENT SOURCE 297V


3M3

1n5

MANAGEMENT I516 2565


VALLEY 11 AUDIO_GND1
3 Gnd 2V3 8 AUDIO_GND1
22u 50V

470p
* 9577
2511

VOLTAGE HVS G S 0V
AUDIO_GND2 5561 I562 6562 F561 F565
10
3514

CONTRLLED 9
*

OSCILLATOR
7
*F1577 +Vaudio

2514

2515

470p
FREQUENCY START-UP Demag

1n5
+16V
I508 I561
*

*
1510 CONTROL CURRENT SOURCE 2562
0V 2570 2.5A
TO 1013 OF 2561
OVER LOGIC
9 3522 3515

3511 4R7 F510


TEMPERATURE CONTROL Sense AUDIO_GND2
PROTECTIOM CIRCUIT
470P I571 3571 1n0 I572
CURRENT 0V I521
SENSING 47K 1K0 3516 0R1 +6V
TUNER IF 14 On
*
1N5062
2516 9V3

3520
6575
2.8 Off
(For
Lightning INPUT
POWER-ON
RESET
OUTPUT
DRIVER
Driver 11
2V2
I519 100n
I518
* 15V6 4 1
3579 I574
Protection) 6 CONTROL
2519

100p

Ctrl 7573

8V2
CIRCUIT 2K2
0V MAXIMUM PDTC114ET
OVER I523 5V 3 2 8V2 2571 I576
330K
3517

2513

470p

BURST ON-TIME
POWER
I573
RGP10D

DETECTOR PROTECTION F573 Stdby_Con


6511

2517

PROTECTION
1n0

5513 2518 15n A4


7513

3575
3573

82K
15K
1u0 TCET1103(G)
10n

2574

2572
I520

1n0

10n
TL431CZ-AP

K
7571
I578

REF
3
I527 3518

A
0.6V Off 3K3

3574

3576

4K7
1.3V On
*
3519

3512

2512

100n
15K

1K2

2
1545
Provision For
For EMC Lightning Protection
5563
HOT COLD
1546
VCC 22u
Provision For
9563
Lightning Protection
MainSupplyGnd MainSupplyGndA

"$" FOR MAINS 120V AC 170V (177V)

..V.. Normal Operation


(..V..) Standy Mode

HOT GROUND
COLD GROUND
Deflection

Sync (Figure 4)

Whatever signal is applied to the L05 chassis, it will display the picture in a 1080i format.
This means that the Line or Horizontal frequency is always 33.75 kHz. The Vertical or Frame
rate is 60 Hz.

Vertical Sync is output from the Trident IC 7201 on Pin 35. The signal is buffered by
Transistor 7203 before being fed to the TV display processor and TV Microcontroller. In the
same manner Horizontal Sync is output on Pin 34 and is buffered by Transistor 7204.

RESET F208
* 9
10
4202
T2 7201-2 11 12
6930 DPTVSVP Sets w/o PP
VM T5

3225
3 3V3 3202 10K

2239

100n
+8V

1K0
VCC3 CPU
VS_9883 7202 3229
43 2V5 3203 220R T3 3V3 4 BC857B 2V2
ADDRSEL
0V 5 172 2V5
HS_9883 RESET 0 180R
42 2V5 3204 220R T3 T2 PSM F287 2V4 6 171 2V5 1V5
PS 1

3230
T2 ALE 2V4 175 170 2V5

75R
F288
CLK_9883 ALE 2
41 2V5 3205 220R T3 T2 WR F289 2V4 176 169 2V5
WR 3

220R
3228
T2 RD F290 2V4 177 AD 168 2V5
RD 4 2241
167 2V5
SDA_OUT 3224 5
40 2V5 3206 220R T2,T5 3V 178 166 2V5
SD 6 1u0
100R 3V 179 SC 7
165 2V5
2240
39 2V5 3207 220R VCC3 SVM_PP T5
SCL_OUT 3223 3222 3V3 180
T2,T5 F207
INT 27p
38 2V5 3208 220R 100R 10K 3227
1V3 31 26 4209 SVM_ROT T5
CAPD16 3221 IRSET DAC VM *
2242

2243

14 2V5 T3 +5V
68p

68p

& DDP 150R


13 2V5 CAPD17 T3 36 27 DPTV_R T1,T5
560R HFLB R
12 2V5 CAPD18 T3 2V4 28 DPTV_G T1,T5
CAPD19 G
11 1V9 T3 35 29 DPTV_B T1,T5
CAPD20 0V VSYNC B
10 2V5 T3 7203 0V
9 2V5 CAPD21 T3 BC847B 34 37
CAPD22 HSYNC VPROT
8 0V T3 0V
7 2V5 CAPD23 T3 T1,T5 VSYNC 0V 4203
*
+5V * 3283

1K0

7204 0V
BC847B

T1,T5 HSYNC 4204

2246
0V * 3284
4n7
1K0
100n 2220

2219 100n

100n 2218

2217 100n

100n 2222

2223 100n

100n 2224

2225 100n

100n 2226

100n
2247
4n7 AGND5
+3V3 7201-4
2221

6930 DPTVSVP
2263
2V2
16V 22u 3V
C3
6V

23 173
V

FIGURE 4 - SYNC

Page 9
TV Signal Processor (Figure 5)

Red, Green, and Blue from the Trident IC is input on Pins 30, 31, and 32 of 7221, TV Display
Processor. The RGB/YUV matrix changes the signal to a YUV signal before feeding it to a
Color level control circuit. The signal is fed to the RGB insertion circuits where the OSD is
inserted. The signal is then fed to a White Point and Brightness Control circuit and then to
the CRT panel. The White Point and Output Amplifier have the Drive controls and Cutoff con-
trols. Input from the ABL line on Pin 43 makes adjustments in the brightness levels to adjust
for changes in beam current. The Cutoff
pulses from the CRTs are fed to Pin 44 to the Cathode Calibration circuit. The Cathode
Calibration circuit adjusts the cutoff levels of the CRT to maintain the correct gray scale track-
ing. When the set is first turned On, a calibration pulse is output on the RGB lines. The
Cathode Calibration circuit monitors this pulse on the Cutoff line to set the Black level and the
maximum drive voltage for the cathode. Once the Calibration has taken place, the Output
Amplifier switches to the RGB drive signal as the output. Horizontal and Vertical Sync is fed
to 7600 on Pins 23 and 24. IC 7600 processes the sync to provide the geometry for the pic-
ture. Horizontal drive is output to the sweep circuit on Pin 8. Vertical drive is output on Pins 1
and 2. East West drive is output on Pin 3. Sandcastle (SCO) is output on Pin 9. Horizontal
Feedback (HFB) from the sweep circuit is fed into the Phase Loop to phase correct the
Horizontal drive. IC 7221 is controlled by the Hercules Processor on the Family Board via the
I2C buss on Pins 10 and 11. Transistors 7226 and 7227 levels shifts the I2C buss level
between 5 and 3.3 volts. Geometry and Drive settings are stored in the Memory IC located
on the Family Board.

Deflection (Figure 6)

Horizontal drive from 7221 is fed to Transistor 7404 located on the Family board. This drive
circuit has two power sources. During startup, it is powered by the +6 volt supply. Once the
High Voltage circuit is running, it is powered by Pin 9 of the IFT. 7404 drives Transformer
5402 which drives the HOT (Horizontal Output Transistor). The HOT drives the IFT and the
Horizontal Deflection Coil. The IFT is powered by the VBAT (141 volt) supply.

The IFT produces High voltage, Focus voltage and G2 voltage to drive the CRT. In addition,
a 200 volt supply is produced to drive the CRT panel, a +14 and -14 volt supply for the
Vertical output, Filament voltage, +200 volt VideoSupply, and a +12V_lot supply.

Transistor 7408 monitors the IFT secondary to sense the presence of over voltage. If the
High Voltage goes High, the voltage on Pin 6 of the IFT will go High. When the voltage on
diode 6480 exceeds 15 volts, transistor 7408 will turn On. If 7408 turns On, it will turn 7407
On causing the x_ray protect line to go Low. The Processor will then shut the set down. In
addition the EW_DRIVE circuit is monitored. If the EW_DRIVE fails, transistor 7406 will turn
On constantly placing a dc voltage on the source. This will turn 7407 On.

IC 7451 is the Vertical Output IC. It is powered by the +14 and -14 volt supply from the IFT.
The Vertical pulse is rectified by 6458, keeping the V_PROTN line High. If the vertical output
should fail, the V_PROTN line will go Low. The Hercules processor will then shut the set
down.

Page 10
FIGURE 5 - TV SIGNAL PROCESSOR Page 11
Page 12

LINE + FRAME DEFLECTION


A2
F402 +12V_LOT
Vbatt

3491

3492
33K

33K
1401

2404
5456

47u
SVM_ROT 7 CD25405-00 5 1
F462
A5,B1 6 EHTinfo
+12V_LOT
5 GND_HOR 9 NC 2 F483
GND_HOR A2,A5
VideoSupply

3424
3474 F472
EHTinfo 4 HFB
3

9411

3453

2451

2435
A2 F416 A5

56K
V
F401 3401 47K 7 4 * * 3K9

2421

2422
2

2433
VT_Supply

BZX384-C8V2
1 * * * CRT_GND 2474
*

3477
150R

150R
3412

3413

5401

9402

6492
5450
*

L.LIN

1K5
Filament 150p
A2 2492

3425
F455
TO 1351 OF EHT
F404
* * 2431 * F464 * 470p GND_DEF GND_DEF GND_DEF I494

V
TO PICTURE TUBE 6466 3486 F481
1402 From 5450 Of LOT I489 2n2 GND_EW

BZX384-C15
CRT Panel (30PWXXXX Only)
CRT_GND I424 HORIZONTAL 1404 RGP10D I469 1R0

2469

6480

3462

2477

2478
Or

18K

15n
1u0

8n2
TO 1351 OF DEFLECTION 1

CRT_GND
7408
COIL FOCUS 1403 BC857B 2425

I425
2
CRT Socket E
1405 2u2

BZV85-C6V8
42V4 CRT_GND CRT_GND

9476

6476
B I426 I427 2426 2491
G2

3469

22K
1406 45V7
F465
GND_DEF
* * C
0V 6467
470p
I468 3485
2u2 CRT_GND

4
5409 I458 Filament

CRT_GND
BZV85-C6V8
BYV29X-500 A2
10 1R5

2417

2418
*

680K
9442

3442

6442

3459

3460
22K

68K
7 GND-LINEDRIVE 2493
1
* 470p
6481 CRT_GND
* *

2
3421 2409 I488 3490 I418 5402 F418

DMV1500M

I453
+6V CRT_GND CRT_GND
FIGURE 6 - DEFLECTION

1 5 12 I455 5457 I456 3456 6452 F452

6404
150R -14V

K
22R BAS316 33n 7405

2412
BU2527DX 3458 BZV85-C6V8 I470 5452
2423
126V * 5 I457 I466 1R0 F453
VideoSupply
I419

BYD33D
I473 2419 I428 6 6453 RGP10G 4R7 10u

1u0 250V
3 6

6486

2411

BAS316
I432
330p PSD10-204B *

470u
2494 470p

2454

6489

100n
2436
2458
0V

*
2488

11
1u

2413

2416
3416 0V

3
47R 5408 2448 470p GND_DEF

A
GND_DEF 3450
* * 8 6461 I492
+12V_LOT
CRT_GND
GND_HOR 1R0 F478

470u
2449
6487 3 9 I461 I459 RGP10D

2
2461

1
F419
BAS316 CRT_GND

3481

5458
1K0
GND_HOR 47u

5459

560n
7V 2424 2459 3455 CRT_GND
BZX384-C27

I493
7404 D +14V
6464

BSH103 9435
HD
F475 3402 I413 G 3414 I410 3415 I411 3419 I412 3433 I465 3451 GND_HOR
I414
470p
6403 I416 3493
470p
6456
1R0
6488
F456
7407 * 3435
A5 I482
* X_RAY

470u
2460
3V6 S I475 PDTC144ET C
330R 50V 3V3 A4
4R7 4R7 4R7 4R7 4R7 RGP10D 2410 F457 BYV27-200-TAP BZX384-C33 I440 10R
2R2
B
6485 3443 Vbatt
100R
100K
3408

2497

220p

3441

5V7 E GND_DEF 0V
100n 3496 V_PROTN
GND_EW

BAS316
BAS316 RES 3480

6490

2466
E 0V A4

BZX384-C3V3
2u2
B 10K
6457

2499

3497

6491
6V

10K
1u0
6M8 +14V I460 I431 F482
7410
BYV27-200-TAP
C 0V BC857B
GND_HOR

50V7
12V7

13V9
I490 6471 7451 CRT_GND
3473 2 6 CRT_GND GND_EW GND_EW

4434
TDA8177F 3

VSUP

VSUPO

FLYB
I423 For ATSC only
RGP10D
3431

82K

220K
3488

14V9
7406 D 9489
FLYBACK
Vbatt
3499 I417 * 3489 I471
GENERATOR
F458
4418
G
4V6
VDRA
A5
* 0V6 1 IN-
1451
* 1M0 S
0V
100R
POWER OUT 5
2495

100n

2432

2470

220n
9490 1
*

1n0
F476 3418 VERTICAL
EW_DRIVE
* I415
3478 I462 AMPLIFIER 0V5
F459
2
DEFLECTION
A5
100R
VDRB
* 0V6 7 IN+ 3
COIL
2496

A5
3427

10n
680K

10R
THERMAL

3467
GND_EW

100R
2463

2462

3463
2n2

2n2
3426 6482

*
I433 3428 22K PROTECTION

GND
EHTinfo 4401
6484
*

3466
A2,A5

1R5
100K BZX384-C6V8 GND_EW 6449 I430 6458 A2,A5
*220n
3434
4495
* Vguard

-14V7
3436 I434 6483 I499 BAS316 4 I481
2407

3461

2465

220n
3n3

BZX384-C6V8
3438 3439 2468 I464 BZX384-C15 BAS316 1K0
2467

680K BAS316 CRT_GND CRT_GND I463

3468
3440

9440

100R

3432

9432

6434
2R2

1K0
I436 3437 I435 2473 10K 10K 2464 100n ATSC Tri+

*
22K 15n * * F461 3471
100n
CRT_GND
3432
3432
10K
10K
1K
1K5 * *
2471

100n

2472

-14V Frame_FB
10n

REGION NAFTA REGION NAFTA


MainSupplyGnd 2R7 SIZE 27VRF-HD 30WSRF-HD SIZE 27VRF-HD 30WSRF-HD CRT_GND
3472 2411 2KV 820P 2KV 220P 3442 --- ---
2412 1K6V 12N 1K6V 12N 3459 820K 470K
2413 630V 27N 630V 27N 3478 --- ---
GND_EW GND_EW 2R7 2413 --- --- 3489 --- ---
2417 --- --- 4401 --- ---
2418 250V 390N 250V 330N 4418 --- ---
CRT_GND 2419 250V 560N 250V 1U2 5408 W7132-004 Y W7131-003 Y
2421 --- 2KV 330P 5450 JF0101-85039 B JF0101-85038 B
9484 2422 --- 2KV 330P 5456 --- SD20417-02 Y
2433 2KV 220P --- 6476 BZV85-C6V8 BZV85-C6V8
2451 100V 220N 100V 100N 9411 JMP ---
3418 100R 100R 9435 JMP JMP
MainSupplyGnd CRT_GND MainSupplyGnd 3424 --- 1MA 612V 9440 --- ---
3425 --- 1MA 612V 9442 JMP JMP
3434 --- --- 9476 --- ---
3435 --- --- 9489 --- ---
F_15050_017.eps
GND-LINEDRIVE GND_EW
Set Control (Figure 7)

The L05HD has two microprocessors, The Hercules located on the Family board and the TV
Controller located on the Trident board.

The Hercules, 7200, provides control for the entire set. During standby, the Hercules and the
Remote sensor are powered by the 3.3 volt supply. The customer communicates with the
Hercules via the Remote sensor and Power switch located on the Front Control panel. The
power supplies are switched On via the STBY-CONT and B lines. The TV Controller is reset
by the C control line. The I2C bus communicates with the EEPROM 7601, Tuner 1000, TV
Controller 7206, Trident 7201, A/D 7210, TV Display Processor, 7221, and HDMI panel.

HERCULES PROCESSOR

Page 13
Page 14 FIGURE 7 - CONTROL
Video Signal flow overview (Figure 8)

There are two sections in the set for processing video. The 1fH section using the Hercules
processes NTSC signals.

The Tuner is controlled by the microprocessor in the Hercules. IF from the Tuner is fed to the
Hercules chip for detection and demodulation. AV1, AV2, Side, and 1fH Component video is
also fed to the Hercules, IC 7200. If an NTSC signal is selected by the Remote or Keyboard,
the selected CVBS (Composite Video) is output on two lines. One CVBS line goes to the
Trident chip, IC 7201, located on the HD panel. CVBS_TXT is fed to IC 7206 on the HD
panel which detects Closed Caption text or teletext. This IC also generates the OSD (On
Screen Display).

If the signal applied to the set is a 2fH signal or better, it is applied to either the YpbPr
Component input or the HDMI input. These signals are fed to a selector switch located on
the HD panel, IC 7205. The selected component or RGB signal if fed to the A/D converter, IC
7210. This signal is fed to the Trident IC 7201 which enhances the picture and scales it to
1080i. Analog RGB out from the Trident IC is fed to the Display Processor, IC 7221, which
performs the picture control functions and inserts the OSD. The output of 7221 is fed to the
CRT panel.

The option settings for the Source selection can be found in Option settings in the SAM
mode.

FIGURE 8 - VIDEO SIGNAL FLOW BLOCK Page 15


AV1, AV2, CVI (480i), Side, and Tuner selections are made by the Hercules chip. Selected
CVBS (Composite Video) from one of these inputs is fed to the Trident panel which selects
between the output of the Hercules, CVI (480p, 720p, 1080i), and the HDMI panel. The CVI
input is shared by the Hercules and the HD section.

The L05HD has the following inputs in addition to the tuner RF:

· AV1 is a Composite video input.


· CVI (Component Video input) can accept 480i, 480p, 720p, or 1080i.
· AV2 accepts Composite video (CVBS) or S-Video.
· Side accepts Composite video (CVBS) or S-Video.
· HDMI (High Definition Multimedia Interface) accepts 480p, 720p, or 1080i video and
audio in a digital TMDS format.

Detailed Signal flow (Figure 9)

The output of the Tuner is fed to the SAW filter, 1002, and then to 7200, Hercules, on Pins
104 and 105. The SVHS (YC) signals are combined inside 7200. IC 7200 selects between
AV1, AV2, Side, and Tuner composite video. The selected composite video is output on Pin
65. Video buffered by Transistor 7211 is fed to IC 7206 located on the Trident panel which
extracts Closed Caption text and Teletext information. This IC also generates the OSD (On
Screen Display). Video buffered by 7212 is fed to the Trident IC which has an internal 3-D
Comb Filter and A/D converter. IC 7201 rescales the picture to 1080i.

Component video is inserted into the YPbPr input located on the Family board. The HDMI
panel converts the HDMI signal into an analog YPbPr format. Both of these signals are fed to
the Switch, 7205 which selects between the two. The selected signal is fed to IC 7210 which
performs an A/D conversion. This 24 bit signal is fed to 7201. The Scaler (Trident IC) con-
verts the signal to a 1080i format as well as performing picture enhancement functions.
DRAM ICs 7215, 7216, 7217, and 7218 stores picture data for the Scaler as it is being
processed. And internal D/A conversion circuit outputs the 1080i signal is an RGB format on
Pins 27, 28 and 29. Horizontal and Vertical sync is output on Pins 34 and 35.

The RGB signal from the Scaler is fed to the TV Display Processor, 7221. RGB is output
from this IC to the CRT panel. Horizontal and Vertical drive is output to the Family board.

TV Display Processor (Refer to Figure 5)

IC 7221 is used in a large number of Philips chassis for a long period of time. RGB in insert-
ed in Pins 30, 31, and 32. This signals are converted to a YUV format before being fed to the
Color level control. RGB from 7206 is inserted on Pins 35, 36, 37, and 38. The signal then
goes to a Brightness and Controls control circuit. RGB to the CRT panel is output on Pins
40, 41, and 42. During warm up, a cathode calibration signal is fed to the CRT panel on the
RGB lines. This signal is then fed back to

Page 16
FIGURE 9 - DETAILED VIDEO SIGNAL FLOW BLOCK Page 17
CRT panel (Figure 10)

RGB is fed to the CRT panel on connector 1331. The CRT panel for the L05HD has a single
chip CRT drive circuit. RGB is fed to 7330 on Pins 1, 2, and 3. Signal is output to the CRT
on Pins 7, 8, and 9. BC_INFO or Cutoff on Pin 5 is fed back to the TV Signal Processor on
the Trident panel. The IC is powered by a 200 volt supply on Pin 6.

DC operating voltages for the CRT panel are located on connector 1351. The Filament volt-
age is located on Pin 2. The 200VA voltage on Pin 5 powers 7330. The VBAT voltage on
Pin 3 and the +12V_LOT voltage on Pin 6 powers the SVM circuit.

SVM (Figure 11)

There are two coils on the deflection coil in addition to the Vertical and Horizontal winding.
The SCAVEM coil (Scan Velocity Modulation) sharpens the edges between light and dark
transitions.

The SVM_ROT signal drives both the SCAVEM and the Rotation coil. The SCAVEM circuit is
powered by the Vbatt and +12V_LOT supplies. Capacitor 2376 blocks the dc Rotation signal
to prevent it from entering the SCAVEM circuit. Capacitor 2381 blocks the higher frequency
SCAVEM signal to prevent it from affecting the Rotation drive.

SVM Coil

Page 18
B1 CRT PANEL

AQUADAG
EHTinfo I352 3356 I357 1332 WIRE

10R
0330 +200VA
HEATSINK

D?

2330

100n

2334
TYPE

10n

BAV21

BAV21
6332
6333
CRT Sockets
7330 6 200V

BAV21
6331
188k7 1256 1254
1 1 Blue
I337 1 IN1 3k77 Vdd I330 5 5
OUT1 9 3333 3334 F338
2V5 G 6 6
3k75 A1
Vref BC1 156V 100R I333 1K0 I336 7 7 CRT
8 8
100R
4329
3329

188k7 3336 F339


9 9
Green
R 10 10
I338 2 IN2 3k77 Vdd
** 2V5
A2
OUT2 8
I331 3335 1K0 F340
11
12
11
12
3k75 BC2 156V 100R I334
Vref 2332
188k7

T0 CRT SOCKET
3332 F341 1n5 Red
B
I339 3 IN3 3k77 Vdd I332 3331 1K0
2V5 OUT3 7
3k75 A3
Vref BC3 156V 100R I335
FIGURE 10 - CRT PANEL

100R

100R
4328

3328

4330
3330

Vref I340
THERMAL BC1 5
2.5V
* * ** PROTECTION

GND
7V 6V
2333

1n0
4

2331

3357
10n

V
1331

GND_CRT
From 1202 of 1 F333

NOT USED
2 F332
3 I355
F331
4
F335 F334
5
of Trident Panel
BC_INFO *3337
9337 5 7 1

* T0 CRT SOCKET

2352

680p

2353

3n3
EHTinfo
3354

1K5

F356
I353

1352
REGION NAFTA
100R
9360
3360

SET 27VRF-HD FOCUS EHT


3328 --- VG2

** 3329
3330
---
---
3337 ---
3360 ---
1351 4328 JMP
F352 FROM LOT, MAIN CHASSIS LINE + FRAME DEFLECTION
1 4329 JMP
2 4330 JMP
From 1401 of Filament
3 9337 ---
F353
4 I351 3351 9360 JMP
F354
5 +200VA 4334
Line + Frame 6
2350 2351
7 100R
Deflection
47n 10u
Page 19

Vbatt
F351
+12V_LOT
SVM_ROT
REGION NAFTA
SET 27VRF-HD
4331 ---
I360 5331 1U0 PM10
3373
5361 100MHZ 50R
Vbatt

Page 20
9361 ---
8K2
4331

22n

2368
2363
* 5331

22u 100V
I341

1R8

3363
3364

820R
+12V_LOT * 1u0

2384

250V
I368

1n0

3361
3387
2361
2362

680R
*

47n
C 12V8 *
* E 97V3
B 7361
I361 BC847B 3365 I367
B 7363
7V8
10R 96V 2SA1358
E 7V5 I366
E 47V2
3388 I342 2364 5361 F361
I362 *
33R 4n7 400V 1361

8K2
3

3372
9361
* 2
TO

68K
1

3366
3371
2389
470R
I369 *
F363
SCAVEM COIL

10R

3362
F362

3377
6361

220R
1N4148
68K

3367
2367

2376 I344 C 47V3


F360
10u 100V

I345 3376
B1 SVM_ROT E 1V7 I365 I371
3389 I347 2365 3369
330R B 7364
100n I343 I364 2SC3421
B 33R 10R 0V5
4n7
2V3 E 7V5
7376 2385 E 0V
BC847B C I372
7362

3368
820R
B
7V2 BC857B

10n

1K8
3375
2387
7V2
*
C
1R8

3370

+12V_LOT

I363
I348

2391
100n
2390
10u 16V

3382 3392 3391


+12V_LOT
6K8 22K 150K 3390

FIGURE 11 - SVM AND ROTATION


150K

6381
3393
680K

UDZS-6V8
7331 1
TDA8941P
1381
F382
3
VCC

I381 3V8 3 2 8V2


IN+ OUT+ 2
F381
TO

6V7 5 7 10V8 1
3381 I380 IN- OUT-
4 6 6V8 I346
6K8 MODE SVR
ROTATION COIL

GND

6K8

3394
2381
100n
2382
100n
2383
100n

8
Audio (Figure 12)

All audio processing and control is performed by the Hercules IC 7200 located on the main
board.

Audio is included in the HDMI bit-stream. Digital audio from 7002 is fed to IC 7011, Audio
DAC. Audio from 7011 is fed to IC 7050, switch, which has only one input since the second
input is not used in the HD version. The output of 7050 is fed to the Hercules IC located on
the Main board. Audio for the CVI input should be inserted into AV1. Audio is output from the
Hercules on Pins 68 and 69 to the Audio Amplifier, IC 7990. This is a two channel 20 watt
amplifier.

Audio output

Main audio is output on Pins 68 and 69 and fed to the audio amplifier 7990. The audio ampli-
fier is a dual 10 watt amplifier. It is powered by the +VAUDIO and -VAUDIO supplies. These
are +16 and -16 volts. To mute the amplifier, the VOL_MUTE line goes Low switching tran-
sistor 7992 Off switching transistor 7991 On. The output of the amplifier is fed to the Side
Jack panel.

Monitor audio is output on Pins 66 and 67 of 7200. These outputs are muted by the
STBY_CONT and POWER DOWN lines. The POWER DOWN line is High during normal
operation. As the set powers off, this line goes Low, switching 7993 Off. Transistor 7104
then switches On to mute the output. The STBY_CONT line goes High when the set is

FIGURE 12 - AUDIO BLOCK Page 21


Page 22 FIGURE 13 - AUDIO OUTPUT
HEADPHONE

1 1232 1278
I166 4
1254 6 I170
3
5
3156 I168 2 TO
4 5 1 SPEAKERS
*

470pF
3

2178
F154
2 4
1
2
1279
3 3

470pF
2

2176
TO
7 1 ECO SUB
I162 3157 I171
8
I163
* 9

I169
3161

39K
2181

1u

FIGURE 14 - SIDE JACK PANEL

turned Off turning 7994 On, muting the output. Capacitor 2999 delays the turn-on of 7993 to
prevent a pop in the speaker at set turn On.

Side Jack panel (Figure 14)

The output of the audio amplifier is fed to the Headphone Jack located on the Side Jack
panel. The output to the speakers is switched Off when a headphone plug is inserted.

Finding the defective panel (Figures 15 and 16)

When troubleshooting the set, the defective panel requiring replacement or additional repair
must be located. The Power supplies, Deflection, 1fH inputs, and Audio outputs are located
on the Family board. The 2fH, CRT drive, and Deflection drive circuits are located on the
Trident board.

If the set turns On without a picture or sound, first check the power supplies located on the
Family board. If the set comes On, then shuts Off, there may be a problem with the shut-
down circuits which are located on the Family board. If the picture is missing, but sound and
high voltage are present, the problem may be located on the Trident panel.

Page 23
Wiring Diagram
Page 24

DEGAUSSING COIL

E TOP CONTROL PANEL


CRT
AQUADAG 16:9 EHT
1010 CRT
3P

FRAME
ROTATION
CRT PANEL
(component view) B 1340
5P
COIL

GREY
ORANGE

BLUE BROWN

RIGHT 1336
LEFT
SPEAKER SCAVEM SPEAKER
COIL
1352
CRT
SOCKET
1335
RED
BLACK B CRT PANEL BLACK
RED

1361 1351 1381


FIGURE 15 - CONNECTOR INTERCONNECT

3P 5P 3P

1693
1211

7P
2P MAINS
CORD

D 1281
1533

12P
3P

1504
SIDE 1252
2P
A/V PANEL +
7P

HEADPHONE
CVBS (YELLOW)
J FRONT INTERFACE
Warning: Some models have tact switch.
3P

1280
LEFT (WHITE)
MONO
RIGHT (RED) A MAINS
5P

1254 5P SWITCH
1280
CARRIER
1278
4P

HEADPHONE
1682

3P 1693

7P
1206
4P

1533
4P 12P 6P
1206 1221
1228 7P 1220 5P
1202
6P

1251 6P 6P
M HDMI PANEL 1222 1221
10P

10P

1251
1222
1404
6P

1250 2P 1223
12P

12P

1401

4P
1250
1207
5P
7P

1451
6P

1228
2P
4P

1223 1220
7P
LOT
TUNER

T TRIDENT PANEL

1005
3P
COMPAIR
CONNECTOR
FIGURE 16 - WIRING INTERCONNECT Page 25
SERVICE POSITION

Page 26
Service Alignment Mode SAM (Figure 17)

Making changes in the settings requires entering the SAM. To enter SAM, press 0 6 2 5 9 6
Info on the remote control. Use the cursor-up and cursor-down buttons to highlight a selec-
tion. Press the cursor-right, cursor-left buttons, or enter a value to make changes. Refer to
the Service manual for additional information on the SAM.

FIGURE 17 - SERVICE ALIGNMENT MODE

Page 27
Abbreviation list

Description

1080i 1080 visible lines, interlaced


1080p 1080 visible lines, progressive scan
480i 480 visible lines, interlaced
480p 480 visible lines, progressive scan
ADC A/D Analogue to Digital Converter
AFC Automatic Frequency Control: control signal used to tune to the correct
frequency
AGC Automatic Gain Control: algorithm that controls the video input of the
feature box
AM Amplitude Modulation
AV Audio Video
C-FRONT Chrominance front input
CBA Circuit Board Assembly (or PWB)
ComPair Computer aided rePair
CSM Customer Service Mode
CVBS Composite Video Blanking and Synchronization
CVBS-EXT CVBS signal from external source (VCR, VCD, etc.)
CVBS-INT CVBS signal from Tuner
CVBS-MON CVBS monitor signal
CVBS-TER-OUT CVBS terrestrial out
DAC Digital to Analogue Converter
DFU Directions For Use: owner's manual
DNR Dynamic Noise Reduction
DRAM Dynamic RAM
DSP Digital Signal Processing
DTS Digital Theatre Sound
DVD Digital Video Disc
EEPROM Electrically Erasable and Programmable Read Only Memory
EPLD Electronic Programmable Device
EXT EXTernal (source), entering the set by cinches (jacks)
FBL Fast Blanking: DC signal accompanying RGB signals
FLASH FLASH memory
FM Field Memory / Frequency Modulation
FMR FM Radio
FRC Frame Rate Converter
FRONT-C Front input chrominance (SVHS)
FRONT-DETECT Front input detection
FRONT-Y_CVBS Front input luminance or CVBS (SVHS)
H H_sync to the module
HD High Definition
HDMI High Definition Multimedia Interface
HP HeadPhone
I2C Integrated IC bus
I2S Integrated IC Sound bus

Page 28
IC Integrated Circuit
IF Intermediate Frequency
Interlaced Scan mode where two fields are used to form one frame. Each field contains
half the number of the total amount of lines. The fields are written in 'pairs',
causing line flicker.
IR Infra Red
IRQ Interrupt ReQuest
Last Status The settings last chosen by the customer and read and stored in RAM or in the
NVM. They are called at start-up of the set to configure it according the cus-
tomers wishes
LCD Liquid Crystal Display
LED Light Emitting Diode
LINE-DRIVE Line drive signal
LVDS Low Voltage Differential Signalling, data transmission system for high speed
and low EMI communication.
MPEG Motion Pictures Experts Group
NVM Non Volatile Memory: IC containing TV related data (for example, options)
OSD On Screen Display
Progressive Scan Scan mode where all scan lines are displayed in one frame at the same
time, creating a double vertical resolution.
RAM Random Access Memory
RC Remote Control transmitter
RC5 Remote Control system 5, the signal from the remote control receiver
RGB Red, Green, and Blue. The primary colour signals for TV. By mixing
levels of R, G, and B, all colors (Y/C) are reproduced.
RGBHV Red, Green, Blue, Horizontal sync, and Vertical sync
ROM Read Only Memory
SAM Service Alignment Mode
SIF Sound Intermediate Frequency
SC SandCastle: two-level pulse derived from sync signals
SCL CLock Signal on I2C bus
SDA DAta Signal on I2C bus
SDRAM Synchronous DRAM
SIF Sound Intermediate Frequency
STBY STandBY
VGA Video Graphics Array
XTAL Quartz crystal
YPbPr Component video (Y= Luminance, Pb/Pr= Colour difference signals)
Y/C Luminance (Y) and Chrominance (C) signal
Y-OUT Luminance-signal

Page 29

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