NXP LPC 23XX/24XX

Naeem Latif

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NXP LPC 23XX/24XX

NXP LPC
LPC is a family of 32-bit microcontroller integrated circuits by NXP Semiconductors (formerly Philips Semiconductors). The LPC chips are grouped into related series that are based around the same 32-bit ARM processor core, such as the Cortex-M4F, Cortex-M3, Cortex-M0+, or Cortex-M0. Internally, each microcontroller consists of the processor core, static RAM memory, flash memory, debugging interface, and various peripherals. The legacy LPC families were based on the 8-bit 80C51 core.

LPC2300
The LPC2300 series are based on the ARM7TDMI-S processor core. The LPC2364/66/68 and the LPC2378 are full-speed USB 2.0 devices with 2 CAN interfaces and 10/100 Ethernet MAC in LQFP100 and LQFP144 packages. Multiple peripherals are supported including a 10-bit 8-channel ADC and a 10bit DAC.

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Cores
ARM7 The original ARM7 was based on the earlier ARM6 design and used the same ARMv3 instruction set. The ARM710 variant was used in a CPU module for the Acorn Risc PC, and the first ARM based System on a Chip designs ARM7100 and ARM7500 used this core. ARM7TDMI The ARM7TDMI (ARM7+16 bit Thumb +j tag Debug + fast Multiplier + enhanced ICE) processor is a 32-bit RISC CPU designed by ARM, and licensed for manufacture by an array of semiconductor companies. In 2009 it remains one of the most widely used ARM cores, and is found in numerous deeply embedded system designs. Texas Instruments licensed the ARM7TDMI, which was designed into the Nokia 6110. The ARM7TDMI-S variant is the synthesizable core. ARM7EJ The ARM7EJ is a version of the ARM7 implementing the ARMv5TE instruction set originally introduced with the more powerful ARM9E core.

(ARM7)

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ARM architecture
ARM is a family of instruction set architectures for computer processors based on a reduced instruction set computing (RISC) architecture developed by British company ARM Holdings. A RISC-based computer design approach means ARM processors require significantly fewer transistors than typical processors in average computers. This approach reduces costs, heat and power use. These are desirable traits for light, portable, battery-powered devicesincluding smartphones, laptops, tablet and notepad computers), and other embedded systems. A simpler design facilitates more efficient multi-core CPUs and higher core counts at lower cost, providing higher processing power and improved energy efficiency for servers and supercomputers. ARM Holdings develops the instruction set and architecture for ARM-based products, but does not manufacture products. The company periodically releases updates to its cores. Current cores from ARM Holdings support a 32-bit address space and 32-bit arithmetic; the recently introduced ARMv8-A architecture adds support for a 64-bit address space and 64-bit arithmetic. Instructions for ARM Holdings' cores have 32-bit-wide fixed-length instructions, but later versions of the architecture also support a variable-length instruction set that provides both 32-bit and 16-bit-wide instructions for improved code density. Some cores can also provide hardware execution of Java bytecodes. ARM Holdings licenses the chip designs and the ARM instruction set architectures to third-parties, who design their own products that implement one of those architecturesincluding systems-on-chips (SoC) that incorporate memory, interfaces, radios, etc. Currently, the widely used Cortex cores, older "classic" cores, and specialized SecurCore cores variants are available for each of these to include or exclude optional capabilities. Companies that produce ARM products include Apple, Nvidia, Qualcomm, Samsung Electronics, and Texas Instruments. Apple first implemented the ARMv8-A architecture in the Apple A7 chip in the iPhone 5S.

Reduced instruction set computing

Reduced instruction set computing, or RISC /rsk/, is a CPU design strategy based on the insight that simplified (as opposed to complex) instructions can provide higher performance if this simplicity enables much faster execution of each instruction. A computer based on this strategy is a reduced instruction set computer, also called RISC. The opposing architecture is called complex instruction set computing, i.e. CISC. Various suggestions have been made regarding a precise definition of RISC, but the general concept is that of a system that uses a small, highly-optimized set of instructions, rather than a more specialized

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NXP LPC 23XX/24XX set of instructions often found in other types of architectures. Another common trait is that RISC systems use the load/store architecture, where memory is normally accessed only through specific instructions, rather than accessed as part of other instructions like add.

32-bit
In computer architecture, 32-bit integers, memory addresses, or other data units are those that are at most 32 bits (4 octets) wide. Also, 32-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 32-bit is also a term given to a generation of microcomputers in which 32-bit microprocessors are the norm. A 32-bit register can store 232 different values. The signed range of integer values that can be stored in 32 bits is -2147483648 through 2147483647 (unsigned: 0 through 4,294,967,295). Hence, a processor with 32-bit memory addresses can directly access 4 GiB of byte-addressable memory. The external address and data buses are often wider than 32 bits but both of these are stored and manipulated internally in the processor as 32-bit quantities. For example, the Pentium Pro processor is a 32-bit machine, but the external address bus is 36 bits wide, and the external data bus is 64 bits wide.

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Static random-access memory

Static random-access memory (SRAM) is a type of semiconductor memory that uses bistable latching circuitry to store each bit. The term static differentiates it from dynamic RAM (DRAM) which must be periodically refreshed. SRAM exhibits data remanence, but it is still volatile in the conventional sense that data is eventually lost when the memory is not powered.

Flash memory
Flash memory is an electronic non-volatile computer storage medium that can be electrically erased and reprogrammed. Flash memory developed from EEPROM (electrically erasable programmable read-only memory). There are two main types of flash memory, which are named after the NAND and NOR logic gates. The internal characteristics of the individual flash memory cells exhibit characteristics similar to those of the corresponding gates. Whereas EEPROMs had to be completely erased before being rewritten, NAND type flash memory may be written and read in blocks (or pages) which are generally much smaller than the entire device. The NOR type allows a single machine word (byte) to be written or read independently. The NAND type is primarily used in main memory, memory cards, USB flash drives, solid-state drives, and similar products, for general storage and transfer of data. The NOR type, which allows true random access and therefore direct code execution, is used as a replacement for the older EPROM and as an alternative to certain kinds of ROM applications, whereas NOR flash memory may emulate ROM primarily at the machine code level; many digital designs need ROM (or PLA) structures for other uses, often at significantly higher speeds than (economical) flash memory may achieve.[citation needed]

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NXP LPC 23XX/24XX NAND or NOR flash memory is also often used to store configuration data in numerous digital products, a task previously made possible by EEPROMs or battery-powered static RAM.

Example applications of both types of flash memory include personal computers, PDAs, digital audio players, digital cameras, mobile phones, synthesizers, video games, scientific instrumentation, industrial robotics, medical electronics, and so on. In addition to being non-volatile, flash memory offers fast read access times, as fast as dynamic RAM, although not as fast as static RAM or ROM. Its mechanical shock resistance helps explain its popularity over hard disks in portable devices, as does its high durability, being able to withstand high pressure, temperature, immersion in water, etc.

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