P400e Msata

Preliminary
P400e mSATA NAND Flash SSD Features
P400e mSATA NAND Flash SSD

MTFDDAT064MAR, MTFDDAT128MAR, MTFDDAT256MAR Features
Micron 25nm MLC NAND Flash RoHS-compliant package SATA 6 Gb/s interface ATA modes supported PIO mode 3, 4 Multiword DMA mode 0, 1, 2 Ultra DMA mode 0, 1, 2, 3, 4, 5 Industry-standard, 512-byte sector size support Native command queuing support with 32-command slot support ATA-8 ACS2 command set compliant ATA security feature command set and password login support Security erase (data page) command set: fast and secure erase Self-monitoring, analysis, and reporting technology (SMART) command set 64GB performance (steady state)1, 2 Sequential 64KB read: 440 MB/s Sequential 64KB write: 100 MB/s Random 4KB read: 59,000 IOPS Random 4KB write: 1500 IOPS Random 8KB read: 22,000 IOPS Random 8KB write: 750 IOPS Average READ latency: 1ms Average WRITE latency: 21ms 128GB performance (steady state)1, 2 Sequential 64KB read: 440 MB/s Sequential 64KB write: 170 MB/s Random 4KB read: 60,000 IOPS Random 4KB write: 2200 IOPS Random 8KB read: 27,000 IOPS Random 8KB write: 1150 IOPS Average READ latency: 0.5ms Average WRITE latency: 15ms 256GB performance (steady state)1, 2 Sequential 64KB read: 440 MB/s Sequential 64KB write: 240 MB/s Random 4KB read: 44,700 IOPS Random 4KB write: 2600 IOPS Random 8KB read: 31,800 IOPS Random 8KB write: 1450 IOPS Average READ latency: 0.7ms Average WRITE latency: 12ms Reliability 1 Mean time to failure (MTTF): 1.2 million device hours3 Static and dynamic wear leveling Uncorrectable bit error rate (UBER): <1 sector per 1015 bits read Low power consumption <200mW TYP Endurance: total bytes written (TBW) 72TB Capacity4 (unformatted): 64GB, 128GB, 256GB Mechanical: 5mm height mSATA connector: 3.3V 5% Caseless design: 50.80mm x 29.85mm x 3.75mm Weight: 10g (MAX) Field-updateable firmware Operating temperature Commercial (0C to +70C)5
Notes: 1. Typical I/O performance numbers as measured using Iometer with a queue depth of 32 and write cache disabled. 2. 4KB transfers used for READ/WRITE latency values. 3. The product achieves a MTTF based on population statistics not relevant to individual units. 4. 1GB = 1 billion bytes; formatted capacity is less. 5. Drive case temperature.
Warranty: Contact your Micron sales representative for further information regarding the product, including product warranties.
PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN
Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron to meet Microns production data sheet specifications.
Micron Technology, Inc. reserves the right to change products or specifications without notice. 2013 Micron Technology, Inc. All rights reserved.
Preliminary
P400e mSATA NAND Flash SSD Features Part Numbering Information

Microns P400e SSD is available in different configurations and densities. Visit micron.com for a list of valid part numbers. Figure 1: Part Number Chart
MT FD Micron Technology Product Family
FD = Flash drive
AT xxx M AM - 1
xx
ES Production Status
Blank = Production ES = Engineering sample
Operating Temperature Range Drive Interface

D = SATA 6.0 Gb/s Hardware Feature Set Blank = Commercial (0C to +70C)
Drive Form Factor

AT = mSATA
Blank = Null AA = Contact factory AB = Contact factory AC = Contact factory
Drive Density
064 = 64GB 128 = 128GB 256 = 256GB
Firmware Feature Set

Blank = Null 1 = Contact factory 2 = Contact factory
NAND Flash Type

M = MLC
Product Family
AR = P400e
BOM Revision
For example: 1 = 1st generation
Sector Size
1 = 512-byte
NAND Flash Component

J = 32Gb, MLC, x8, 3.3V (25nm) K = 64Gb, MLC, x8, 3.3V (25nm)
032 = 32GB 064 = 64GB 128 = 128GB 256 = 256GB
Preliminary
P400e mSATA NAND Flash SSD General Description
General Description
Microns solid state drive (SSD) uses a single-chip controller with a SATA interface on the system side and n-channels of Micron NAND Flash internally. Packaged in an JEDEC-standard mSATA form factor, the SSD integrates easily in existing storage infrastructures. The SSD is designed to use the SATA interface efficiently during both reads and writes while delivering bandwidth-focused performance. SSD technology enables enhanced boot times, faster application load times, reduced power consumption, and extended reliability. Figure 2: Functional Block Diagram
NAND SATA
SSD controller
NAND NAND
NAND NAND
DRAM buffer
Preliminary
P400e mSATA NAND Flash SSD Logical Block Address Configuration
Logical Block Address Configuration

The drive is set to report the number of logical block addresses (LBA) that will ensure sufficient storage space for the specified density. Standard LBA settings, based on the IDEMA standard (LBA1-02), are shown below. Table 1: Standard LBA Settings
Total LBA Drive Size 64GB 128GB 256GB Decimal 125,045,424 250,069,680 500,118,192 Hexadecimal 7740AB0 EE7C2B0 1DCF32B0 Decimal 125,045,423 250,069,679 500,118,191 Max LBA Hexadecimal 7740AAF EE7C2AF 1DCF32AF User Available Bytes (Unformatted) 64,023,257,088 128,035,676,160 256,186,209,271
Physical Configuration
Table 2: mSATA Dimensions and Weight
Value Specification Height Width Length Unit weight Nom 29.85 50.80 Max 3.75 10 Unit mm mm mm g
Preliminary
P400e mSATA NAND Flash SSD Interface Connectors
Interface Connectors
Figure 3: SSD Interface Connections
Primary side Secondary side
P1
P17 P15
P51
P52
P18 P2 P16
Table 3: Signal Assignments

Primary Side Pin # 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 Signal Name Reserved Reserved Reserved Reserved GND Reserved Reserved GND Reserved Reserved GND +B -B GND GND -A +A GND GND 3V3 3V3 NC Optional Optional DA/DSS Presence Description No connect No connect No connect No connect Ground No connect No connect Ground No connect No connect Ground Differential signal pair +B and -B Ground Ground Differential signal pair +A and -A Ground Ground +3.3V +3.3V No connect No connect No connect Drive activity LED Presence detection Pin # 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 Secondary Side Signal Name 3V3 GND 1V5 Reserved Reserved Reserved Reserved Reserved GND Reserved Reserved 3V3 GND 1V5 TWI TWI GND Reserved Reserved GND Reserved Reserved Reserved 1V5 GND 3V3 Ground No connect No connect Ground No connect No connect No connect No connect Ground +3.3V Description +3.3V Ground No connect No connect No connect No connect No connect No connect Ground No connect No connect +3.3V Ground No connect Two-wire interface
Preliminary
P400e mSATA NAND Flash SSD Performance
Performance
Measured performance can vary for a number of reasons. The major factors affecting drive performance are the density of the drive and the interface of the host. Additionally, overall system performance can affect the measured drive performance. When comparing drives, it is recommended that all system variables are the same, and only the drive being tested varies. Performance numbers will vary depending on the host system configuration. Table 4: Drive Performance
Density Interface Speed Sequential read (64KB transfer) Sequential write (64KB transfer) Random read (4KB transfer) Random write (4KB transfer) Random read (8KB transfer) Random write (8KB transfer) READ latency WRITE latency Notes: 64GB 6 Gb/s 440 100 59,000 1,500 22,000 750 1 21 128GB 6 Gb/s 440 170 60,000 2,200 27,000 1,150 0.5 15 256GB 6 Gb/s 440 240 44,700 2,600 31,800 1,450 0.7 12 Unit MB/s MB/s IOPS IOPS IOPS IOPS ms ms
1. Typical I/O performance numbers as measured using Iometer with a queue depth of 32 and write cache enabled. 2. 4KB transfers used for READ/WRITE latency values. 3. System variations may affect measured results.
Preliminary
P400e mSATA NAND Flash SSD Reliability
Reliability
Microns SSDs incorporate advanced technology for defect and error management. They use various combinations of hardware-based error correction algorithms and firmware-based static and dynamic wear-leveling algorithms. Over the life of the SSD, uncorrectable errors may occur. An uncorrectable error is defined as data that is reported as successfully programmed to the SSD but when it is read out of the SSD, the data differs from what was programmed. Table 5: Uncorrectable Bit Error Rate
Uncorrectable Bit Error Rate <1 sector per 1015 bits read Operation READ
Mean Time to Failure

Mean time to failure (MTTF) for the SSD can be predicted based on the component reliability data using the methods referenced in the Telcordia SR-332 reliability prediction procedures for electronic equipment. Table 6: MTTF
Density All Note: MTTF (Operating Hours)1 1.2 million
1. The product achieves an MTTF of 1.2 million hours based on population statistics not relevant to individual units.
Endurance
Endurance for the SSD can be predicted based on the usage conditions applied to the device, the internal NAND component cycles, the write amplification factor, and the wear-leveling efficiency of the drive. The table below shows the drive lifetime for each SSD density based on predefined usage conditions. Table 7: Drive Lifetime
Density 64GB 128GB 256GB Note: Drive Lifetime (Total Bytes Written) 72TB 72TB 72TB
1. Access patterns are 50% sequential and 50% random and consist of the following: 5% are 4KB; 5% are 8KB; 10% are 16KB; 10% are 32KB; 35% are 64KB; and 35% are 128KB.
Preliminary
P400e mSATA NAND Flash SSD Electrical Characteristics
Electrical Characteristics
Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Table 8: mSATA Power Consumption
Density All Notes: Idle Average <85 Active Average 160 Sequential Write/Read Maximum (128KB transfer) 4000 2200 Unit mW
1. Data taken at 25C using a 6 Gb/s SATA interface. 2. Sequential power measured in IOMETER MAX with 128KB transfer size.
Table 9: Maximum Ratings

Parameter/Condition Voltage input Operating temperature Non-operating temperature Rate of temperature change Relative humidity (non-condensing) Notes: Symbol 3V3 TC Min 3.14 0 40 5 Max 3.46 70 85 20 95 Unit V C C C/hour %
1. Temperature is best measured with a thermocouple attached to the center point of the drive controller ASIC package. This is the larger package closest to the interface connector on the primary side. Refer to Package Dimensions for details. 2. Supply voltage slew rate during asynchronous power-down should follow a slope of no steeper than 60 mV/ms. 3. Poweroff sequence: When the Micron SSD is shut down, the ATA STANDBY IMMEDIATE (STBI) command should be the last command sent by the host and acknowledged by the SSD. Failure to follow this process could result in a longer than normal time-to-ready (TTR) during the subsequent power-on sequence. TTR is the time from power-on to drive ready to accept SATA commands.
Table 10: Shock and Vibration

Parameter/Condition Operating shock Operating vibration Specification 1500G/1.0ms 2500Hz at 3.1G
Preliminary
P400e mSATA NAND Flash SSD Device ID
Device ID
Table 11: Identify Device
See Note 1 for setting definitions Word Bit(s) Setting 0 15 148 7 6 53 2 1 0 1 2 3 4 6 7 9 10 20 23 27 47 158 70 F F F F (O)V ( )X (M)F ( )X (M)F (M)F F F F X F F X V X F Default Value 0b 0000100b 0b 1b 000b 0b 0b 0b 3FFFh C837h 0010h 0000h 0000h 003Fh 0000h 0000h 0000h Varies 0000h 0000h 0000h Varies Varies 80h 10h Description General configuration bit-significant information 0 = ATA device Retired 1 = removable media device Obsolete Retired Response incomplete Retired Reserved Obsolete Specific configuration Obsolete Retired Obsolete Reserved for assignment by the CompactFlash Association Retired Serial number (20 ASCII characters) Retired/obsolete Firmware revision (8 ASCII characters) Model number (40 ASCII characters) 80h 00h = Reserved 01h-FFh = Maximum number of logical sectors that shall be transferred per DRQ data block on READ/WRITE MULTIPLE commands Trusted Computing feature set options Shall be cleared to zero Shall be set to one 1 = Trusted Computing feature set is supported
48
15 14 131 0
F F F F
0b 1b 0b
0000000000000b Reserved for the Trusted Computing Group
Preliminary

Table 11: Identify Device (Continued)
See Note 1 for setting definitions Word Bit(s) Setting 49 1514 13 12 11 10 9 8 70 50 15 14 132 1 0 51 53 153 2 1 0 54 F F F F F F F F F F X F ( )X F F F X ( )X Default Value 00b 1b 0b 1b 1b 1b 1b 00000000b 0b 1b 000000000000b 0b 1b 0000h 0000h 1b 1b 1b 3FFFh 0010h 003Fh FC10h 00FBh 0b 0b 0b 0b 000b 1b 00010000b Description Capabilities Reserved for the IDENTIFY PACKET DEVICE command 1 = Standby timer values as specified in this standard are supported 0 = Standby timer values shall be managed by the device Reserved for the IDENTIFY PACKET DEVICE command 1 = IORDY is supported 0 = IORDY may be supported 1 = IORDY may be disabled 1 = LBA is supported 1 = DMA is supported Retired Capabilities Shall be cleared to zero Shall be set to one Reserved Obsolete Shall be set to one to indicate a vendor-specific standby timer value minimum Obsolete 1 = The fields reported in word 88 are valid 0 = The fields reported in word 88 are not valid 1 = The fields reported in words (70:64) are valid 0 = The fields reported in words (70:64) are not valid Obsolete Obsolete
0000000000000b Reserved
59
15 14 13 12 119 8 70
F F F F F V V
1 = The BLOCK ERASE EXT command is supported 1 = The OVERWRITE EXT command is supported 1 = The CRYPTO SCRAMBLE EXT command is supported 1 = The Sanitize feature set is supported Reserved 1 = Multiple sector setting is valid xxh = Current setting for number of logical sectors that shall be transferred per DRQ data block on READ/WRITE MULTIPLE commands
60
M(F)
Varies by capacity Total number of user addressable logical sectors
10
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 62 63 1511 10 9 8 73 2 1 0 64 65 66 158 70 ()X F V V V F F F F F F F F Default Value 0000h 00000b 0b 0b 0b 0000b 1b 1b 1b 00h 03h 0078h 0078h Description Obsolete Reserved 1 = Multiword DMA mode 2 is selected 0 = Multiword DMA mode 2 is not selected 1 = Multiword DMA mode 1 is selected 0 = Multiword DMA mode 1 is not selected 1 = Multiword DMA mode 0 is selected 0 = Multiword DMA mode 0 is not selected Reserved 1 = Multiword DMA mode 2 and below are supported 1 = Multiword DMA mode 1 and below are supported 1 = Multiword DMA mode 0 is supported Reserved PIO modes are supported Minimum Multiword DMA transfer cycle time per word Cycle time in nanoseconds Manufacturer's recommended Multiword DMA transfer cycle time Cycle time in nanoseconds Minimum PIO transfer cycle time without flow control Cycle time in nanoseconds Minimum PIO transfer cycle time with IORDY flow control Cycle time in nanoseconds Additional supported 0b 1b 0b 0b 0b 0b 0b 0b 0b 0b 0b 00000b 0000h 1 = CFast specification is supported 1 = Deterministic read after trim is supported 1 = Long physical sector alignment error reporting control is supported 1 = DEVICE CONFIGURATION IDENTIFY DMA and DEVICE CONFIGURATION SET DMA are supported 1 = READ BUFFER DMA is supported 1 = WRITE BUFFER DMA is supported 1 = SET MAX PASSWORD DMA and SET MAX UNLOCK DMA are supported 1 = DOWNLOAD MICROCODE DMA is supported Reserved for IEEE-1667 1 = Optional ATA device 28-bit commands are supported 1 = Read zero after trim is supported Reserved Reserved
67 68 69
15 14 13 12 11 10 9 8 7 6 5 40
F F F F F F F F F F F F F F F F
0078h 0078h
70
11
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 71 75 155 40 76 1513 12 11 10 9 8 74 3 2 1 0 77 156 5 4 31 0 78 157 6 5 4 3 2 1 0 F F F F F F F F F F F F F F F F F V F F F F F F F F F Default Value 0000h 0000h 0000h 0000h 00000000000b 11111b 000b 1b 0b 1b 1b 1b 0000b 1b 1b 1b 0b 0000000000b 0b 0b 010b 0b 000000000b 1b 0b 0b 1b 1b 0b 0b Description Reserved for the IDENTIFY PACKET DEVICE command Queue depth Reserved Maximum queue depth - 1 Serial ATA Capabilities Reserved Native command queuing priority information is supported Unload while NCQ commands outstanding is supported Physical event counters are supported Receipt of host-initiated interface power management requests is supported Native command queuing is supported Reserved for future serial ATA signaling speed grades 1 = Serial ATA Gen-3 speed (6.0 Gb/s) is supported 1 = Serial ATA Gen-2 speed (3.0 Gb/s) is supported 1 = Serial ATA Gen-1 speed (1.5 Gb/s) is supported Reserved (set to 0) Serial ATA Additional capabilities Reserved for future Serial ATA definition NCQ QUEUE MANAGEMENT command is supported NCQ streaming is supported Coded value indicating current negotiated serial ATA signal speed Shall be cleared to zero Serial ATA features are supported Reserved 1 = Software settings preservation is supported Reserved 1 = In-order data delivery is supported 1 = Dev initiate interface power management is supported 1 = DMA setup auto-activate optimization is supported 1 = Non-zero buffer offsets in DMA setup FIS are supported Reserved (set to 0)
12
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 79 157 6 5 4 3 2 1 0 80 1510 9 8 7 6 5 4 3 2 1 0 81 V V V V V V V V F F F F F F F F S S F F Default Value 000000000b 1b 0b 0b 0b 0b 0b 0b 000000b 1b 1b 1b 1b 1b 1b 1b 0b 0b 0b 0028h Description Serial ATA features are enabled Reserved 1 = Software settings preservation is enabled 1 = Asynchronous notification is enabled 1 = In-order data delivery is enabled 1 = Device initiating interface power management is enabled 1 = DMA setup auto-activate optimization is enabled 1 = Non-zero buffer offsets in DMA Setup FIS are enabled Reserved (set to 0) Major revision number Reserved 1 = ATA8-ACS2 is supported 1 = ATA8-ACS is supported 1 = ATA/ATAPI-7 is supported 1 = ATA/ATAPI-6 is supported 1 = ATA/ATAPI-5 is supported 1 = ATA/ATAPI-4 is supported Obsolete Obsolete Obsolete Reserved Minor revision number 0028h = ATA8-ACS version 6
13
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 82 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 83 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X F F F X F F F F F F F F F F F F F F F F F F F F F F F F F F F Default Value 0b 1b 1b 1b 0b 1b 0b 0b 0b 1b 1b 0b 1b 0b 1b 1b 0b 1b 1b 1b 1b 1b 0b 1b 0b 0b 0b 0b 1b 0b 0b 1b Description Command set is supported Obsolete 1 = NOP command is supported 1 = READ BUFFER command is supported 1 = WRITE BUFFER command is supported Obsolete 1 = Host-protected area feature set is supported 1 = DEVICE RESET command is supported 1 = Service interrupt is supported 1 = Release interrupt is supported 1 = Read look-ahead is supported 1 = Write cache is supported Shall be cleared to zero to indicate that the packet feature set is not supported 1 = Mandatory power management feature set is supported Obsolete 1 = Security feature set is supported 1 = SMART feature set is supported Command set is supported Shall be cleared to zero Shall be set to one 1 = FLUSH CACHE EXT command is supported 1 = Mandatory FLUSH CACHE command is supported 1 = Device configuration overlay feature set is supported 1 = 48-bit address feature set is supported 1 = Automatic acoustic management feature set is supported 1 = SET MAX security extension is supported See Address Offset Reserved Area Boot INCITS TR27:2001 1 = SET FEATURES subcommand is required to spin-up after power-up 1 = Power-up in standby feature set is supported Obsolete 1 = Advanced power management feature set is supported 1 = CFA feature set is supported 1 = READ/WRITE DMA QUEUED is supported 1 = DOWNLOAD MICROCODE command is supported
14
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 84 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 85 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 F F F F F F F F F F F F F F F X F F F X V F V V V V F F F V V Default Value 0b 1b 1b 0b 0b 00b 1b 0b 1b 1b 0b 0b 0b 1b 1b 0b 1b 1b 1b 0b 1b 0b 0b 0b 1b 0b 0b 1b 0b 0b 1b Description Command set/feature-supported extension Shall be cleared to zero Shall be set to one 1 = IDLE IMMEDIATE with UNLOAD FEATURE is supported Reserved for technical report INCITS TR-37-2004 (TLC) Reserved for technical report INCITS TR-37-2004 (TLC) Obsolete 1 = 64-bit word wide name is supported 1 = WRITE DMA QUEUED FUA EXT command is supported 1 = WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT commands are supported 1 = General purpose logging feature set is supported 1 = Streaming feature set is supported 1 = Media card pass through command feature set is supported 1 = Media serial number is supported 1 = SMART self-test is supported 1 = SMART error logging is supported Command set/feature is enabled Obsolete 1 = NOP command is supported 1 = READ BUFFER command is supported 1 = WRITE BUFFER command is supported Obsolete 1 = Host protected area feature set is enabled 1 = DEVICE RESET command is supported 1 = Service interrupt is enabled 1 = Release interrupt is enabled 1 = Look-ahead is enabled 1 = Write cache is enabled Shall be cleared to zero to indicate that the packet feature set is not supported Power management feature set is enabled Obsolete 1 = Security mode feature set is enabled 1 = SMART feature set is enabled
15
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 86 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 87 15 14 13 12 11 109 8 7 6 5 4 3 2 1 0 F F F F F V F F F V V V F F F F F F V V F F F F F V V V F F Default Value 1b 0b 1b 1b 1b 1b 0b 0b 0b 0b 0b 0b 1b 0b 0b 1b 0b 1b 1b 0b 0b 00b 1b 0b 1b 1b 0b 0b 0b 1b 1b Description Command set/feature is enabled 1 = Words 120-119 are valid 1 = Reserved 1 = FLUSH CACHE EXT command is supported 1 = FLUSH CACHE command is supported 1 = Device configuration overlay is supported 1 = 48-bit address feature set is supported 1 = Automatic acoustic management feature set is enabled 1 = SET MAX security is enabled by SET MAX SET PASSWORD Reserved for address offset reserved area boot, INCITS TR27:2001 1 = SET FEATURES subcommand is required to spin-up after power-up 1 = Power-up in standby feature set is enabled Obsolete 1 = Advanced power management feature set is enabled 1 = CFA feature set is supported 1 = READ/WRITE DMA QUEUED command is supported 1 = DOWNLOAD MICROCODE command is supported Command set/feature is enabled/supported Shall be cleared to zero Shall be set to one 1 = IDLE IMMEDIATE with UNLOAD FEATURE is supported Reserved for technical report INCITS tr-37-2004 (TLC) Reserved for technical report INCITS TR-37-2004 (TLC) Obsolete 1 = 64-bit word wide name is supported 1 = WRITE DMA QUEUED FUA EXT command is supported 1 = WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT commands are supported 1 = General purpose logging feature set is supported Obsolete 1 = Media card pass through command feature set is supported 1 = Media serial number is valid 1 = SMART self-test is supported 1 = SMART error logging is supported
16
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 88 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 89 90 91 92 (O)F (O)F (O)V (O)V Default Value 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 0b 1b 1b 1b 1b 1b 1b 0001h 0001h 00FEh FFFEh Description Ultra DMA modes Reserved 1 = Ultra DMA mode 6 is selected 0 = Ultra DMA mode 6 is not selected 1 = Ultra DMA mode 5 is selected 0 = Ultra DMA mode 5 is not selected 1 = Ultra DMA mode 4 is selected 0 = Ultra DMA mode 4 is not selected 1 = Ultra DMA mode 3 is selected 0 = Ultra DMA mode 3 is not selected 1 = Ultra DMA mode 2 is selected 0 = Ultra DMA mode 2 is not selected 1 = Ultra DMA mode 1 is selected 0 = Ultra DMA mode 1 is not selected 1 = Ultra DMA mode 0 is selected 0 = Ultra DMA mode 0 is not selected Reserved 1 = Ultra DMA mode 6 and below are supported 1 = Ultra DMA mode 5 and below are supported 1 = Ultra DMA mode 4 and below are supported 1 = Ultra DMA mode 3 and below are supported 1 = Ultra DMA mode 2 and below are supported 1 = Ultra DMA mode 1 and below are supported 1 = Ultra DMA mode 0 is supported Time required for security erase unit completion Time required for enhanced security erase completion Current advanced power management value Master password revision code
17
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 93 15 14 13 Default Value 0b 0b 0b Description Shall be 0000h for SATA devices Shall be cleared to zero Shall be set to one 1 = Device detected CBLID-above VIH 0 = Device detected CBLID-below VIL Device 1 hardware reset result Device 0 shall clear these bits to zero Device 1 shall set these bits as follows: Reserved 0 = Device 1 did not assert PDIAG1 = Device 1 asserted PDIAG These bits indicate how device 1 determined the device number: 00 = Reserved 01 = A jumper was used 10 = The CSEL signal was used 11 = Some other method was used or the method is unknown Shall be set to one Device 0 hardware reset result. Device 1 shall clear these bits to zero. Device 0 shall set these bits as follows: 0b 0b 0b 0b 0b 00b Reserved 0 = Device 0 does not respond when device 1 is selected 1 = Device 0 responds when device 1 is selected 0 = Device 0 did not detect the assertion of DASP 1 = Device 0 detected the assertion of DASP 0 = Device 0 did not detect the assertion of PDIAG 1 = Device 0 detected the assertion of PDIAG 0 = Device 0 failed diagnostics 1 = Device 0 passed diagnostics These bits indicate how device 0 determined the device number: 00 = Reserved 01 = A jumper was used 10 = The CSEL signal was used 11 = Some other method was used or the method is unknown Shall be set to one Vendor's recommended acoustic management value Current automatic acoustic management value Stream minimum request size
12 11 109
0b 0b
0b
7 6 5 4 3 21
0 94 95 158 70
F V (O)V
0b 00h 00h 0000h
18
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 96 97 98 100 104 105 106 15 14 13 12 114 30 107 108 109 110 111 112 116 117 119 1512 110 154 30 15 14 136 5 4 3 2 1 0
Default Value 0000h 0000h 0000h 0000h 0000h 0008h 0b 1b 0b 0b 00000000b 0000b 0000h 0101b 000000001010b 000001110101b Varies Varies Varies 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0b 1b 00000001b 0b 1b 1b 1b 1b 0b
Description Streaming transfer time DMA Streaming access latency DMA and PIO Streaming performance granularity (98-99) Streaming transfer time PIO Maximum number of 512-byte blocks of LBA range entries per DATA SET MANAGEMENT command Physical sector size/logical sector size Shall be cleared to zero Shall be set to one 1 = Device has multiple logical sectors per physical sector 1 = Device logical sector longer than 256 words Reserved 2^x logical sectors per physical sector Interseek delay for ISO-7779 acoustic testing in microseconds NAA (3-0) IEEE OUI (23-12) IEEE OUI (11-0) Unique ID (35-32) 5-0 unique ID (31-16) Unique ID (15-0) Reserved for 128-bit world wide name extension to 128 bits Reserved for INCITS TR-37-2004 Words per logical sector Commands and feature sets are supported (continued from words 84-82) Shall be cleared to zero Shall be set to one Reserved 1 = Free-fall control feature set is supported 1 = The DOWNLOAD MICROCODE command with mode 3 is supported 1 = READ LOG DMA EXT and WRITE LOG DMA EXT commands are supported 1 = WRITE UNCORRECTABLE EXT command is supported 1 = Write-read-verify feature set is supported Reserved for DDT
(O)V (O)V (O)F V (O)V ( )F F F F F F F (O)F F F (M)F (M)F (O)F (O)V (O)F F F F F F F F F F
Varies by capacity Maximum user LBA for 48-bit address feature set
19
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 120 15 14 136 5 4 3 2 1 0 Default Value 0b 1b 00000000b 0b 1b 1b 1b 0b 0b Description Commands and feature sets are supported or enabled (continued from words 87-85) Shall be cleared to zero Shall be set to one Reserved 1 = Free-fall control feature set is enabled 1 = DOWNLOAD MICROCODE command with mode 3 is supported 1 = READ LOG DMA EXT and WRITE LOG DMA EXT commands are supported 1 = WRITE UNCORRECTABLE EXT command is supported 1 = Write-read-verify feature set is enabled 1= Disable data transfer after error detection feature set is enabled 0 = Disable data transfer after error detection feature set is disabled Reserved for expanded supported and enabled settings
121
0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000000b 0b 00b 1b 0b 0b 0b 0b 1b Vendor-specific data 0b 0b 0b 0b 000000000000b
127 128
159 8 76 5 4 3 2 1 0
(O) F V F F V V V V F ( )X F F F V F
Obsolete Security status Reserved Security level 0 = High, 1 = Maximum Reserved 1 = Enhanced security erase is supported 1 = Security count is expired 1 = Security is frozen 1 = Security is locked 1 = Security is enabled 1 = Security is supported Vendor-specific CFA power mode 1 Word 160 is supported Reserved CFA power mode 1 is required for one or more commands implemented by the device CFA power mode 1 is disabled Maximum current in ma
129 160
15 14 13 12 110
20
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 161 X Default Value 0000h 0000h 0000h 0000h 0000h 0000h 0000h 000h 3h Description Reserved for assignment by the CompactFlash Association
168 169
154 3-0 151 0
F F F F F F (O)V X F F F F F F F ( )F (O) F F F (O)V (O)F
Reserved Device nominal form factor DATA SET MANAGEMENT command is supported
000000000000000 Reserved b 1b 0000h 0000h 0000h 0000h 0000h 0000h Varies 0000b 000000b 1b 1b 1b 1b 0b 1b 0000h 0000h 0b 1b 1 = The trim bit in the DATA SET MANAGEMENT command is supported Additional product identifier Reserved Current media serial number (60 ASCII characters) SCT command transport Vendor-specific Reserved SCT command transport data tables is supported SCT command transport features control is supported SCT command transport error recovery control is supported SCT command transport write same is supported SCT command transport long sector access is supported SCT command transport is supported Reserved for CE-ATA Alignment of logical blocks within a larger physical block Shall be cleared to zero Shall be set to one
170 174 176 206
1512 116 5 4 3 2 1 0
207 209
15 14 130
00000000000000b Logical sector offset within the first physical sector where the first logical sector is placed 0000h 0000h 0000h 0001h Write-read-verify sector count mode 3 only Verify sector count mode 2 only
210 212
21
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 214 1512 118 75 4 32 1 0 215 216 217 218 219 158 70 220 221 222 158 70 1512 116 5 4 3 2 1 0 223 224 (O) F F F V F V F (O)V (O)V (M)F (O)V F F F V (M)F ( )F Default Value 0000b 0000b 000b 0b 00b 0b 0b 0000h 0000h 0001h 0000h 00h 00h 00h 00h 0000h 0001b 000000b 1b 1b 1b 1b 1b 1b 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0001h Description NV cache capabilities NV cache feature set version NV cache power mode feature set version Reserved 1 = NV cache feature set is enabled Reserved 1 = NV Cache power mode feature set is enabled 1 = NV Cache power mode feature set is supported NV cache size in logical blocks (LSW) NV cache size in logical blocks (MSW) Nominal media rotation rate (ATA8-ACS 1699-D revision 6) NV cache read transfer speed in MB/s (ATA8-ACS 1699-D revision 3f) NV cache write transfer speed in MB/s NV cache options Reserved Device estimated time to spin up in seconds Reserved Write-read-verify feature set current mode Reserved Transport major revision number. 0000h or FFFFh = Device does not report version Transport type - 0 = Parallel, 1 = Serial, 2-15 = Reserved Parallel (type = 0) Serial (type = 1) Reserved Reserved SATA rev 3.0 Reserved SATA rev 2.6 Reserved SATA rev 2.5 Reserved SATA II: Extensions Reserved SATA 1.0a ATA8-APT ATA8-AST Transport minor revision number Reserved for CE-ATA
234
(O)F
Minimum number of 512-byte units per DOWNLOAD MICROCODE command for mode 3
22
Preliminary

See Note 1 for setting definitions Word Bit(s) Setting 235 236 Default Value 00FFh 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h Varies A5h Description Maximum number of 512-byte units per DOWNLOAD MICROCODE command for mode 3 Reserved
255
158 70 Note:
(M)F
Integrity word Checksum Signature
1. F = The content of the word is fixed and does not change. V = The content of the word is variable and may change depending on the state of the device or the commands executed by the device. X = The content of the word may be fixed or variable. R = The content of the word is reserved and will be zero.
23
Preliminary
P400e mSATA NAND Flash SSD Commands
Commands
Table 12: Supported ATA Command Set
See ATA-8 standard for command details Command Name CHECK POWER MODE DEVICE CONFIGURATION RESTORE DEVICE CONFIGURATION FREEZE LOCK DEVICE CONFIGURATION IDENTIFY DEVICE CONFIGURATION SET DOWNLOAD MICROCODE EXECUTE DEVICE DIAGNOSTIC FLUSH CACHE FLUSH CACHE EXT IDENTIFY DEVICE IDLE IDLE IMMEDIATE INITIALIZE DEVICE PARAMETERS NOP READ BUFFER READ DMA (with retry) READ DMA (without retry) READ DMA EXT READ FPDMA QUEUED READ LOG EXT READ MULTIPLE READ MULTIPLE EXT READ NATIVE MAX ADDRESS READ NATIVE MAX ADDRESS EXT READ SECTOR(S) EXT READ SECTOR(S) (with retry) READ SECTOR(S) (without retry) READ VERIFY SECTOR EXT READ VERIFY SECTOR(S) (with retry) SCT WRITE SAME Command Code (hex) 98h or E5h B1h/C1h B1h/C3h B1h/C1h B1h/C3h 92h 90h E7h EAh ECh E3h or 97h E1h or 95h 91h 00h E4h C8h C9h 25h 60h 2Fh C4h 29h F8h 27h 24h 20h 21h 42h 40h 02h/0001h 02h/0002h 02h/0101h 02h/0102h 030h/01h 03h/01h 04h/01h 04h/02h
SCT RETURN ERROR RECOVERY CONTROL SCT SET ERROR RECOVERY CONTROL SCT SET FEATURE CONTROL SCT RETURN FEATURE CONTROL
24
Preliminary

Table 12: Supported ATA Command Set (Continued)
See ATA-8 standard for command details Command Name SCT RETURN FEATURE OPTION FLAG SCT RETURN SCT DATA TABLE SECURITY DISABLE PASSWORD SECURITY ERASE PREPARE SECURITY ERASE UNIT SECURITY FREEZE LOCK SECURITY SET PASSWORD SECURITY UNLOCK SEEK SET FEATURES SET MAX ADDRESS SET MAX FREEZE LOCK SET MAX LOCK SET MAX ADDRESS EXT SET MULTIPLE MODE SET MAX SET PASSWORD SET MAX UNLOCK SLEEP SMART DISABLE OPERATIONS SMART ENABLE OPERATIONS SMART ENABLE/DISABLE AUTOSAVE SMART EXECUTE OFF-LINE IMMEDIATE SMART READ DATA SMART READ LOG SECTOR SMART RETURN STATUS SMART WRITE LOG STANDBY STANDBY IMMEDIATE WRITE BUFFER WRITE DMA (with retry) WRITE DMA (without retry) WRITE DMA EXT WRITE DMA FUA EXT WRITE FPDMA QUEUED WRITE LOG EXT WRITE MULTIPLE WRITE MULTIPLE EXT Command Code (hex) 04h/03h 05h/01h F6h F3h F4h F5h F1h F2h 7xh EFh F9h F9h/04h F9h/02h 37h C6h F9h/01h F9h/03h E6h or 99h B0h/D9h B0h/D8h B0h/D2h B0h/D4h B0h/D0h B0h/D5h B0h/DAh B0h/D6h E2h or 96h E0h or 94h E8h CAh CBh 35h 3Dh 61h 3Fh C5h 39h
25
Preliminary

Table 12: Supported ATA Command Set (Continued)
See ATA-8 standard for command details Command Name WRITE MULTIPLE FUA EXT WRITE SECTOR(S) (with retry) WRITE SECTOR(S) EXT WRITE UNCORRECTABLE EXT Command Code (hex) CEh 30h 34h 45h
26
Preliminary
P400e mSATA NAND Flash SSD Compliance
Compliance
Micron SSDs comply with the following: RoHS CE (Europe): EN55022, 2006 + A1:2007 and EN55024, 1998 + A1:2001 + A2:2003 FCC: CFR Title 47, Part 15 Class B UL/cUL: approval to UL-60950-1, 2nd Edition, IEC 60950-1:2005 (2nd Edition); Am 1:2009, EN 60950-1 (2006) + A11:2009+ A1:2010 + A12:2011 BSMI (Taiwan): approval to CNS 13438 C-TICK (Australia, New Zealand): approval to AS/NZS CISPR22 KCC RRL (Korea): approval to KCC-REM-MU2-C40018 W.E.E.E.: Compliance with EU WEEE directive 2002/96/EC. Additional obligations may apply to customers who place these products in the markets where WEEE is enforced TUV (Germany): approval to IEC60950/EN60950 VCCI
FCC Rules
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense.
27
Preliminary
P400e mSATA NAND Flash SSD Package Dimensions
Package Dimensions
Figure 4: mSATA Package 50.80mm
2.60mm DIA THRU 0.102in (2 PLCS)
3.11mm 0.122in
P1 0.75mm RAD 0.030in 3.75mm 0.148in 5.69mm 0.224in 1.40mm 0.055in 1.00mm 0.039in 1.00mm RAD 0.039in (2 PLCS)
1.35mm 0.053in 4.34mm 0.171in 2.83mm 0.111in 3.53mm 0.139in (2 PLCS)
2.08mm 0.082in 11.08mm 0.436in
29.85mm 1.175in 2.08mm 0.082in 2.83mm 0.111in 2.75mm 0.108in 5.27mm 0.207in 50.80mm 2.000in
28
Preliminary
P400e mSATA NAND Flash SSD References
References
Serial ATA: High-speed serialized AT attachment, Serial ATA working group, available at www.sata-io.org SATA 3.0 GOLD ATA-8 ACS2 JEDEC MO-300B (mSATA SSD Assembly)
29
Preliminary
P400e mSATA NAND Flash SSD Revision History
Revision History
Rev. B 11/13
Updated descriptions for bits 1 and 2 for Word 119
Rev. A 07/13
Initial release
8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 www.micron.com/productsupport Customer Comment Line: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains initial characterization limits that are subject to change upon full characterization of production devices.
30

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Preliminary

P400e mSATA NAND Flash SSD Features

P400e mSATA NAND Flash SSD

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Features Part Numbering Information

Operating Temperature Range Drive Interface

Drive Form Factor

Blank = Null AA = Contact factory AB = Contact factory AC = Contact factory

Firmware Feature Set

NAND Flash Type

NAND Flash Component

032 = 32GB 064 = 64GB 128 = 128GB 256 = 256GB

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD General Description

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Logical Block Address Configuration

Logical Block Address Configuration

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Interface Connectors

Table 3: Signal Assignments

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Performance

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Reliability

Mean Time to Failure

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Electrical Characteristics

Table 9: Maximum Ratings

Table 10: Shock and Vibration

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

0000000000000b Reserved for the Trusted Computing Group

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

Varies by capacity Total number of user addressable logical sectors

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

0b 00h 00h 0000h

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

154 3-0 151 0

F F F F F F (O)V X F F F F F F F ( )F (O) F F F (O)V (O)F

170 174 176 206

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN

P400e mSATA NAND Flash SSD Device ID

PDF: 09005aef8516d551 p400e_msata.pdf - Rev. B 11/13 EN